Temperature-compensated clock frequency monitoring

Abstract

Clock frequency monitoring circuit (200) which features: at least one temperature-related data source configured to provide temperature-related data associated with an electronic arrangement (202), which data includes a measured temperature; a clock generator (210) which has an operating frequency; a frequency monitoring system (414) configured to: to store a large number of clock frequency limits corresponding to a large number of different temperatures; at least on the basis of the measured temperature, to select one of the stored clock frequency limits that is assigned to the electronic arrangement (202); to determine the operating frequency of the clock generator (210); to compare the specified operating frequency of the clock generator (210) with the selected clock frequency limit; and if the operating frequency of the clock generator (210) exceeds the selected clock frequency limit, to generate a digital correction signal, wherein the corrective action signal serves to trigger a corrective action associated with the electronic arrangement (202) or a related arrangement, wherein generating the corrective action signal includes generating an interrupt signal for controlling a program application.

Description

[0001] The present disclosure relates to timer circuits and in particular to temperature-compensated clock frequency monitoring.

[0002] Electronic devices such as microprocessors and microcontrollers (MCUs) have at least one clock source operating at a known frequency, or access to one, to provide controlled timing for instruction processing, such as executing an application. The operating frequency of such clock sources is often temperature-dependent. For example, RC oscillator clocks often have a high temperature coefficient, resulting in frequency variations of up to 50% as a function of temperature, whereas crystal and ceramic resonator-based oscillators typically exhibit a more moderate temperature coefficient.

[0003] These signal frequency fluctuations in processor / MCU clock generators can lead to various functional problems, which can be exacerbated by temperature effects on a heat-sensitive assembly containing the processor or MCU. In some cases, the assembly's operating temperature significantly impacts its maximum operating clock frequency. For example, a processor or MCU operating at high temperature and high clock frequency may experience malfunctions, reduced component lifespan, or assembly failure. Therefore, for some assemblies, higher operating temperatures may necessitate lower operating frequencies, and similarly, higher operating frequencies may require lower temperatures. Furthermore, serial communication protocols such as Ethernet, USB, UART, and I2C typically require a correct or predictable frequency to avoid communication errors.

[0004] Furthermore, in certain control applications, such as power supply and motor control applications, operating the relevant control loop at an incorrect frequency can damage the application or the circuit, or pose a danger to a user. Such electronic circuits may include monitoring to evaluate processor / MCU clock performance. However, such monitoring does not typically check for excessively high frequency operation.

[0005] US patent application US 2012 / 0 044 000 A1 discloses a method and device for accurate clock synthesis. US 2015 / 0 116 041 A1 discloses a semiconductor device used to prevent a reference voltage and reference current supplied to a high-speed OCO from varying with changes in ambient temperature and / or an external power supply voltage, and to reduce the circuit area of ​​a power supply module. US 2015 / 0 134 995 A1 discloses a Systemon chip with a symmetrical multiprocessor having a plurality of cores, each configured to operate in a high-power mode and a low-power mode.

[0006] The object of the present invention is to provide a clock frequency monitoring circuit and a method for operating the same, which provides an interrupt signal if a clock frequency exceeds a predetermined temperature-dependent limit frequency.

[0007] This and other tasks are solved by the independent claims. Further developments are described in the dependent claims.

[0008] A clock frequency monitoring circuit according to the invention comprises: at least one temperature-related data source configured to provide temperature-related data associated with an electronic arrangement, which data includes a measured temperature; a clock generator having an operating frequency; and a frequency monitoring system.The frequency monitoring system is configured to: store a variety of clock frequency limits corresponding to a variety of different temperatures; select, at least on the basis of the measured temperature, one of the stored clock frequency limits associated with the electronic arrangement; determine the operating frequency of the clock; compare the determined operating frequency of the clock with the selected clock frequency limit; and, if the operating frequency of the clock exceeds the selected clock frequency limit, generate a digital corrective action signal, wherein the corrective action signal is used to trigger a corrective action associated with the electronic arrangement or a related arrangement, and wherein the generation of the corrective action signal includes the generation of an interrupt signal for controlling a program application.

[0009] Embodiments of the present invention provide systems and methods for monitoring the clock signal frequency of a digital clock generator, for example, a processor or a microcontroller, as a function of temperature and for taking corrective action when the monitored clock signal frequency exceeds a temperature-dependent frequency limit. In some embodiments, the systems and methods may include frequency limiting logic or circuitry configured to select, calculate, or otherwise determine a temperature-dependent clock frequency limiting metric, for example, in the form of a clock pulse limit (or alternatively, a frequency limit) based on a temperature detected by the sensor in conjunction with an electronic arrangement.The clock monitoring logic can implement a clock pulse counting window (for example, using an enable signal, an erase signal, and a reference clock signal) and can count the number of clock pulses output by the monitored clock within the defined clock pulse counting window. A digital comparator or other logic can compare the measured clock pulse count value with the clock pulse count threshold and, based on the output, determine whether to generate an interrupt signal or other notification to take corrective action. For example, in some embodiments, an interrupt signal can be generated if the measured clock pulse count value exceeds the clock pulse count threshold. An application can then process the interrupt signal or initiate other relevant corrective actions, such as slowing down the clock, applying a clock divider, or activating a cooling mechanism.

[0010] One embodiment provides a clock frequency monitoring circuit comprising a temperature sensor configured to measure a temperature associated with an electronic arrangement, a clock with an operating frequency, and a frequency monitoring system. The frequency monitoring system can be configured to determine the operating frequency of the clock; to determine, at least based on (a) the operating frequency of the clock and (b) the measured temperature associated with the electronic arrangement, to generate a corrective action signal; and to generate the corrective action signal to trigger a corrective action associated with the electronic arrangement or a related arrangement.

[0011] In some embodiments, the electronic arrangement is a microcontroller or a microprocessor.

[0012] In one embodiment, the temperature sensor, the clock generator and the frequency monitoring system are provided on a microcontroller.

[0013] In one embodiment, the frequency monitoring system is configured to determine a clock frequency limit as a function of the measured temperature associated with the electronic arrangement; to determine the operating frequency of the clock generator; to compare the operating frequency of the clock generator with the clock frequency limit and to generate a correction action signal if the operating frequency of the clock generator exceeds the clock frequency limit.

[0014] In one embodiment, determining a clock frequency limit based on the measured temperature associated with the electronic arrangement comprises storing a plurality of clock frequency limits corresponding to a plurality of different temperatures, and selecting one of the stored clock frequency limits based on the measured temperature associated with the electronic arrangement.

[0015] In one embodiment, the frequency monitoring system comprises a plurality of data registers that store a plurality of clock frequency limits corresponding to a plurality of different temperatures, and a multiplexer configured to select a specific clock frequency limit from the plurality of data registers based on the measured temperature associated with the electronic arrangement.

[0016] In one embodiment, determining the operating frequency of the clock generator involves determining a number of clock signals during a defined counting window.

[0017] In one embodiment, generating a corrective action signal involves generating an interrupt signal to control a program application.

[0018] In one embodiment, the temperature sensor is configured to measure the ambient temperature of the electronic arrangement.

[0019] Another embodiment provides a method for monitoring a clock frequency, which, using a temperature sensor, comprises measuring a temperature associated with an electronic arrangement; measuring an operating frequency of a clock generator; determining, by frequency monitoring logic, whether to generate a corrective action signal, at least based on (a) the measured operating frequency of the clock generator and (b) the measured temperature associated with the electronic arrangement; and, in response to the determination, generating the corrective action signal to trigger a corrective action associated with the electronic arrangement or a related arrangement.

[0020] Exemplary aspects and embodiments of the present disclosure are described below in conjunction with the following accompanying drawings: Fig. Figure 1 illustrates an exemplary temperature-compensated clock frequency monitor according to an exemplary embodiment of the present invention; Fig. Figure 2 illustrates an exemplary temperature-compensated clock frequency monitor according to an exemplary embodiment of the present invention, which includes clock frequency limits stored in data registers; Fig. Figure 3 illustrates an exemplary method for temperature-compensated clock frequency monitoring according to an exemplary embodiment of the present invention; and Fig. Figure 4 illustrates an exemplary electronic arrangement with a microcontroller comprising a temperature-compensated clock frequency monitoring system for identifying and managing temperature-based clock frequency conditions according to an exemplary embodiment of the present invention.

[0021] Fig. Figure 1 shows an exemplary temperature-compensated clock frequency monitoring system 100 for monitoring a clock generator 110 according to an exemplary embodiment of the present invention. The monitoring system 100 can be implemented in any suitable electronic arrangement that uses a clock signal, such as a microcontroller, a processor, or a power controller.

[0022] The elements of the monitoring system 100 can be implemented by an analog circuit, a digital circuit, instructions stored in a machine-readable medium for execution by a processor, or any suitable combination thereof.

[0023] The system 100 can include at least one temperature-dependent input 102 configured to generate or otherwise output temperature-dependent data that changes depending on a temperature associated with at least one electronic arrangement, for example, one of the elements of the system 100 or an arrangement in which the system 100 is implemented, for example, as a microcontroller, processor, power controller, or other electronic arrangement. For example, temperature-dependent input signals 102 can include a temperature sensor configured to detect the temperature of the electronic arrangement itself or the air temperature or ambient temperature near the electronic arrangement. The temperature sensor can generate analog signals that are proportional to the measured temperature or have another relationship to it.System 100 can include an A / D converter 104 to convert analog input data 102, for example, analog temperature sensor signals, into digital data, for example, digital temperature values. In another embodiment, the temperature sensor can be a digital sensor configured to output digital temperature values. In some embodiments, for example, as below with reference to... Fig. As explained in section 2, the temperature-dependent input signals 102 can additionally or alternatively include an operating voltage (for example, A). dd ) of the electronic arrangement (for example, microcontroller, processor) or of a power controller or other electronic arrangement that changes depending on the temperature of the electronic arrangement (or the associated arrangement).

[0024] System 100 may include a frequency limiting logic or circuit 106 (implemented, for example, in hardware and / or software / firmware) configured to calculate, select, or otherwise determine a temperature-dependent clock frequency limit for the clock generator 110 based on received digital temperature-related data. As explained below, the value of the frequency limit may be a quantification or representation of the clock frequency that can be compared to a measured clock frequency. The frequency limit may represent a minimum or maximum value for the measured clock frequency, beyond which a warning or interrupt may be issued, or another corrective action may be taken.For example, the frequency limit could be a maximum permissible clock frequency (or a representation thereof) at the temperature indicated by the temperature-dependent data of input 102 (for example, temperature sensor signals). If a measured clock frequency exceeds this frequency limit, a warning may be issued, or an interrupt or other corrective action and notification may be triggered, as explained below.

[0025] In the Fig. 1 exemplary embodiment shown (as well as in the one in Fig. In the embodiment shown in Figure 2, the frequency limiting logic or circuit 106 is configured to output a frequency limiting metric in the form of a count limit, indicating a maximum or minimum clock pulse count for a given count window (for example, based on a reference clock signal). In other embodiments, the frequency limiting logic or circuit 106 can output a frequency limiting metric in the form of a frequency value instead of a count limit. In either case, the frequency limiting metric, designated "B", can be passed to a digital comparator 108, which may include logic for comparing the frequency limiting metric with a measured clock frequency metric of a clock signal designated "A". If A is greater than B, an interrupt can be generated, as explained below.

[0026] The frequency of the clock signal from clock generator 110 can be measured in any suitable way. The method of measuring or displaying the clock frequency can correspond to the method of displaying the frequency limit. For example, the clock signal from clock generator 110 and a reference clock signal can be input into the control logic 112. The control logic 112 can, in turn, generate and output a clock signal to be monitored, an enable signal, and an erase signal. The output clock signal from clock generator 110 can be formatted to form suitable pulses that can be counted by the clock pulse counter 114.

[0027] The clock pulse counter 114 can use the signals from the control logic 112 to define a counting window for measuring the frequency of clock signals from the clock generator 110. For example, the clock pulse counter 114 can begin a continuous count of clock pulses when it receives an enable signal from the control logic 112 and stop the counting after receiving an erase signal from the control logic 112. The control logic 112 can control the respective timing of the enable and erase signals based on the reference clock to provide a standardized / constant counting window. Upon reaching the end of the counting window, the clock counter 114 can output the measured clock counter value to the digital comparator 108, which then compares the determined temperature-dependent frequency limiting metric, for example, represented by a count limit, with the measured clock pulse count, as explained below.(In an alternative embodiment, the clock pulse counter 114 can calculate a clock frequency value based on the measured clock pulse count value, which can be compared with a frequency limit value by the digital comparator 108.)

[0028] If the digital comparator 108 determines that the measured clock pulse count exceeds the temperature-dependent count limit (or if the measured clock pulse count is otherwise outside the limits), suitable software or other logic instructions 120 can issue a warning message or perform other corrective actions. For example, instructions 120 can generate a warning message that can be issued to a user, indicating a high or low temperature warning. As another example, instructions 120 can include interrupt logic configured to generate an interrupt, an alarm signal, or other relevant notification. The application software can then process the interrupt. Other corrective actions, such as slowing down the clock 110, applying a clock divider, or activating cooling mechanisms, can be implemented.

[0029] In some embodiments, the frequency limiting logic / circuit 106, the comparator 108, and the warning / corrective action instructions 120 can provide multi-stage analysis and response based on the magnitude and / or duration of the temperature violation. For example, the frequency limiting logic / circuit 106 can apply a variety of different temperature-dependent frequency limiting metrics (for example, clock pulse count limits) corresponding to a variety of temperature thresholds, and the comparator 108 can compare a measured clock pulse count against a variety of temperature-dependent frequency limiting metrics (for example, a variety of clock pulse count limits), and the warning / corrective action instructions 120 can initiate different responses based on violations of the different temperature-dependent frequency limiting metrics.For example, the warning / corrective action instructions 120 can (a) issue a warning notification in response to a determination by the comparator 108 that a measured clock pulse count exceeds a first clock pulse count limit, and (b) initiate a corrective action (e.g., a software interrupt) in response to a determination by the comparator 108 that the measured clock pulse count exceeds a second clock pulse count limit, or in response to the determination that the measured clock pulse count exceeds the first clock pulse count limit for a defined minimum period of time.

[0030] Fig. Figure 2 illustrates an exemplary temperature-compensated clock frequency monitoring system 200 for monitoring a clock generator 210 according to an exemplary embodiment of the present invention. The monitoring system 200 can be an embodiment of the one described in Fig. The system 100 shown in Figure 1 represents a frequency limiting logic or circuit 106 for determining a temperature-dependent clock frequency limit. This system includes a plurality of stored frequency limits for a plurality of different temperatures, and a suitable value of the frequency limits can be selected based on a currently measured temperature, as explained in more detail below. The monitoring system 200 can be implemented in any suitable electronic arrangement that uses a clock signal, such as a microcontroller, a processor, or a power controller. The elements of the monitoring system 200 can be implemented by an analog circuit, a digital circuit, instructions stored in a machine-readable medium for execution by a processor, or any suitable combination thereof.

[0031] Like System 100, System 200 can include at least one temperature-dependent input configured to generate or otherwise output temperature-dependent data that changes as a function of a temperature associated with at least one electronic arrangement, for example, one of the elements of System 200, or an arrangement in which System 200 is implemented, for example, as a microcontroller, processor, power controller, or other electronic arrangement. In this example, temperature-dependent inputs can include a temperature sensor 201 configured to detect a temperature associated with an electronic arrangement 202, for example, a temperature of the electronic arrangement itself, or an air temperature or ambient temperature near the electronic arrangement.The temperature sensor 201 can generate analog signals that are proportional to the measured temperature or have another relationship to it. The system 202 can also (or alternatively) provide an operating voltage (for example, V) as a temperature-dependent input. dd ) of the electronic arrangement 202 or another electronic arrangement (for example, microcontroller, processor or power controller or another electronic arrangement) which changes depending on the temperature of the electronic arrangement in question (or the arrangement associated with it).

[0032] An A / D converter 204 can process analog temperature-dependent input data, for example analog temperature sensor signals and / or analog voltage. dd -Convert signals into digital data, for example digital temperature or temperature-related values.

[0033] System 200 can include a plurality of data registers 207 that store a plurality of predefined clock frequency limits corresponding to a plurality of different predefined threshold temperature metrics. In this exemplary embodiment, three data registers 207A-207C can store three predefined clock frequency limiting metrics corresponding, for example, to three predefined threshold temperatures, such as 85°C, 105°C, and 125°C. In one embodiment, the stored clock frequency limiting metrics can decrease with increasing temperature threshold, since the maximum permissible clock frequency can decrease with increasing temperature of the arrangements. The predefined clock frequency limiting metrics can be frequency values, pulse count limits, or other values ​​that represent a clock frequency limit.In the example shown, the predefined clock frequency limiting metrics are pulse count limits that specify a maximum or minimum clock pulse count value for a given counting window (for example, based on a reference clock signal). Furthermore, in some embodiments, one or a multitude of predefined clock frequency limiting metrics stored in data registers (for example, registers 207A - 207C) can be implemented as lower speed limits (or minimum temperature thresholds), so that the system can implement upper speed limits (or maximum temperature thresholds), lower speed limits (or minimum temperature thresholds), or any combination thereof.

[0034] A multiplexer 206 can be configured to select one of the clock frequency limiting metrics (for example, a clock pulse count limit) from data registers 207A–207C based on the measured temperature value received by the A / D converter 204. The multiplexer 206 can be configured to treat the threshold temperature values ​​as upper or lower thresholds with respect to the measured temperature, depending on the specific embodiment.If the multiplexer 206 treats the threshold temperature values ​​as lower thresholds, for example, the multiplexer 206 selects the clock frequency limit (from register 207A) for high speed for measured temperatures below a first temperature threshold (for example, 85 °C), the medium speed from clock frequency limit (from register 207B) for measured temperatures above the first temperature threshold but below a second temperature threshold (for example, greater than or equal to 85 °C but below 105 °C), and selects the slow clock frequency limit (from register 207C) for measured temperatures above the second temperature threshold (for example, 125 °C).

[0035] The multiplexer 206 can output the selected frequency limiting metric (for example, the clock pulse count limit) to the digital comparator 208, which may include logic for comparing the frequency limiting metric with a measured clock frequency metric of a clock signal, as discussed above with reference to the digital comparator 108 of the system 100.

[0036] The frequency of the clock signal from the clock generator 210 can be measured in any suitable way, for example, in any way described above with respect to system 100. For example, a clock signal from the clock generator 210 and a reference clock signal can be input into the control logic 212, which can generate a clock signal to be monitored, an enable signal, and an erase signal and output them to a clock pulse counter 214. The clock pulse counter 214 can use the signals from the control logic 212 to define a counting window for measuring the frequency of clock signals from the clock generator 210, as described above.Upon reaching the end of the counting window, the clock counter 214 can output the measured clock count value to the digital comparator 208, which then compares the selected temperature-dependent frequency limiting metric, represented for example by a count limit value, with the measured clock pulse count value, as explained below.

[0037] If the digital comparator 208 determines that the measured clock pulse count exceeds the temperature-dependent count limit (or if the measured clock pulse count is otherwise outside the limits), the warning / corrective action logic 220 can generate a warning message, an interrupt, a warning signal, or other relevant notification or action. The application software can handle the interrupt. Remedial actions, such as slowing down the clock generator 210, applying a clock divider, or activating cooling mechanisms, can be implemented. As above regarding Fig. As explained in Figure 1, in some embodiments, the logic 205 for selecting speed limits, the comparator 208, and the logic 220 for warning / corrective actions can provide a multi-stage analysis and response based on the magnitude and / or duration of the temperature violation. For example, the comparator 208 can compare the measured clock pulse count value from the counter 214 with a variety of clock pulse count limits stored in registers 207A–207C, and the warning / corrective action logic 220 can initiate different responses based on violations of the different count limits.For example, the warning / corrective action logic 220 can (a) issue a warning message in response to a determination by comparator 208 that a measured clock pulse count exceeds the high-speed count limit (from register 207C), and (b) initiate a first corrective action (for example, a software interrupt) in response to a determination by comparator 208 that the measured clock pulse count exceeds the medium-speed count limit (from register 207B), and (c) initiate a second, more severe corrective action (for example, shutting down electronic arrangements in response to a determination by comparator 208 that the measured clock pulse count exceeds the low-speed count limit (from register 207A)).

[0038] Fig. Figure 3 illustrates an exemplary method 300 for temperature-compensated clock frequency monitoring of a digital clock generator, for example, a processor or microcontroller, according to an exemplary embodiment of the present invention. The method 300 may include one of the systems, components, and functionalities described above in relation to the Fig. 1 and Fig. The two systems shown, 100 and 200, were explained.

[0039] In the 302, a temperature sensor can generate analog signals proportional to the temperature of an arrangement, for example, indicating the temperature of the arrangement itself or of its surrounding environment. In some embodiments, as described above, additional temperature-dependent data, for example, an operating voltage V, can be transmitted. dda relevant electronic arrangement can also be detected or collected. In the case of 304, an A / D converter can process the analog temperature-dependent signals (for example, sensor signals and / or voltage). dd Convert inductive signals (-signals) into digital temperature signals. In the 306, the frequency limiting logic or circuitry can select, calculate, or otherwise determine a temperature-dependent clock frequency limiting metric based on the temperature indicated by the digital temperature signals. The clock frequency limiting metric can be implemented, for example, as a clock pulse count limit (for a specific counting window) or a frequency value.

[0040] At 308, the clock monitoring logic (for example, control logic and pulse counting logic) can implement a clock pulse counting window, for example, using an enable signal, an erase signal, and a reference clock signal, for example, as described above. At 310, the pulse counting logic can count the number of clock pulses (of the monitored clock) within the defined clock pulse counting window and output the measured clock pulse count. At 312, a digital comparator or other logic can compare the measured clock pulse count value, determined at 310, with the clock pulse count limit determined at 306 and, based on the output, generate an interrupt signal or other notification (for example, to perform a correction) at 314.For example, an interrupt signal can be generated if the measured clock pulse count exceeds the clock pulse count threshold (or in another embodiment, if the measured clock pulse count falls below a minimum clock pulse count threshold). At 314, a relevant application can process the interrupt signal or initiate other relevant corrective actions, such as slowing down the clock, applying a clock divider, or activating a cooling mechanism.

[0041] Fig.Figure 4 illustrates an exemplary electronic arrangement 400 with a plurality of arrangement components 402 and a microcontroller 404 with a temperature-compensated clock frequency monitoring system for identifying and managing temperature-based clock frequency conditions according to an exemplary embodiment of the present invention. The microcontroller 404 can include a clock generator 410, at least one application 412, and a temperature-compensated clock frequency monitoring system 414, which can incorporate one of the concepts disclosed above. The clock frequency monitoring system 414 can, for example, be configured to determine a frequency limit for the clock 410 as a function of an arrangement temperature measured by at least one temperature sensor 420.The at least one temperature sensor 420 can be provided in the microcontroller 404, or arranged for direct temperature measurement of a specific assembly component 402A, or arranged for measuring an air / ambient temperature, for example, inside a housing of the assembly 400, or otherwise arranged for measuring a temperature associated with the microcontroller 404 or the electronic assembly 400. The frequency monitoring system 414 can be configured to measure a clock frequency of the clock generator 410, compare the measured clock frequency with the detected temperature-dependent frequency limit, and, if the measured clock frequency exceeds the frequency limit, generate an interrupt for the application 412 or other signaling to initiate a corrective action based on the detected frequency overrun.

Claims

[1] Clock frequency monitoring circuit (200) which includes: at least one temperature-related data source configured to provide temperature-related data associated with an electronic arrangement (202), which data includes a measured temperature; a clock generator (210) which has an operating frequency; a frequency monitoring system (414) configured to: to store a large number of clock frequency limits corresponding to a large number of different temperatures; at least on the basis of the measured temperature, to select one of the stored clock frequency limits that is assigned to the electronic arrangement (202); to determine the operating frequency of the clock generator (210); to compare the specified operating frequency of the clock generator (210) with the selected clock frequency limit; and if the operating frequency of the clock generator (210) exceeds the selected clock frequency limit, to generate a digital correction signal, wherein the corrective action signal serves to trigger a corrective action associated with the electronic arrangement (202) or a related arrangement, and wherein the generation of the corrective action signal includes the generation of an interrupt signal for controlling a program application. [2] Clock frequency monitoring circuit (200) according to claim 1, wherein the at least one temperature-related data source comprises a temperature sensor (201) configured to generate sensor signals. [3] Clock frequency monitoring circuit (200) according to claim 2, wherein the temperature sensor (201), the clock generator (210) and the frequency monitoring system (414) are provided in a microcontroller. [4] Clock frequency monitoring circuit (200) according to one of claims 2 to 3, wherein the temperature sensor (201) is configured to measure an ambient temperature of an environment of the electronic arrangement (202). [5] Clock frequency monitoring circuit (200) according to one of claims 1 to 4, wherein the temperature-related data assigned to the electronic arrangement (202) includes a temperature-dependent operating voltage (V) dd ) the electronic order (202) include. [6] Clock frequency monitoring circuit (200) according to one of claims 1 to 5, wherein the electronic arrangement (202) comprises a CMOS (complementary metal oxide semiconductor) arrangement. [7] Clock frequency monitoring circuit (200) according to one of claims 1 to 6, wherein the electronic arrangement (202) comprises a microcontroller. [8] Clock frequency monitoring circuit (200) according to one of claims 1 to 6, wherein the electronic arrangement (202) comprises a microprocessor. [9] Clock frequency monitoring circuit (200) according to any one of claims 1 to 8, wherein the frequency monitoring system (414) comprises: a multitude of data registers (207A,B,C) that store the multitude of clock frequency limits corresponding to a multitude of different temperatures; and a multiplexer (206) configured to select a specific clock frequency limit from the plurality of data registers (207A,B,C) based on the measured temperature associated with the electronic arrangement (202). [10] Clock frequency monitoring circuit (200) according to any one of claims 1 to 9, wherein the frequency monitoring system (414) is configured to detect one of the stored clock frequency limits at least on the basis of (a) the measured temperature associated with the electronic arrangement (202) and (b) an operating voltage (V dd ) to select the electronic order (202). [11] Clock frequency monitoring circuit (200) according to one of claims 1 to 10, wherein determining the operating frequency of the clock generator (210) comprises determining a clock signal count during a defined counting window. [12] Clock frequency monitoring circuit (200) according to one of claims 1 to 11, wherein generating the corrective action signal includes generating a warning message. [13] Method for monitoring a clock frequency, wherein the method comprises the operation of a clock frequency monitoring circuit (200) according to any one of claims 1 to 12.

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