Radiation-emitting semiconductor chip and method for manufacturing a radiation-emitting semiconductor chip

Abstract

Radiation-emitting semiconductor chip (1) with: - a semiconductor layer sequence (2) with at least two active regions (6) which generate electromagnetic radiation during operation, - at least one reflective outer surface (8) arranged laterally to each active area (6), and - an electrically insulating area (7) arranged between the active areas (6), wherein - the electrically insulating area (7) has a reflective inner surface (9) which is arranged opposite the reflective outer surface (8), - the reflective inner surface (9) encloses an angle of at least 35° and at most 55° with a principal extension plane of the semiconductor chip (1), - the reflective outer surface (8) encloses an angle of at least 35° and at most 55° with a principal extension plane of the semiconductor chip (1), and - a reflective coating (15) is arranged on the semiconductor layer sequence (2) in the region of the reflective outer surface (8) and an antireflective coating (16) is arranged on the semiconductor layer sequence (2) in the electrically insulating region (7), or - an antireflective coating (16) is arranged on the semiconductor layer sequence (2) in the area of ​​the reflective outer surface (8) and a reflective coating (15) is arranged on the semiconductor layer sequence (2) in the electrically insulating area (7).

Description

[0001] A radiation-emitting semiconductor chip is specified. Furthermore, a method for producing a radiation-emitting semiconductor chip is specified.

[0002] The publication CARTER, AC [et al.]: A new surface emitting GaInAsP 1.3 um LED with up to threefold enhancement in external quantum efficiency. In: 1979 International Electron Devices Meeting. IEEE, 1979, pp. 118-121, describes a surface-emitting GaInAsP LED. The publication EP 1 553 640 A1 describes a semiconductor light-emitting device and a method for its fabrication, as well as a light-emitting apparatus.

[0003] One problem to be solved is to provide a radiation-emitting semiconductor chip with improved emission characteristics. Furthermore, a method for producing such a radiation-emitting semiconductor chip is to be provided.

[0004] These objects are achieved by a radiation-emitting semiconductor chip having the features of patent claim 1 and by a method having the steps of patent claim 14.

[0005] Advantageous embodiments of the radiation-emitting semiconductor chip and of the method for producing a radiation-emitting semiconductor chip are the subject of the respective dependent claims.

[0006] The radiation-emitting semiconductor chip comprises a semiconductor layer sequence with at least two active regions that generate electromagnetic radiation during operation. References here and below to "radiation" simply refer to "electromagnetic radiation."

[0007] The semiconductor layer sequence is preferably based on a III-V compound semiconductor material, such as a nitride compound semiconductor material, a phosphide compound semiconductor material or an arsenide compound semiconductor material.

[0008] The semiconductor chip preferably has a main extension plane. A lateral direction is preferably aligned parallel to the main extension plane, and a vertical direction is aligned perpendicular to the lateral direction.

[0009] The radiation generated during operation of the at least two active regions may be near-ultraviolet radiation, visible light and / or near-infrared radiation.

[0010] Preferably, the at least two active regions are arranged spaced apart from one another in the lateral direction. This means that in this case, the at least two active regions are not in direct contact with one another at any point on the semiconductor chip. Furthermore, the at least two active regions are preferably arranged in a common plane. This means that the at least two active regions are preferably designed without overlap in plan view.

[0011] Alternatively, it is possible for the at least two active regions to be adjacent to each other, for example, in the middle. In this case, it is possible for the at least two active regions to be in direct contact with each other.

[0012] According to one embodiment, the radiation-emitting semiconductor chip comprises a carrier. The carrier is preferably provided and configured to mechanically stabilize the semiconductor chip. The carrier can be formed from a potting compound. For example, the potting compound is a metal. In this case, the carrier is electrically conductive. Advantageously, the heat dissipation of the semiconductor chip can be improved by means of the metallic potting compound.

[0013] Furthermore, it is also possible for the carrier to comprise or consist of a semiconductor material. For example, the semiconductor material is silicon. In this case, the carrier is electrically insulating.

[0014] If the carrier is electrically insulating, the active areas can be supplied with current via an electrically conductive contact. In this case, the electrically conductive contact is embedded in the encapsulation.

[0015] The radiation-emitting semiconductor chip comprises an electrically insulating region arranged between the active regions. The electrically insulating region preferably defines the lateral spacing of the active regions. The electrically insulating region preferably comprises an electrically insulating material or consists of an electrically insulating material. For example, the electrically insulating region comprises one of the following materials or is formed from one of the following materials: SiO2, TiO2, HfO2, ZrO2.

[0016] The electrically insulating region preferably comprises SiO2 with a refractive index of approximately 1.4. This allows a comparatively large refractive index difference compared to the semiconductor layer sequence, for example based on AlGaAs, with a refractive index of approximately 3.5. This advantageously increases total internal reflection of the radiation at the insulating region.

[0017] The radiation-emitting semiconductor chip comprises at least one reflective outer surface arranged laterally of each active region. The at least one reflective outer surface preferably has a reflectivity of at least 90%, in particular 95%, 99%, or 100%, for radiation generated in the active regions.

[0018] Preferably, each active region is arranged between the reflective outer surface and the electrically insulating region. For example, the active regions can be arranged at a laterally spaced distance from the reflective outer surface and the electrically insulating region.

[0019] The at least one reflective outer surface is designed to reflect a portion of the radiation from the active regions. The at least one reflective outer surface comprises or consists of a metal, for example. The at least one reflective outer surface comprises or consists of at least one of the following metals, for example: silver, aluminum, rhodium, nickel, copper, gold.

[0020] An interface between the reflective outer surface and the semiconductor layer sequence is preferably electrically insulating. In this case, the reflective outer surface has a dielectric at the interface. The interface of the at least one reflective outer surface is, in this case, electrically insulating.

[0021] Alternatively, it is possible for the at least one reflective outer surface to be a Bragg mirror comprising alternating layers of a high-refractive-index material and a low-refractive-index material. In this case, the at least one reflective outer surface is generally electrically insulating.

[0022] The reflective outer surface forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip. Preferably, the reflective outer surface forms an angle of at least 40° and at most 50° with a main extension plane of the semiconductor chip. Particularly preferably, the angle between the reflective outer surface facing the associated active region and the main extension plane of the semiconductor chip is 45°.

[0023] The radiation-emitting semiconductor chip comprises a semiconductor layer sequence having at least two active regions which generate electromagnetic radiation during operation, and at least one reflective outer surface arranged laterally of each active region, wherein the reflective outer surface has an angle of at least 35° and at most 55° to a main extension plane of the semiconductor chip.

[0024] Furthermore, the active regions are preferably arranged in the same semiconductor layer sequence. This advantageously makes the semiconductor chip comparatively compact, in contrast to a semiconductor chip that has two separate semiconductor layer sequences, each with an active region.

[0025] According to one embodiment, the reflective outer surface is formed contiguously and completely encloses the electrically insulating region. The reflective outer surface preferably has the shape of a circle or a polygon in plan view. In a cross-section perpendicular to the main extension plane, the reflective outer surface can comprise a first region and a second region that are opposite one another. Preferably, each region of the reflective outer surface is assigned an active region. If the reflective inner surface has the shape of a circle in plan view, the reflective outer surface, which is assigned to an active region, preferably extends in a curved manner in the lateral direction.

[0026] If the reflective inner surface has the shape of a polygon in plan view, the reflective outer surface, which is assigned to each active region, runs in a straight line in the lateral direction. Alternatively, the reflective outer surface assigned to each active region can be discontinuous. In this case, the reflective outer surface assigned to each active region is preferably laterally spaced.

[0027] Alternatively, the reflective outer surface, each of which is assigned to an active area, is composed of straight and curved areas in the lateral direction.

[0028] The electrically insulating region has a reflective inner surface arranged opposite the reflective outer surface. In this case, the reflective inner surface preferably has a reflectivity of at least 90%, in particular 95%, 99%, or 100%, for radiation generated in the active regions.

[0029] The reflective inner surface is, for example, electrically insulating and comprises or consists of dielectric materials. The reflective inner surface is, for example, a Bragg mirror consisting of alternating layers of a high-refractive-index and a low-refractive-index material. Furthermore, the reflective inner surface can be a combination of metallic materials and electrically insulating materials.

[0030] The reflective inner surface forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip. Preferably, the reflective inner surface forms an angle of at least 40° and at most 50° with a main extension plane of the semiconductor chip. Particularly preferably, the angle between the reflective inner surface facing the associated active region and the main extension plane of the semiconductor chip is 45°. Furthermore, the reflective inner surface and the respective opposite reflective outer surface form an angle of 90°.

[0031] According to at least one embodiment, the reflective inner surface, viewed from above, has the shape of a circle, a round ring, a polygon, or a polygonal ring. Thus, the reflective inner surface is formed as a continuous structure. In a cross-section perpendicular to the main extension plane, the reflective inner surface can comprise a first region and a second region that are opposite one another. Preferably, each region of the reflective inner surface is assigned an active region.

[0032] If the reflective inner surface has the shape of a polygon or a polygonal ring in plan view, the reflective inner surface, which is assigned to an active area, runs in a straight line in the lateral direction.

[0033] According to one embodiment, the electrically insulating region is formed as a projection that is laterally delimited by the reflective inner surface. The projection preferably extends in the vertical direction. A side surface of the projection can be formed by the reflective inner surface or can encompass the reflective inner surface. An extension of the reflective inner surface in the vertical direction preferably specifies a height of the projection. Furthermore, the projection can have a cover surface. In this case, the cover surface of the projection connects end points of the side surface of the projection. In this case, the cover surface preferably extends in the lateral direction.

[0034] According to one embodiment, the semiconductor layer sequence comprises a first cladding layer and a second cladding layer, each extending in the lateral direction. Furthermore, the first cladding layer and the second cladding layer are arranged vertically one above the other. The at least two active regions are preferably arranged between the first cladding layer and the second cladding layer.

[0035] According to one embodiment, the semiconductor layer sequence has an active zone comprising the active regions. The active zone is preferably arranged between the first cladding layer and the second cladding layer. The active zone, for example, directly borders the first cladding layer and the second cladding layer.

[0036] According to one embodiment, the reflective inner surface completely penetrates the active zone. The radiation generated in each of the active regions forms a beam with a beam profile that, in cross-section perpendicular to a main direction of extension of the beam, has a lateral and a vertical extension. If the reflective inner surface completely penetrates the active zone, the beam profile can completely overlap with the reflective inner surface in a side view and be reflected.

[0037] According to one embodiment, the active zone comprises a propagation region. The radiation preferably has a propagation direction along the active zone that is predetermined by a longitudinal component of the propagation region. In cross-section relative to the propagation direction, the beam profile has a vertical and lateral extension that is predetermined by a vertical and lateral extension of the propagation region.

[0038] According to one embodiment, the active zone is arranged within the propagation region. The propagation region preferably extends beyond the active zone in the vertical direction. The beam profile can thus extend beyond the active zone in the vertical direction. Furthermore, the propagation region can have the same lateral dimension as the active zone.

[0039] The propagation region is preferably arranged between the first cladding layer and the second cladding layer. For example, the propagation region can comprise materials that are different from the first cladding layer and the second cladding layer. In this case, the cladding layers have a lower refractive index for the radiation than the propagation region. By selecting the refractive index of the propagation region, for example, the vertical extent of the propagation region and thus of the beam profile can be predetermined.

[0040] According to one embodiment, the reflective inner surface only partially penetrates the propagation region. This means that the propagation region is not completely penetrated by the reflective inner surface. In this case, the beam profile can partially overlap with the reflective inner surface in a side view, whereby radiation from the non-overlapping part of the beam profile can propagate further into the propagation region.

[0041] For example, the reflective inner surface penetrates the propagation area to a maximum of 70%. In this case, a maximum of 70% of the radiation can be reflected by the reflective inner surface. Alternatively, it is possible that the reflective inner surface penetrates the propagation area to a maximum of 50%, and a maximum of 50% of the radiation can be reflected by the reflective inner surface. Furthermore, it is possible that the reflective inner surface penetrates the propagation area to a maximum of 30%, and a maximum of 30% of the radiation can be reflected by the reflective inner surface.

[0042] If at least two active areas are directly adjacent to each other, it is possible that the propagation area is not broken through.

[0043] According to one embodiment, the reflective outer surface completely penetrates the active zone. In this case, the beam profile can completely overlap with the reflective outer surface and be reflected in a side view.

[0044] According to one embodiment, the reflective inner surface and the reflective outer surface do not completely penetrate the semiconductor layer sequence. Preferably, the first cladding layer of the semiconductor layer sequence is not completely penetrated by the reflective inner surface and the reflective outer surface. This means that the first cladding layer is formed contiguously.

[0045] Furthermore, the first cladding layer has no openings that penetrate the first cladding layer.

[0046] According to one embodiment, a first contact layer is arranged on a cover surface of the semiconductor layer sequence. The first contact layer is preferably electrically conductive and is configured and provided for electrically contacting the semiconductor layer sequence. The first contact layer preferably covers a large portion of the cover surface of the semiconductor layer sequence. The first contact layer preferably covers 80% or 90% of the semiconductor layer sequence. The first contact layer preferably comprises or consists of a metal.

[0047] According to one embodiment, a second contact layer is arranged on a bottom surface of the semiconductor layer sequence. The second contact layer is preferably electrically conductive and is configured and provided for electrically contacting the semiconductor layer sequence. The bottom surface of the semiconductor layer sequence is opposite the top surface. The second contact layer is preferably arranged in regions on the bottom surface of the semiconductor layer sequence. The second contact layer preferably comprises or consists of a metal.

[0048] The second contact layer has, for example, at least two contact regions, each of which is arranged laterally spaced from one another on the bottom surface of the semiconductor layer sequence. Furthermore, the at least two contact regions each have a width and a length. The width of the at least two contact regions is preferably the same at every point.

[0049] Alternatively, the width of the at least two contact regions may taper or widen in the direction of the electrically insulating region.

[0050] According to one embodiment, the first contact layer and the second contact layer specify the lateral dimensions of each active region.

[0051] If the second contact layer has the at least two contact regions, the at least two contact regions preferably each overlap with one of the at least two active regions in plan view. In the overlapping regions, a current density of the current to be impressed is comparatively high. In the overlapping regions, the current density is preferably so large that the active zone emits radiation and thus forms the at least two active regions. This means that the lateral dimensions of the at least two active regions are preferably each predetermined by the width and length of the at least two contact regions. An active region preferably has a larger area than an associated contact region.

[0052] Alternatively, the semiconductor chip comprises a ridge waveguide comprising the first cladding layer, the second cladding layer, and / or the active zone. The ridge waveguide is formed by a projection comprising the first cladding layer, the second cladding layer, and / or the active zone. The lateral dimension of the ridge waveguide specifies the lateral dimension of the active region. Flanks of the ridge waveguide can each be covered by a passivation layer having a refractive index that is different from a refractive index of the first cladding layer and / or the second cladding layer. This advantageously allows the lateral dimensions of the active region to be specified particularly well.

[0053] According to one embodiment, the semiconductor layer sequence comprises a plurality of active regions arranged in pairs opposite one another and in a circular pattern. In this case, the second contact layer preferably comprises a plurality of contact regions, which are preferably arranged in pairs opposite one another and in a circular pattern.

[0054] The contact regions preferably each specify a length and width of the active regions. The active regions lying opposite one another in pairs preferably have a common axis that extends along the lengths of the active regions lying opposite one another in pairs. An angle is preferably arranged between directly adjacent axes of two active regions lying opposite one another in pairs. In this case, the axes intersect in the electrically insulating region. The angles between the axes are preferably equidistant. Furthermore, directly adjacent axes of two active regions lying opposite one another in pairs can each have an angle of 180° / n. In this case, n is the total number of axes and n*2 is the total number of active regions. If the semiconductor chip has directly adjacent axes, the propagation region runs along one of the axes.Directly adjacent propagation areas preferably have an angle of 180° / n, where n is the total number of propagation areas. Such an arrangement advantageously achieves a particularly homogeneous radiation pattern.

[0055] According to one embodiment, the semiconductor layer sequence comprises a plurality of active regions arranged in pairs opposite one another and / or in a circular pattern. For example, directly adjacent axes of two active regions opposite one another extend parallel to one another.

[0056] A reflective coating is arranged on the semiconductor layer sequence in the region of the reflective outer surface. The reflective coating is preferably arranged on the top surface of the semiconductor layer sequence and can be in direct contact with it. The reflective coating preferably has a radiation reflectivity of at least 90%, 95%, or 99%. Thus, the reflective coating can be a highly reflective coating.

[0057] An anti-reflective coating is applied to the electrically insulating region of the semiconductor layer sequence. The anti-reflective coating is preferably applied to the top surface of the semiconductor layer sequence and can be in direct contact with it. Reflection at the interface between the top surface of the semiconductor layer sequence and the anti-reflective coating is, for example, at most 20%, 10%, 5%, 0.0001%, or 0.00001%.

[0058] One idea behind the semiconductor chip described here is that the semiconductor layer sequence has at least two active regions, each of which generates electromagnetic radiation during operation. Radiation emitted in the active regions can propagate in the propagation region toward the reflective outer surface. The radiation can be reflected by the reflective outer surface toward the top surface of the semiconductor layer sequence. There, the radiation can be largely reflected back to the reflective outer surface by the reflective coating. The radiation initially emitted toward the reflective outer surface is thus reflected back toward the insulating region.The back-reflected radiation as well as the radiation emitted in the direction of the insulating region can subsequently be reflected at the reflective inner surface in the direction of the top surface of the semiconductor layer sequence and at least partially coupled out of the semiconductor chip via the anti-reflective coating.

[0059] Advantageously, the light extraction efficiency and the radiation characteristics of the semiconductor chip are improved, since the emitted radiation of the active areas is coupled out via the anti-reflective coating and can overlap in the far field.

[0060] An anti-reflective coating is applied to the semiconductor layer sequence in the region of the reflective outer surface, and a reflective coating is applied to the semiconductor layer sequence in the electrically insulating region. In this case, the emitted radiation from the active regions is coupled out via the anti-reflective coating above the reflective outer surface. Advantageously, the radiation is not locally superimposed in the area of ​​the anti-reflective coating, and less heating of the semiconductor chip can be achieved.

[0061] According to one embodiment, an anti-reflective coating is arranged on the semiconductor layer sequence in the region of the reflective outer surface and in the electrically insulating region. In this case, the radiation emitted by the active regions is coupled out via the anti-reflective coating over the reflective outer surface and over the reflective inner surface. This can further reduce thermal stress on the semiconductor chip.

[0062] In the event that the at least two active regions adjoin one another and the semiconductor chip thus has no electrically insulating region, the anti-reflective coating is arranged only on the semiconductor layer sequence in the region of the reflective outer surface. Alternatively, the anti-reflective coating can be arranged on the semiconductor layer sequence in the region of the reflective outer surface associated with one of the active regions. In this case, the reflective coating can be arranged on the semiconductor layer sequence in the region of the reflective outer surface associated with an opposite active region.

[0063] According to one embodiment, the radiation-emitting semiconductor chip is a superluminescent light-emitting diode with increased brightness and / or luminous flux compared to a conventional light-emitting diode. The radiation generated by the superluminescent light-emitting diode can be amplified in the propagation region. For example, radiation propagating toward the reflective outer surface can be directed toward the reflective inner surface by means of the reflective coating and further reflection at the reflective outer surface. Emitted radiation propagating toward the inner surface can advantageously overlap with the radiation reflected back from the reflective outer surface. The thus overlapped radiation from the active regions can advantageously be overlapped in the region of the anti-reflective coating.The coupled radiation is thus amplified and has an increased brightness and / or luminous flux.

[0064] Unlike a laser diode, superluminescent light-emitting diodes do not have a resonator. In combination with the superluminescent light-emitting diode, radiation is advantageously amplified, with the radiation exhibiting comparatively low temporal coherence and comparatively high spatial coherence.

[0065] According to one embodiment, the radiation-emitting semiconductor chip generates laser radiation. In this case, the semiconductor chip is, for example, a laser diode, in particular a semiconductor laser diode. The laser radiation generated by the semiconductor chip preferably has a comparatively high temporal coherence and a comparatively high spatial coherence. In this case, the laser radiation is coherent radiation. The radiation emitted by the two active regions is, in this case, preferably monochromatic and coherent laser light. The radiation thus advantageously has a comparatively narrow bandwidth while simultaneously having a comparatively high luminous flux.

[0066] By combining a portion of the radiation reflected by the inner surface and a portion of the radiation reflected by the anti-reflective coating, the semiconductor chip can be converted from a superluminescent light-emitting diode to a laser diode.

[0067] For example, if the reflective inner surface is designed so that it only partially penetrates the propagation area, the generated radiation can partially propagate between opposing reflective outer surfaces in the propagation area. In this case, the propagation area forms a resonator for the radiation. By superimposing the radiation propagating between the opposing reflective outer surfaces in the propagation area, laser light, for example, can be generated, which is partially coupled out via the reflective inner surface and the anti-reflective coating.

[0068] For example, if the semiconductor chip has a plurality of active regions, the laser light from the pairs of the plurality of active regions overlaps. This advantageously further increases the coupling efficiency of the semiconductor chip.

[0069] Furthermore, the anti-reflective coating can advantageously be used to specify a degree of radiation reflection. This allows a portion of the radiation to be guided back into the propagation region, which can be configured as a resonator, by means of the anti-reflective coating on the first cladding layer.

[0070] According to one embodiment, properties of the electromagnetic radiation are specified by a thickness of the active regions and a width of the second contact layer. Preferably, the radiation has a fast axis and a slow axis in a far field. In the far field, the radiation propagates in space as a plane wave. The oscillation direction of the radiation in which the plane wave has the higher propagation velocity is called the "fast axis," while the oscillation direction perpendicular to the fast axis and with a lower propagation velocity is called the "slow axis."

[0071] The width of the second contact layer can determine the width of the active regions. The width of the active regions can also determine the slow axis. If the width is relatively large, the slow axis generally has a relatively small width. If the width is relatively small, the slow axis generally has a relatively small value.

[0072] According to one embodiment, the contact layer widens or tapers toward the electrically insulating region. If the contact layer widens or tapers toward the electrically insulating region, the electrical radiation can have a comparatively broad mode in a broader region. If the contact layer widens, the fast axis has a comparatively high value. If the contact layer tapers, the comparatively broad mode can be filtered out in a broader region by the tapered region, and the fast axis has a comparatively small value. Advantageously, high saturation can be achieved by means of the widening or tapered contact layer.

[0073] The fast axis can be defined by the thickness of the active regions. If the thickness is relatively large, the fast axis generally has a relatively small width. If the thickness is relatively small, the fast axis generally has a relatively large width.

[0074] Furthermore, a method for producing a radiation-emitting semiconductor chip is specified, with which a radiation-emitting semiconductor chip described here can be produced. All features and embodiments disclosed in connection with the radiation-emitting semiconductor chip are therefore also applicable in connection with the method, and vice versa.

[0075] A semiconductor layer sequence with an active zone is provided which is suitable for generating electromagnetic radiation.

[0076] An outer recess is created in the semiconductor layer sequence. The outer recess preferably penetrates the active zone completely. The outer recess is created, for example, by removing material from the semiconductor layer sequence. The recess is created, for example, using a chemical etching process.

[0077] A reflective layer is applied to one side surface of the outer recess. The reflective layer preferably completely covers the side surface of the recess and forms the reflective outer surface.

[0078] According to one embodiment of the method, an electrically insulating layer is applied to a central region of the semiconductor layer sequence. In plan view, the central region is arranged in the middle of the semiconductor layer sequence. This means that, in plan view, the central region preferably has maximum distances from side regions of the semiconductor layer sequence.

[0079] The electrically insulating layer forms the electrically insulating region. The electrically insulating layer and the reflective layer can be applied, for example, using chemical vapor deposition (CVD) or physical vapor deposition (PVD). The reflective layer and / or the electrically insulating layer can, for example, consist of a plurality of individual layers.

[0080] The at least one side surface of the outer recess has an angle of at least 35° and at most 55° to a main extension plane of the semiconductor chip.

[0081] An inner recess is created in the semiconductor layer sequence in the central area.

[0082] The electrically insulating layer is applied to a side surface of the inner recess. The electrically insulating layer can preferably completely cover the side surface of the inner recess.

[0083] The side surface of the inner recess forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip.

[0084] According to one embodiment of the method, the semiconductor layer sequence is removed from a growth substrate. The semiconductor layer sequence is freely accessible in this region after removal of the growth substrate.

[0085] According to one embodiment of the method, a carrier is produced on the semiconductor layer sequence. For example, a prefabricated carrier can be applied in a form-fitting manner over a surface of the semiconductor layer sequence that has the recesses. The carrier is preferably produced before the growth substrate is removed.

[0086] Alternatively, a potting material is applied over a surface of the semiconductor layer sequence that has the recesses. The potting material preferably completely fills the inner recess and the outer recess in the semiconductor layer sequence. Furthermore, the applied potting material can extend beyond the recess, creating a continuous layer of potting material. The potting material is preferably in a flowable form during application. In this case, the potting material is generally cured after application. The cured potting material preferably forms the carrier and is the mechanically stabilizing component of the semiconductor chip.

[0087] According to one embodiment of the method, a plurality of radiation-emitting semiconductor chips can be produced by means of the method. Preferably, the plurality of semiconductor chips can be produced on a common wafer, which is, for example, singulated after the semiconductor chips have been produced.

[0088] The radiation-emitting semiconductor chip and the method for producing the radiation-emitting semiconductor chip are explained in more detail below using exemplary embodiments. The Fig. 1 to 8 show schematic representations of a radiation-emitting semiconductor chip according to various embodiments, the Fig. 9 to 12 show schematic sectional views of process stages of a method for producing a radiation-emitting semiconductor chip according to an embodiment, the Fig. 13 to 15 show exemplary measurements of the far field of electromagnetic radiation, based on the Fig. 16 to 18 an example of a measurement of the luminous flux of electromagnetic radiation is explained, the Fig. 19 to 24 show simulations of the far field of electromagnetic radiation according to an embodiment, the Fig. 25 and Fig. 26 show measurements of the far field of electromagnetic radiation of a radiation-emitting semiconductor chip according to an embodiment, and the Fig. 27 to 31 show schematic representations of a section of a radiation-emitting semiconductor chip according to an embodiment in each case.

[0089] Identical, similar, or functionally identical elements are provided with the same reference numerals in the figures. The figures and the relative sizes of the elements depicted in the figures are not to be considered to scale. Rather, individual elements may be exaggerated for clarity and / or clarity.

[0090] The schematic sectional view of the Fig. 1 shows the embodiment of a semiconductor chip 1 described here along a Fig. 2 shown section line AA.

[0091] The semiconductor chip 1 according to the embodiment of the Fig. 1 and Fig. 2 comprises a semiconductor layer sequence 2 with at least two active regions 6 which generate radiation during operation. Fig. 1 shows a sectional view along the Fig. 2. The semiconductor layer sequence 2 has a first cladding layer 3 and a second cladding layer 4, between which an active zone 5 is arranged, comprising the active regions 6. The active regions 6 are spaced apart from one another in the lateral direction and arranged in a common plane. Furthermore, a propagation region 12 encompasses the active zone 5. The radiation generated by the active regions 6 propagates in the propagation region 12, which extends parallel to the active zone 5.

[0092] A reflective outer surface 8 is arranged laterally of each active region 6. The reflective outer surface 8 has an angle of approximately 45° to a main extension plane of the semiconductor chip. Furthermore, the semiconductor chip has an electrically insulating region 7 arranged between the active regions 6. The electrically insulating region 7 has a reflective inner surface 9 arranged opposite the reflective outer surface 9. Furthermore, the electrically insulating region is formed as a projection 10 that is laterally delimited by the reflective inner surface 9. The reflective inner surface 9 has an angle of approximately 45° to a main extension plane of the semiconductor chip 1.

[0093] The reflective outer surface 8 and the reflective inner surface 9 completely penetrate the active zone 4 and the propagation region 12. Furthermore, the semiconductor chip 1 has a carrier 24 that positively covers a surface of the semiconductor layer sequence facing the reflective inner surface 9 and the reflective outer surface 8.

[0094] In a cross-section perpendicular to the main extension plane of the semiconductor chip 1, which corresponds to the section line AA in the Fig. 2, the reflective outer surface 8 comprises a first region 8a and a second region 8b, which are opposite one another. Each region of the reflective outer surface 8a, 8b is assigned an active region 6. Furthermore, the reflective inner surface 9, in the cross-section perpendicular to the main extension plane of the semiconductor chip 1, comprises a first region 9a and a second region 9b, which are opposite one another. Each region of the reflective inner surface 9a, 9b is assigned an active region 6.

[0095] An active region 6 is arranged between the first region of the reflective outer surface 8a and the first region of the reflective inner surface 9a. Furthermore, an active region 6 is arranged between the second region of the reflective outer surface 8b and the second region of the reflective inner surface 9b.

[0096] A first contact layer 13 is arranged in regions on a top surface of the semiconductor layer sequence 2. Furthermore, a second contact layer 14 is arranged on a bottom surface of the semiconductor layer sequence 2. In addition to the second contact layer 13, a reflective coating 15 is arranged on the top surface of the semiconductor layer sequence 2 in the region of the reflective outer surface 8. The reflective coating 15 is preferably a highly reflective coating. Furthermore, an antireflective coating 16 is arranged on the top surface of the semiconductor layer sequence 2 in the electrically insulating region 7.

[0097] The second contact layer 14 has, according to the cross section of the section line AA in the Fig. 2 has a first contact region 14a and a second contact region 14b, which are each arranged laterally spaced from one another on a bottom surface of the semiconductor layer sequence 2. Furthermore, the contact regions 14a, 14b each have a width and a length.

[0098] According to the Fig. 1 indicate the directions of radiation propagation. The radiation generated in the active regions forms a beam with a beam profile that, in cross-section perpendicular to a main direction of extension of the beam, has a lateral and a vertical extension. Radiation propagating in the direction of the reflective outer surface 8 is directed in the direction of the reflective inner surface 9 by means of the reflective coating 15 and further reflection by the reflective outer surface 8. Emitted radiation propagating in the direction of the reflective inner surface 9 overlaps with the radiation reflected by the reflective outer surface 8. The radiation from the active regions 6 thus overlapped is overlapped and decoupled in the region of the anti-reflective coating 16. The decoupled radiation is thus amplified and has increased brightness and luminous flux.

[0099] The radiation-emitting semiconductor chip 2 according to the embodiment of the Fig. 1 and Fig. 2 is designed as a superluminescent light-emitting diode.

[0100] As shown in the top view of the Fig. 2, the reflective outer surface 8 in the semiconductor chip according to the embodiment of the Fig. 1 and Fig. 2 is formed contiguously. The reflective outer surface 8 completely encloses the electrically insulating region 7, which is formed by the reflective inner surface 9.

[0101] The first contact layer 13 largely covers the top surface of the semiconductor layer sequence 1. Furthermore, the semiconductor chip has a plurality of contact regions 14c. The first contact layer 13 and the second contact layer 14 with the plurality of contact regions 14c define the lateral dimensions of each active region 6. Preferably, an active region 6 has a larger area than an associated contact region of the second contact layer 14.

[0102] The active regions 6, which are defined by the plurality of contact regions 14c, are arranged in pairs opposite one another and in a circular configuration. The contact regions of the plurality of contact regions 14c each define a length and width of the active regions 6. The pairs of opposing active regions 6 have a common axis (see, for example, section AA) that extends along their lengths. An angle is arranged between the axes of the pairs of opposing active regions 6. In this case, the axes intersect in the electrically insulating region 7. Furthermore, the angles between the axes are equidistant.

[0103] The semiconductor chip 1 is also surrounded by a frame 20. The frame 20 separates a functional area from the outside. The frame 20 is, for example, a raised portion or a depression.

[0104] In contrast to the embodiment according to the Fig. 1 and Fig. 2 penetrates the reflective inner surface 9 of the semiconductor chip 1 according to the embodiment of the Fig. 3 the propagation area 12 partially.

[0105] In this embodiment, the propagation region 12 is arranged around the active zone 5. The propagation region 12 extends beyond the active zone 5 in the vertical direction. This means that the beam profile of the beam extends beyond the active zone 5 in the vertical direction.

[0106] The propagation region 12 is arranged between the first cladding layer 3 and the second cladding layer 4. For example, the propagation region 12 can comprise materials that are different from the materials of the first cladding layer 3 and the second cladding layer 4. In this case, the cladding layers 3, 4 have a lower refractive index for the radiation than the propagation region 12.

[0107] The generated radiation thus partially propagates between opposing reflective outer surfaces 8 in the propagation region 12. In the present embodiment, the propagation region 12 forms a resonator for the radiation. For example, the anti-reflective coating can be used to specify a degree of reflection of the radiation. Thus, a portion of the radiation can be guided back into the propagation region 12, which can be configured as a resonator, by means of the anti-reflective coating 16.

[0108] If a comparatively small portion of the radiation is reflected by the reflective inner surface 9 and a comparatively large portion of the radiation is reflected back by the anti-reflective coating 16, it is possible to generate and couple out laser light.

[0109] In contrast to the embodiments in connection with the Fig. 1 and Fig. 2 or Fig. 3, the anti-reflective coating 16 is arranged over the reflective outer surface 8. Furthermore, the semiconductor chip 2 does not have an insulating region 7. In this exemplary embodiment, the at least two active regions of the semiconductor chip directly adjoin one another.

[0110] According to the Fig. 5, Fig. 6, Fig. 7 and Fig. 8 are schematic representations in plan view of a semiconductor chip 1 according to an embodiment in each case, in which the reflective inner surface 8 in plan view has the shape of a circle ( Fig. 5), a round ring ( Fig. 6), a polygon ( Fig. 7) or a polygonal ring ( Fig. 8).

[0111] In the method according to the embodiment of the Fig. 9, Fig. 10, Fig. 11 and Fig. 12, a semiconductor layer sequence 2 is first provided on a growth substrate 20 ( Fig. 9). An inner recess 23 and an outer recess 23 (not shown here) are created in the semiconductor layer sequence 2. A side surface of the inner recess 23 has an angle 21 of approximately 45° to a main extension plane of the semiconductor chip 1.

[0112] In the process step according to the Fig. 10, an electrically insulating layer is applied to a side surface of the inner recess 23, which forms the electrically insulating region 7. Furthermore, the second contact layer 14 is applied to the semiconductor layer sequence 2.

[0113] Furthermore, as in Fig. As shown in Figure 11, a prefabricated carrier 24 is applied in a form-fitting manner over a surface of the semiconductor layer sequence 2, which has the recesses 23, 22. The prefabricated carrier 24 comprises, for example, silicon. Furthermore, the carrier 24 can be formed from a potting compound. For example, the potting compound is a metal. Subsequently, the semiconductor layer sequence 2 is removed from the growth substrate 20.

[0114] In a further process step according to the Fig. 12, the first contact structure 13, the anti-reflective coating 16 and the reflective coating 15 (not shown here) are applied to the semiconductor layer sequence 2 exposed from the growth substrate 20.

[0115] In Fig. Figure 13 shows measurements of the far field of electromagnetic radiation of a conventional radiation-emitting semiconductor chip according to the prior art with a single active region in a diagram in which a normalized radiated power L norm The radiation is plotted in arbitrary units against polar coordinates θ in degrees [°]. The measured radiant power of the radiation in the far field is generated here by a single active region.

[0116] Along a fast axis 18, the radiation has a radiant power L1 with a full width half maximum (FWHM) of, for example, 40°. A slow axis 19 is arranged perpendicular to the fast axis 18, as shown in a polar coordinate diagram of the Fig. 14. Radiation along a slow axis 19 perpendicular to the fast axis 18 has a radiant power L2 with a half-width of, for example, 8° (see Fig. 13).

[0117] The fast axis 18 can be specified by the width of the active area. According to Fig. 15 is the width of the active area compared to an active area as shown in Fig. 13, is designed to be wide, so that the half-width of the radiated power of the fast axis L1 is reduced to, for example, 32°.

[0118] Measurements of the luminous flux Φ of radiation of a semiconductor chip according to an embodiment are shown in Fig. 16. In the diagram, the luminous flux Φ is plotted in arbitrary units against a current I applied to a semiconductor chip in milliamperes [mA]. ​​A first curve Φ1 corresponds to a conventional semiconductor chip according to the prior art, in which the semiconductor chip has only a single active region. A second curve Φ2 corresponds to a semiconductor chip 1 according to the embodiment of the Fig. 4, in which the semiconductor chip 1 has two active regions 6. The Fig. The conventional semiconductor chip shown as an example in Figure 17 has only a single active region and is assigned to the first curve Φ1. Fig. 18 shows an example of a semiconductor chip 1 which has two opposing active regions 6 and is associated with the second curve Φ2.

[0119] According to the Fig. 19, Fig. 20, Fig. 21, Fig. 22, Fig. 23 and Fig. 24 shows simulations of the far field of radiation from a semiconductor chip according to one embodiment. The far field of the radiation is shown in a polar coordinate diagram. The embodiments of the Fig. 19 and Fig. 20 correspond to a semiconductor chip 1 with two opposing active regions 6. The embodiments of the Fig. 21 and Fig. 22 correspond to a semiconductor chip 1 with eight active regions 6 arranged opposite one another in pairs. The embodiments of the Fig. 23 and Fig. 24 correspond to a semiconductor chip 1 with sixteen active regions 6 arranged opposite one another in pairs.

[0120] The half-width of the radiant power of the radiation is according to the Fig. 19, Fig. 21 and Fig. 23 on the fast axis 18 30° and on the slow axis 19 16°. According to the Fig. 20, Fig. 22 and Fig. 24 the half-width on the fast axis is 18 40° and on the slow axis 19 8°.

[0121] According to the Fig. 25 shows measurements of the far field of radiation plotted in a diagram where a radiant power L e The radiation is plotted in units [mW / sr] against polar coordinates θ in degrees [°]. The radiation is generated here by a semiconductor chip 1 with two opposing active regions 6. Along the fast axis 18, the radiation has a radiant power L1. The radiation has a radiant power L2 along the slow axis 19.

[0122] In this exemplary embodiment, the reflective outer surface 8 and / or the reflective inner surface 7 has an angle to a main extension plane of the semiconductor chip 1 that differs from 45°, but lies between at least 35° and at most 55°. As a result, the radiation power spectrum has two separate peaks.

[0123] According to Fig. 26 shows the radiation power L1 of the far field of the radiation along the fast axis 18. In this embodiment, the semiconductor chip 1 has pairs of opposing active regions 6. Analogous to Fig. 25, the reflective outer surface 8 and / or the reflective inner surface 7 has an angle to a main extension plane of the semiconductor chip 1 which is different from 45°. By means of the plurality of active regions, which are arranged in pairs opposite one another and in a circle, a common spectrum of the radiation powers of the active regions 6, in contrast to Fig. 25 only one main peak.

[0124] According to the Fig. 27, Fig. 28, Fig. 29, Fig. 30 and Fig. 31, the reflective outer surfaces 8 are not formed contiguously. The first region of the reflective outer surface 8a and the second region of the reflective outer surface (8b) (not shown here) are straight in these embodiments and are spaced apart from each other in the lateral direction.

[0125] In contrast to the exemplary embodiment in connection with the Fig. 27, Fig. 28 and Fig. 29, the contact areas 14 of the second contact layer 14 of the Fig. 30 and Fig. 31 a tapering towards the electrically insulating area 7 ( Fig. 28) or widening ( Fig. 29) Form on. List of reference symbols 1 radiation-emitting semiconductor chip 2 Semiconductor layer sequence 3 first coat layer 4 second cladding layer 5 active zones 6 active areas 7 electrically insulating area 8 reflective outer surface 8a first area reflective outer surface 8b second area reflective outer surface 9 reflective inner surface 9a first area reflective inner surface 9b second area reflective inner surface 10 lead 11 Cover surface projection 12 Dispersion area 13 first contact layer 14 second contact layer 14a first area contact layer 14b second area contact layer 14c Variety of contact areas 15 Reflective coating 16 Anti-reflective coating 17 frames 18 fast axle 19 slow axis 20 Growth substrate 21 angles 22 outer recess 23 inner recess 24 carriers 25 electrically insulating layer θ polar coordinates L e Radiated power L norm standardized radiated power L1 radiated power fast axis L2 radiated power slow axis Φ luminous flux I Current Φ1 first curve Φ2 second curve

Claims

[1] Radiation-emitting semiconductor chip (1) with: - a semiconductor layer sequence (2) with at least two active regions (6) which generate electromagnetic radiation during operation, - at least one reflective outer surface (8) arranged laterally of each active region (6), and - an electrically insulating region (7) arranged between the active regions (6), wherein - the electrically insulating region (7) has a reflective inner surface (9) arranged opposite the reflective outer surface (8), - the reflective inner surface (9) forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip (1), - the reflective outer surface (8) forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip (1), and - a reflection coating (15) is arranged on the semiconductor layer sequence (2) in the region of the reflective outer surface (8) and an anti-reflection coating (16) is arranged on the semiconductor layer sequence (2) in the electrically insulating region (7), or - an anti-reflective coating (16) is arranged on the semiconductor layer sequence (2) in the region of the reflective outer surface (8) and a reflective coating (15) is arranged on the semiconductor layer sequence (2) in the electrically insulating region (7). [2] Radiation-emitting semiconductor chip (1) according to the preceding claim, in which the reflective outer surface (8) is formed continuously and completely encloses the electrically insulating region (7). [3] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which the reflective inner surface (9) has the shape of a circle, a round ring, a polygon or a polygonal ring in plan view. [4] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which the electrically insulating region (7) is formed as a projection (10) which is laterally delimited by the reflective inner surface (9). [5] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which the semiconductor layer sequence (2) has an active zone (5) which comprises the active regions (6). [6] Radiation-emitting semiconductor chip (1) according to claim 5, wherein the reflective inner surface (9) completely penetrates the active zone (5). [7] Radiation-emitting semiconductor chip (1) according to claim 5, in which - the active zone (5) comprises a propagation area (12), - the propagation region (12) is arranged around the active zone (5), and - the reflecting inner surface (9) partially penetrates the propagation area (12). [8] Radiation-emitting semiconductor chip (1) according to one of claims 5 to 7, wherein the reflective outer surface (8) completely penetrates the active zone (5). [9] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which - a first contact layer (13) is arranged on a cover surface of the semiconductor layer sequence (2), - a second contact layer (14) is arranged on a bottom surface of the semiconductor layer sequence (2), and - the first contact layer (13) and the second contact layer (14) specify the lateral dimensions of each active region (6). [10] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which the semiconductor layer sequence (2) has a plurality of active regions (6) which are arranged in pairs opposite one another and in a circle. [11] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, wherein the radiation-emitting semiconductor chip (1) is a superluminescent light-emitting diode. [12] Radiation-emitting semiconductor chip (1) according to one of claims 1 to 10, wherein the radiation-emitting semiconductor chip (1) generates laser radiation. [13] Radiation-emitting semiconductor chip (1) according to one of claims 9 to 12, in which properties of the electromagnetic radiation are predetermined by means of a thickness of the active regions (6) and a width of the second contact layer (14). [14] Method for producing a radiation-emitting semiconductor chip (1) comprising the steps: - providing a semiconductor layer sequence (2) with an active zone (5) which is suitable for generating electromagnetic radiation, - producing an outer recess (22) in the semiconductor layer sequence (2), - applying a reflective layer (26) to at least one side surface of the outer recess (22) to produce a reflective outer surface (8), - producing an inner recess (23) in the semiconductor layer sequence (2) in a central region, and - applying an electrically insulating layer (25) to a side surface of the inner recess (23), wherein - at least one side surface of the outer recess (22) forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip (1), - the side surface of the inner recess (23) forms an angle of at least 35° and at most 55° with a main extension plane of the semiconductor chip (1), and - a reflection coating (15) is arranged on the semiconductor layer sequence (2) in the region of the reflective outer surface (8) and an anti-reflection coating (16) is arranged on the semiconductor layer sequence (2) in an electrically insulating region (7), or - an anti-reflective coating (16) is arranged on the semiconductor layer sequence (2) in the region of the reflective outer surface (8) and a reflective coating (15) is arranged on the semiconductor layer sequence (2) in an electrically insulating region (7). [15] Method according to the preceding claim, wherein - the semiconductor layer sequence (2) is removed from a growth substrate (20), and - a carrier (24) is produced on the semiconductor layer sequence (2). [16] Method according to one of claims 14 to 15, wherein a plurality of radiation-emitting semiconductor chips (1) can be produced by means of the method.

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