Radiation-emitting semiconductor chips and radiation-emitting semiconductor devices

Abstract

Radiation-emitting semiconductor chip (1) with: - a semiconductor layer sequence (2) with a plurality of active regions (3) and a principal extent plane (4), wherein - each active area (3) has a principal extension direction (5), - each active area (3) emits electromagnetic radiation during operation from an emitter area (6) running parallel to the main extension plane (4), - at least two active areas (3) overlap in plan view, - the emitter regions (6) are arranged at grid points (7) of a regular grid which are connected by at least one grid line (8), and - the principal extension direction (5) of at least one active area (3) includes an angle (11) of at least 10° and at most 80° with the grid lines (8) of the regular grid.

Description

[0001] Radiation-emitting semiconductor chips are specified. Furthermore, a radiation-emitting semiconductor component is specified.

[0002] The document US 4 942 366 A describes an amplifier device with a coupled surface-emitting grating, the document WO 2010 / 102 263 A1 describes a digital heat supply by surface-emitting semiconductor devices, and the document US 2008 / 0 198 890 A1 describes a vertically emitting laser and a method for manufacturing the vertically emitting laser.

[0003] One problem to be solved is to specify a radiation-emitting semiconductor chip that is particularly efficient. Furthermore, a radiation-emitting semiconductor component comprising such a semiconductor chip is to be specified.

[0004] These objects are achieved by radiation-emitting semiconductor chips having the features of patent claims 1 and 19 and by a radiation-emitting semiconductor component having the features of patent claim 16.

[0005] Advantageous embodiments of the radiation-emitting semiconductor chips and the radiation-emitting semiconductor component are the subject of the respective dependent claims.

[0006] The radiation-emitting semiconductor chip comprises a semiconductor layer sequence with a plurality of active regions and a main extension plane. Particularly preferably, the semiconductor layer sequence is grown epitaxially. The radiation-emitting semiconductor chip is preferably configured to generate near-ultraviolet radiation, visible light, and / or near-infrared radiation during operation. The visible light can be, for example, blue, green, yellow, or red light.

[0007] The semiconductor layer sequence is preferably based on a compound semiconductor material. If the radiation-emitting semiconductor chip is configured to emit red light, for example, the semiconductor layer sequence is preferably based on a III-V compound semiconductor material. The III-V compound semiconductor material is, for example, a phosphide and / or arsenide compound semiconductor material. The III-V compound semiconductor material then comprises, for example, AlGaInP and / or AlGaAs.

[0008] If the radiation-emitting semiconductor chip is designed to emit, for example, blue or green light, the semiconductor layer sequence is preferably based on a III-N compound semiconductor material. The III-N compound semiconductor material is, for example, a nitride compound semiconductor material. The III-N compound semiconductor material then includes, for example, InGaN and AlGaN.

[0009] The semiconductor layer sequence may contain dopants as well as additional components. For the sake of simplicity, however, only the essential components of the crystal lattice of the semiconductor layer sequence, i.e., Al, Ga, In, N, As, or P, are listed, even though these may be partially replaced and / or supplemented by small amounts of other substances.

[0010] The semiconductor layer sequence preferably extends along the main extension plane. A lateral direction is preferably aligned parallel to the main extension plane. A vertical direction is preferably aligned perpendicular to the lateral direction.

[0011] The active regions are preferably arranged spaced apart from one another in the lateral direction. In this case, the active regions are preferably not in direct contact with one another at any point on the semiconductor chip. Furthermore, the active regions can be arranged, for example, in a common plane, so that the active regions are formed without overlap in plan view.

[0012] Alternatively, it is possible for at least two of the active regions to be in direct contact with each other. At least two active regions are formed so as to overlap in plan view. In this case, the overlapping active regions can be arranged at a lateral distance from the remaining overlapping and / or non-overlapping active regions.

[0013] Each active region has a main extension direction. The main extension direction extends along a length of an active region. The length of an active region preferably corresponds to a largest extension of a cross-sectional area of ​​the active region parallel to the main extension plane. Furthermore, the active regions each have a width that runs perpendicular to the main extension direction. The width of an active region corresponds to a smallest extension of the cross-sectional area of ​​an active region in a direction parallel to the main extension plane.

[0014] The active regions are preferably straight. This means that the side surfaces of the active regions preferably extend parallel to the main direction of extension. Alternatively, the active regions can be curved. In this case, the side surfaces of the active regions preferably extend in a curved manner relative to the main direction of extension.

[0015] The lateral width of each active region is preferably between at least 0.2 micrometers and at most 50 micrometers, particularly preferably between at least 3 micrometers and at most 7 micrometers. The lateral length of each active region is preferably between at least 50 micrometers and at most 1000 micrometers, particularly preferably between at least 80 micrometers and at most 100 micrometers.

[0016] During operation, each active region emits electromagnetic radiation from an emitter region running parallel to the main extension plane. The emitter regions are preferably each arranged along a main extension direction in a first edge region of an active region.

[0017] The emitter regions are preferably separated from one another by non-emitting regions. The non-emitting regions are preferably arranged between directly adjacent emitter regions in plan view. The non-emitting regions emit comparatively little or no radiation compared to the emitter regions. The non-emitting regions preferably emit 99% less radiation than the emitter regions.

[0018] The radiation-emitting semiconductor chip preferably comprises a carrier. The semiconductor layer sequence is preferably arranged on the carrier with a bottom surface opposite the emitter regions. The carrier is preferably intended and configured to mechanically stabilize the semiconductor chip. The carrier is preferably electrically conductive. The carrier thus preferably comprises a metal or is formed from a metal. For example, the carrier is galvanically deposited. Advantageously, heat dissipation of heat occurring in the active regions can thus be achieved particularly effectively.

[0019] Alternatively, it is also possible for the carrier to comprise a semiconductor material and / or a dielectric material or to consist of a semiconductor material and / or a dielectric material. For example, the semiconductor material is silicon and the dielectric material is AlN.

[0020] The emitter regions are arranged at grid points of a regular grid, which are connected by at least one grid line. The regular grid can preferably be a polygonal grid. The grid lines preferably extend parallel to the main plane of extension.

[0021] The regular grid is preferably a two-dimensional grid. Alternatively, the regular grid can be a one-dimensional grid. In this case, the grid points of the regular grid are arranged along a line. The grid points are preferably arranged at equidistant intervals from one another along the line. Alternatively, it is possible for directly adjacent grid points to be spaced at different intervals. The line can be a straight line or a curved line.

[0022] For example, if the regular grid is an orthogonal grid, the grid can be a quadrilateral grid. In this case, the regular grid has first grid lines and second grid lines, with the first grid lines running parallel to each other and the second grid lines running parallel to each other. Furthermore, the first grid lines are preferably arranged orthogonally to the second grid lines.

[0023] The main extension direction of at least one active region forms an angle of at least 10° and at most 80° with the grid lines of the regular grid. This means that the main extension directions of the active regions preferably do not run parallel to the at least one grid line of the regular grid.

[0024] Each vertex of the angle is located in an emitter region. The sides of the angle are formed by a portion of the main extension direction and a portion of the grating line that border the emitter region. The portions of the main extension direction and the grating line that form the angle generally extend laterally, in a direction away from the emitter region.

[0025] According to a preferred embodiment, the radiation-emitting semiconductor chip comprises a semiconductor layer sequence with a plurality of active regions and a main extension plane, each active region having a main extension plane. Furthermore, during operation, each active region emits electromagnetic radiation from an emitter region running parallel to the main extension plane. The emitter regions are arranged at grid points of a regular grid, which are connected by at least one grid line. Finally, in this embodiment, the main extension direction of at least one active region forms an angle of at least 10° and at most 80° with the grid lines of the regular grid.

[0026] According to at least one embodiment, the emitter regions are arranged along columns and rows. If the regular grating is, for example, a two-dimensional orthogonal grating, the rows preferably extend along first grating lines. The columns preferably extend along second grating lines. Preferably, the main extension directions of the active regions each enclose a first angle of at least 45° and at most 80° with the first grating lines. The main extension directions of the active regions each enclose a second angle of at least 10° and at most 45° with the second grating lines. Preferably, the first angle and the second angle together amount to approximately 90°. "Approximately" in this context means in particular that the first angle and the second angle together amount to at least 75° and at most 105°.

[0027] In a side view along the rows, the active regions of a row can be designed to completely overlap. Furthermore, active regions of directly adjacent rows can preferably partially overlap in a side view along the rows. Due to the partial overlap of the active regions of directly adjacent rows, the density of the emitter regions per unit area can advantageously be particularly high.

[0028] In a side view along the columns, the active regions of a column can be completely overlapped. The active regions of directly adjacent columns can preferably not overlap in a side view along the columns. Advantageously, the semiconductor chip can thus be separated into semiconductor chip bars, for example, along columns. The bars thus produced with the active regions of a column are thus advantageously stackable in the lateral direction.

[0029] According to at least one embodiment, the main extension directions of the active regions in at least one row enclose equal angles with the grid lines of the regular grid. Furthermore, the main extension directions of the active regions in at least one column can enclose equal angles with the grid lines of the regular grid.

[0030] Preferably, the main extension directions of the active regions in each row can enclose equal angles with the grid lines of the regular grid. In this case, the main extension directions of the active regions in each column also enclose equal angles with the grid lines of the regular grid. Thus, all main extension directions of the active regions are preferably arranged parallel to one another.

[0031] According to at least one embodiment, the main extension directions of the active regions of different rows enclose mutually different angles with the grid lines of the regular grid. Furthermore, the main extension directions of the active regions of different columns can enclose mutually different angles with the grid lines of the regular grid.

[0032] According to at least one embodiment, the main extension directions of the active regions in at least one row enclose mutually different angles with the grid lines of the regular grid. Furthermore, the main extension directions of the active regions in at least one column can enclose mutually different angles with the grid lines of the regular grid.

[0033] Furthermore, it is possible for the main extension directions of the active regions in different rows to enclose different angles with the grid lines of the regular grid, and for the main extension directions of the active regions in the same rows to enclose different angles with the grid lines of the regular grid. Thus, the main extension directions of the active regions can be arranged in a circular pattern, for example, in plan view.

[0034] Furthermore, such circular arrangements can overlap in plan view.

[0035] At least two active regions overlap in plan view. The portion of the overlapping active regions that overlaps in plan view forms a common active region of the at least two active overlapping regions. Preferably, at least two active regions of a common row overlap with one another in plan view. Furthermore, it is possible for at least two active regions of a common column to overlap with one another in plan view. Furthermore, at least two active regions in a common row can overlap with one another in plan view, and the overlapping active regions can each overlap with at least one active region of a directly adjacent row in plan view.

[0036] If the at least two active regions are configured to overlap, the overlapping region can, for example, be spaced laterally from the emitter regions of the at least two active regions. For example, the overlapping region is arranged in a center of the active regions in plan view.

[0037] Advantageously, the overlapping of the active regions in plan view allows for a particularly large number of active regions to be arranged per unit area. This allows for a particularly high density of emitter regions per unit area.

[0038] In a first edge region of each active region, a first reflective surface is arranged, which forms an angle of at least 35° and at most 55° with the main extension plane. Preferably, the first reflective surface in the first edge region forms an angle of at least 40° and at most 50° with the main extension plane. Particularly preferably, the angle between the first reflective surface and the main extension plane is approximately 45°.

[0039] The first reflective surface preferably has a reflectivity of at least 90%, in particular 95%, 99% or 100% for the electromagnetic radiation.

[0040] The first reflective surface is preferably electrically insulating and comprises, for example, or consists of dielectric materials. The first reflective surface is, for example, a Bragg mirror consisting of alternating layers of a high-refractive-index material and a low-refractive-index material.

[0041] Furthermore, the first reflective surface can be a combination of metallic materials and electrically insulating materials. An interface between the first reflective surface and the semiconductor layer sequence is preferably electrically insulating.

[0042] According to at least one embodiment, the first edge regions of at least two directly adjacent emitter regions in a row overlap in plan view. It is possible for the first reflective surfaces of at least two directly adjacent emitter regions to directly adjoin one another in the overlapping portion of the two active regions. Preferably, the first edge regions of at least two directly adjacent emitter regions completely overlap one another in the overlapping region.

[0043] Advantageously, a light extraction efficiency and a radiation characteristic of the radiation-emitting semiconductor chip are improved, since the emitted radiation of the active regions is extracted via the overlapping emitter regions and can overlap in a far field.

[0044] In this embodiment, the first reflective surfaces in the overlapping first edge regions can preferably have an angle to a main extension plane that differs from 45°, but lies between at least 35° and at most 55°. The angles of the reflective surfaces are preferably configured to vary in size. Since the emitted electromagnetic radiation of the active regions overlaps in the overlapping emitter regions, the angles of the reflective surfaces that differ from 45° can be compensated, and a common spectrum of the radiation outputs advantageously has only a single main peak.

[0045] A second reflective surface is arranged in a second edge region of each active region, which is opposite the first edge region. The second reflective surface is preferably electrically insulating and comprises, for example, dielectric materials or consists of them. The second reflective surface is, for example, a Bragg mirror consisting of alternating layers of a high-refractive-index and a low-refractive-index material.

[0046] Furthermore, the second reflective surface can be a combination of metallic materials and electrically insulating materials. An interface between the second reflective surface and the semiconductor layer sequence is preferably electrically insulating.

[0047] The second reflective surface preferably has a reflectivity of at least 90%, in particular 95%, 99% or 100% for the electromagnetic radiation.

[0048] The second reflective surface forms an angle of at least 35° and at most 55° with the main extension plane. Preferably, the second reflective surface in the second edge region forms an angle of at least 40° and at most 50° with the main extension plane. The angle between the second reflective surface and the main extension plane is particularly preferably 45°.

[0049] According to at least one embodiment, the second reflective surfaces are each perpendicular to the main extension plane. The second reflective surfaces preferably each have a deviation of at most 2° from the vertical direction.

[0050] According to at least one embodiment, each active region has an anti-reflective coating arranged on the semiconductor layer sequence in the first edge region. The anti-reflective coating is preferably arranged on the top surface of the semiconductor layer sequence and can be in direct contact with it. The anti-reflective coating preferably overlaps with the emitter region.

[0051] Particularly preferably, the anti-reflective coating completely overlaps with the emitter region.

[0052] For example, a reflection at the interface between the top surface of the semiconductor layer sequence and the anti-reflective coating is at most 1%, at most 0.0001% or at most 0.00001%.

[0053] According to at least one embodiment, each active region has a reflective coating arranged on the semiconductor layer sequence in the second edge region. The reflective coating is preferably arranged on the top surface of the semiconductor layer sequence and can be in direct contact with it. The reflective coating preferably has a reflectivity of at least 90%, at least 95%, or at least 99% for the electromagnetic radiation generated by the active regions. Thus, the reflective coating can be a highly reflective coating.

[0054] If the second reflective surfaces are each perpendicular to the main plane of extension, the top surface of the semiconductor layer sequence is preferably free of the reflective coating. Particularly preferably, the radiation-emitting semiconductor chip does not have a reflective coating in this case.

[0055] Alternatively, it is possible that each active area is free of a reflective coating and / or each active area is free of an anti-reflective coating.

[0056] According to at least one embodiment, each active region comprises a first contact layer arranged on the top surface of the semiconductor layer sequence. The first contact layers are preferably electrically conductive and are configured and provided for electrically contacting the semiconductor layer sequence. The first contact layers are preferably arranged in regions on the top surface of the semiconductor layer sequence.

[0057] The first contact layers are preferably arranged laterally spaced from one another on the top surface of the semiconductor layer sequence. Furthermore, the first contact layers each have a width and a length.

[0058] According to one embodiment, a first contact layer is arranged on the top surface of the semiconductor layer sequence. The first contact layer is preferably formed contiguously and covers a large part of the top surface of the semiconductor layer sequence. The first contact layer preferably does not cover the first edge regions and / or second edge regions. The first contact layer preferably covers the semiconductor layer sequence to at least 80% or at least 90%. The first contact layer preferably comprises or consists of a metal. Furthermore, first contact layers can comprise a plurality of individual layers.

[0059] The first contact layer may further comprise or be formed from a transparent conductive oxide. Transparent conductive oxides (TCOs) are transparent, electrically conductive materials, typically metal oxides, such as zinc oxide, tin oxide, aluminum tin oxide, cadmium oxide, titanium oxide, indium oxide, and indium tin oxide (ITO).

[0060] According to at least one embodiment, each active region comprises a second contact layer arranged on a bottom surface of the semiconductor layer sequence. The second contact layers are preferably electrically conductive and are configured and provided for electrically contacting the semiconductor layer sequence. The second contact layers are preferably arranged in regions on the bottom surface of the semiconductor layer sequence. The second contact layers are preferably arranged spaced apart from one another in the lateral direction on the bottom surface of the semiconductor layer sequence. Furthermore, the second contact layers each have a width and a length.

[0061] The second contact layers preferably comprise or consist of a metal. Furthermore, the second contact layers can comprise multiple individual layers. Furthermore, the first contact layers can comprise or be formed from a transparent conductive oxide.

[0062] The metal of the first contact layers and / or the metal of the second contact layers is, for example, Ti, Pt, Ag and / or Au.

[0063] According to at least one embodiment, the first contact layers and the second contact layers specify lateral dimensions of an active zone of each active area.

[0064] Preferably, each active region has a first contact layer and a second contact layer that lie opposite one another. The second contact layer and the first contact layer of each active region preferably overlap with one another in plan view. In the overlapping regions, the current density of the current to be introduced is comparatively high. In the overlapping regions, the current density is preferably so high that the active region emits electromagnetic radiation and thus encompasses the active zones. The active zone preferably has a larger area than a first contact layer or second contact layer, which define the active zone.

[0065] If the active regions are formed in an overlapping manner, the first contact layers of the overlapping active regions also overlap with each other in a top view. Furthermore, the second contact layers can also overlap with each other in a top view.

[0066] If the active regions are formed without overlapping, the active regions and the active zones can preferably be controlled individually and separately from one another. If at least two active regions overlap, the overlapping active regions can preferably be controlled together. Alternatively, it is possible for the first contact layers and / or the second contact layers of the overlapping active regions not to overlap in plan view. In this case, the overlapping active regions can preferably be controlled separately from one another.

[0067] According to one embodiment, the semiconductor layer sequence in each of the active regions can comprise a ridge waveguide. Each ridge waveguide is preferably formed by a projection that encompasses a portion of the semiconductor layer sequence. A width of the ridge waveguide, which is oriented perpendicular to the main extension direction of the active regions, preferably predetermines the width of the active region. Flanks of the ridge waveguides can each be covered by a passivation layer having a refractive index that is different from a refractive index of the semiconductor layer sequence.

[0068] The emitter regions largely do not overlap with the active zones in a lateral direction when viewed from above. For example, the emitter regions each overlap with an active zone by a maximum of 10% in a lateral direction when viewed from above. Preferably, the emitter regions do not overlap with the active zone. In this case, the emitter regions preferably directly border the active zones in a lateral direction when viewed from above.

[0069] One idea of ​​the radiation-emitting semiconductor chip described here is, among other things, that the radiation-emitting semiconductor chip has a plurality of active regions that do not extend parallel to the grid lines of a regular grid on which the emitter regions are arranged. Thus, such a semiconductor chip advantageously has a particularly high density of emitter regions per unit area.

[0070] Furthermore, the dimensions of the active zones are determined by the dimensions of the first and second contact layers. This eliminates the need for complex etching of the semiconductor layer sequence. Advantageously, this reduces non-radiative recombination of charge carriers, which can occur, for example, on etched-off side surfaces of a semiconductor layer sequence. This results in particularly high efficiency of the radiation-emitting semiconductor chip.

[0071] According to one embodiment, the radiation-emitting semiconductor chip is a superluminescent light-emitting diode with increased brightness and / or luminous flux compared to a conventional light-emitting diode. The electromagnetic radiation generated by the superluminescent light-emitting diode (SLED for short) can be amplified in the active region. For example, electromagnetic radiation propagating toward the second reflective surface can be directed toward the first reflective surface. Emitted electromagnetic radiation propagating toward the first reflective surface can advantageously overlap with the back-reflected electromagnetic radiation coming from the second reflective surface. The output electromagnetic radiation is thus amplified and has increased brightness and / or luminous flux.

[0072] Unlike a laser diode, superluminescent light-emitting diodes generally do not have a resonator. In conjunction with the superluminescent light-emitting diode, electromagnetic radiation is advantageously amplified, with the radiation exhibiting comparatively low temporal coherence and comparatively high spatial coherence. Thus, the superluminescent light-emitting diode exhibits a broader emission spectrum than a laser diode. Advantageously, speckle noise can be reduced due to the comparatively broad emission spectrum.

[0073] The electromagnetic radiation preferably propagates in the active zone and the active region along the main direction of extension and is directed toward the first reflecting surface and coupled out via the emitter region. Thus, the coupled-out radiation advantageously has a directed emission direction.

[0074] The radiation-emitting semiconductor chip described here can preferably form a display or be used as a radiation source in a display. Furthermore, the radiation-emitting semiconductor chip described here is preferably suitable for near-eye applications.

[0075] Furthermore, the radiation-emitting semiconductor chip described here can be used for applications where a high, for example, monochromatic, luminance is required on a given area. In this case, the radiation-emitting semiconductor chip can be used as a light source in a projector or beamer. In this case, the active regions are generally not individually controllable.

[0076] According to one embodiment, the radiation-emitting semiconductor chip is a laser diode. In this case, the radiation-emitting semiconductor chip is designed to emit laser radiation. The laser radiation is preferably emitted via the emitter region. The emitted laser radiation preferably has a comparatively high temporal coherence and a comparatively high spatial coherence. In this case, the laser radiation is coherent radiation. The radiation emitted by the active region is preferably monochromatic and coherent laser light. The radiation thus advantageously has a comparatively narrow bandwidth while simultaneously having a comparatively high luminous flux.

[0077] By means of a portion of the electromagnetic radiation that is reflected by the anti-reflective coating, the radiation-emitting semiconductor chip can be converted from a superluminescent light-emitting diode to a laser diode.

[0078] According to one embodiment of the radiation-emitting semiconductor chip, the active regions are arranged as an array. Arranging the active regions as an array here means, for example, that the active regions are aligned at the grid points of the one-dimensional grid or at the grid points of the two-dimensional grid.

[0079] Furthermore, a radiation-emitting semiconductor component is specified, which comprises a radiation-emitting semiconductor chip described here. All features and embodiments disclosed in connection with the radiation-emitting semiconductor chip can therefore also be implemented in connection with the radiation-emitting semiconductor component, and vice versa.

[0080] According to at least one embodiment, the radiation-emitting semiconductor component comprises a first radiation-emitting semiconductor chip, which is formed by a radiation-emitting semiconductor chip described here.

[0081] According to at least one embodiment, the radiation-emitting semiconductor component comprises at least one further radiation-emitting semiconductor chip.

[0082] According to at least one embodiment, the first radiation-emitting semiconductor chip is configured to emit electromagnetic radiation in a first wavelength range. The electromagnetic radiation is preferably blue, green, or red light. The first wavelength range is preferably between 400 nanometers and 490 nanometers, between 490 nanometers and 600 nanometers, or between 600 nanometers and 700 nanometers.

[0083] According to at least one embodiment, the second radiation-emitting semiconductor chip is configured to emit electromagnetic radiation in a second wavelength range. The second wavelength range is preferably between 400 nanometers and 490 nanometers, between 490 nanometers and 600 nanometers, or between 600 nanometers and 700 nanometers.

[0084] Preferably, the electromagnetic radiation of the first wavelength range is different from the electromagnetic radiation of the second wavelength range.

[0085] According to at least one embodiment, the second radiation-emitting semiconductor chip is a radiation-emitting semiconductor chip described here.

[0086] According to at least one embodiment, the first radiation-emitting semiconductor chip and the second radiation-emitting semiconductor chip are arranged side by side. Preferably, the side surfaces of the first radiation-emitting semiconductor chip and the second radiation-emitting semiconductor chip are directly adjacent to one another. Furthermore, the top surfaces and the bottom surfaces of the first radiation-emitting semiconductor chip and the second radiation-emitting semiconductor chip can each be arranged in a common plane.

[0087] Furthermore, it is possible for the radiation-emitting semiconductor component to have a third radiation-emitting semiconductor chip, which is formed by a radiation-emitting semiconductor chip described here. The third radiation-emitting semiconductor chip is preferably designed to emit electromagnetic radiation in a third wavelength range. The third wavelength range is preferably between 400 nanometers and 490 nanometers, between 490 nanometers and 600 nanometers, or between 600 nanometers and 700 nanometers.

[0088] Preferably, the electromagnetic radiation of the first wavelength range is different from the electromagnetic radiation of the second wavelength range and the third wavelength range.

[0089] Preferably, the side surfaces of the second radiation-emitting semiconductor chip and the third radiation-emitting semiconductor chip are directly adjacent to one another. Furthermore, the top surfaces and the bottom surfaces of the second radiation-emitting semiconductor chip and the third radiation-emitting semiconductor chip can each be arranged in a common plane.

[0090] For example, the first radiation-emitting semiconductor chip can be configured to emit red electromagnetic radiation, the second radiation-emitting semiconductor chip can be configured to emit green electromagnetic radiation, and the third radiation-emitting semiconductor chip can be configured to emit blue electromagnetic radiation. The first radiation-emitting semiconductor chip, the second radiation-emitting semiconductor chip, and the third radiation-emitting semiconductor chip can preferably be arranged side by side.

[0091] Furthermore, the radiation-emitting semiconductor component can comprise a plurality of first radiation-emitting semiconductor chips, a plurality of second radiation-emitting semiconductor chips, and a plurality of third radiation-emitting semiconductor chips. The first, second, and third semiconductor chips can be arranged alternately next to one another.

[0092] Alternatively, the second radiation-emitting semiconductor chips are arranged on the first radiation-emitting semiconductor chip. Preferably, the second radiation-emitting semiconductor chips are arranged on a top surface of the first radiation-emitting semiconductor chip. In this case, the emitter regions of the first radiation-emitting semiconductor chip and the emitter regions of the second radiation-emitting semiconductor chip can overlap in plan view. In this case, the emitter regions of the second radiation-emitting semiconductor chip are preferably arranged downstream of the emitter regions of the first radiation-emitting semiconductor chip in the vertical direction.

[0093] According to at least one embodiment, the radiation-emitting semiconductor component comprises a plurality of second radiation-emitting semiconductor chips. The second radiation-emitting semiconductor chips are preferably light-emitting diode chips, or LED chips for short.

[0094] According to at least one embodiment, the second radiation-emitting semiconductor chips are arranged on the first radiation-emitting semiconductor chip. The second radiation-emitting semiconductor chips are preferably arranged on a cover surface of the first radiation-emitting semiconductor chip. Particularly preferably, the second radiation-emitting semiconductor chips can also be arranged, inter alia, on the emitter regions. In this case, the first radiation-emitting semiconductor chip is designed to emit red light, and the second radiation-emitting semiconductor chips are designed to emit blue or green light. The light from the first semiconductor chip can preferably pass through the second radiation-emitting semiconductor chips essentially undisturbed.

[0095] The radiation-emitting semiconductor chip and the radiation-emitting semiconductor component are explained in more detail below with reference to the figures using exemplary embodiments.

[0096] They show: Fig. 1 a schematic representation in plan view of a radiation-emitting semiconductor chip according to an embodiment, Fig. 2 a schematic representation in plan view of a radiation-emitting semiconductor chip according to an embodiment, Fig. 3 a schematic sectional view of a radiation-emitting semiconductor chip according to an embodiment, Fig. 4 a schematic sectional view of a radiation-emitting semiconductor chip according to an embodiment, Fig. 5 exemplary measurements of the far field of electromagnetic radiation of a radiation-emitting semiconductor chip according to an embodiment, and Fig. 6 exemplary infrared microscopic image in top view of an emitter region of an IR radiation emitting semiconductor chip.

[0097] Identical, similar, or functionally identical elements are provided with the same reference numerals in the figures. The figures and the relative sizes of the elements depicted in the figures are not to be considered to scale. Rather, individual elements may be exaggerated for clarity and / or clarity.

[0098] The schematic representation of the Fig. 1 shows the embodiment of a radiation-emitting semiconductor chip 1 described here, which comprises a semiconductor layer sequence 2 with a multiplicity of active regions 3 and a main extension plane 4.

[0099] The active regions 3 are arranged spaced apart from one another in the lateral direction and are not in direct contact with one another at any point. Each active region 3 has a main extension direction 5, which extends along a length of an active region 3.

[0100] In this exemplary embodiment, the width in the lateral direction of the active regions 3 is, for example, 5 micrometers. The length of the active regions 3 in the lateral direction is, for example, 100 micrometers.

[0101] During operation, each active region 3 emits electromagnetic radiation from an emitter region 6 running parallel to the main extension plane 4. The emitter regions 6 are each arranged along a main extension direction 5 in a first edge region 12 of an active region 3. A second edge region 14 is arranged opposite the first edge regions 12. The first edge regions 12 are in Fig. 1 is marked with a white circle, while the second edge areas 14 are Fig. 1 are marked with a black circle.

[0102] The emitter regions 6 are arranged at grid points 7 of a regular grid, which are connected by at least one grid line 8. According to this exemplary embodiment, the regular grid is an orthogonal, two-dimensional grid. The regular grid here has first grid lines 8a and second grid lines 8b. The first grid lines 8a are orthogonal to the second grid lines 8b.

[0103] The main extension directions 5 of the active regions 3 each form a first angle 11a of approximately 65° with the first grid lines 8a. According to this exemplary embodiment, the main extension directions 5 of the active regions 3 each form a second angle 11b of approximately 25° with the second grid lines 8b. The first angle 8a and the second angle 8b thus amount to approximately 90°.

[0104] The emitter regions 6 are thus arranged along columns 9 and rows 10. The rows 10 extend along the first grid lines 8a. The columns 9 extend along the second grid lines 8b.

[0105] The main extension directions 5 of the active regions 3 of each row 10 enclose the same first angles 11a with the first grid lines 8a of the regular grid. Thus, the main extension directions 5 of the active regions 3 in each column 9 also enclose the same second angles 11b with the second grid lines 8b of the regular grid. This means that all main extension directions 5 of the active regions 3 are arranged parallel to one another.

[0106] In a side view along rows 10, the active regions 3 of a row 10 are designed to completely overlap. Furthermore, the active regions 3 of directly adjacent rows 10 partially overlap in a side view along rows 10. Furthermore, the active regions 3 of a column 9 are designed to completely overlap in a side view along columns 9. The active regions 3 of directly adjacent columns 9 do not overlap in a side view along columns 9.

[0107] The second edge regions 14 are arranged at additional grid points of another regular grid. The other regular grid is shifted relative to the other regular grid by a translation vector. This means that without a translation vector, the regular grid and the other regular grid are congruent.

[0108] According to Fig. Figure 2 shows an embodiment of a radiation-emitting semiconductor chip 1 described here, in which active regions 3 overlap with one another in plan view. Here, directly adjacent active regions 3 of a common row 10 overlap with an active region 3 of a directly adjacent column 9. The regions overlapping in plan view each form a common active region.

[0109] Furthermore, two first regions 12 of two directly adjacent emitter regions 6 overlap in a row 10 in plan view. Here, the two directly adjacent emitter regions 6 completely overlap with each other and form a common emitter region.

[0110] The common emitter regions are arranged at grid points 7 of a regular grid, which are connected by at least one grid line 8. The regular grid is an orthogonal grid, analogous to the embodiment according to the Fig. 1.

[0111] In contrast to the embodiment of the Fig. 1, the second edge regions 14 are arranged at further grid points of a further regular grid which cannot be aligned congruently to the regular grid.

[0112] Alternatively, according to the Fig. 2, a radiation-emitting component may be described that comprises a first radiation-emitting semiconductor chip and a second radiation-emitting semiconductor chip. The second radiation-emitting semiconductor chips are arranged, for example, on the first radiation-emitting semiconductor chip. The first radiation-emitting semiconductor chip is arranged downstream of the second radiation-emitting semiconductor chip in this case. The emitter regions of the first radiation-emitting semiconductor chip and the emitter regions of the second radiation-emitting semiconductor chip overlap in plan view.

[0113] In the schematic sectional view of the Fig. 3 shows an embodiment of an active region 3 along a main extension direction of a radiation-emitting semiconductor chip 1 described here, which has a semiconductor layer sequence 2 comprising the active region 3.

[0114] A first reflective surface 13 is arranged in a first edge region 12, with an angle between the first reflective surface 13 and the main extension plane being approximately 45°. Furthermore, an anti-reflective coating 16 is arranged on the top surface of the semiconductor layer sequence 2 in the first edge region 12.

[0115] A second reflective surface 15 is arranged in a second edge region 14, with an angle between the second reflective surface 15 and the main extension plane being approximately 45°. Furthermore, a reflective coating 17 is arranged on the top surface of the semiconductor layer sequence 2 in the second edge region 14.

[0116] A second contact layer 19 is arranged between the anti-reflective coating 16 and the reflective coating 17 on the top surface of the semiconductor layer sequence 2 along the main extension direction 5. A first contact layer 18 is arranged on the opposite bottom surface of the semiconductor layer sequence 2 along the main extension direction 5. The lateral dimension of an active zone 20 of the active region 3 is predetermined by the first contact layer 18 and the second contact layer 19.

[0117] According to the Fig. The arrows shown in Figure 3 indicate directions of propagation of electromagnetic radiation. The electromagnetic radiation generated in the active zone 20 forms a beam with a beam profile that has a lateral and a vertical extent in cross-section perpendicular to a main extension direction 5 of the active region 3. Electromagnetic radiation propagating in the direction of the second reflective surface 15 is directed in the direction of the first reflective surface 13 by means of the reflective coating 17 and further reflection at the second reflective surface 15. Emitted electromagnetic radiation propagating in the direction of the first reflective surface 13 overlaps with the radiation reflected at the second reflective surface 15. The electromagnetic radiation of the active zone 20 thus overlapped is overlapped and coupled out in the region of the anti-reflective coating 16.The coupled radiation is thus amplified and has increased brightness and luminous flux.

[0118] In contrast to the embodiment in connection with the Fig. 3, the active area 3 according to the Fig. 4 does not have a reflective coating 17. Furthermore, a second reflective surface 15 is arranged perpendicular to the main extension plane 4. Thus, electromagnetic radiation propagating in the direction of the second reflective surface 15 is directed directly at the second reflective surface 15 in the direction of the first reflective surface 13. The beam profile of the coupled-out electromagnetic radiation has, for example, an aperture angle that is predetermined by a material system used in the semiconductor chip 1. When using an AlGaN material system, the aperture angle is generally approximately 34°.

[0119] In this embodiment, no anti-reflective coating 16 is arranged on the top surface of the semiconductor layer sequence 2.

[0120] The radiation-emitting semiconductor chip 1 according to the embodiments of the Fig. 1, Fig. 2, Fig. 3 and Fig. 4 is designed as a superluminescent light-emitting diode.

[0121] In Fig. Figure 5 shows a diagram showing a measurement of the far field of electromagnetic radiation from a single active region of a radiation-emitting semiconductor chip described here, in which a normalized radiation power L norm The radiation is plotted in arbitrary units against polar coordinates θ in degrees [°]. The measured radiant power of the radiation in the far field is generated here by a single active region.

[0122] In a far field, radiation preferably has a fast axis and a slow axis. In the far field, radiation propagates through space as a plane wave. The direction of oscillation of the radiation in which the plane wave has the higher propagation speed is called the "fast axis." The direction of oscillation perpendicular to the fast axis and with a lower propagation speed is called the "slow axis."

[0123] The standardized radiated power L norm is measured along a fast axis and has a full width half maximum (FWHM) of, for example, 32°.

[0124] In Fig. Figure 6 shows a plan view of a radiation-emitting semiconductor chip in the region of a single emitter region. The slow axis can be specified by the width B of the first contact. List of reference symbols 1 radiation-emitting semiconductor chip 2 Semiconductor layer sequence 3 active area 4 Main extension level 5 Main direction of extension 6 Emitter area 7 grid points 8 Grid line 8a first grid line 8b second grid line 9 columns 10 lines 11 angles 11a first angle 11b second angle 12 first edge area 13 first reflective surface 14 second edge area 15 second reflective surface 16 Anti-reflective coating 17 Reflective coating 18 first contact layer 19 second contact layer 20 active zones L norm Radiated power B Width Θ Polar coordinates

Claims

[1] Radiation-emitting semiconductor chip (1) with: - a semiconductor layer sequence (2) with a plurality of active regions (3) and a main extension plane (4), wherein - each active region (3) has a main extension direction (5), - each active region (3) emits electromagnetic radiation during operation from an emitter region (6) running parallel to the main extension plane (4), - at least two active areas (3) overlap in plan view, - the emitter regions (6) are arranged at grid points (7) of a regular grid which are connected by at least one grid line (8), and - the main extension direction (5) of at least one active region (3) encloses an angle (11) of at least 10° and at most 80° with the grid lines (8) of the regular grid. [2] Radiation-emitting semiconductor chip (1) according to the preceding claim, in which the emitter regions (6) are arranged along columns (9) and rows (10). [3] Radiation-emitting semiconductor chip (1) according to claim 2, wherein the main extension directions (5) of the active regions (3) in at least one row (10) enclose equal angles (11) with the grid lines (8) of the regular grid. [4] Radiation-emitting semiconductor chip (1) according to one of claims 2 or 3, in which the main extension directions (5) of the active regions (3) of different rows (10) enclose mutually different angles (11) with the grid lines (8) of the regular grid. [5] Radiation-emitting semiconductor chip (1) according to claim 2 or 4, wherein the main extension directions (5) of the active regions in at least one row (10) enclose mutually different angles (11) with the grid lines (8) of the regular grid. [6] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which a first reflective surface (13) is arranged in a first edge region (12) of each active region (3), which encloses an angle of at least 35° and at most 55° with the main extension plane (4). [7] Radiation-emitting semiconductor chip (1) according to claim 6, wherein the first edge regions (12) of at least two directly adjacent emitter regions (6) in a row (10) overlap in plan view. [8] Radiation-emitting semiconductor chip (1) according to one of claims 6 or 7, wherein a second reflecting surface (15) is arranged in a second edge region (14) of each active region (3) which is opposite the first edge region (12). [9] Radiation-emitting semiconductor chip (1) according to claim 8, wherein the second reflecting surface (15) encloses an angle of at least 35° and at most 55° with the main extension plane (4). [10] Radiation-emitting semiconductor chip (1) according to claim 8, wherein the second reflecting surfaces (15) are each perpendicular to the main extension plane (4). [11] Radiation-emitting semiconductor chip (1) according to one of the preceding claims 6 or 7 and according to one of the preceding claims 8 to 10, in which - each active region (3) has an anti-reflective coating (16) which is arranged on the semiconductor layer sequence (2) in the first edge region (12), and - each active region (3) has a reflective coating (17) which is arranged on the semiconductor layer sequence (2) in the second edge region (14). [12] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, in which - each active region (3) comprises a first contact layer (18) arranged on a cover surface of the semiconductor layer sequence (2), - each active region (3) comprises a second contact layer (19) arranged on a bottom surface of the semiconductor layer sequence (2), and - the first contact layers (18) and the second contact layers (19) specify lateral dimensions of an active zone (20) of each active area (3). [13] Radiation-emitting semiconductor chip (1) according to one of the preceding claims, wherein the radiation-emitting semiconductor chip (1) is a superluminescent light-emitting diode which has an increased brightness and / or an increased luminous flux compared to a conventional light-emitting diode. [14] Radiation-emitting semiconductor chip (1) according to one of claims 1 to 12, wherein the radiation-emitting semiconductor chip (1) is a laser diode. [15] Radiation-emitting semiconductor chip (1) according to one of claims 13 or 14, wherein the active regions (3) are arranged as an array. [16] Radiation-emitting semiconductor device comprising: - a first radiation-emitting semiconductor chip according to one of the preceding claims, and - at least one second radiation-emitting semiconductor chip, wherein - the first radiation-emitting semiconductor chip is designed to emit electromagnetic radiation of a first wavelength range, and - the second radiation-emitting semiconductor chip is designed to emit electromagnetic radiation of a second wavelength range. [17] Radiation-emitting semiconductor component according to the preceding claim, in which - the second radiation-emitting semiconductor chip is a radiation-emitting semiconductor chip (1) according to one of claims 1 to 12, and - the first radiation-emitting semiconductor chip and the second radiation-emitting semiconductor chip are arranged next to one another. [18] Radiation-emitting semiconductor component according to claim 17, which comprises a plurality of second radiation-emitting semiconductor chips, wherein the second radiation-emitting semiconductor chips are arranged on the first radiation-emitting semiconductor chip. [19] Radiation-emitting semiconductor chip (1) with: - a semiconductor layer sequence (2) with a plurality of active regions (3) and a main extension plane (4), wherein - each active region (3) has a main extension direction (5), - each active region (3) emits electromagnetic radiation during operation from an emitter region (6) running parallel to the main extension plane (4), - the emitter regions (6) are arranged at grid points (7) of a regular grid which are connected by at least one grid line (8), - the main extension direction (5) of at least one active region (3) encloses an angle (11) of at least 10° and at most 80° with the grid lines (8) of the regular grid, - in a first edge region (12) of each active region (3) a first reflective surface (13) is arranged, which encloses an angle of at least 35° and at most 55° with the main extension plane (4), - a second reflecting surface (15) is arranged in a second edge region (14) of each active region (3) opposite the first edge region (12), and - the second reflecting surface (15) forms an angle of at least 35° and at most 55° with the main extension plane (4).

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