INSULATION CHIP AND SIGNAL TRANSMISSION DEVICE

Abstract

Insulation chip (50), comprising: an element insulation layer (58) with a front (58s) and a back (58r); and a first capacitor (21A, 21B) and a second capacitor (22A, 22B), wherein the first capacitor (21A, 21B) has a first front electrode plate (53A, 53B) and a first rear electrode plate (54A, 54B) which are opposite each other in a thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B), wherein the second capacitor (22A, 22B) has a second front electrode plate (55A, 55B) that surrounds the first front electrode plate (53A, 53B) in the thickness direction (z) of the element insulation layer (58), and a second rear electrode plate (56A, 56B) that surrounds the first rear electrode plate (54A, 54B) in the thickness direction (z) of the element insulation layer (58), wherein the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) are opposite each other in the thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B), wherein the first rear electrode plate (54A, 54B) is electrically connected to the second rear electrode plate (56A, 56B) of the element insulation layer (58), where, viewed in the thickness direction (z) of the element insulation layer (58), both the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B) are circular, wherein the second front electrode plate (55A, 55B) is annular and has an inner diameter that is larger than the diameter of the first front electrode plate (53A, 53B), wherein the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) are arranged concentrically, wherein the second rear electrode plate (56A, 56B) is annular and has an inner diameter that is larger than the diameter of the first rear electrode plate (54A, 54B), and wherein the first posterior electrode plate (54A, 54B) and the second posterior electrode plate (56A, 56B) are arranged concentrically.

Description

TECHNICAL AREA

[0001] The present disclosure relates to an isolation chip and a signal transmission device. BACKGROUND

[0002] A well-known example of a signal transmission device is an isolated gate driver that applies a gate voltage to the gate of a switching element such as a transistor (see, for example, patent literature 1). CITATION LIST Patent literature

[0003] Patent literature 1: Japanese Laid-Open Patent Publication No. 2020-25102 (JP 2020-25102A)

[0004] Further state of the art is shown in US 2020 / 0 395 353 A1, JP 2002 - 270 756 A, JP 2016 - 28 407 A1 and JP 2020 - 36 171 A. SUMMARY OF THE INVENTION Technical Task

[0005] The gate driver contains an isolation element, such as a transformer or capacitor, which serves to isolate a primary circuit from a secondary circuit. Improving the isolation voltage of the gate driver is a concern. This concern is not limited to gate drivers and can also be applied to other signal transmission devices and isolation chips that transmit a signal while isolating a primary circuit from a secondary circuit. Solution to the task

[0006] To solve the problem described above, an isolation chip according to claim 1 is provided.

[0007] To solve the problem described above, a signal transmission device according to claim 12 is further provided. Advantageous effects of the invention

[0008] The isolation chip and signal transmission device contribute to an improved isolation voltage. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1 is a schematic circuit diagram showing a circuit configuration of a signal transmission device of a first embodiment. Fig. 2 is a schematic cross-sectional view showing a cross-sectional structure of the in Fig. The signal transmission device shown in Figure 1 is shown. Fig. Figure 3 is a schematic top view showing a planar structure of an insulation chip in Fig. The signal transmission device shown in section 2 is shown. Fig. 4 is a schematic cross-sectional view showing a cross-sectional structure of the in Fig. The insulation chips shown are arranged along a plane orthogonal to the thickness direction of the insulation chip. Fig. Figure 5 is a schematic cross-sectional view showing a cross-sectional structure of the insulation chip along the line F5-F5 in Fig. 3 shows. Fig. 6 is a schematic cross-sectional view showing a cross-sectional structure of the insulation chip along the line F6-F6 in Fig. 3 shows. Fig. Figure 7 is a schematic top view showing a planar structure of part of an insulation chip of a comparative example. Fig. Figure 8 is a schematic cross-sectional view showing the cross-sectional structure of the insulation chip of a comparative example along the line F8-F8 in Fig. 7 shows. Fig. Figure 9 is a schematic cross-sectional view showing a cross-sectional structure of a signal transmission device of a modified example. Fig. Figure 10 is a schematic top view showing a planar structure of an insulation chip of a modified example. Fig. Figure 11 is a schematic top view showing a planar structure of an insulation chip of a modified example. Fig. Figure 12 is a schematic top view showing a planar structure of an insulation chip of a modified example. Fig. Figure 13 is a schematic cross-sectional view showing a cross-sectional structure of the insulation chip of the in Fig. The modified example shown in Figure 12 is taken along a plane orthogonal to the thickness direction of the insulation chip. Fig. Figure 14 is a schematic cross-sectional view showing a cross-sectional structure of an insulation chip of a modified example. Fig. Figure 15 is a schematic cross-sectional view showing a cross-sectional structure of an insulation chip of a modified example. DESCRIPTION OF THE EXECUTION FORMS

[0009] Embodiments of an isolation chip and a signal transmission device according to the present disclosure are described below with reference to the drawings. For the sake of simplicity and clarity, the components in the drawings are not necessarily drawn to scale. In a cross-section, the hatching may be omitted for better understanding. The accompanying drawings illustrate only embodiments of the present disclosure and are not intended to limit the present disclosure.

[0010] The following detailed description presents exemplary embodiments of a component (device), a system, and a method according to the present disclosure. This detailed description serves for illustrative purposes and does not limit the embodiments of the present disclosure or the application and use of the embodiments. Designs

[0011] The structures of embodiments of an isolation chip and a signal transmission device are now described with reference to the Fig. 1 to 6 described. Fig. Figure 1 is a simplified diagram showing an example of a circuit arrangement of a signal transmission device 10. Circuit arrangement of the signal transmission device

[0012] As in Fig. As shown in Figure 1, the signal transmission device 10 transmits a pulse signal while the primary terminals 11 are electrically isolated from the secondary terminals 12. The signal transmission device 10 is a digital isolator and can be, for example, an AC / DC converter, a gate driver, or an electronic component contained within the AC / DC converter or the gate driver. The signal transmission device 10 comprises a signal transmission circuit 10A, which includes a primary circuit 13 electrically connected to the primary terminals 11, a secondary circuit 14 electrically connected to the secondary terminals 12, and a capacitor 15 electrically connecting the primary circuit 13 and the secondary circuit 14. In the present embodiment, the primary circuit 13 corresponds to a "first circuit" and the secondary circuit 14 to a "second circuit".

[0013] The primary circuit 13 is configured to be activated by applying an initial voltage. In one example, the primary circuit 13 is electrically connected to an external control unit (not shown).

[0014] The secondary circuit 14 is configured to be actuated by applying a second voltage that differs from the first voltage. In one example, the second voltage is higher than the first voltage. Both the first and second voltages are DC voltages. In another example, the secondary circuit 14 is electrically connected to a control circuit (driver circuit) that is controlled by the controller. An example of a control circuit is a switching circuit.

[0015] The signal transmission device 10 is configured such that when the primary circuit 13 receives a control signal from the controller via the primary terminals 11, the signal is transmitted from the primary circuit 13 via the capacitor 15 to the secondary circuit 14, and the secondary circuit 14 outputs the signal via the secondary terminals 12 to the control circuit. The signal transmission device 10 is configured to transmit a signal from the primary circuit 13 via the capacitor 15 to the secondary circuit 14.

[0016] In signal transmission circuit 10A, the primary circuit 13 and the secondary circuit 14 are electrically isolated by the capacitor 15. More precisely, while the capacitor 15 limits the transmission of a DC voltage between the primary circuit 13 and the secondary circuit 14, it enables the transmission of a pulse signal.

[0017] This means that the state in which primary circuit 13 and primary circuit 14 are isolated refers to a state in which the transmission of a direct current between primary circuit 13 and secondary circuit 14 is blocked, while the transmission of a pulse signal from primary circuit 13 to secondary circuit 14 is allowed. Consequently, secondary circuit 14 is configured to receive a signal from primary circuit 13.

[0018] The isolation voltage of the signal transmission device 10, for example, lies in the range of 2500 Vrms to 7500 Vrms. In the present embodiment, the isolation voltage of the signal transmission device 10 is approximately 5700 Vrms. However, the isolation voltage of the signal transmission device 10 is not limited to this value and can assume any numerical value. As shown in Fig. As shown in Figure 1, in the present embodiment the primary circuit 13 and the secondary circuit 14 are individually grounded.

[0019] The circuit arrangement (the circuit design) of the signal transmission device10 will now be described in detail.

[0020] In the present embodiment, the signal transmission device 10 has two capacitors 15 corresponding to two types of signals transmitted from the primary circuit 13 to the secondary circuit 14. More precisely, the signal transmission device 10 has one capacitor 15 used to transmit a first signal from the primary circuit 13 to the secondary circuit 14, and another capacitor 15 used to transmit a second signal from the primary circuit 13 to the secondary circuit 14. In the present embodiment, the first signal contains information about a rising edge of an external signal supplied to the signal transmission device 10. The second signal contains information about a falling edge of the external signal. The first and second signals together form a pulse signal.For the sake of brevity, the capacitor 15 used to transmit the first signal will be referred to as "capacitor 15A" and the capacitor 15 used to transmit the second signal will be referred to as "capacitor 15B".

[0021] The signal transmission device 10 has primary signal lines 16A and 16B and secondary signal lines 17A and 17B.

[0022] Primary signal line 16A is configured to connect primary circuit 13 and capacitor 15A and to transmit a first signal from primary circuit 13 to capacitor 15A. Primary signal line 16B is configured to connect primary circuit 13 and capacitor 15B and to transmit a second signal from primary circuit 13 to capacitor 15B.

[0023] Secondary signal line 17A is configured to connect capacitor 15A and secondary circuit 14 and to transmit a first signal from capacitor 15A to secondary circuit 14. Secondary signal line 17B is configured to connect capacitor 15B and secondary circuit 14 and to transmit a second signal from capacitor 15B to secondary circuit 14.

[0024] As described above, the first signal is transmitted from the primary circuit 13 to the secondary circuit 14, successively via the primary signal line 16A, the capacitor 15A and the secondary signal line 17A. The second signal is transmitted from the primary circuit 13 to the secondary circuit 14, successively via the primary signal line 16B, the capacitor 15B and the secondary signal line 17B.

[0025] During the transmission of the first signal from the primary circuit 13 to the secondary circuit 14, the capacitor 15A electrically isolates the primary circuit 13 from the secondary circuit 14. The capacitor 15A comprises a first capacitor 21A and a second capacitor 22A connected in series. The first capacitor 21A is connected to the primary signal line 16A. The second capacitor 22A is connected to the secondary signal line 17A. In the present embodiment, the first capacitor 21A and the second capacitor 22A correspond to a "first signal capacitor".

[0026] The first capacitor 111B has a first electrode 113B and a second electrode 114B. The first electrode 23A is connected to the primary signal line 16A. The second capacitor 22A has a first electrode 25A and a second electrode 26A. The second electrode 24A of the first capacitor 21A and the first electrode 25A of the second capacitor 22A are connected by a connecting signal line 18A. The second electrode 26A is connected to the secondary signal line 17A.

[0027] During the transmission of the second signal from the primary circuit 13 to the secondary circuit 14, the capacitor 15B electrically isolates the primary circuit 13 from the secondary circuit 14. The capacitor 15B comprises a first capacitor 21A and a second capacitor 22B connected in series. The first capacitor 21B is connected to the primary signal line 16B. The second capacitor 22B is connected to the secondary signal line 17B. In the present embodiment, the first capacitor 21B and the second capacitor 22B correspond to a "second signal capacitor".

[0028] The first capacitor 21B has a first electrode 23B and a second electrode 24B. The first electrode 23B is connected to the primary signal line 16B. The second capacitor 22B has a first electrode 25B and a second electrode 26B. The second electrode 24B of the first capacitor 21B and the first electrode 25B of the second capacitor 22B are connected by a connecting signal line 18B. The second electrode 26B is connected to the secondary signal line 17B.

[0029] In the present embodiment, the isolation voltage of capacitors 15A and 15B, for example, lies in a range of 2500 Vrms to 7500 Vrms. The isolation voltage of capacitors 15A and 15B can lie in a range of 2500 Vrms to 5700 Vrms. However, the isolation voltage of capacitors 15A and 15B is not limited to these values ​​and can assume any arbitrary numerical value. Internal configuration of the signal transmission device

[0030] Fig. Figure 2 is a schematic diagram showing an example of a cross-sectional structure of an internal configuration of a section of the signal transmission device 10. As shown in Fig. As shown in Figure 2, the signal transmission device 10 is a semiconductor component with multiple semiconductor chips arranged in a single package. Although not shown in the drawings, the package of the signal transmission device 10 is, for example, a small-outline (SO) type and, in the present embodiment, a small-outline package (SOP). The package type of the signal transmission device 10 can be changed as desired.

[0031] The signal transmission device 10 comprises several semiconductor chips, namely a first chip 30, a second chip 40, and an isolation chip 50. The signal transmission device 10 further comprises a primary die pad 60 on which the first chip 30 is mounted, a secondary die pad 70 on which the second chip 40 is mounted, and an encapsulation resin 80 that encapsulates the die pads 60 and 70 as well as the chips 30, 40, and 50. In the present embodiment, the primary die pad 60 corresponds to a "first mounting frame," and the secondary die pad 70 corresponds to a "mounting frame" or a "second mounting frame."

[0032] The encapsulation resin 80 can be made from an electrically insulating resin material and is, for example, produced from a black epoxy resin. The encapsulation resin 80 has the form of a rectangular plate with a thickness direction corresponding to the z-direction.

[0033] The primary die pad 60 and the secondary die pad 70 are each made of a conductive material. In the present embodiment, the die pads 60 and 70 are made of a material containing copper (Cu). Alternatively, the die pads 60 and 70 can also be made of another metal, such as aluminum (Al). Furthermore, the material of the die pads 60 and 70 is not limited to a conductive material. In one example, the die pads 60 and 70 can also be made of ceramic, such as aluminum oxide. That is, the die pads 60 and 70 can also be made of an electrically insulating material. In the present embodiment, the die pads 60 and 70 are not exposed by the encapsulating resin 80.

[0034] Viewed in the z-direction, the primary die pad 60 and the secondary die pad 70 are separated from each other and arranged side by side. Viewed in the z-direction, the orientation of the primary die pad 60 and the secondary die pad 70 is referred to as the x-direction. A direction orthogonal to the x-direction is referred to as the y-direction. Both the primary die pad 60 and the secondary die pad 70 are flat. In the present embodiment, the secondary die pad 70 is larger than the primary die pad 60 in the x-direction.

[0035] In the present embodiment, the isolation chip 50 is mounted on the secondary die pad 70. More precisely, the isolation chip 50 and the second chip 40 are mounted on the secondary die pad 70. The second chip 40 and the isolation chip 50 are separated from each other in the x-direction. Thus, the chips 30, 40, and 50 are separated from each other in the x-direction. In the present embodiment, the chips 30, 40, and 50 are arranged in the x-direction in the order of first chip 30, isolation chip 50, and second chip 40 in a direction from the primary die pad 60 to the secondary die pad 70. That is, the isolation chip 50 is located in the x-direction between the first chip 30 and the second chip 40.

[0036] The die pads 60 and 70 must be separated from each other so that the signal transmission device 10 can be set to a predetermined isolation voltage. In the present embodiment, the distance between the primary die pad 60 and the secondary die pad 70 in the z-direction is greater than the distance between the second chip 40 and the isolation chip 50 in the x-direction. Therefore, in the z-direction, the distance between the first chip 30 and the isolation chip 50 in the x-direction is greater than the distance between the second chip 40 and the isolation chip 50 in the x-direction. In other words, the isolation chip 50 is located closer to the second chip 40 than to the first chip 30.

[0037] The first chip 30 has a first substrate 33 on which the primary circuit 13 is formed. The first substrate 33 is, for example, a semiconductor substrate. In one example, the semiconductor substrate is made of a silicon (Si) material. An interconnect layer 34 is formed on the first substrate 33. The interconnect layer 34 has insulating films stacked in the z-direction, metal layers arranged between the insulating films adjacent in the z-direction, and vias connecting the metal layers at various positions in the z-direction. The metal layers and the vias form a wiring pattern of the first chip 30. The metal layers and the vias are, for example, electrically connected to the primary circuit 13. A protective film 35 is applied to the interconnect layer 34 to protect it.The protective film 35 is made of an electrically insulating material.

[0038] The first chip 30 has a chip front 30s and a chip back 30r, which are oriented oppositely in the z-direction. The first substrate 33 contains the chip back 40r. The protective film 35 contains the chip front 30s. The chip back 30r faces the primary die pad 60. First electrode pads 31 and second electrode pads 32 are arranged on a section of the first chip 30 that is located in the direction of the chip front 30s. More precisely, the electrode pads 31 and 32 are exposed from the chip front 30s. The protective film 35 covers the electrode pads 31 and 32. The protective film 35 has openings that expose the electrode pads 31 and 32. The electrode pads 31 and 32 are z. B. electrically connected to the primary circuit 13 via the intermediate interconnect layer 34.

[0039] The first electrode pads 31 and the second electrode pads 32 are formed on a front face of the interconnect layer 34. The front face of the interconnect layer 34 refers to a surface of the interconnect layer 34 that faces in the same direction as the chip front face 30s. Viewed in the z-direction, the first electrode pads 31 on the chip front face 30s are located on a side opposite the insulation chip 50 with respect to the center of the chip front face 30s in the x-direction. Although not shown, the electrode pads 31 are separated from each other in the y-direction. The second electrode pads 32 are located on a section of the chip front face 30s that faces the insulation chip 50 with respect to the center of the chip front face 30s in the x-direction. Although not shown, the second electrode pads 32 are separated from each other in the y-direction.

[0040] As in Fig. As shown in Figure 2, the first chip 30 is bonded to the primary die pad 60 by a first bonding material 101. The first bonding material 101 is located between the back face 30r of the first chip 30 and the primary die pad 60. The first bonding material 101 is a conductive bonding material such as a solder paste or a silver (Ag) paste.

[0041] The first bonding material 101 bonds the first substrate 33 of the first chip 30 and the primary die pad 60, thus electrically connecting the first substrate 33 and the primary die pad 60. In this way, the primary circuit 13 is electrically connected to the primary die pad 60 via the first bonding material 101. In the present embodiment, the primary die pad 60 forms the ground. The primary circuit 13 is therefore electrically connected to earth / ground.

[0042] The composition of the first bonding material 101 can be arbitrarily changed and, for example, be an insulating bonding material. In this case, the primary circuit 13 can be electrically connected to the primary circuit 60 by a component other than the first bonding material 101 (e.g., a wire).

[0043] The second chip 40 has a second substrate 43 on which the secondary circuit 14 is formed. The second substrate 43 is, for example, a semiconductor substrate. In one example, the semiconductor substrate is made of a material containing silicon. An interconnect layer 44 is formed on the second substrate 43. The interconnect layer 44 has insulating films stacked in the z-direction, metal layers arranged between the insulating films adjacent in the z-direction, and vias connecting the metal layers at various positions in the z-direction. The metal layers and the vias form a wiring pattern of the second chip 40. The metal layers and the vias are, for example, electrically connected to the secondary circuit 14. A protective film 45 is applied to the interconnect layer 44 to protect it.The protective film 45 is made of an electrically insulating material.

[0044] The second chip 40 has a front side 40s and a back side 40r, which are oriented oppositely in the z-direction. The second substrate 43 contains the back side 40r. The protective film 45 contains the front side 40s. The back side 40r faces the secondary die pad 70. The back side 40r points in the same direction as the back side 30r of the first chip 30. The front side 40s points in the same direction as the front side 30s of the first chip 30. First electrode pads 41 and second electrode pads 42 are arranged on a portion of the second chip 40 that is located on the front side 40s. More precisely, the electrode pads 41 and 42 are exposed by the front side 40s. The protective film 45 covers the electrode pads 41 and 42. The protective film 45 has openings that expose the electrode pads 41 and 42. The electrode pads 41 and 42 are, for example,electrically connected to the secondary circuit 14 via the intermediate interconnection layer 44.

[0045] The first electrode pads 41 and the second electrode pads 42 are formed on a front face of the interconnect layer 44. The front face of the interconnect layer 44 refers to a surface of the interconnect layer 44 that faces in the same direction as the chip front face 40s. Viewed in the z-direction, the first electrode pads 41 are located on a section of the chip front face 40s that is oriented x-direction towards the isolation chip 50 with respect to the center of the chip front face 40s. Although not shown, the first electrode pads 41 are separated from each other in the y-direction. The second electrode pads 42 are located on the chip front face 40s on a side opposite the isolation chip 50 with respect to the center of the chip front face 40s in the x-direction. Although not shown, the second electrode pads 42 are separated from each other in the y-direction.

[0046] The second chip 40 is bonded to the secondary die pad 70 by the second bonding material 102. More precisely, the second bonding material 102 is located between the chip back 40r and the secondary die pad 70. The second bonding material 102 bonds the chip back 50r and the secondary die pad 70 to each other. The second bonding material 102 is a conductive bonding material such as solder paste or silver paste. In the present embodiment, the second bonding material 102 has, for example, the same composition as the first bonding material 101.

[0047] The composition of the second bonding material 102 can be arbitrarily varied and, for example, be a conductive bonding material that differs from the material of the first bonding material 101. The second bonding material 102 can be an insulating bonding material. In this case, the secondary circuit 14 can be electrically connected to the secondary die pad 70 by a component other than the second bonding material 102 (e.g., a wire).

[0048] The isolation chip 50 contains the capacitors 15A and 15B (see Fig. 1) As in Fig. As shown in Figure 3, the insulation chip 50 is rectangular in the z-direction and has long and short sides. In the present embodiment, the insulation chip 50 is mounted on the secondary die pad 70 in the z-direction such that the long sides run in the y-direction and the short sides in the x-direction.

[0049] As in Fig. As shown in Figure 2, the isolation chip 50 has a front side 50s and a back side 50r that are oriented oppositely in the z-direction. The back side 40r faces the secondary die pad 70. More precisely, the back side 50r faces the same direction as the back side 40r of the second chip 40. The front side 50s faces the same direction as the front side 40s of the second chip 40.

[0050] The insulation chip 50 has several (in the present embodiment two) first electrode pads 51 and several (in the present embodiment two) second electrode pads 52. The electrode pads 51 and 52 are arranged towards the front face 50s of the chip. More precisely, viewed in the z-direction, the electrode pads 51 and 52 are exposed from the front face 50s of the chip.

[0051] The first electrode pads 51 are arranged on a portion of the chip front surface 50s that lies in the x-direction towards the first chip 30 with respect to the center of the chip front surface 50s. The second electrode pads 52 are arranged on a portion of the chip front surface 50s that lies in the x-direction towards the second chip 40 with respect to the center of the chip front surface 50s.

[0052] Wires W are each connected to the first chip 30, the second chip 40, and the insulation chip 50. The first chip 30 and the insulation chip 50 are electrically connected by the wires W. The second chip 40 and the insulation chip 50 are also electrically connected by the wires W. Each wire W is a bond wire formed by a wire bonder and made, for example, of a conductor such as gold (Au), aluminum, copper, or a similar material.

[0053] The first electrode pads 31 of the first chip 30 are separately connected via wires W to primary lines (not shown here). The primary lines are parts that carry the Fig. The primary terminals 11 shown in section 1 form the primary circuit. The primary circuit 13 is thus electrically connected to the primary terminals 11.

[0054] In the present embodiment, the primary leads and the primary die pad 60 are made of the same material. The primary leads and the primary die pad 60 can be formed in one piece. The primary leads are arranged separately from the primary die pad 60 on one side of the primary die pad 60 opposite the secondary die pad 70. The primary leads have sections that protrude from the encapsulating resin 80. The portions of the primary leads that protrude from the encapsulating resin 80 are used as external connections for the signal transmission device 10.

[0055] The second electrode pads 32 of the first chip 30 are separately connected via the wires W to the first electrode pads 51 of the insulation chip 50. Thus, the primary circuit 13 is electrically connected to the capacitors 15A and 15B (see Fig. 1) In other words, the primary signal lines 16A and 16B (see Fig. 1) shows the intermediate layer 34 of the first chip 30, the second electrode pads 32, the wires W and the first electrode pads 51.

[0056] The second electrode pads 52 of the insulation chip 50 are separately connected via the wires W to the first electrode pads 41 of the second chip 40. Thus, the capacitors 15A and 15B are electrically connected to the secondary circuit 14. In other words, the secondary signal lines 17A and 17B (see Fig. 1) feature the second electrode pads 52, the wires W, the first electrode pads 41 of the second chip 40 and the interconnect layer 44.

[0057] The second electrode pads 42 of the second chip 40 are separately connected via wires W to secondary lines (not shown here). The secondary lines are parts that carry the Fig. The secondary terminals 12 shown in Figure 1 form the secondary circuit. The secondary circuit 14 is thus electrically connected to the secondary terminals 12.

[0058] In the present embodiment, the secondary leads and the secondary die pad 70 are made of the same material. The secondary leads and the secondary die pad 70 can be formed in one piece. Furthermore, the primary leads, the primary die pad 60, the secondary leads, and the secondary die pad 70 can be formed in one piece. The secondary leads are arranged separately from the secondary die pad 70 on a side of the secondary die pad 70 opposite the primary die pad 60. The secondary leads have sections that protrude from the encapsulating resin 80. These sections of the secondary leads protrude from the encapsulating resin 80 and serve as external connections for the signal transmission device 10. Detailed structure of the insulation chip

[0059] The structure of the isolation chip 50 will now be described with reference to the Fig. Sections 2 to 6 are described in detail. For the sake of simplicity, in the following description, the first two electrode pads 51 are referred to as a first electrode pad 51A and a first electrode pad 51B, and the second two electrode pads 52 are referred to as a second electrode pad 52A and a second electrode pad 52B.

[0060] Fig. Figure 3 is a schematic top view showing the planar structure of the insulation chip 50. Fig. Figure 4 is a schematic cross-sectional view showing the cross-sectional structure of the insulation chip 50 along a plane orthogonal to the thickness direction of the insulation chip 50. Fig. 5 and Fig. Figure 6 shows schematic cross-sectional views that depict a cross-sectional structure along the respective lines. Fig. The 3 lines shown are shown. Fig. For the sake of simplicity and clarity, the hatching lines of some components are not shown in Figures 4 to 6. In the following description, a direction from the back of the chip 50r to the front of the isolation chip 50 is referred to as an upward direction. A direction from the front of the chip 50s to the back of the chip 50r is referred to as a downward direction.

[0061] As in Fig. As shown in Figure 3, the isolation chip 50 is a single chip in which the two capacitors 15A and 15B are integrated. The isolation chip 50 is separate from the first chip 30 and the second chip 40 (see Figure 3). Fig. 2) and is intended for the two capacitors 15A and 15B.

[0062] The two capacitors 15A and 15B are separated from each other in the y-direction. In other words, viewed in the z-direction, the two capacitors 15A and 15B are separated from each other along the longitudinal direction of the insulation chip 50.

[0063] As in the Fig. As shown in Figures 2 to 4, the first capacitor 21A of capacitor 15A has a first front electrode plate 53A and a first rear electrode plate 54A, which are opposite each other in the z-direction. In the present embodiment, the first front electrode plate 53A and the first rear electrode plate 54A are arranged concentrically. The first front electrode plate 53A corresponds to the first electrode 23A (see Figure 2). Fig. 1) of the first capacitor 21A. The first rear electrode plate 54A corresponds to the second electrode 24A (see Fig. 1) of the first capacitor 21A.

[0064] As in Fig. As shown in Figure 3, the first front electrode plate 53A is circular when viewed in the z-direction. As in Fig. As shown in Figure 4, the first rear electrode plate 54A is circular when viewed in the z-direction. As shown in the Fig. 3 and Fig. As shown in Figure 4, the area of ​​the first front electrode plate 53A is equal to the area of ​​the first rear electrode plate 54A in the z-direction. If the area difference in the z-direction between the first front electrode plate 53A and the first rear electrode plate 54A is, for example, less than 10% of the area of ​​the first front electrode plate 53A in the z-direction, it is assumed that the first front electrode plate 53A and the first rear electrode plate 54A have the same area in the z-direction.

[0065] As in the Fig. As shown in Figures 2 to 4, the second capacitor 22A of capacitor 15A has a second front electrode plate 55A and a second rear electrode plate 56A, which are opposite each other in the z-direction. In the present embodiment, the second front electrode plate 55A and the second rear electrode plate 56A are arranged concentrically. The second front electrode plate 55A corresponds to the second electrode 26A (see Figure 2). Fig. 1) of the second capacitor 22A, and the second rear electrode plate 56A corresponds to the first electrode 25A (see Fig. 1) of the second capacitor 22A.

[0066] As in Fig. As shown in Figure 3, the second front electrode plate 55A has a closed, ring-shaped form when viewed in the z-direction. The second front electrode plate 55A has an inner diameter that is larger than the diameter of the first front electrode plate 53A. As shown in Figure 3, the second front electrode plate 55A has a closed, ring-shaped shape when viewed in the z-direction. The second front electrode plate 55A has an inner diameter that is larger than the diameter of the first front electrode plate 53A. Fig. As shown in Figure 4, the second rear electrode plate 56A, viewed in the z-direction, has a closed, ring-shaped form. The second rear electrode plate 56A has an inner diameter that is larger than the diameter of the first rear electrode plate 54A. As shown in the Fig. 3 and Fig. As shown in Figure 4, the area of ​​the second front electrode plate 55A is equal to the area of ​​the second rear electrode plate 56A when viewed in the z-direction. If the area difference in the z-direction between the second front electrode plate 55A and the second rear electrode plate 56A is, for example, less than 10% of the area of ​​the second front electrode plate 55A in the z-direction, it is assumed that the area of ​​the second front electrode plate 55A is equal to the area of ​​the second rear electrode plate 56A in the z-direction.

[0067] As in Fig. As shown in Figure 3, the second front electrode plate 55A, viewed in the z-direction, is shaped such that it surrounds the first front electrode plate 53A. The center of the second front electrode plate 55A coincides with the center of the first front electrode plate 53A. That is, the first front electrode plate 53A and the second front electrode plate 55A are arranged concentrically. In other words, the first front electrode plate 53A and the second front electrode plate 55A are arranged concentrically. The second front electrode plate 55A is aligned with the first front electrode plate 53A in the z-direction.

[0068] Viewed in the z-direction, the second front electrode plate 55A is spaced apart from the first front electrode plate 53A. Viewed in the z-direction, the distance G1 between the first front electrode plate 53A and the second front electrode plate 55A is constant along the entire circumference of the first front electrode plate 53A. The distance G1 is greater than or equal to the distance D1 (see Fig. 5) between the first front electrode plate 53A and the first rear electrode plate 54A in the z-direction. Since the distance G1 is constant along the entire circumference of the first front electrode plate 53A, the distance G1 is the minimum distance between the first front electrode plate 53A and the second front electrode plate 55A in the z-direction. The distance D1 is also constant across the entire area of ​​the first front electrode plate 53A relative to the first rear electrode plate 54A and across the entire area of ​​the first rear electrode plate 54A relative to the first front electrode plate 53A. Therefore, the distance D1 is the minimum distance between the first front electrode plate 53A and the first rear electrode plate 54A.Thus, the minimum distance between the first front electrode plate 53A and the second front electrode plate 55A, viewed in the z-direction, is greater than or equal to the minimum distance between the first front electrode plate 53A and the first rear electrode plate 54A. In the present embodiment, the distance G1 is equal to the distance D1.

[0069] The second capacitor 22A contains an electrode pad 55AA, which is electrically connected to the second front electrode plate 55A. Viewed in the z-direction, the electrode pad 55AA and the second front electrode plate 55A are located at different positions. As shown in Fig. As shown in Figure 2, in the present embodiment the electrode pad 55AA is arranged closer to the second chip 40 than the second front electrode plate 55A. The electrode pad 55AA and the second front electrode plate 55A are connected by a connector 55AB. In the present embodiment, the second front electrode plate 55A, the electrode pad 55AA, and the connector 55AB are formed integrally. The second front electrode plate 55A, the electrode pad 55AA, and the connector 55AB are aligned with each other in the z-direction. Thus, the electrode pad 55AA corresponds to an "area that is located at a position different from that of the second front electrode plate and is formed integrally with the second front electrode plate."

[0070] As described above, the electrode pad 55AA is formed in a position separated from the second front electrode plate 55A in the x-direction. Therefore, the first front electrode plate 53A and the second front electrode plate 55A are offset in the x-direction with respect to the insulation chip 50. In the present embodiment, the first front electrode plate 53A and the second front electrode plate 55A are arranged from the center of the insulation chip 50 in the x-direction towards the first chip 30. Similarly, the first rear electrode plate 54A and the second rear electrode plate 56A are arranged from the center of the insulation chip 50 in the x-direction towards the first chip 30.

[0071] As in Fig. As shown in Figure 4, the second rear electrode plate 56A, viewed in the z-direction, is shaped such that it surrounds the first rear electrode plate 54A. The center of the second rear electrode plate 56A coincides with the center of the first rear electrode plate 54A. In other words, the first rear electrode plate 54A and the second rear electrode plate 56A are concentric. The second rear electrode plate 56A is aligned with the first rear electrode plate 54A in the z-direction.

[0072] Viewed in the z-direction, the second rear electrode plate 56A is spaced apart from the first rear electrode plate 54A. Viewed in the z-direction, the distance G2 between the first rear electrode plate 54A and the second rear electrode plate 56A is constant along the entire circumference of the first rear electrode plate 54A. The distance G2 is greater than or equal to the distance D3 (see Fig. 5) between the second front electrode plate 55A and the second rear electrode plate 56A in the z-direction. Since the distance G2 is constant along the entire circumference of the first rear electrode plate 54A, the distance G2 is the minimum distance between the first rear electrode plate 54A and the second rear electrode plate 56A in the z-direction. The distance D3 is also constant across the entire area of ​​the second front electrode plate 55A relative to the second rear electrode plate 56A and across the entire area of ​​the second rear electrode plate 56A relative to the second front electrode plate 55A. Therefore, the distance D3 is the minimum distance between the second front electrode plate 55A and the second rear electrode plate 56A.Thus, the minimum distance between the first rear electrode plate 54A and the second rear electrode plate 56A, viewed in the z-direction, is greater than or equal to the minimum distance between the second front electrode plate 55A and the second rear electrode plate 56A. In the present embodiment, distance G2 is equal to distance D3. In the present embodiment, distance D3 is equal to distance D1. If the difference between distance D3 and distance D1 is, for example, within 10% of distance D1, distance D3 is assumed to be equal to distance D1.

[0073] In the present embodiment, the area of ​​the second rear electrode plate 56A is equal to the area of ​​the first rear electrode plate 54A in the z-direction. If the area difference in the z-direction between the second rear electrode plate 56A and the first rear electrode plate 54A is, for example, less than 10% of the area of ​​the first rear electrode plate 54A in the z-direction, it is assumed that the second rear electrode plate 56A and the first rear electrode plate 54A have the same area in the z-direction.

[0074] As described above, the first front electrode plate 53A has the same area as the second front electrode plate 55A. The first rear electrode plate 54A has the same area as the second rear electrode plate 56A. The distance D1 is equal to the distance D3. Therefore, the capacitance of the first capacitor 21A is equal to that of the second capacitor 22A.

[0075] The first rear electrode plate 54A and the second rear electrode plate 56A are connected by a common connection point 56AB. The common connection point 56AB is aligned with the rear electrode plates 54A and 56A in the z-direction. In the present embodiment, the common connection point 56AB extends in the x-direction from an end of the first rear electrode plate 54A that is arranged towards the second chip 40 (see Fig. 2) The common connection point 56AB can be arranged in any position in the circumferential direction of the first rear electrode plate 54A, as long as the common connection point 56AB connects the first rear electrode plate 54A and the second rear electrode plate 56A. In other words, the common connection point 56AB extends in a radial direction along the first rear electrode plate 54A. Thus, the first rear electrode plate 54A is electrically connected to the second rear electrode plate 56A within an element insulation layer 58.

[0076] As in the Fig. As shown in Figures 2 to 4, the first capacitor 21B of capacitor 15B has a first front electrode plate 53B and a first rear electrode plate 54B, which are opposite each other in the z-direction. The second capacitor 22B has a second front electrode plate 55B and a second rear electrode plate 56B, which are opposite each other in the z-direction. In the same way as the second capacitor 22A, the second capacitor 22B has an electrode pad 55BA and a connector 55BB. The first rear electrode plate 54B and the second rear electrode plate 56B are connected by a common connection point 56BB. As shown in the Fig. 3, Fig. 4 and Fig. As shown in Figure 6, capacitor 15B has the same structure as capacitor 15A and is therefore not described in more detail.

[0077] In the present embodiment, the first front electrode plates 53A and 53B, the first rear electrode plates 54A and 54B, the second front electrode plates 55A and 55B, and the second rear electrode plates 56A and 56B are formed from a material containing aluminum. Thus, the first electrode pads 51A and 51B and the second electrode pads 52A and 52B are also made from a material containing aluminum. The material from which the electrode plates 53A, 53B, 54A, 54B, 55A, 55B, 56A, and 56B are formed can be arbitrarily modified and can, for example, include copper, tungsten, or similar elements. The electrode plates 53A, 53B, 54A, 54B, 55A, 55B, 56A, and 56B can be formed from a material containing at least one of the elements copper, aluminum, and tungsten. Alternatively, the electrode plates 53A, 53B, 54A, 54B, 55A, 55B, 56A and 56B can be made of a material containing Ti.

[0078] As in the Fig. 5 and Fig. As shown in Figure 6, the insulation chip 50 has a substrate 57 and the element insulation layer 58 formed on the substrate 57.

[0079] The substrate 57 can, for example, be formed from a semiconductor substrate. In the present embodiment, the substrate 57 comprises a semiconductor substrate formed from a material containing silicon. A wide-bandgap semiconductor or a composite semiconductor can be used as the semiconductor substrate for the substrate 57. Instead of a semiconductor substrate, the substrate 57 can be an insulating substrate made of a material such as glass or an insulating substrate made of a material such as ceramic (e.g., alumina).

[0080] The wide-bandgap semiconductor is a semiconductor substrate with a bandgap greater than or equal to 2.0 eV. The wide-bandgap semiconductor can be silicon carbide (SiC). The compound semiconductor can be a Group III-V compound semiconductor. The compound semiconductor can contain at least one of the following materials: aluminum nitride (AlN), indium nitride (InN), gallium nitride (GaN), and gallium arsenide (GaAs).

[0081] The substrate 57 has a substrate front 63s and a substrate back 63r, which point in opposite directions in the z-direction. The insulating films 58M are stacked on the substrate front 57s in the z-direction. In the present embodiment, the element insulating layer 58 comprises the stacked insulating films 58M. The z-direction is therefore a thickness direction of the element insulating layer 58. "Viewed / considered in the z-direction" implies "viewed in the thickness direction of the element insulating layer 58".

[0082] Each of the insulating films 58M is, for example, an intermediate insulating film and an oxide film made of a material containing silicon dioxide (SiO2). The thickness of the insulating film 58M can be, for example, between 500 nm and 5000 nm. In the present embodiment, the thickness of the insulating film 58M is, for example, about 2000 nm.

[0083] The element insulation layer 58 has a front side 58s and a back side 58r. The front side 58s faces the same direction as the substrate front side 57s of the substrate 57. The back side 58r faces the same direction as the substrate back side 57r of the substrate 57. The front side 58s of the element insulation layer 58 is the front side of the uppermost insulation film 58M of the insulation films 58M stacked in the z-direction. The back side 58r of the element insulation layer 58 is the back side of the lowermost insulation film 58M of the insulation films 58M stacked in the z-direction. The back side 58r of the element insulation layer 58 is opposite the substrate front side 57s of the substrate 57. More precisely, the back side 58r of the element insulation layer 58 is in contact with the substrate front side 57s of the substrate 57.

[0084] As in the Fig. 5 and Fig. As shown in Figure 6, the first front electrode plates 53A and 53B and the second front electrode plates 55A and 55B are arranged on the front side 58s of the element insulation layer 58. In other words, the first front electrode plates 53A and 53B and the second front electrode plates 55A and 55B are arranged on the element insulation layer 58.

[0085] The insulation chip 50 includes a front protective layer 59 formed on the front face 58s of the elemental insulation layer 58. The front protective layer 59 encompasses the chip front face 50s of the insulation chip 50 and protects the elemental insulation layer 58. The front protective layer 59 has a protective film 59A and a passivation film 59B formed on the protective film 59A. The protective film 59A can, for example, be formed from a material containing SiO2. The passivation film 59B is formed, for example, from a material containing SiN. The passivation film 59B encompasses the chip front face 50s of the insulation chip 50.

[0086] The front protective layer 59 covers the front face 58s of the element insulation layer 58 and the second front electrode plates 55A and 55B. The front protective layer 59 covers the first front electrode plate 53A, leaving the surface of the first front electrode plate 53A partially exposed. The electrode pads 55AA and 55BA are exposed, not covered by the front protective layer 59. The connectors 55AB and 55BB are covered by the front protective layer 59. More precisely, the first front electrode plates 53A and 53B and the second front electrode plates 55A and 55B are covered by the protective film 59A and the passivation film 59B. The protective film 59A and the passivation film 59B have four openings that expose the electrode pads 55AA and 55BA and sections of the surfaces of the first front electrode plates 53A and 53B.The four openings include a first opening that exposes a central area of ​​the first front electrode plate 53A, a second opening that exposes a central area of ​​the first front electrode plate 53B, a third opening that exposes the electrode pad 55AA, and a fourth opening that exposes the electrode pad 55BA. Thus, the first front electrode plates 53A and 53B and the electrode pads 55AA and 55BA each have an exposed surface for connection to the wire W through the opening. The exposed surfaces of the first front electrode plates 53A and 53B feature the first electrode pads 51A and 51B. The electrode pads 55AA and 55BA feature the second electrode pads 52A and 52B. The area, with the exception of the central region of the first front electrode plates 53A and 53B, is covered by the protective film 59A and the passivation film 59B.The second front electrode plates 55A and 55B and the connectors 55AB and 55BB are covered with the protective film 59A and the passivation film 59B.

[0087] As in the Fig. As shown in Figures 5 to 6, the first rear electrode plates 54A and 54B and the second rear electrode plates 56A and 56B are arranged in the element insulation layer 58.

[0088] As in Fig. As shown in Figure 5, the first rear electrode plate 54A is embedded in the element insulation layer 58. More precisely, the first rear electrode plate 54A extends through one of the insulation films 58M in the z-direction. The first rear electrode plate 54A is formed, for example, by filling the opening with a conductive element made of a material containing aluminum.

[0089] One or more insulating films 58M are arranged between the first front electrode plate 53A and the first rear electrode plate 54A in the z-direction. That is, the element insulating layer 58 has a section (inter-electrode insulating film) located between the first front electrode plate 53A and the first rear electrode plate 54A in the z-direction. In other words, the first front electrode plate 53A and the first rear electrode plate 54A are opposite each other via the section (inter-electrode insulating film) of the element insulating layer 58.

[0090] One or more insulating films 58M are arranged between the first rear electrode plate 54A and the substrate 57 in the z-direction. Thus, the first rear electrode plate 54A is insulated from the substrate 57 by the element insulating layer 58. As described above, the element insulating layer 58 is arranged between the first rear electrode plate 54A and the substrate 57.

[0091] The distance D1 between the first front electrode plate 53A and the first rear electrode plate 54A in the z-direction is greater than the distance D2 between the first rear electrode plate 54A and the back side 58r of the element insulation layer 58 in the z-direction. Thus, while the increase in the thickness TA of the element insulation layer 58 is limited, the distance D1 is increased.

[0092] The second rear electrode plate 56A is embedded in the element insulation layer 58. In the same way as the first rear electrode plate 54A, the second rear electrode plate 56A is formed by filling the opening in one of the insulating films 58M with a conductive element. In the present embodiment, the first rear electrode plate 54A, the second rear electrode plate 56A, and the common connection 56AB are formed in one piece. More precisely, one of the insulating films 58M in the element insulation layer 58 contains openings corresponding to the first rear electrode plate 54A, the second rear electrode plate 56A, and the common connection 56AB. When the openings are filled with the conductive element (Al), the first rear electrode plate 54A, the second rear electrode plate 56A, and the common connection 56AB are formed in one piece.

[0093] One or more of the insulating films 58M are arranged between the second front electrode plate 55A and the second rear electrode plate 56A in the z-direction. That is, the element insulating layer 58 has a section (inter-electrode insulating film) located between the second front electrode plate 55A and the second rear electrode plate 56A in the z-direction. In other words, the second front electrode plate 55A and the second rear electrode plate 56A are opposite each other via the section (inter-electrode insulating film) of the element insulating layer 58.

[0094] One or more insulating films 58M are arranged between the second rear electrode plate 56A and the substrate 57 in the z-direction. Thus, the second rear electrode plate 56A is insulated from the substrate 57 by the element insulating layer 58. As described above, the element insulating layer 58 is arranged between the second rear electrode plate 56A and the substrate 57.

[0095] The distance D3 between the second front electrode plate 55A and the second rear electrode plate 56A in the z-direction is greater than the distance D4 between the second rear electrode plate 56A and the rear side 58r of the element insulation layer 58 in the z-direction. Thus, while the increase in the thickness TA of the element insulation layer 58 is limited, the distance D1 is increased. In the present embodiment, the distance D3 is equal to the distance D1. The distance D4 is equal to the distance D2.

[0096] The distance D1 between the first front electrode plate 53A and the first rear electrode plate 54A in the z-direction and the distance D3 between the second front electrode plate 55A and the second rear electrode plate 56A in the z-direction can be varied as desired, depending on the insulation voltage required for the capacitor 15A. The insulation voltage required for the capacitor 15A depends on the distances D1 and D3. A distance between the electrodes that corresponds to the insulation voltage required for the capacitor 15A is called the reference distance. In the present embodiment, the ratio of the sum of the distance D1 and the distance D3 to the reference distance is, for example, in the range of 1.0 to 2.0. The ratio is, for example, preferably 1.6. The sum of the distance D1 and the distance D3 is set to be greater than the reference distance, taking a safety margin into account.Increasing the sum of distances D1 and D3 reduces the capacitance of capacitor 15A. Furthermore, increasing the sum of distances D1 and D3 can increase the effects received by other conductive elements in the insulation chip 50 on the first front electrode plate 53A, the first rear electrode plate 54A, the second front electrode plate 55A, or the second rear electrode plate 56A. Considering these effects necessitates an increase in the size of the insulation chip 50. Therefore, it is preferable to keep the sum of distances D1 and D3 close to the reference distance to minimize the reduction in capacitance of capacitor 15A and the increase in the size of the insulation chip 50.

[0097] As in the Fig. 5 and Fig. As shown in Figure 6, the structure of the first front electrode plate 53B, the first rear electrode plate 54B, the second front electrode plate 55B and the second rear electrode plate 56B of the capacitor 15B in the element insulation layer 58 is the same as that of the electrode plates 53A, 54A, 55A and 56A of the capacitor 15A and is therefore not described in detail.

[0098] As in the Fig. 5 and Fig. As shown in Figure 6, the insulation chip 50 is mounted on the secondary die pad 70. More precisely, the insulation chip 50 is attached to the secondary die pad 70 via an insulating substrate 90. In other words, the insulating substrate 90 is located between the insulation chip 50 and the secondary die pad 70. The insulating substrate 90 is bonded to the secondary die pad 70 by a third bonding material 103. The insulation chip 50 is bonded to the insulating substrate 90 by a fourth bonding material 104. The third bonding material 103 and the fourth bonding material 104 are, for example, each an insulating bonding material. The insulating substrate 90 corresponds to an "insulating element." The third bonding material 103 corresponds to a "first insulating bonding material." The fourth bonding material 104 corresponds to a “second insulating bonding material”.

[0099] The insulating substrate 90 can be formed from an insulating substrate containing aluminum oxide or from an insulating substrate containing glass. The insulating substrate 90 can be formed from a resin material. The insulating substrate 90 has a front face 90s and a back face 90r, which are oriented oppositely in the z-direction. The front face 90s is in contact with the fourth bonding material 104. The back face 90r is in contact with the third bonding material 103.

[0100] The insulating substrate 90 has a thickness TS that is greater than the distance D2 between the first rear electrode plate 54A and the rear side 58r of the element insulation layer 58. The thickness TS of the insulating substrate 90 is defined as the distance between the front side 90s and the rear side 90r of the insulating substrate 90 in the z-direction.

[0101] As described above, the insulation chip 50 is attached to the secondary die pad 70 via the insulating substrate 90. Thus, the distance D5 between the first rear electrode plate 54A (54B) of the capacitor 15A (15B) and the secondary die pad 70 is greater than or equal to the distance D1. The distance D5 is greater than or equal to the thickness TA of the element insulation layer 58. In the present embodiment, the distance D5 is greater than the thickness TA of the element insulation layer 58. A distance D6 between the second rear electrode plate 56A (56B) of the capacitor 15A (15B) and the secondary die pad 70 is greater than the distance D3. The distance D6 is equal to the distance D5.

[0102] The thickness TS of the insulating substrate 90 and the distances D5 and D6 can be varied as desired. For example, the thickness TS of the insulating substrate 90 can be less than or equal to the distance D2 (D4) or greater than or equal to the distance D1 (D3). The distances D5 and D6 can be less than or equal to the distance D1 (D3) or less than the thickness TA of the element insulation layer 58.

[0103] As in Fig. As shown in Figure 2, the isolation chip 50 is attached to the secondary die pad 70 via the insulating substrate 90. Thus, the distance between the secondary die pad 70 and the substrate 57 of the isolation chip 50 in the z-direction is greater than the distance between the secondary die pad 70 and the second substrate 43 of the second chip 40 in the z-direction. Furthermore, the distance between the secondary die pad 70 and the substrate 57 of the isolation chip 50 in the z-direction is greater than the distance between the primary die pad 60 and the first substrate 33 of the first chip 30 in the z-direction. Method for manufacturing an insulation chip and a signal transmission device

[0104] An example of a method for manufacturing the insulation chip 50 of the present embodiment and an example of a method for manufacturing the signal transmission device 10 are now briefly described. The following describes a case in which several insulation chips 50 are formed simultaneously.

[0105] The process for manufacturing the insulation chip 50 includes a step for preparing the wafer, a first step for forming an insulating layer and a capacitor, a second step for forming an insulating layer, and a step for singulation.

[0106] In the wafer preparation step, a semiconductor wafer, forming the substrate 57, is prepared. The semiconductor wafer can, for example, be made of a material containing silicon. The semiconductor wafer is large enough to form several insulation chips 50.

[0107] In the first step of insulation layer and capacitor formation, an elemental insulation layer is formed on the semiconductor wafer. More precisely, insulating films made of a material containing SiO2 are layered on top of each other to form the elemental insulation layer. These insulating films form the 58M insulation films (see Fig. 5) The elemental insulation layer is formed, for example, across the entire front face of the semiconductor wafer. The elemental insulation layer is an insulating layer that forms the elemental insulation layer 58 (see Fig. 5).

[0108] Openings corresponding to the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) are formed in an insulating film within which the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) are formed. The openings are filled with a conductive material to form the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B). The conductive material can be, for example, aluminum.

[0109] Then, the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) are formed on a surface of the element insulation layer. The first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) can be made of a material such as aluminum. The material from which the electrode plates 53A (53B), 54A (54B), 55A (55B), and 56A (56B) are formed can also be another conductive material such as tungsten, titanium, copper, or similar.

[0110] In the second step of the insulation layer formation, a protective film is formed. This protective film is a protective film that is protective film 59A (see Fig. 5) forms and is formed on the entire front surface of the elemental insulation layer. The protective film can, for example, be made of a material containing SiO2. Subsequently, a passivation film is formed. The passivation film is an oxide film, which is the passivation film 59B (see Fig. 5) and which is formed on the entire front surface of the protective film. The passivation film is formed, for example, from a material containing SiN. Openings are formed in the protective film and the passivation film, exposing a section including the center of the first front electrode plate 53A (53B) and the electrode pad 55AA (55BA) of the second front electrode plate 55A (55B). Consequently, the section of the first front electrode plate 53A (53B) exposed by the protective film and the passivation film forms the first electrode pad 51A (51B). The electrode pad 55AA (55BA) forms the second electrode pad 52A (52B).

[0111] Alternatively, a mask can be used, for example, to form the openings that expose the section that includes the center of the first front electrode plate 53A (53B) and the electrode pad 55AA (55BA) of the second front electrode plate 55A (55B) during the production of the protective film and the passivation film.

[0112] During singulation, the semiconductor wafer, on which the element insulation layer is formed, is cut to the size of the insulation chip 50. This singulates the insulation chip 50. The insulation chip 50 is then manufactured using the steps described above.

[0113] The method for manufacturing the signal transmission device 10 comprises a step for preparing the frame, a step for mounting the chip, a step for wire formation, a step for forming a resin layer, a step for separation, and a step for forming a connection.

[0114] During frame preparation, a lead frame is prepared that includes the primary leads, the secondary leads, the primary die pad 60, and the secondary die pad 70 (see Fig. 2) forms. In one example, the frame is a single plate formed from a material containing copper. The frame is pressed or etched to form the primary leads, secondary leads, primary die pad 60, and secondary die pad 70. In this step, the primary leads, secondary leads, primary die pad 60, and secondary die pad 70 are connected to the frame.

[0115] During chip assembly, the first chip 30 is mounted on the primary die pad 60 by die bonding, and the second chip 40 and the isolation chip 50 are mounted on the secondary die pad 70 by die bonding.

[0116] More precisely, the first bonding material 101 is applied to a section of the primary die pad 60, on which the first chip 30 will be mounted. The second bonding material 102 is applied to a section of the second chip 40, on which the secondary die pad 70 will be mounted. Both the first bonding material 101 and the second bonding material 102 are conductive bonding materials. The first chip 30 is attached to the first bonding material 101. The second chip 40 is attached to the second bonding material 102. The first bonding material 101 and the second bonding material 102 are then solidified. If the bonding materials 101 and 102 contain solder paste, they are cooled, causing them to solidify. Then the third bonding material 103 is applied to a section of the secondary die pad 70 on which the isolation chip 50 is to be mounted.The third bonding material 103 is an insulating bonding material. The insulating substrate 90 is attached to the third bonding material 103. The fourth bonding material 104 is applied to the insulating substrate 90. The fourth bonding material 104 is also an insulating bonding material. The insulating chip 50 is attached to the fourth bonding material 104. The bonding materials 103 to 104 are then solidified. For example, if the bonding materials 103 and 104 are made of a material containing an epoxy resin, the epoxy resin is mixed with a curing agent (hardener) so that the bonding materials 103 and 104 are solidified.

[0117] In the wire formation step, a wire W connecting each of chips 30, 40, and 50, wires W connecting the first chip 30 to the primary lines, and wires W connecting the second chip 40 to the secondary lines are formed. The wires W are formed, for example, using a wire bonder.

[0118] In the resin layer formation step, a resin layer is formed to encapsulate chips 30, 40, and 50, wires W, and die pads 60 and 70. This resin layer forms the encapsulation resin 80 and is, for example, made from a black epoxy resin. The resin layer is formed, for example, by injection molding (transfer molding) or compression molding. The primary and secondary leads protrude partially from the resin layer.

[0119] In the separation step, the resin layer is cut and the primary leads, secondary leads, primary die pad 60, and secondary die pad 70 are separated from the frame. In this step, a cutting blade is used, for example, to cut the resin layer and the frame. The primary and secondary leads are cut from the frame, leaving sections of both that protrude from the resin layer.

[0120] In the connection forming step, the sections of the primary and secondary conductors protruding from the resin layer are bent into a predetermined shape using a bending process. The signal transmission device 10 is manufactured using the steps described above. How it works

[0121] The functionality of the present embodiment will now be described.

[0122] Fig. Figure 7 is a schematic diagram showing a planar structure of a section of an insulation chip 50X of a comparative example. Fig. Figure 8 is a schematic diagram showing a cross-sectional structure of the 50X insulation chip of the comparison example. Fig. Figure 8 is a schematic representation of the cross-sectional structure of a first capacitor 21AX and a second capacitor 22AX. The isolation chip 50X of the comparison example differs from the isolation chip 50 of the embodiment only in the arrangement of the capacitors. Therefore, the components that are identical to the corresponding components of the embodiment are designated with the same reference numerals. These components are not described in detail here.

[0123] As in Fig. As shown in Figure 7, the 50X isolation chip has a package structure in which the first capacitor 21AX and the second capacitor 22AX are integrated into a single chip.

[0124] As in Fig. As shown in Figure 8, the first capacitor 21AX has a first front electrode plate 53AX and a first rear electrode plate 54AX. The second capacitor 22AX has a second front electrode plate 55AX and a second rear electrode plate 56AX.

[0125] The first front electrode plate 53AX and the first rear electrode plate 54AX are opposite each other in the z-direction. The second front electrode plate 55AX and the second rear electrode plate 56AX are opposite each other in the z-direction. The first front electrode plate 53AX and the second front electrode plate 55AX are separated from each other in the x-direction. The first rear electrode plate 54AX and the second rear electrode plate 56AX are separated from each other in the x-direction. The first rear electrode plate 54AX and the second rear electrode plate 56AX are electrically connected to the element insulation layer 58.

[0126] As in Fig. As shown in Figure 7, the electrode plates 53AX, 54AX, 55AX, and 56AX are each rectangular in the z-direction. With this configuration, the electric field tends to concentrate at the corners of electrode plates 53AX, 54AX, 55AX, and 56AX. This concentration of the electric field at the corners of electrode plates 53AX, 54AX, 55AX, and 56AX can reduce the isolation voltage of capacitors 21AX and 22AX.

[0127] In this context, in the present embodiment, the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B) are circular in the z-direction. The second front electrode plate 55A (55B) and the second rear electrode plate 56A (56B) are each annular and have an inner diameter larger than the diameter of the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B). The second front electrode plate 55A is shaped such that it surrounds the first front electrode plate 53A and is concentric with it. The second rear electrode plate 56A is shaped such that it surrounds the first rear electrode plate 54A and is concentric with it.Viewed in the z-direction, the electrode plates 53A (53B), 54A (54B), 55A (55B), and 56A (56B) contain no corner where an electric field can concentrate. Furthermore, the distance G1 between the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) is constant. The distance G2 between the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) is also constant. Therefore, it is less likely that an electric field will concentrate. Consequently, the insulation voltage of the insulation chip 50 is less likely to decrease. Advantages

[0128] The present embodiment has the following advantages. (1) The insulation chip 50 comprises the element insulation layer 58 with the front 58s and the back 58r, as well as the first capacitor 21A (21B) and the second capacitor 22A (22B) formed on the element insulation layer 58. The first capacitor 21A (21B) includes the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B), which are opposite each other in the z-direction, i.e., in the direction of the thickness of the element insulation layer 58. The second capacitor 22A (22B) comprises the second front electrode plate 55A (55B), which surrounds the first front electrode plate 53A (53B) in the z-direction, and the second rear electrode plate 56A (56B), which surrounds the first rear electrode plate 54A (54B) in the z-direction. The second front electrode plate 55A (55B) and the second rear electrode plate 56A (56B) are arranged opposite each other in the z-direction.The first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) are electrically connected in the element insulation layer 58.

[0129] In a typical single-capacitor isolation chip, the breakdown voltage is improved by increasing the z-direction distance between the front and rear electrode plates. However, increasing this distance also increases the thickness of the elemental insulation layer. Increasing the thickness of the elemental insulation layer can cause warping of the semiconductor wafer during the fabrication of the isolation chip, negatively impacting the manufacturing process.

[0130] In this respect, in the present embodiment, the first capacitor 21A (21B) and the second capacitor 22A (22B) are connected in series, and the second capacitor 22A (22B) and the first capacitor 21A (21B) are arranged orthogonally to the z-direction. This improves the insulation voltage of the insulation chip 50 without increasing the thickness TA of the element insulation layer 58. This improves the insulation voltage of the insulation chip 50 and simplifies its manufacture.

[0131] Furthermore, the second front electrode plate 55A (55B), viewed in the z-direction, is shaped such that it surrounds the first front electrode plate 53A (53B). Viewed in the z-direction, the second rear electrode plate 56A (56B) is shaped such that it surrounds the first rear electrode plate 54A (54B). Compared to the structure of the insulation chip 50X in the Fig. In the comparative example shown, the front electrode plates 53A (53B) and 55A (55B) and the rear electrode plates 54A (54B) and 56A (56B) are formed in a smaller space in the x-direction. This reduces the size of the insulation chip 50 in the x-direction.

[0132] (2) Viewed in the z-direction, the first front electrode plate 53A (53B) is circular. The second front electrode plate 55A (55B) is annular and has an inner diameter larger than the diameter of the first front electrode plate 53A (53B). The first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) are arranged concentrically. Viewed in the z-direction, the first rear electrode plate 54A (54B) is circular. The second rear electrode plate 56A (56B) is annular and has an inner diameter larger than the diameter of the first rear electrode plate 54A (54B). The first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) are arranged concentrically.

[0133] In this setup, the distance G1 between the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) is constant in the circumferential direction of the first front electrode plate 53A (53B). The distance G2 between the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) is constant in the circumferential direction of the first rear electrode plate 54A (54B). This makes it less likely that an electric field will concentrate between the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B), as well as between the first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B). This prevents a drop in the insulation voltage of the first capacitor 21A (21B) and the second capacitor 22A (22B). As a result, the insulation voltage of the insulation chip 50 is less likely to be reduced.

[0134] (3) The distance G1, which is the minimum distance between the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B), is greater than or equal to the distance D1, which is the minimum distance between the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B).

[0135] In this configuration, the isolation voltage between the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) is greater than or equal to the isolation voltage between the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B). This makes a reduction in the isolation voltage of the isolation chip 50 less likely.

[0136] (4) The insulation chip 50 comprises the front protective layer 59, which covers the front face 58s of the element insulating layer 58, the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B). The front protective layer 59 exposes a section of the first front electrode plate 53A (53B).

[0137] In this structure, the exposed surface of the first front electrode plate 53A (53B), which is exposed by the front protective layer 59, is used as the first electrode pad 51A (51B). This eliminates the need to form an electrode pad that is distinct from the first front electrode plate 53A (53B). For example, if an electrode pad is formed over the first front electrode plate 53A (53B) in the z-direction, one or more insulating films 58M must be arranged between the first front electrode plate 53A and the electrode pad. This leads to an increase in the thickness TA of the element insulation layer 58. In this embodiment, the first front electrode plate 53A (53B) incorporates the electrode pad. This limits the increase in the thickness TA of the element insulation layer 58.Furthermore, if, for example, an electrode pad is separated from the first front electrode plate 53A (53B) in a direction orthogonal to the z-direction, a conductive path is formed between the first front electrode plate 53A (53B) and the electrode pad. This conductive path leads to the formation of an inductance. In this respect, no conductive path is formed in the present embodiment. This avoids the occurrence of an inductance caused by the conductor track.

[0138] (5) The signal transmission device 10 comprises the first chip 30 with the primary circuit 13, the isolation chip 50, and the second chip 40 with the secondary circuit 14, which is configured to receive a signal from the primary circuit 13 via the isolation chip 50. The isolation chip 50 has the element insulation layer 58 with the front 58s and the rear surface 58r, as well as the first capacitor 21A (21B) and the second capacitor 22A (22B) formed on the element insulation layer 58. The first capacitor 21A (21B) includes the first front electrode plate 53A (53B) and the first rear electrode plate 54A (54B), which are opposite each other in the z-direction, i.e., in the direction of the thickness of the element insulation layer 58.The second capacitor 22A (22B) has a second front electrode plate 55A (55B) that surrounds the first front electrode plate 53A (53B) in the z-direction, and a second rear electrode plate 56A (56B) that surrounds the first rear electrode plate 54A (54B) in the z-direction. The second front electrode plate 55A (55B) and the second rear electrode plate 56A (56B) are arranged opposite each other in the z-direction. The first rear electrode plate 54A (54B) and the second rear electrode plate 56A (56B) are electrically connected in the element insulation layer 58.

[0139] This structure offers the same advantage as the advantage described above (1). As described above, the isolation voltage of the isolation chip 50 is also improved here. This improves the isolation voltage of the signal transmission device 10.

[0140] (6) The insulating substrate 90 is arranged between the insulating chip 50 and the secondary die pad 70.

[0141] In this structure, the distances D5 and D6 between the first rear electrode plate 54A (54B) and the secondary die pad 70, as well as between the second rear electrode plate 56A (56B) and the secondary die pad 70, are increased in the z-direction. This improves the insulation voltage between the first electrode plate 54A (54B) and the secondary die pad 70, as well as the insulation voltage between the second electrode plate 56A (56B) and the secondary die pad 70.

[0142] (7) The insulating substrate 90 is connected to the secondary die pad 70 by the third bonding material 103. The third bonding material 103 may contain an insulating bonding material.

[0143] In this structure, the isolation voltage between the first capacitor 21A (21B) and the secondary die pad 70 and the isolation voltage between the second capacitor 22A (22B) and the secondary die pad 70 are improved.

[0144] (8) The insulating substrate 90 can be formed from an insulating substrate with aluminium oxide or from an insulating substrate with glass.

[0145] In this structure, the insulating substrate 90 can be easily produced with a large thickness compared to a structure in which the insulating substrate 90 is formed from an insulating film. Modified examples

[0146] The embodiment described above can be modified as follows. The embodiment and the following modified examples can be combined with one another, provided the combined modifications are technically compatible.

[0147] The structure of substrate 57 can be modified in any way. For example, a silicon-on-insulator (SOI) substrate can be used as substrate 57.

[0148] Either the protective film 59A or the passivation film 59B can be omitted on the front protective layer 59. The front protective layer 59 can be omitted.

[0149] The third bonding material 103 can be formed from a conductive bonding material instead of an insulating bonding material.

[0150] The encapsulation resin 80 can be omitted in the signal transmission device 10.

[0151] The thickness of each of the front electrode plates 53A, 53B, 55A, and 55B and the thickness of each of the rear electrode plates 54A, 54B, 56A, and 56B can be varied as desired. For example, the front electrode plates 53A, 53B, 55A, and 55B can be thicker than the rear electrode plates 54A, 54B, 56A, and 56B.

[0152] The second front electrode plates 55A and 55B can be formed separately from the second electrode pads 52A and 52B. More precisely, the insulation chip 50 can contain the second electrode pads 52A and 52B, which are electrically connected to the second front electrode plates 55A and 55B. In this case, the second electrode pads 52A and 52B are formed in a position separate from the second front electrode plates 55A and 55B, viewed in the z-direction. The front protective layer 59 exposes the surfaces of the second electrode pads 52A and 52B. The second front electrode plates 55A and 55B can be connected to the second electrode pads 52A and 52B, for example, by wires. In this case, the second electrode pads 52A and 52B can be formed from a material different from that of the second front electrode plates 55A and 55B.

[0153] In the embodiment described above, the first front electrode plates 53A and 53B and the second front electrode plates 55A and 55B are formed on the front face 58s of the element insulation layer 58. However, there are no limitations to this structure. For example, the first front electrode plates 53A and 53B can be embedded in the element insulation layer 58. In this case, the first electrode pads 51A and 51B are arranged separately from the first front electrode plates 53A and 53B on the front face 58s of the element insulation layer 58, which is located above the first front electrode plates 53A and 53B. The first front electrode plate 53A and the first electrode pad 51A are connected to each other by a connecting line (via). The first front electrode plate 53B and the first electrode pad 51B are also connected to each other by a connecting line (via).In one example, the second front electrode plates 55A and 55B can be embedded in the element insulation layer 58. In this case, the second electrode pads 52A and 52B are arranged separately from the second front electrode plates 55A and 55B on the front face 58s of the element insulation layer 58, which is located above the second front electrode plates 55A and 55B. The second front electrode plate 55A and the second electrode pad 52A are connected to each other by a connecting line (via). The second front electrode plate 55B and the second electrode pad 52B are also connected to each other by a connecting line (via). In this case, the first electrode pads 51A and 51B and the second electrode pads 52A and 52B are formed from a material containing Al in the same way as the first front electrode plates 53A and 53B and the second front electrode plates 55A and 55B.The material from which the first electrode pads 51A and 51B and the second electrode pads 52A and 52B are made can be varied as desired. For example, the first electrode pads 51A and 51B can be made of a material different from that of the first anterior electrode plates 53A and 53B. The second electrode pads 52A and 52B can be made of a material different from that of the second anterior electrode plates 55A and 55B.

[0154] In the embodiment described above, the area of ​​the first front electrode plate 53A is the same as that of the second front electrode plate 55A. The area of ​​the first rear electrode plate 54A is the same as that of the second rear electrode plate 56A. However, there are no limitations to this structure. The first front electrode plate 53A can have a larger area than the second front electrode plate 55A. The first rear electrode plate 54A can have a larger area than the second rear electrode plate 56A. In other words, the first capacitor 21A can have a larger capacitance than the second capacitor 22A. The second front electrode plate 55A can have a larger area than the first front electrode plate 53A. The second rear electrode plate 56A can have a larger area than the first rear electrode plate 54A.In other words, the second capacitor 22A can have a larger capacitance than the first capacitor 21A. The first front electrode plate 53B, the first rear electrode plate 54B, the second front electrode plate 55B, and the second rear electrode plate 56B can be interchanged in the same way.

[0155] The isolation chip 50 can be mounted on the primary die pad 60 instead of the secondary die pad 70. In this case, the first chip 30 and the isolation chip 50 are mounted on the primary die pad 60. The mounting configuration of the isolation chip 50 on the primary die pad 60 is the same as the mounting configuration of the isolation chip 50 on the secondary die pad 70 in the embodiment described above.

[0156] As in Fig. As shown in Figure 9, the isolation chip 50 can be mounted on an intermediate die pad 110, which is distinct from the primary die pad 60 and the secondary die pad 70. The intermediate die pad 110 is electrically floating with respect to the primary die pad 60 and the secondary die pad 70. In other words, the isolation chip 50 is mounted on an electrically floating support frame (the intermediate die pad 110). The intermediate die pad 110 corresponds to a “mounting frame” and a “third mounting frame.”

[0157] The intermediate die pad 110 can, for example, be manufactured simultaneously with die pads 60 and 70 from the same material as die pads 60 and 70. The material from which the intermediate die pad 110 is formed can be changed as desired and can, for example, be a different material than die pads 60 and 70. For instance, the intermediate die pad 110 could be made of a ceramic such as aluminum oxide (alumina) or an insulating material such as glass. The intermediate die pad 110 could also be made of a resin material.

[0158] In the Fig. In the example shown, the insulating substrate 90 is bonded to the intermediate die pad 110 by the third bonding material 103. The insulating chip 50 is bonded to the insulating substrate 90 by the fourth bonding material 104.

[0159] Since the intervening die pad 110 is electrically floating, the insulation chip 50 can be electrically connected to the intervening die pad 110. Therefore, the third bonding material 103 and the fourth bonding material 104 can be conductive bonding materials. A semiconductor substrate can also be used instead of the insulating substrate 90 between the intervening die pad 110 and the insulation chip 50. The insulating substrate 90 can be omitted. That is, the insulation chip 50 can be bonded to the intervening die pad 110 via the third bonding material 103. In this case, the third bonding material 103 can be either conductive or insulating. Planar form of the capacitor in modified examples

[0160] The shape of the second front electrode plates 55A and 55B of the capacitors 15A and 15B, viewed in the z-direction, can be changed arbitrarily. In an example, as in Fig. As shown in Figure 10, the second front electrode plates 55A and 55B, viewed in the z-direction, can have an open, ring-shaped form with openings 55AD and 55BD.

[0161] The openings 55AD and 55BD and the second electrode pads 52A and 52B are located on opposite sides of the first electrode pads 51A and 51B. "The openings 55AD and 55BD and the second electrode pads 52A and 52B are located on opposite sides of the first electrode pads 51A and 51B" means that the opening 55AD (55BD) and the second electrode pad 52A (52B) are located on opposite sides of the first electrode pad 51A (51B) in a straight line that extends through both the first electrode pad 51A (51B) and the second electrode pad 52A (52B). In the example shown, the openings 55AD and 55BD of the second front electrode plates 55A and 55B are formed in a section of the second front electrode plates 55A and 55B that faces the first chip 30 (see Fig. 2) is located on the first electrode pads 51A and 51B.

[0162] Wires W, which are connected to the first electrode pads 51A and 51B, are connected to the first chip 30 (see Fig. 2) The wires W extend from the first electrode pads 51A and 51B away from the second electrode pads 52A and 52B. Since the openings 55AD and 55BD and the second electrode pads 52A and 52B are located on opposite sides of the first electrode pads 51A and 51B, the wires W connected to the first electrode pads 51A and 51B, viewed in the z-direction, extend over the openings 55AD and 55BD. In other words, viewed in the z-direction, the second front electrode pads 55A and 55B are in a position different from the position of the wires W connected to the first electrode pads 51A and 51B.

[0163] In the example shown, the second front electrode plates 55A and 55B have ends 55AE and 55BE that define the openings 55AD and 55BD. The ends 55AE and 55BE are convex when viewed in the z-direction.

[0164] In this structure, the wires W connected to the first front electrode plate 53A (53B) do not overlap the second front electrode plate 55A (55B) in the z-direction. This makes it less likely that the wires W and the second front electrode plate 55A (55B), which have a large potential difference, will form a short circuit. Furthermore, the end 55AE (55BE) of the second front electrode plate 55A (55B) has a curved surface. This makes it less likely that an electric field will concentrate at the end 55AE (55BE).

[0165] The ends 55AE and 55BE of the second anterior electrode plates 55A and 55B can be modified as desired. For example, the ends 55AE and 55BE can have a flat distal surface. Viewed in the z-direction, the second posterior electrode plates 56A and 56B can have an open, ring-shaped form, consistent with the open design of the second anterior electrode plates 55A and 55B.

[0166] Viewed in the z-direction, the shapes of the first front electrode plates 53A and 53B and the first rear electrode plates 54A and 54B of the capacitors 15A and 15B are not restricted to a circle and can be arbitrarily modified. Viewed in the z-direction, the shapes of the second front electrode plates 55A and 55B and the second rear electrode plates 56A and 56B of the capacitors 15A and 15B are not restricted to a circle and can be arbitrarily modified. In an example, as in Fig. As shown in Figure 11, the first front electrode plates 53A and 53B can be rectangular when viewed in the z-direction. In the example shown, each of the four corners of the first front electrode plates 53A and 53B is rounded, so that it is curved.

[0167] Viewed in the z-direction, the second front electrode plates 55A and 55B can have the shape of a rectangular frame. In the example shown, each of the four corners of the second front electrode plates 55A and 55B is rounded to appear curved.

[0168] The shape of the first front electrode plates 53A and 53B, viewed in the z-direction, can be a polygon with five or more sides. Similarly, the shape of the first rear electrode plates 54A and 54B, viewed in the z-direction, can be a polygon with five or more sides. The shape of the second front electrode plates 55A and 55B, viewed in the z-direction, is a polygonal frame with five or more sides. Likewise, the shape of the second rear electrode plates 56A and 56B, viewed in the z-direction, is a polygonal shape with five or more sides.

[0169] In the Fig. In the modified example shown in Figure 11, the first front electrode plates 53A and 53B can be circular when viewed in the z-direction. In this case, the first rear electrode plates 54A and 54B are also circular when viewed in the z-direction.

[0170] In the Fig. In the modified example shown in Figure 11, the second front electrode plates 55A and 55B, viewed in the z-direction, can have a closed, ring-shaped form. In this case, the second rear electrode plates 56A and 56B, viewed in the z-direction, also have a closed, ring-shaped form. Alternatively, the second front electrode plates 55A and 55B, viewed in the z-direction, can have an open ring-shaped form that encloses the opening 55AD. Capacitor structure in modified examples

[0171] Capacitors 15A and 15B have a double insulation structure, in which the first capacitors 21A and 21B and the second capacitors 22A and 22B are connected in series. However, there are no limits to this structure. As shown in the Fig. 12 and Fig. As shown in Figure 13, the capacitor 15A can, for example, be constructed such that the first capacitor 21A, the second capacitor 22A and a third capacitor 140 are connected in series.

[0172] The first capacitor 21A has the same structure as the embodiment described above. The second capacitor 22A differs from that of the embodiment in the construction of the second front electrode plate 55A. In the illustrated example, the second front electrode plate 55A does not include the electrode pad 55AA and the connector 55AB of the embodiment. Thus, as in Fig. Figure 12 shows the second front electrode plate 55A, viewed in the z-direction, having a closed, ring-shaped form.

[0173] As in the Fig. 12 and Fig. As shown in Figure 13, the third capacitor 140 has a third front electrode plate 141 and a third rear electrode plate 142. The third front electrode plate 141 and the third rear electrode plate 142 are, for example, made of the same material as electrode plates 53A, 54A, 55A and 56A.

[0174] The third front electrode plate 141 has an inner diameter that is larger than the diameter of the second front electrode plate 55A. In the example shown, the third front electrode plate 141 has a closed annular shape when viewed in the z-direction.

[0175] Viewed in the z-direction, the third front electrode plate 141 is shaped to surround the second front electrode plate 55A. The center of the third front electrode plate 141 coincides with the center of the first front electrode plate 53A. In other words, the third front electrode plate 141 and the first front electrode plate 53A are arranged concentrically. That is, the third front electrode plate 141 is shaped to be concentric with both the first front electrode plate 53A and the second front electrode plate 55A. Although not shown in the drawings, the third front electrode plate 141 is aligned with both the first front electrode plate 53A and the second front electrode plate 55A in the z-direction.

[0176] The third front electrode plate 141 can have a larger area, viewed in the z-direction, than the second front electrode plate 55A. The area of ​​the third front electrode plate 141 can be arbitrarily varied in the z-direction. For example, the area of ​​the third front electrode plate 141 can be smaller than that of the second front electrode plate 55A in the z-direction.

[0177] In one example, the area of ​​the third front electrode plate 141 can correspond to that of the second front electrode plate 55A in the z-direction. If, for example, the area difference in the z-direction between the third front electrode plate 141 and the second front electrode plate 55A is within 10% of the area of ​​the second front electrode plate 55A in the z-direction, then the third front electrode plate 141 is assumed to correspond to that of the second front electrode plate 55A in the z-direction.

[0178] The third front electrode plate 141 is electrically connected to the second front electrode plate 55A via a common connection point 143. The common connection point 143 and the second electrode pad 52A are located on opposite sides of the second front electrode plate 55A. The common connection point 143 can be repositioned in the circumferential direction of the second front electrode plate 55A.

[0179] As in Fig. As shown in Figure 13, the third rear electrode plate 142 has an inner diameter that is larger than the diameter of the second rear electrode plate 56A. In the illustrated example, the third rear electrode plate 142 has a closed, ring-shaped form when viewed in the z-direction.

[0180] Viewed in the z-direction, the third rear electrode plate 142 is shaped to surround the second rear electrode plate 56A. The center of the third rear electrode plate 142 coincides with the center of the first rear electrode plate 54A. In other words, the third rear electrode plate 142 and the first rear electrode plate 54A are arranged concentrically. That is, the third rear electrode plate 142 is shaped to be concentric with both the first rear electrode plate 54A and the second rear electrode plate 56A. Although not shown in the drawings, the third rear electrode plate 142 is aligned with the first rear electrode plate 54A and the second rear electrode plate 56A in the z-direction.

[0181] The third rear electrode plate 142 can have a larger area than the second rear electrode plate 56A when viewed in the z-direction. The area of ​​the third rear electrode plate 142 can be arbitrarily varied in the z-direction. For example, the third rear electrode plate 142 can be smaller than the second rear electrode plate 56A when viewed in the z-direction.

[0182] In one example, the area of ​​the third rear electrode plate 142 can correspond to that of the second rear electrode plate 56A in the z-direction. If the area difference in the z-direction between the third rear electrode plate 142 and the second rear electrode plate 56A is, for example, within 10% of the area of ​​the second rear electrode plate 56A in the z-direction, it is assumed that the third rear electrode plate 142 corresponds to that of the second rear electrode plate 56A in the z-direction.

[0183] In the example shown, the area of ​​the third posterior electrode plate 142 is the same as that of the third anterior electrode plate 141. If the area difference between the third posterior electrode plate 142 and the third anterior electrode plate 141 is, for example, within 10% of the area of ​​the third anterior electrode plate 141, it is assumed that the third posterior electrode plate 142 corresponds to the area of ​​the third anterior electrode plate 141.

[0184] The third rear electrode plate 142 is electrically connected to the second electrode pad 52A via a common connection point 144. The common connection point 144 has an intermediate connection section 144A, which is connected to the third rear electrode plate 142, and a connecting line (via) 144B, which is connected to the intermediate connection section 144A and the second electrode pad 52A.

[0185] The intermediate connection section 144A is connected to the third rear electrode plate 142. Viewed in the z-direction, the intermediate connection section 144A extends from the third rear electrode plate 142 to a position where the second electrode pad 52A is formed. In the illustrated example, the intermediate connection section 144A is formed integrally with the third rear electrode plate 142.

[0186] The connecting line (via) 144B is arranged in the element insulation layer 58 (see Fig. 5) to connect the second electrode pad 52A and the intermediate connection section 144A. The third capacitor 140, which is electrically connected to the second electrode pad 52A, is electrically connected to the secondary circuit 14 (see Fig. 1).

[0187] In this structure, the three capacitors are connected in series, forming an insulating structure. This improves the insulation voltage of the insulating chip 50 compared to an insulating structure formed from two capacitors connected in series. If the insulation voltage of the insulating chip 50 is the same, the distance between the front and rear electrode plates in the z-direction can be reduced. Consequently, the thickness TA of the element insulating layer 58 is reduced. Structure of the insulation chip on the back of the chip in modified examples

[0188] The structure of the isolation chip 50 on the back of the chip 50r can be, for example, as in a first and a second example shown in the Fig. 14 and Fig. The 15 figures shown will be changed. As shown in the Fig. 14 and Fig. As shown in Figure 15, the first electrode pads 51A and 51B, the second electrode pads 52A and 52B, the electrode plates 53A, 53B, 54A, 54B, 55A, 55B, 56A and 56B, the element insulation layer 58, the protective film 59A and the passivation film 59B each have the same structure as in the first embodiment. Fig. 14 and Fig. The 15 modified examples shown are the insulating substrate 90 and the fourth bonding material 104 (see Fig. 5) not located between the isolation chip 50 and the secondary die pad 70. The isolation chip 50 is directly bonded to the secondary die pad 70 by the third bonding material 103. First example of an isolation chip 50

[0189] As in Fig. As shown in Figure 14, the insulating chip 50 includes a rear insulating layer 120 arranged on the back side 57r of the substrate 57. The rear insulating layer 120 can be formed from an electrically insulating material. For example, the rear insulating layer 120 can be formed from a layer containing, for instance, SiO₂. The rear insulating layer 120 is formed, for instance, by applying a thermosetting organic siloxane polymer solution with Si-O-Si in the main chain to the back side 57r of the substrate. Alternatively, the rear insulating layer 120 can also be formed from a layer containing, for example, resin. Examples of resins include an epoxy resin, a phenolic resin, and a polyimide resin. In the first example, the rear insulating layer 120 is formed on the entire back side of the substrate 57r.The rear insulating layer 120 has a front side 120s and a back side 120r, which point in opposite directions in the z-direction. The front side 120s of the rear insulating layer 120 is in contact with the substrate back side 57r. The back side 120r of the rear insulating layer 120 encompasses the chip back side 50r of the insulating chip 50.

[0190] As in Fig. As shown in Figure 14, the isolation chip 50 is bonded to the secondary die pad 70 by the third bonding material 103. That is, in the first example, the insulating substrate 90 is not located between the isolation chip 50 and the secondary die pad 70. The third bonding material 103 bonds the back side 120r of the rear isolation layer 120 (the chip back side 50r) and the secondary die pad 70. As in the embodiment described above, the third bonding material 103 includes an insulating bonding material.

[0191] The rear insulating layer 120 has a thickness TR that is greater than the thickness TB of the insulating films 58M and less than the thickness TA of the element insulating layer 58. The thickness TR of the rear insulating layer 120 is greater than the thickness TC of the protective film 59A and the thickness TD of the passivation film 59B. The thickness TR of the rear insulating layer 120 is greater than the distance D2 between the first rear electrode plate 54A and the rear side 58r of the element insulating layer 58 in the z-direction. The thickness TR of the rear insulating layer 120 is greater than the distance D4 between the second rear electrode plate 56A and the rear side 58r of the element insulating layer 58 in the z-direction. The thickness TR of the rear insulation layer 120 is greater than the thickness TE of the third bonding material 103. In one example, the thickness TR of the rear insulation layer 120 is in a range of 5 µm to 100 µm.The thickness TE of the third bonding material 103, which is less than the thickness TR of the rear insulating layer 120, is less than 10 µm (about a few µm).

[0192] The thickness TR of the rear insulating layer 120 is defined as the distance between the front 120s and the back 120r of the rear insulating layer 120 in the z-direction. The thickness TB of the insulating films 58M is defined as the distance between the front and back of the insulating films 58M in the z-direction. In this modified example, the insulating films 58M comprise a first insulating film 58A and a second insulating film 58B. The thickness TB of the insulating films 58M is defined as the distance between a back of the first insulating film 58A and a front of the second insulating film 58B in the insulating films 58M in the z-direction. The thickness TC of the protective film 59A is defined as the distance between a front and a back of the protective film 59A in the z-direction. The front side of the protective film 59A is in contact with a surface of the passivation film 59B.The back side of the protective film 59A is in contact with the element insulation layer 58. The thickness TD of the passivation film 59B is defined as the distance between a front and a back side of the passivation film 59B in the z-direction. The front side of the passivation film 59B encloses the chip front 50s of the insulation chip 50. The back side of the passivation film 59B is in contact with the protective film 59A.

[0193] In this structure, the distances D5 and D6 between the secondary die pad 70 and the capacitor 15A are larger in the z-direction than in a structure where an isolation chip does not include the rear isolation layer 120 and is bonded to the secondary die pad 70 by the third bonding material 103. This improves the isolation voltage between the isolation chip 50 and the secondary die pad 70, thereby improving the isolation voltage of the signal transmission device 10.

[0194] To increase the thickness TE of the third bonding material 103, its volume must be increased. However, the third bonding material 103, applied to the secondary die pad 70, spreads when wet. To increase its thickness TE, the surface area of ​​the third bonding material 103 can be enlarged in the z-direction and extended beyond the secondary die pad 70. However, the wet spreading of the third bonding material 103 limits the increase in its thickness TE.

[0195] In this respect, in the structure of the first example, the rear insulating layer 120 is slightly increased compared to the third bonding material 103. Therefore, the thickness TR of the rear insulating layer 120 is slightly increased compared to the thickness TE of the third bonding material 103. This allows the distances D5 and D6 between the capacitor 15A and the secondary die pad 70 to be slightly increased in the z-direction.

[0196] If the rear insulation layer 120 contains resin, the thickness TR of the rear insulation layer 120 can be increased more easily than if the rear insulation layer 120 is formed from an oxide film, for example.

[0197] The thickness TR of the rear insulation layer 120 is greater than the distance D2 between the first rear electrode plate 54A and the back 58r of the element insulation layer 58 in the z-direction, and the distance D4 between the second rear electrode plate 56A and the back 58r in the z-direction. Thus, the distances D5 and D6 between the capacitor 15A and the secondary die pad 70 in the z-direction can be increased without increasing the distances D3 and D4.

[0198] The thickness TR of the rear insulation layer 120 can be varied as desired. For example, the thickness TR of the rear insulation layer 120 can be greater than or equal to the thickness TA of the element insulation layer 58. The thickness TR of the rear insulation layer 120 can be less than or equal to the thickness TE of the third bonding material 103 and the distances D2 and D4. Second example of an isolation chip 50

[0199] As in Fig. As shown in Figure 15, the insulation chip 50 has a rear insulating layer 130, which is arranged on the back side 57r of the substrate 57. The rear insulating layer 130 has an oxide film 131 and an insulating layer 132. The rear insulating layer 130 has a front side 130s and a back side 130r, which face in opposite directions. The front side 130s is in contact with the back side 57r of the substrate. The back side 130r has the chip back side 50r of the insulation chip 50.

[0200] The oxide film 131 is arranged on the back side 57r of the substrate 57. The oxide film 131 is formed, for example, from a material containing SiO2. The oxide film 131 covers the entire back side 57r of the substrate.

[0201] The insulating chip 132 and the substrate 57 are arranged on opposite sides of the oxide film 131. The insulating layer 132 can be formed by applying a thermosetting organic siloxane polymer solution with Si-O-Si in the main chain to the oxide film 131. Thus, the insulating layer 132 is formed from a layer containing SiO. The oxide film 131 has a front and a back side facing in opposite directions. The front side of the oxide film 131 is in contact with the substrate 57. The insulating layer 132 is formed on the entire back side of the oxide film 131. Thus, the oxide film 131 is located between the substrate 57 and the insulating layer 132 in the z-direction. The oxide film 131 has the front side 130s of the back insulating layer 130. Insulation layer 132 has the back side 130r of the back insulation layer 130. In other words, insulation layer 132 encompasses the chip back side 50r of the insulation chip 50.

[0202] The insulating layer 132 can be made of a resinous material. In this case, the insulating layer 132 is a resin layer. The insulating layer 132 (resin layer) can be made of a material containing, for example, an epoxy resin, a phenolic resin, or a polyimide resin.

[0203] The rear insulating layer 130 has a thickness TRA, which is the combined thickness of the thickness TF of the oxide film 131 and the thickness TG of the insulating layer 132. The thickness TRA of the rear insulating layer 130 is greater than the thickness TE of the third bonding material 103. More precisely, the thickness TG of the insulating layer 132 is greater than the thickness TF of the oxide film 131. The thickness TF of the oxide film 131 is less than the thickness TE of the third bonding material 103. The thickness TG of the insulating layer 132 is equal to the thickness TE of the third bonding material 103. Therefore, the combined thickness (the thickness TRA of the rear insulating layer 130) of the thickness TF of the oxide film 131 and the thickness TG of the insulating layer 132 is greater than the thickness TE of the third bonding material 103.

[0204] The thickness TF of the oxide film 131 is defined as the distance between a surface (front side) of the oxide film 131 that is in contact with the back side 57r of the substrate 57 and a surface (back side) of the oxide film 131 that is in contact with the insulating layer 132 in the z-direction. The thickness TG of the insulating layer 132 is defined as the distance in the z-direction between a surface (front side) of the insulating layer 132 that is in contact with the oxide film 131 and a surface (back side) of the insulating layer 132 that is opposite the front side in the z-direction. The back side of the insulating layer 132 has the back side 130r of the rear insulating layer 130 (the chip back side 50r of the insulating chip 50).

[0205] The thickness TRA of the rear insulation layer 130 is greater than the thickness TC of the protective film 59A and the thickness TD of the passivation film 59B. The thickness TRA of the rear insulation layer 130 is greater than the thickness TB of the insulating films 58M and less than the thickness TA of the element insulation layer 58. The thickness TRA of the rear insulation layer 130 is greater than the distance D2 between the first rear electrode plate 54A and the back side 58r of the element insulation layer 58 in the z-direction. The thickness TRA of the rear insulation layer 130 is greater than the distance D4 between the second rear electrode plate 56A and the back side 58r of the element insulation layer 58 in the z-direction.

[0206] The thickness TF of the oxide film 131 is less than the distances D2 and D4. The thickness TF of the oxide film 131 can be equal to the thickness TB of the insulating films 58M.

[0207] The thickness TG of the insulating layer 132 is greater than the thickness TC of the protective film 59A. The thickness TG of the insulating layer 132 is greater than or equal to the thickness TD of the passivating film 59B. The thickness TF of the oxide film 131 is greater than or equal to the thickness TC of the protective film 59A. The thickness TF of the oxide film 131 and the thickness TG of the insulating layer 132 can be varied as desired.

[0208] In this structure, the distances D5 and D6 between the secondary die pad 70 and the capacitor 15A are larger in the z-direction than in a structure where an isolation chip does not include the rear isolation layer 130 and is bonded to the secondary die pad 70 by the third bonding material 103. This improves the isolation voltage between the isolation chip 50 and the secondary die pad 70, thereby improving the isolation voltage of the signal transmission device 10.

[0209] The thickness TG of the insulating layer 132, which increases in thickness more easily than the oxide film 131, is greater than the thickness TF of the oxide film 131. This increases the distances D5 and D6 between the secondary die pad 70 and the capacitor 15A in the z-direction.

[0210] The thickness TF of the oxide film 131, which cannot be easily increased, is less than the thickness TE of the third bonding material 103. This facilitates the formation of the rear insulating layer 130, which contains the oxide film 131 and the insulating layer 132.

[0211] In the Fig. 14 and Fig. In the 15 modified examples of the insulation chip 50 shown, the insulating substrate 90 can be arranged between the insulation chip 50 and the secondary die pad 70. In this case, the structure for mounting the insulation chip 50 onto the secondary die pad 70 via the insulating substrate 90 is the same as in the embodiment shown. Structure of the element insulation layer in a modified example

[0212] The structure of the 58M insulation films, which form the element insulation layer 58, can be modified as desired. In one example, as in the Fig. 14 and Fig. As shown in Figure 15, the insulating films 58M comprise the first insulating film 58A and the second insulating film 58B, which is formed on the first insulating film 58A. In this case, the electrode plates 53A, 53B, 54A, 54B, 55A, 55B, 56A and 56B can be formed from a material including Cu.

[0213] The first insulating film 58A, for example, is an etch-stop layer and is formed from a material such as silicon nitride (SiN), SiC, nitrogen-doped silicon carbide (SiCN), or similar. The first insulating film 58A prevents, for example, the diffusion of copper. That is, the first insulating film 64A is a copper diffusion barrier film. The first insulating film 58A prevents, for example, deformation or warping. More precisely, the first insulating film 58A is designed to deform in a direction opposite to the deformation direction of the second insulating film 58B. In the Fig. 14 and Fig. In the 15 modified examples shown, the first insulating film 58A is formed from a material containing SiN. The second insulating film 58B, for example, is an intermediate insulating film and an oxide film made from a material containing SiO2. As shown in the Fig. 14 and Fig. As shown in Figure 15, the thickness of the second insulating film 64B is greater than the thickness of the first insulating film 64A. The thickness of the first insulating film 58A can range from 50 nm to 1000 nm. The thickness of the second insulating film 58B can range from 500 nm to 5000 nm. For example, the thickness of the first insulating film 58A is approximately 300 nm, and the thickness of the second insulating film 58B is approximately 2000 nm.

[0214] The insulation chip 50 can contain one or more resin layers as elemental insulation layer 58 instead of the insulation films 58M. The resin layers can be formed from a material containing a polyimide resin, a phenolic resin, or an epoxy resin. Use of the isolation chip in modified examples

[0215] The isolation chip 50 can also be used in a device other than the signal transmission device 10 of the present embodiment. For example, the isolation chip 50 can be used in a primary circuit module. The primary circuit module comprises the first chip 30, the isolation chip 50, and an encapsulating resin that encapsulates the chips 30 and 50. The primary circuit module further comprises the primary die pad 60 on which the first chip 30 and the isolation chip 50 are mounted. The first chip 30 is bonded to the primary die pad 60 by the first bonding material 101. The isolation chip 50 is bonded to the primary die pad 60 by the third bonding material 103.

[0216] The primary circuit module may have an intermediate die pad that is arranged separately from the primary die pad 60. The third bonding material 103 and the isolation chip 50 are bonded to the intermediate die pad. The first chip 30 is bonded to the primary die pad 60 by the first bonding material 101.

[0217] In another example, the isolation chip 50 can be used in a secondary circuit module. The secondary circuit module includes the second chip 40, the isolation chip 50, and an encapsulating resin that encapsulates the chips 40 and 50. The secondary circuit module also includes the secondary die pad 70, on which the second chip 40 and the isolation chip 50 are mounted. The second chip 40 is bonded to the secondary die pad 70 by the second bonding material 102. The isolation chip 50 is bonded to the secondary die pad 70 by the third bonding material 103.

[0218] The secondary circuit module can have an intermediate die pad that is arranged separately from the secondary die pad 70. The third bonding material 103 and the isolation chip 50 are bonded to the intermediate die pad. The second chip 40 is bonded to the secondary die pad 70 by the second bonding material 102. Structure of the signal transmission device in modified examples

[0219] The structure of the signal transmission device 10 can be changed as desired.

[0220] In one example, the signal transmission device 10 can comprise the primary circuit module and the second chip 40. In this case, the second chip 40 can be mounted on the secondary die pad 70, and the secondary die pad 70 and the second chip 40 can be encapsulated with an encapsulating resin to form a module. In this case, the secondary circuit 14 contained in the second chip 40 corresponds to (see Fig. 1) a “signal transmission circuit”. The second chip 40 corresponds to a “circuit chip”. The signal transmission device 10 corresponds to an “isolation module”.

[0221] In another example, the signal transmission device 10 can include the secondary circuit module and the first chip 30. In this case, the first chip 30 can be mounted on the primary die pad 60, and the primary die pad 60 and the first chip 30 can be encapsulated with an encapsulating resin to form a module. In this case, the primary circuit 13 contained in the first chip 30 corresponds to (see Fig. 1) a “signal transmission circuit”. The first chip 30 corresponds to a “circuit chip”. The signal transmission device 10 corresponds to an “isolation module”.

[0222] The direction of signal transmission in the signal transmission device 10 can be changed as desired. For example, the signal transmission device 10 can be configured to transmit a signal from the secondary circuit 14 to the primary circuit 13 via the capacitor 15. More precisely, when the secondary terminals 12 receive a signal (e.g., a feedback signal) from the control circuit, which is electrically connected to the secondary circuit 14 via the secondary terminals 12, the secondary circuit 14 transmits a signal to the primary circuit 13 via the capacitor 15. The signal is then output from the primary circuit 13 to the control circuit, which is electrically connected to the primary circuit 13 via the primary terminals 11. In another example, the signal transmission device 10 can be configured to transmit a signal bidirectionally between the primary circuit 13 and the secondary circuit 14.More precisely, the signal transmission device 10 can have the primary circuit 13 and the secondary circuit 14, which is configured to send and / or receive a signal via the capacitor 15 with the primary circuit 13.

[0223] In this disclosure, the term "on" includes both the meaning of "upon" and the meaning of "above," unless the context clearly indicates otherwise. The phrase "first element formed on second element" is therefore intended to mean that, in one embodiment, the first element may be formed on the second element in contact with the second element, and that, in another embodiment, the first element may be positioned above the second element without touching the second element. In other words, the term "on" does not preclude a structure in which a further element is formed between the first and second elements.

[0224] The z-direction referred to in this disclosure need not necessarily be the vertical direction and need not necessarily coincide completely with the vertical direction. In the structures according to this disclosure, "upward" and "downward" in the z-direction referred to in this description are not limited to "upward" and "downward" in the vertical direction. In one example, the x-direction may coincide with the vertical direction. In another example, the y-direction may coincide with the vertical direction.

[0225] In the present revelation, “at least one of A and B” is to be understood as meaning “only A, only B or both A and B”. Variants

[0226] The technical aspects arising from the embodiment and the modified examples are described below. For ease of understanding, without intending to be restrictive, the reference numerals of the elements in the embodiments are indicated in parentheses. The reference numerals are used as examples to facilitate understanding, and the components in each variant are not limited to those indicated by the reference numerals. [Variant 1]

[0227] Insulation chip (50), comprising: an element insulation layer (58) with a front (58s) and a back (58r); and a first capacitor (21A, 21B) and a second capacitor (22A, 22B) formed on the element insulation layer (58), wherein the first capacitor (21A, 21B) has a first front electrode plate (53A, 53B) and a first rear electrode plate (54A, 54B) that are opposite each other in a thickness direction (z-direction) of the element insulation layer (58), wherein the second capacitor (22A, 22B) surrounds a second front electrode plate (55A, 55B) which surrounds the first front electrode plate (53A, 53B) in the thickness direction (z-direction) of the element insulation layer (58), and a second rear electrode plate (56A, 56B) which surrounds the first rear electrode plate (54A, 54B) in the thickness direction (z-direction) of the element insulation layer (58), wherein the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) are opposite each other in the thickness direction (z-direction) of the element insulation layer (58), and wherein the first rear electrode plate (54A, 54B) is electrically connected to the second rear electrode plate (56A, 56B) in the element insulation layer (58). [Variant 2]

[0228] Insulation chip according to variant 1, in which, viewed in the thickness direction (z-direction) of the element insulation layer (58), each of the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B) is circular. [Variant 3]

[0229] Isolation chip according to variant 2, in which the second front electrode plate (55A, 55B) is ring-shaped and has an inner diameter that is larger than the diameter of the first front electrode plate (53A, 53B), wherein the first front electrode plate 53A (53B) and the second front electrode plate 55A (55B) are arranged concentrically, wherein the second rear electrode plate (56A, 56B) is annular and has an inner diameter that is larger than the diameter of the first rear electrode plate (54A, 54B), and wherein the first posterior electrode plate (54A, 54B) and the second posterior electrode plate (56A, 56B) are arranged concentrically. [Variant 4]

[0230] Insulation chip according to variant 3, in which, viewed in the thickness direction (z-direction) of the element insulation layer (58), both the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) have a closed, ring-shaped form. [Variant 5]

[0231] Insulation chip according to variant 3, in which the second front electrode plate (55A, 55B), seen in the thickness direction (z-direction) of the element insulation layer (58), has an open, ring-shaped form which contains an opening (55AD, 55BD). [Variant 6]

[0232] Insulation chip according to variant 5, wherein the second front electrode plate (55A, 55B) has an end (55AE, 55BE) that defines the opening (55AD, 55BD), the end (55AE, 55BE) being curved in the thickness direction (z-direction) of the element insulation layer (58). [Variant 7]

[0233] Isolation chip according to one of variants 1 to 6, in which the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) have the same area when viewed in the thickness direction (z-direction) of the element insulation layer (58), and wherein the first rear electrode plate (54A, 54B) and the second rear electrode plate (56A, 56B) have the same area when viewed in the thickness direction (z-direction) of the element insulation layer (58). [Variant 8]

[0234] Isolation chip according to one of variants 1 to 6, in which the first front electrode plate (53A, 53B) is larger in area in the thickness direction (z-direction) of the element insulation layer (58) than the second front electrode plate (55A, 55B), and where, viewed in the thickness direction (z-direction) of the element insulation layer (58), the first rear electrode plate (54A, 54B) has a larger area than the second rear electrode plate (56A, 56B). [Variant 9]

[0235] Isolation chip according to one of variants 1 to 6, in which the second front electrode plate (55A, 55B) is larger in area in the thickness direction (z-direction) of the element insulation layer (58) than the first front electrode plate (53A, 53B), and wherein the second rear electrode plate (56A, 56B) is larger in area in the thickness direction (z-direction) of the element insulation layer (58) than the second rear electrode plate (54A, 54B). [Variant 10]

[0236] Insulation chip according to one of variants 1 to 9, wherein a minimum distance (G1) between the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) is greater than or equal to a minimum distance (D1) between the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B). [Variant 11]

[0237] Insulation chip according to one of variants 1 to 10, further comprising: a front protective layer (59) covering a front side (58s) of the element insulating layer (58) and the second front electrode plate (55A, 55B), wherein the front protective layer (59) covers the first front electrode plate (53A, 53B) so that a surface of the first front electrode plate (53A, 53B) is partially exposed. [Variant 12]

[0238] Isolation chip according to variant 11, in which the second capacitor (22A, 22B) has a region (55AA, 55BA) that is integrally formed with the second front electrode plate (55A, 55B), and wherein the area (55AA, 55BA) is located in the thickness direction (z-direction) of the element insulation layer (58) at a position that differs from a position of the second front electrode plate (55A, 55B) and is exposed without being covered by the front protective layer (59). [Variant 13]

[0239] Insulation chip according to variant 11, further comprising: an electrode pad (52A, 52B) that is electrically connected to the second front electrode plate and is exposed from the front protective layer (59), wherein, viewed in the thickness direction (z-direction) of the element insulation layer (58), the electrode pad (52A, 52B) is formed at a position separate from the second front electrode plate (55A, 55B). [Variant 14]

[0240] Insulation chip according to one of variants 1 to 13, further comprising: a substrate (57) arranged on the back (58r) of the element insulation layer (58), wherein the element insulation layer (58) is further arranged between the first rear electrode plate (54A, 54B) and the substrate (57) and between the second rear electrode plate (56A, 56B) and the substrate (57). [Variant 15]

[0241] Signal transmission device (10), comprising: a first chip (30) with a first circuit (13); an isolation chip (50); a second chip (40) with a second circuit (14) configured to receive a signal from the first circuit (13) via the isolation chip (50) and / or to send a signal to the first circuit (13) via the isolation chip (50); and wherein the insulation chip (50) comprises: an element insulation layer (58) with a front (58s) and a back (58r); and a first capacitor (21A, 21B) and a second capacitor (22A, 22B) formed on the element insulation layer (58), wherein the first capacitor (21A, 21B) has a first front electrode plate (53A, 53B) and a first rear electrode plate (54A, 54B) which are opposite each other in a thickness direction (z-direction) of the element insulation layer (58), wherein the second capacitor (22A, 22B) surrounds a second front electrode plate (55A, 55B) which surrounds the first front electrode plate (53A, 53B) viewed in the thickness direction (z-direction) of the element insulation layer (58), and a second rear electrode plate (56A, 56B) which surrounds the first rear electrode plate (54A, 54B) viewed in the thickness direction (z-direction) of the element insulation layer (58), wherein the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) are opposite each other in the thickness direction (z-direction) of the element insulation layer (58), and wherein the first rear electrode plate (54A, 54B) is electrically connected to the second rear electrode plate (56A, 56B) in the element insulation layer (58). [Variant 16]

[0242] Signal transmission device according to variant 15, further comprising: a first mounting frame (60) on which the first chip (30) is mounted; and a second mounting frame (70) on which the second chip (40) is mounted, wherein the insulation chip (50) is mounted on the first mounting frame (60) or the second mounting frame (70) by means of an insulation element (90). [Variant 17]

[0243] Signal transmission device according to variant 15, further comprising: a first mounting frame (60) on which the first chip (30) is mounted; and a second mounting frame (70) on which the second chip (40) is mounted, a third mounting frame (110) on which the insulation chip (50) is mounted, wherein the third mounting frame (110) is electrically suspended relative to both the first mounting frame (60) and the second mounting frame (70). [Variant 18]

[0244] Signal transmission device according to one of variants 15 to 17, in which the signal transmission device (10) is arranged such that the signal is transmitted from the first circuit to the second circuit via the first capacitor (21A, 21B) and the second capacitor (22A, 22B), wherein the first capacitor and the second capacitor each have a first signal capacitor (21A, 22A) and a second signal capacitor (21B, 22B), wherein the signal transmitted via the first capacitor (21A, 21B) and the second capacitor (22A, 22B) has a first signal and a second signal, wherein the first signal is transmitted from the first circuit (13) via the first signal capacitor (21A, 22A) to the second circuit (14), and the second signal is transmitted from the first circuit (13) to the second circuit (14) through the second signal capacitor (21B, 22B). [Variant 19]

[0245] Signal transmission device according to variant 16, in which the insulating element (90) is bonded to the first mounting frame (60) or the second mounting frame (70) on which the insulating chip (50) is mounted by means of a first insulating bonding material (103), and wherein the insulation chip (50) is bonded to the insulation element (90) by a second insulating bonding material (104). [Variant 20]

[0246] Isolation chip according to variant 14, in which the substrate (57) has a substrate front (57s) facing the element insulation layer (58) and a substrate back (57r) opposite the substrate front (57s), and wherein a rear insulating layer (120, 130) is arranged on the back of the substrate (57r). [Variant 21]

[0247] Insulation chip according to variant 20, in which the rear insulation layer (120, 130) contains a resin. [Variant 22]

[0248] Insulation chip according to variant 20, in which the rear insulation layer (130) has an oxide film (131) arranged on the back of the substrate (57r) and an insulation layer (132) arranged on a side of the oxide film (131) opposite the substrate (57). [Variant 23]

[0249] Insulation chip according to variant 22, in which the thickness (TG) of the insulating layer (132) is greater than the thickness (TF) of the oxide film (131). [Variant 24]

[0250] Insulation module, comprising: the isolation chip (50) according to one of the variants 1 to 14 and 20 to 23; and a circuit chip (30 / 40) with a signal transmission circuit (13 / 14) which is electrically connected to the isolation chip (50).

[0251] The above description contains only examples. A person skilled in the art may recognize further possible combinations and substitutions of the elements and methods (manufacturing processes) in addition to those listed for the purposes of describing the techniques in this disclosure. This disclosure is intended to encompass any substitution, modification, and alteration that falls within the scope of the disclosure, including the claims and variants. REFERENCE MARK LIST 10 Signal transmission device 10A signal transmission circuit 11 Primary connection 12 Secondary connection 13 Primary circuit 14 Secondary circuit 15, 15A, 15B Capacitor 16A, 16B Primary signal line 17A, 17B Secondary signal line 18A, 18B Connection signal line 21A, 21B first capacitor 22A, 22B second capacitor 23A, 23B first electrode 24A, 24B second electrode 25A, 25B first electrode 26A, 26B second electrode 30 first chip 30s Chip Front 30r chip back 31 first electrode pad 32 second electrode pad 33 first substrate 34 Interconnect layer 40 second chip 40s Chip Front 40r Chip back 41 first electrode pad 42 second electrode pad 43 second substrate 44 Interconnect layer 50 insulation chips 50s Front of the insulation chip 50r Back of the insulation chip 51, 51A, 51B first electrode pad 52, 52A, 52B second electrode pad 53A, 53B first front electrode plate 54A, 54B first rear electrode plate 55A, 55B second front electrode plate 55AA, 55BA Electrode Pad 55AB, 55BB connectors 55AD, 55BD opening 55AE, 55BE End 56A, 56B second rear electrode plate 56AB, 56BB joint liaison point 57 Substrat 57s Substrate front 57r substrate back 58 element insulation layer 58s front 58r back 58A first insulating film 58B second insulation film 59 front protective layer 59A Protective film 59B Passivation film 60 primary die pad 70 secondary die pad 80 Encapsulation resin 90 insulating substrate 90s front 90s reverse 101 first bonding material 102 second bonding material 103 third bonding material 104 fourth bonding material 110 intermediate die pad 120 rear insulation layer 120s front 120r reverse 130 rear insulation layer 130s front 130r reverse 131 Oxide film 132 Insulation layer 140 third capacitor 141 third front electrode plate 142 third posterior electrode plate 143 joint liaison office 144 joint liaison point 144A Intermediate connecting section 144B Connection (Via) W wire G1 Distance between the first front electrode plate and the second front electrode plate G2 Distance between the first posterior electrode plate and the second posterior electrode plate D1 Distance between the first front electrode plate and the first rear electrode plate D2 Distance between the first rear electrode plate and the element insulation layer D3 Distance between the second front electrode plate and the second rear electrode plate D4 Distance between the second rear electrode plate and the element insulation layer D5 Distance between the first posterior electrode plate and the secondary die pad D6 Distance between the second posterior electrode plate and the secondary die pad TA Thickness of the element insulation layer TB Thickness of the insulating film TC thickness of the protective film TD thickness of the passivation film TE thickness of the third bonding material TF Thickness of the oxide film TG Thickness of the insulation layer TR, TRA thickness of the rear insulation layer TS thickness of the insulating substrate

Claims

[1] Insulation chip (50), comprising: an element insulation layer (58) with a front (58s) and a back (58r); and a first capacitor (21A, 21B) and a second capacitor (22A, 22B), wherein the first capacitor (21A, 21B) has a first front electrode plate (53A, 53B) and a first rear electrode plate (54A, 54B) which are opposite each other in a thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B), wherein the second capacitor (22A, 22B) has a second front electrode plate (55A, 55B) that surrounds the first front electrode plate (53A, 53B) in the thickness direction (z) of the element insulation layer (58), and a second rear electrode plate (56A, 56B) that surrounds the first rear electrode plate (54A, 54B) in the thickness direction (z) of the element insulation layer (58), wherein the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) are opposite each other in the thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B), wherein the first rear electrode plate (54A, 54B) is electrically connected to the second rear electrode plate (56A, 56B) of the element insulation layer (58), where, viewed in the thickness direction (z) of the element insulation layer (58), both the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B) are circular, wherein the second front electrode plate (55A, 55B) is annular and has an inner diameter that is larger than the diameter of the first front electrode plate (53A, 53B), wherein the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) are arranged concentrically, wherein the second rear electrode plate (56A, 56B) is annular and has an inner diameter that is larger than the diameter of the first rear electrode plate (54A, 54B), and wherein the first posterior electrode plate (54A, 54B) and the second posterior electrode plate (56A, 56B) are arranged concentrically. [2] Insulation chip according to claim 1, wherein, viewed in the thickness direction (z) of the element insulation layer (58), each of the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) has a closed, ring-shaped form. [3] Insulation chip according to claim 1, wherein the second front electrode plate (55A, 55B), viewed in the thickness direction (z) of the element insulation layer (58), has an open, ring-shaped form which includes an opening (55AD, 55BD). [4] Insulation chip according to claim 3, wherein the second front electrode plate (55A, 55B) has an end (55AE, 55BE) that defines the opening (55AD, 55BD), wherein the end (55AE, 55BE) is curved in the thickness direction (z) of the element insulation layer (58). [5] Insulation chip according to any one of claims 1 to 4, wherein the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) have the same area when viewed in the thickness direction (z) of the element insulation layer (58), and wherein the first rear electrode plate (54A, 54B) and the second rear electrode plate (56A, 56B) have the same area when viewed in the thickness direction (z) of the element insulation layer (58). [6] Insulation chip according to any one of claims 1 to 4, wherein the first front electrode plate (53A, 53B) has a larger area in the thickness direction (z) of the element insulation layer (58) than the second front electrode plate (55A, 55B), and wherein the first rear electrode plate (54A, 54B) is larger in area in the thickness direction (z) of the element insulation layer (58) than the second rear electrode plate (56A, 56B). [7] Insulation chip according to any one of claims 1 to 4, wherein the second front electrode plate (55A, 55B) has a larger area in the thickness direction (z) of the element insulation layer (58) than the first front electrode plate (53A, 53B), and wherein the second rear electrode plate (56A, 56B) is larger in area than the first rear electrode plate (54A, 54B) when viewed in the thickness direction (z) of the element insulation layer (58). [8] Insulation chip according to any one of claims 1 to 7, wherein a minimum distance (G1) between the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) is greater than or equal to a minimum distance (D1) between the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B). [9] Insulation chip according to any one of claims 1 to 8, further comprising: a front protective layer (59) covering the front side (58s) of the element insulation layer (58) and the second front electrode plate (55A, 55B), wherein the front protective layer (59) covers the first front electrode plate (53A, 53B) such that a surface of the first front electrode plate (53A, 53B) is partially exposed. [10] Insulation chip according to claim 9, further comprising: an electrode pad (52A, 52B) that is electrically connected to the second front electrode plate and is exposed from the front protective layer (59), wherein, viewed in the thickness direction (z) of the element insulation layer (58), the electrode pad (52A, 52B) is formed at a position separate from the second front electrode plate (55A, 55B). [11] Insulation chip according to any one of claims 1 to 10, further comprising: a substrate (57) arranged on the back (58r) of the element insulation layer (58), wherein part of the element insulation layer (58) is further arranged between the first rear electrode plate (54A, 54B) and the substrate (57) and between the second rear electrode plate (56A, 56B) and the substrate (57). [12] Signal transmission device (10) comprising: a first chip (30) with a first circuit (13); an isolation chip (50); and a second chip (40) with a second circuit (14) configured to receive a signal from the first circuit (13) via the isolation chip (50) and / or to send a signal to the first circuit (13) via the isolation chip (50), wherein the insulation chip (50) has: an element insulation layer (58) with a front (58s) and a back (58r); and a first capacitor (21A, 21B) and a second capacitor (22A, 22B), wherein the first capacitor (21A, 21B) has a first front electrode plate (53A, 53B) and a first rear electrode plate (54A, 54B) which are opposite each other in a thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B), wherein the second capacitor (22A, 22B) has a second front electrode plate (55A, 55B) that surrounds the first front electrode plate (53A, 53B) in the thickness direction (z) of the element insulation layer (58), and a second rear electrode plate (56A, 56B) that surrounds the first rear electrode plate (54A, 54B) in the thickness direction (z) of the element insulation layer (58), wherein the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B) are opposite each other in the thickness direction (z) of the element insulation layer (58), such that part of the element insulation layer (58) serves as a dielectric between the second front electrode plate (55A, 55B) and the second rear electrode plate (56A, 56B), wherein the first rear electrode plate (54A, 54B) is electrically connected to the second rear electrode plate (56A, 56B) of the element insulation layer (58), where, viewed in the thickness direction (z) of the element insulation layer (58), both the first front electrode plate (53A, 53B) and the first rear electrode plate (54A, 54B) are circular, wherein the second front electrode plate (55A, 55B) is annular and has an inner diameter that is larger than the diameter of the first front electrode plate (53A, 53B), wherein the first front electrode plate (53A, 53B) and the second front electrode plate (55A, 55B) are arranged concentrically, wherein the second rear electrode plate (56A, 56B) is annular and has an inner diameter that is larger than the diameter of the first rear electrode plate (54A, 54B), and wherein the first rear electrode plate (54A, 54B) and the second rear electrode plate are arranged concentrically (56A, 56B). [13] The signal transmission device according to claim 12, further comprising: a first mounting frame (60) on which the first chip (30) is mounted; and a second mounting frame (70) on which the second chip (40) is mounted, wherein the insulation chip (50) is attached to the first mounting frame (60) or to the second mounting frame (70) by means of an insulation element (90). [14] The signal transmission device according to claim 12, further comprising: a first mounting frame (60) on which the first chip (30) is mounted; a second mounting frame (70) on which the second chip (40) is mounted; and a third mounting frame (110) on which the insulation chip (50) is mounted, wherein the third mounting frame (110) is electrically suspended relative to both the first mounting frame (60) and the second mounting frame (70). [15] Signal transmission device according to one of claims 12 to 14, wherein the signal transmission device (10) is configured to transmit the signal from the first circuit (13) to the second circuit (14), wherein the first capacitor and the second capacitor correspond to a first signal capacitor (21A, 22A) and the isolation chip has a second signal capacitor (21B, 22B) which has the same structure as the first signal capacitor, wherein the transmitted signal has a first signal and a second signal, wherein the first signal from the first circuit (13) is transmitted via the first signal capacitor (21A, 22A) to the second circuit (14), and wherein the second signal from the first circuit (13) is transmitted via the second signal capacitor (21B, 22B) to the second circuit (14).

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