Semiconductor device

Abstract

A semiconductor device according to an embodiment of the present invention comprises a semiconductor substrate, a plurality of transistors arranged on the semiconductor substrate and comprising a gate electrode, a source electrode, and a drain electrode, a plurality of pads arranged on the semiconductor substrate and outside the plurality of transistors, a plurality of resistors arranged on the semiconductor substrate and electrically connected to each of a plurality of pads, and a plurality of top metal layers arranged on the semiconductor substrate and in contact with a resistor, wherein the plurality of pads comprises at least one gate pad, wherein at least one gate pad is electrically connected to the gate electrode of each of the plurality of transistors, wherein each of the plurality of gate pads is spaced apart from one another, and wherein at least one of the plurality of resistors is an antiresonant resistor.and wherein the anti-resonance resistor is arranged between the two gate pads and is electrically connected to at least one of the two gate pads via the upper metal layer.

Description

[Technical area of ​​the invention]

[0001] The present invention relates to a semiconductor device, in particular a semiconductor device with an antiresonant resistor. [Technical background of the invention]

[0002] Recently, much attention has been focused on PA (Power Amplifier) ​​semiconductor manufacturing technology or MMIC (Monolithic Microwave Integrated Circuit) design technology in areas such as electric vehicles, autonomous vehicles, wireless communication including 5G or 6G, satellite communication and high-resolution radar, etc.

[0003] In particular, various technologies and materials are being developed to transmit and receive data at high power. For example, GaN (gallium nitride) can be operated at high voltage due to its large energy limit of 3.4 eV, exhibits high current and power density, and enables high-speed operation. Consequently, the use of GaN HEMT (high electron mobility transistor) devices as a material for high-performance, highly efficient, and small PA (power amplifier) ​​devices has recently increased rapidly.

[0004] However, as semiconductor devices are designed to operate at high speeds, with high power and efficiency, and are miniaturized, the distance between individual transistors becomes increasingly smaller. Consequently, conventional semiconductor devices suffer from the problem that each transistor located inside the device creates a resonance effect, which reduces RF power and shortens the lifetime.

[0005] Furthermore, in conventional semiconductor devices, the heat emitted by transistors located inside the semiconductor device cannot be accurately measured, resulting in a decrease in the performance of semiconductor devices and a reduction in their lifespan.

[0006] Furthermore, the conventional semiconductor device with antiresonance function includes an insulator to prevent resonances within the semiconductor device package; however, this increases manufacturing costs, manufacturing time, and volume.

[0007] Furthermore, since the conventional semiconductor device with temperature measurement function involves a separate manufacturing process for the temperature measurement unit or provides a separate space for arranging the temperature measurement unit, the problem is that manufacturing costs and manufacturing time increase and the volume increases.

[0008] Meanwhile, the background technology mentioned above is technical information that the inventor possessed to derive the present invention or that he acquired in the process of deriving the present invention, and it cannot necessarily be said that it is known technology that was disclosed to the public prior to the filing of the present invention.

[0009] (Patent document 00001) Japanese Patent No. 114641286 (December 10, 2010) [Content of the invention][Purpose of the invention]

[0010] One problem to be solved by the present invention is to provide a semiconductor device in which a configuration is arranged that prevents resonance effects between transistors, so that the RF characteristics and the lifetime of the semiconductor device can be improved.

[0011] Another problem to be solved by the present invention is to provide a semiconductor device in which the heat emitted by several transistors is accurately measured, so that the semiconductor device can be monitored to maintain maximum performance, and the RF characteristics and lifetime of the semiconductor device can be improved.

[0012] A further problem to be solved by the present invention is to provide a semiconductor device comprising a configuration capable of performing both the resonance prevention function and the temperature measurement function, thereby reducing the volume of the semiconductor device and saving the manufacturing costs and manufacturing time of the semiconductor device.

[0013] The objects of the present invention are not limited to those mentioned above, and other objects not mentioned can be clearly understood by the person skilled in the art from the following description. [Technical solution]

[0014] To solve the problems described above, a semiconductor device according to one embodiment of the present invention comprises a semiconductor substrate, a plurality of transistors arranged on the semiconductor substrate and comprising a gate electrode, a source electrode, and a drain electrode, a plurality of pads arranged on the semiconductor substrate and outside the plurality of transistors, a plurality of resistors arranged on the semiconductor substrate and electrically connected to each of a plurality of pads, and a plurality of top metal layers arranged on the semiconductor substrate and in contact with a resistor, wherein the plurality of pads comprise at least one gate pad, wherein at least one gate pad is electrically connected to the gate electrode of each of the plurality of transistors, and wherein each of the plurality of gate pads is spaced apart from one another.wherein at least one of the multiple resistors is an anti-resonance resistor, and wherein the anti-resonance resistor is arranged between the two gate pads and is electrically connected to at least one of the two gate pads via the upper metal layer.

[0015] According to another aspect of the present invention, the semiconductor device may further comprise an active layer arranged between the semiconductor substrate and the transistor, wherein the active layer may consist of a compound containing Ga and N and may have thermal conductivity.

[0016] According to another aspect of the present invention, the multiple resistors can consist of either a thin-film resistor or a mesa resistor.

[0017] According to another aspect of the present invention, at least one of the several pads can be a temperature measurement pad, and at least one of the several resistors can be a temperature measurement resistor that is electrically connected to the temperature measurement pad via the upper metal layer.

[0018] According to another aspect of the present invention, the temperature measuring resistor can be an anti-resonance resistor.

[0019] According to another aspect of the present invention, the temperature measuring resistor can be an electrically open, floating resistor. [Effects of the invention]

[0020] According to one of the means of solving the problems of the present invention, a configuration is arranged in the semiconductor device which prevents resonance effects between transistors, so that the RF characteristics and the lifetime of the semiconductor device can be improved.

[0021] Furthermore, according to one of the means of solving the problems of the present invention, the heat emitted by several transistors is measured precisely, so that the semiconductor device can be monitored to maintain maximum performance, and the RF characteristics and lifetime of the semiconductor device can be improved.

[0022] Furthermore, according to one of the means of solving the problems of the present invention, a configuration capable of performing both the resonance prevention function and the temperature measurement function is arranged in the semiconductor device, thus reducing the volume of the semiconductor device and thereby saving the manufacturing costs and manufacturing time of the semiconductor device.

[0023] The effects achievable by the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood by the person skilled in the art from the following description. [Brief description of the drawings] Fig. 1 is a top view of a semiconductor device according to an embodiment of the present invention; Fig. 2 is a sectional view along the dashed line II-II' in Fig. 1; Fig. Figure 3 is a top view of a semiconductor device according to another embodiment of the present invention; and Fig. Figure 4 is a sectional view along the dashed line IV-IV' in Fig. 3. [Examples of the invention]

[0024] The advantages and features of the present invention and methods for its implementation will become clear by reference to the embodiments described in detail below, together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but is implemented in various different forms, and these embodiments are provided solely to ensure that the disclosure of the present invention is complete, to fully inform those skilled in the field of the present invention about its scope, and to ensure that the present invention is defined by the scope of the claims.

[0025] The shapes, sizes, ratios, angles, numbers, etc., shown in the drawings to illustrate embodiments of the present invention serve only for illustrative purposes, and the present invention is not limited to the details shown. Furthermore, a detailed description of the present invention will be omitted if it is determined that a detailed description of related known technologies could unnecessarily obscure the core of the present invention. When the terms "comprises," "includes," "consists of," etc., are used in this specification, other parts may be added unless "only" is used. When a component is expressed in the singular, the plural is also included unless expressly stated otherwise.

[0026] When interpreting a component, it is interpreted in such a way that it includes the error range, even if no separate explicit information is provided.

[0027] Although "first," "second," etc., are used to describe different components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Accordingly, the first component mentioned below can also be the second component in the technical sense of the present invention.

[0028] Unless otherwise specified, identical reference symbols throughout the description refer to the same elements.

[0029] Each feature of the various embodiments of the present invention can be partially or completely integrated or combined with one another, and as the person skilled in the art fully understands, various technological connections and operations are possible, and each embodiment can be implemented independently or can be implemented together in a related relationship.

[0030] The present invention is described in detail below with reference to the accompanying drawings.

[0031] Fig. Figure 1 is a top view of a semiconductor device according to an embodiment of the present invention, and Fig. 2 is a sectional view along the dashed line II-II' in Fig. 1.

[0032] Initially, the semiconductor device comprises 100 with reference to the Fig. 1 and Fig. 2 a semiconductor substrate 110, several transistors 120, several pads 150, several resistors 160 and several upper metal layers 170.

[0033] With reference to the Fig. 1 and Fig. In Figure 2, the semiconductor substrate 110 is arranged beneath the active layer 130. The semiconductor substrate 110 can consist of various materials such as Si, SiC, Al₂O₃, GaAs, InP, InAs, and InSb, etc. An insulating oxide layer can also be arranged within the semiconductor substrate 110. Furthermore, the semiconductor substrate 110 can be fabricated by processes such as oxidation, photolithography, etching, and thinning.

[0034] With reference to the Fig. Figure 1 shows several transistors 120 arranged in the center of the semiconductor substrate 110. Each transistor 120 comprises a gate electrode 121, a source electrode 123, and a drain electrode 125, arranged on either side of the gate electrode 121, with the gate electrode 121 forming the center. Several gate electrodes 121 extend from the gate line 141. Several source electrodes 123 and several drain electrodes 125 extend from the data line 143. The gate lines 141 are arranged in a row on one side of the center of the semiconductor device 100, and the data lines 143 are arranged in a row on the other side of the center of the semiconductor device 100. The gate line 141 and the data line 143 can be arranged parallel to each other.

[0035] With reference to the Fig. 1 and Fig. 2. Several transistors 120 can be arranged on the active layer 130 and in the center of the semiconductor device 100. For the sake of simplicity, the arrangement and structure of the transistor 120 is represented and described as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) structure, but it is not limited to this and can be replaced by the arrangement and structure of various transistors. For example, the transistor 120 can be arranged in a specific area on the semiconductor substrate 110 and have a HEMT structure or a structure divided into an upper electrode and a lower electrode.

[0036] The transistor 120 can control the current flow or voltage to amplify a signal or perform a current switching function.

[0037] Furthermore, a transistor array means that a plurality of transistors 120 are arranged at regular intervals or with regularity within the semiconductor device 100. In particular, several gate electrodes 121 extending from the gate line 141, several source electrodes 123 extending from the data line 143, and several drain electrodes 125 are arranged parallel to one another, thus forming a transistor array. Fig. 1 and Fig. Figure 2 shows that 3-4 transistors 120 are arranged in the middle of the semiconductor device 100 and thus a transistor arrangement is formed, but the number of transistors 120 forming the transistor arrangement is not limited to this and can be changed without restriction according to various embodiments of the invention.

[0038] The multiple transistors 120 can each be designed to have the same electrical properties, and the number of multiple transistors 120 as well as the width and length of each electrode can be arbitrarily configured. For example, if the current flowing between the source electrode 123 and the drain electrode 125 of one of the transistors 120 is smaller than the current flowing between the source electrode and the drain electrode of each of the other transistors, that one transistor 140 can be arranged with a reduced or increased electrode width and length.

[0039] With reference to the Fig. Several gate electrodes 121 extend from the gate lead 141. The gate electrode 121 can be made of metal. When voltage is applied to the gate electrode 121 via the gate pad 151, the gate electrode 121 can adjust the electrical conductivity of the transistor 120.

[0040] With reference to the Fig. The source electrode 123 and the drain electrode 125 extend from the data line 143. The source electrode 123 and the drain electrode 125 are arranged such that they are spaced apart from the gate electrode 121, with the gate electrode 121 positioned between them. The source electrode 123 and the drain electrode 125 can be made of metal.

[0041] The source electrode 123 and the drain electrode 125 can be made of the same material. Accordingly, the source electrode 123 and the drain electrode 125 can establish an ohmic contact with the active semiconductor layer 130. Furthermore, the source electrode 123 and the drain electrode 125 are symmetrical elements, so the transistor 120 can still operate normally even if their respective positions are changed.

[0042] When a voltage is applied between the source electrode 123 and the drain electrode 125, a drain current flows, and the amount of drain current can be controlled by the voltage applied between the gate electrode 121 and the source electrode 123. In the case described above, a linear relationship can be established between the voltage applied to the drain electrode 125 and the current, and in this case, the source electrode 123 and the drain electrode 125 can act like variable resistors. The source electrode 123 can supply charge carriers to the channel region of the transistor 120, and the drain electrode 125 can absorb the charge carriers.

[0043] Since the gate line 141 and the data line 143 are merely means for the efficient formation of the multiple transistors 120, they can be freely arranged according to the properties and configuration of the target semiconductor device 100.

[0044] With reference to the Fig. In Figure 2, the active layer 130 is arranged on the semiconductor substrate 110. Furthermore, the active layer 130 is located beneath the transistor 120, the pad 150, and the upper metal layer 170. Additionally, a resistor 160 is located within the active layer 130.

[0045] The active layer 130 can be composed of various materials, depending on the type of semiconductor substrate 110 and transistor 120. The active layer 130 can be created through a process such as epitaxial growth, in which Ga, a group 3 element, and N, a group 5 element, are deposited onto the semiconductor substrate 110. Accordingly, the material of the active layer 130 can be a compound containing group 3 and 5 elements. For example, the material of the active layer 130 can be AlGaN, GaN, or GaAs. The active layer 130 exhibits thermal conductivity and can conduct heat generated within the transistor 120 to an external area of ​​the transistor 120.

[0046] A channel region of the transistor 120 can be created in the active layer 130. The channel region refers to a region within the transistor 120 where charge carriers such as electrons or holes can move. The channel region of the transistor 120 is generally created as a thin strip between the active layer 130 below the source electrode 123 and the active layer 130 below the drain electrode 125. The channel region of the transistor 120 can be created when charge carriers move to a portion of the active layer 130 when a voltage higher than the threshold voltage is applied to the gate electrode 121 and a voltage is applied to the drain electrode 125.

[0047] Since the potential change that occurs when the voltage is applied or removed from the gate electrode 121 generally generates most of the heat energy in the transistor 120, among the channel regions of the transistor 120, the region closest to the gate electrode 121 may be the part with the highest temperature in the semiconductor device 100.

[0048] Pad 150 refers to a part where an external connection of the semiconductor device 100 is electrically connected to the semiconductor device 100. With reference to the Fig. 1 and Fig. 2. The pad 150 is located within the semiconductor substrate 110 and outside the at least one transistor 120. Additionally, the pad is located on the active layer 130. The pad 150 can be made of metal.

[0049] The pad 150 can receive various electrical signals supplied from outside the semiconductor device 100 and supply them to the semiconductor device 100, wherein the gate pad 151, the drain pad and the source pad can be arranged on the semiconductor substrate 110. In addition, the pad 150 can transmit information about the temperature and RF characteristics of the semiconductor device 100 to the outside of the semiconductor device 100, wherein a pad for temperature measurement or a pad for RF measurement can be arranged on the semiconductor substrate 110.

[0050] With reference to the Fig. 1. Gate pad 151 can consist of three pads 151a, 151b, and 151c. Each of the gate pads 151a, 151b, and 151c is arranged so that they are spaced apart from each other. The arrangement position, number, or shape of gate pad 151 are not limited to those in the Fig. 1 and Fig. 2 limited. The gate pad 151 is electrically connected to the gate line 141, and an electrical signal applied to the gate pad 151 from outside the semiconductor device 100 is transmitted via the gate line 141 to several gate electrodes 121.

[0051] With reference to the Fig. 1 and Fig. 2. Several resistors 160 are arranged outside the semiconductor substrate 110. In particular, the several resistors 160 are arranged on the semiconductor substrate 110 in a region outside the region in which the several transistors 120 are arranged. Additionally, several resistors 160 are arranged between the pad 150 and the gate pads 151. Furthermore, the resistor 160 is spaced apart from the pad 150 or the gate pad 151. In particular, with reference to the Fig. 2. The resistor 160 is arranged within the active layer 130. The arrangement position, number, and shape of the resistors 160 on the semiconductor substrate 110 are not restricted and can vary depending on the purpose of the resistors 160 and the redundant space of the semiconductor device 100.

[0052] The resistor 160 can be a thin-film resistor (TFR) made of NiCr or TaN. Alternatively, the resistor 160 can be a mesa resistor. Preferably, the resistor 160 can be a thin-film resistor.

[0053] The multiple resistors 160 include at least one anti-resonance resistor 161. The anti-resonance resistor 161 is a resistor 160 that prevents the resonance effect of the semiconductor device 100. That is, at least one of the four resistors 160 in Fig. 1 can be a resistor used to prevent resonances. This anti-resonance resistor 161 can be arranged between the pads 151. With reference to the Fig. 1 and Fig. 2. The multiple resistors 160 consist of two antiresonance resistors 161 and two floating resistors 163. In particular, the antiresonance resistor 161 is arranged between two gate pads 151, and each of the two floating resistors 163 is arranged between the pad 151 and both sides of the semiconductor device 100. For example, the first antiresonance resistor 161a is arranged between the first gate pad 151a and the second gate pad 151b, and the second antiresonance resistor 161b is arranged between the second gate pad 151b and the third gate pad 151c.

[0054] The anti-resonance resistor 161 is electrically connected via the upper metal layer 170 to at least one gate pad 151. And at least one gate pad 151 is electrically connected to at least one transistor 120. In particular, the gate pad 151 is electrically connected to the gate electrode 121 of the transistor 120. Accordingly, the anti-resonance resistor 161 is electrically connected to the transistor 120.

[0055] Resonance refers to the effect where the amplitude of a specific frequency signal becomes very large. If a resonance effect occurs in transistor 120, a very large harmonic circulating current is generated in transistor 120 and in the circuit connected to it. Such an abnormal current can reduce the RF power of semiconductor device 100 or damage components located inside it. In particular, odd harmonics among resonant harmonics cause significant damage to the circuit.

[0056] The anti-resonance resistor 161 suppresses resonances that occur in the semiconductor device 100 when at least one transistor 120 is operating. In particular, the anti-resonance resistor 161 dissipates the energy of odd harmonics generated in the transistor 120 of the semiconductor device 100. For this reason, the anti-resonance resistor 161 protects the semiconductor device 100 by preventing damage to the components within the semiconductor device 100 due to the resonance effect.

[0057] With reference to the Fig. 1 and Fig. 2. The floating resistor 163 is arranged on top of the semiconductor substrate 110 and can be located at either end of the semiconductor substrate 110. In particular, the floating resistor 163 can be located between the pad 151 and both sides of the semiconductor device 100 on the semiconductor substrate 110. The floating resistor 163 is an electrically open resistor 160. The floating resistor 163 is a resistor 160 arranged in such a way as to make the semiconductor device 100 symmetrical, so that a person skilled in semiconductor design can easily change the size of the semiconductor device 100.

[0058] With reference to the Fig. 1 and Fig. 2 The upper metal layer 170 is arranged in a partial area on the active layer 130. The upper metal layer 170 is positioned such that it contacts a portion of the top surface of the resistor 160. Additionally, the upper metal layer 170 can be positioned such that it contacts the pad 150. The upper metal layer 170 can form part of a barrier metal deposited to prevent contamination of the semiconductor device 100.

[0059] The upper metal layer 170 electrically connects the pad 150 and the resistor 160. Accordingly, the upper metal layer 170 can serve as a connection path through which the anti-resonance resistor 161 prevents resonance of the semiconductor device 100 by the gate pad 151.

[0060] According to the embodiment described above, the anti-resonance resistor 161 suppresses the resonance effect of the transistor 120 and the circuit electrically connected to the transistor 120, so that the RF characteristics of the semiconductor device 100 are improved and the semiconductor device 100 can also operate more accurately at high temperatures and the lifetime of the semiconductor device 100 can be increased.

[0061] Furthermore, according to the embodiment described above, the antiresonance resistor 161 is designed to be introduced into the active layer 130 during the formation process, thus eliminating the need for a separate process to position the antiresonance resistor 161 within the semiconductor device 100. Consequently, the manufacturing time and cost of the semiconductor device 100 can be reduced.

[0062] Furthermore, since, according to the embodiment described above, each element of the semiconductor device 100 is arranged symmetrically, the number of transistors 120 that make up the arrangement of transistors 120 can be easily adjusted while maintaining the properties of the semiconductor device 100.

[0063] Fig. Figure 3 is a top view of a semiconductor device according to another embodiment of the present invention, and Fig. Figure 4 is a sectional view along the dashed line IV-IV' in Fig. 3. In the Fig. 3 and Fig. 4. The remaining configurations, except for the temperature measurement pad 352 and the temperature measurement resistors 361b and 363a, are practically identical or correspond to those in the Fig. 1 and Fig. 2. This eliminates the need for superfluous descriptions of the features shown in the Fig. 1 and Fig. The configurations described in point 2 are omitted.

[0064] With reference to the Fig. 3 and Fig. 4. A first temperature-measuring pad 352a and a second temperature-measuring pad 352b are arranged on the active layer 330. In particular, the temperature-measuring pad 352 can be arranged between the gate pad 351 and the gate pad 351, and between the gate pad 351 and an end of the semiconductor device 300. For example, the first temperature-measuring pad 352a can be arranged between the first gate pad 351a and an end of the semiconductor device 300 adjacent to the first gate pad 351a, and the second temperature-measuring pad 352b can be arranged between the second gate pad 351b and the third gate pad 351c. Fig. Figure 3 shows that the first temperature-measuring pad 352a is arranged between the first gate pad 351a and an end of the semiconductor device 300 adjacent to the first gate pad 351a. However, like the second temperature-measuring pad 352b, it can also be arranged between two gate pads 351. Likewise, the second temperature-measuring pad 352b, like the first temperature-measuring pad 352a, can be arranged between the third gate pad 351c and an end of the semiconductor device 300 adjacent to it. That is, both temperature-measuring pads 352 can be arranged either between the gate pads 351 or either between the gate pad 351 and an end of the semiconductor device 300.

[0065] Furthermore, each temperature-measuring pad 352 is in contact with the upper metal layer 370. The temperature-measuring pad 352 can be connected via the upper metal layer 370 to a resistor 361b or 363a of the multiple resistors 360. In particular, the first temperature-measuring pad 352a can be connected via the upper metal layer 370 to the second temperature-measuring resistor 361b, and the second temperature-measuring pad 352b can be connected via the upper metal layer 370 to the first temperature-measuring resistor 363a.

[0066] The resistor 361b, 363a, electrically connected to the temperature measurement pad 352, is a temperature-sensing resistor 361b, 363a that measures the temperature of the heat source of the semiconductor device 300. Specifically, the temperature-sensing resistor 361b, 363a can measure the temperature by changing its resistance value depending on the temperature of the active layer around the gate electrode 321 of the transistor 320, which is one of the main heat sources of the semiconductor device 300. That is, the temperature-sensing resistor 361b, 363a is adjacent to and thus electrically connected to the temperature measurement pad 352. Accordingly, depending on the arrangement of the pad for temperature measurement 352, the antiresonance resistor 361 or the floating resistor 363 can be the temperature measurement resistor 361b, 363a, and the temperature measurement resistor 361b, 363a can be one or more.Accordingly, there can also be one or more temperature measurement pads 352.

[0067] With reference to the Fig. 3 and Fig. 4 The temperature measurement pad 352 consists of a first temperature measurement pad 352a and a second temperature measurement pad 352b, such that the temperature measurement resistor consists of a first temperature measurement resistor 363a, which is a floating resistor 363, and a second temperature measurement resistor 361b, which is an antiresonance resistor 361.

[0068] Accordingly, the first temperature measurement pad 352a is electrically connected to the first temperature measuring resistor 363a via the upper metal layer 370, and the second temperature measurement pad 352b is electrically connected to the second temperature measuring resistor 361b via the upper metal layer 370.

[0069] The temperature-sensing resistor (361b, 363a) consists of a thin-film resistor or mesa resistor and can preferably be made of a thin-film resistor. The temperature-sensing resistor 361b, 363a has a high temperature coefficient of resistance (TCR). This means that the resistance value of the temperature-sensing resistor 361b, 363a changes significantly due to heat. Heat generated by at least one transistor 32 is conducted through the active layer 330 to the temperature-sensing resistor 361b, 363a.

[0070] The temperature-measuring pad 352 can transmit a temperature-measuring current via the upper metal layer 370 in contact with the temperature-measuring pad 352 to the temperature-sensing resistors 361b, 363a. The temperature-measuring current can be applied to the temperature-measuring pad 352 from an external terminal of the semiconductor device 300, which is in contact with the temperature-measuring pad 352.

[0071] Furthermore, the temperature measurement pad 352 allows a connection outside the semiconductor device 300 to measure the voltage applied to the temperature-sensing resistor 361b, 363a by the temperature-sensing current. Via the temperature measurement pad, a measuring device outside the semiconductor device 300 can detect the current flowing through the temperature-sensing resistor 361b, 363a and the voltage applied to the temperature-sensing resistor 361b, 363a, so that the resistance value of the temperature-sensing resistor 361b, 363a can be calculated using Ohm's law.

[0072] Accordingly, the resistance value of the temperature measuring resistor 361b, 363a can be calculated, and thus the temperature change transmitted to the temperature measuring resistor 361b, 363a can also be calculated, which allows the temperature change of the transistor 320, which represents the main heat source of the semiconductor device 300, to also be calculated.

[0073] With reference to the Fig. 3 and Fig. 4. The first temperature measuring resistor 363a is electrically open. Therefore, even if only one terminal for temperature measurement is in contact with the first pad 352a for temperature measurement, the voltage applied to the first temperature measuring resistor 363a can be measured by the current for temperature measurement.

[0074] According to the embodiment described above, the temperature measuring resistor 361b, 363a changes its resistance value by absorbing heat generated by at least one transistor 32 via the active layer 330, and therefore when the resistance value of the temperature measuring resistor 361b, 363a is calculated, the temperature of the transistor 320, which represents a heat source in the semiconductor device 300, can also be calculated.

[0075] Furthermore, according to the embodiment described above, the temperature-sensing resistor 361b, 363a is part of the plurality of resistors 360 and therefore has the same arrangement position and is made of the same material as the antiresonance resistor 361 and the floating resistor 363. Therefore, there is no need to add a separate manufacturing process to additionally arrange the temperature-sensing resistor 361b, 363a in the semiconductor device 300 in which the antiresonance resistor 361 is located. Accordingly, the second temperature-sensing resistor 361b, like the antiresonance resistor 361, suppresses the resonance of the transistor 320 in the semiconductor device 300 and can thus quickly detect temperature changes in the main heat source of the transistor 320.Furthermore, the first temperature resistor 363a, like the floating resistor 363, can detect the temperature change of the transistor 320 by contacting only one temperature sensing terminal, thus integrating and simplifying the circuit configuration of the semiconductor device 300. Moreover, when the floating resistor 363 becomes the temperature resistor 363a, only one terminal is required for temperature measurement, thereby reducing the cost of temperature sensing.

[0076] Furthermore, the air outside the semiconductor device 300 is also heated by the operation of the semiconductor device 300, but it has a temperature that differs from the temperature of the transistor 320, which is the main heat source of the semiconductor device 300. However, according to the embodiment described above, the temperature-sensing resistor 361b, 363a is blocked from the air outside the semiconductor device 300 by the upper metal layer 370, so that the temperature-sensing resistor 361b, 363a can measure the temperature of the transistor 320 more accurately.

[0077] Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments and can be modified and implemented in various ways without departing from the technical spirit of the present invention. Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of ​​the present invention, but serve only for illustration, and the scope of the technical idea of ​​the present invention is not limited by such embodiments. Therefore, the embodiments described above should in every respect be understood as illustrative and not limiting.The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the corresponding scope of protection should be interpreted as if they were included in the scope of protection of the present invention. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 114641286

[0009]

Claims

[1] A semiconductor device comprising: a semiconductor substrate; a plurality of transistors arranged on the semiconductor substrate and comprising a gate electrode, a source electrode and a drain electrode; a plurality of pads arranged on the semiconductor substrate and outside the plurality of transistors; a plurality of resistors disposed on the semiconductor substrate and electrically connected to each of a plurality of pads; and a plurality of upper metal layers arranged on the semiconductor substrate and in contact with a resistor, wherein the plurality of pads comprise at least one gate pad, wherein at least one gate pad is electrically connected to the gate electrode of each of the plurality of transistors, wherein each of the plurality of gate pads is spaced apart from each other, wherein at least one of the plurality of resistors is an anti-resonance resistor, and wherein the anti-resonance resistor is arranged between the two gate pads and is electrically connected to at least one of the two gate pads via the upper metal layer. [2] A semiconductor device according to claim 1, further comprising an active layer disposed between the semiconductor substrate and the transistor, and wherein the active layer consists of a compound containing Ga and N and has thermal conductivity. [3] The semiconductor device according to claim 2, wherein the plurality of resistors consists of either a thin film resistor or a mesa resistor. [4] A semiconductor device according to claim 3, wherein at least one of the plurality of pads is a temperature measuring pad, and wherein at least one of the plurality of resistors is a temperature measuring resistor electrically connected to the temperature measuring pad via the upper metal layer. [5] A semiconductor device according to claim 4, wherein the temperature measuring resistor is an anti-resonance resistor. [6] A semiconductor device according to claim 4, wherein the temperature measuring resistor is an electrically open floating resistor.

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