PHOTOELECTRIC CONVERSION ELEMENT AND PHOTO DETECTION DEVICE

Abstract

A photoelectric conversion element according to an embodiment of the present disclosure comprises: a first electrode and a second electrode arranged side by side; a third electrode arranged opposite the first and second electrodes; a photoelectric conversion layer provided between the first and third electrodes and between the second and third electrodes;and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, wherein the semiconductor layer comprises a first layer and a second layer stacked in that order from one side of the first electrode and the second electrode, wherein the first layer has a thickness less than the thickness of the second layer, wherein the thickness of the first layer is 3 nm or more and 5 nm or less.

Description

Technical field

[0001] The present disclosure relates to a photoelectric conversion element using, for example, an organic material and a photodetection device including the photoelectric conversion element. State of the art

[0002] For example, PTL 1 discloses an imaging member including a photoelectric conversion portion comprising a first electrode, a photoelectric conversion layer, and a second electrode stacked thereon, wherein a compound oxide layer comprising indium gallium zinc compound oxide (IGZO) is provided between the first electrode and the photoelectric conversion layer, thereby achieving improvement in photoresponse sensitivity. Citation listPatent literature

[0003] PTL 1: International Publication No. WO 2019 / 035252 Summary of the invention

[0004] Furthermore, it is required that a photoelectric conversion element and a photodetection device have improved reliability.

[0005] It is desirable to provide a photoelectric conversion element and a photodetection device that make it possible to improve reliability.

[0006] A photoelectric conversion element according to an embodiment of the present disclosure includes: a first electrode and a second electrode arranged side by side; a third electrode arranged to oppose the first electrode and the second electrode; a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode;and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, the first layer having a thickness smaller than a thickness of the second layer, the thickness of the first layer being 3 nm or more and 5 nm or less;

[0007] A photodetection device according to an embodiment of the present disclosure includes a plurality of pixels each including one or a plurality of photoelectric conversion elements, wherein the photoelectric conversion element according to an embodiment of the present disclosure is provided as the photoelectric conversion element.

[0008] In the photoelectric conversion element and the photodetection device according to the respective embodiments of the present disclosure, the semiconductor layer including the first layer and the second layer stacked in this order from the side of the first electrode and the second electrode arranged side by side, the first layer having a thickness smaller than a thickness of the second layer and being 3 nm or more and 5 nm or less, is provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer. This reduces the influence of a fixed electric charge on a surface of the semiconductor layer while maintaining carrier conduction in the semiconductor layer. Short description of the drawings [ Fig. 1] Fig. 1 is a schematic sectional view of an example of a configuration of an imaging element according to an embodiment of the present disclosure. [ Fig. 2] Fig. 2 is a schematic plan view of an example of a pixel configuration of an imaging device using the Fig. 1 illustrated imaging element. [ Fig. 3] Fig. 3 is a schematic sectional view of an example of a configuration of a photoelectric conversion section used in Fig. 1 is illustrated. [ Fig. 4] Fig. 4 is a characteristic diagram showing a relationship between a delayed electric charge amount and a film thickness of a first layer of a Fig. 3 illustrated semiconductor layer. [ Fig. 5] Fig. 5 is a characteristic diagram showing a relationship between a drain current and the film thickness of the first layer of the Fig. 3 illustrated semiconductor layer. [ Fig. 6] Fig. 6 is a characteristic diagram showing a relationship between a variation amount of a threshold voltage and a film thickness of a second layer of the Fig. 3 illustrated semiconductor layer. [ Fig. 7A] Fig. 7A is a characteristic diagram showing a simulation result of a relationship between a carrier concentration and a distance from an interface between an insulating layer and the Fig. 3 illustrated semiconductor layer. [ Fig. 7B] Fig. Figure 7B is an enlarged view of a portion of Fig. 7A. [ Fig. 8] Fig. 8 is an equivalent circuit diagram of the Fig. 1 illustrated imaging element. [ Fig. 9] Fig. Figure 9 is a schematic view of an array of transistors forming a control and a lower electrode of the Fig. 1 illustrated imaging element. [ Fig. 10] Fig. 10 is an explanatory sectional view of a method of manufacturing the Fig. 1 illustrated imaging element. [ Fig. 11] Fig. 11 is a sectional view of a step according to Fig. 10. [ Fig. 12] Fig. 12 is a sectional view of a step according to Fig. 11. [ Fig. 13] Fig. 13 is a sectional view of a step according to Fig. 12. [ Fig. 14] Fig. 14 is a sectional view of a step according to Fig. 13. [ Fig. 15] Fig. 15 is a sectional view of a step according to Fig. 14. [ Fig. 16] Fig. 16 is a timing chart showing an operation example of the Fig. 1 illustrated imaging element. [ Fig. 17] Fig. 17 is a schematic sectional view of a configuration of a photoelectric conversion section according to Modification Example 1 of the present disclosure. [ Fig. 18] Fig. 18 is a schematic sectional view of a configuration of a photoelectric conversion section according to Modification Example 2 of the present disclosure. [ Fig. 19A] Fig. 19A is a schematic sectional view of an example of a configuration of an imaging element according to Modification Example 3 of the present disclosure. [ Fig. 19B] Fig. 19B is a schematic plan view of an example of a pixel configuration of an imaging device using the Fig. 19A illustrated imaging element. [ Fig. 20A] Fig. 20A is a schematic sectional view of an example of a configuration of an imaging element according to Modification Example 4 of the present disclosure. [ Fig. 20B] Fig. 20B is a schematic plan view of an example of a pixel configuration of an imaging device using the Fig. 20A illustrated imaging element. [ Fig. 21] Fig. 21 is a schematic sectional view of an example of a configuration of an imaging element according to Modification Example 5 of the present disclosure. [ Fig. 22] Fig. 22 is a block diagram illustrating a configuration of an imaging apparatus using the Fig. 1 or other drawings is used as a pixel. [ Fig. 23] Fig. 23 is a functional block diagram illustrating an example of an electronic device (camera) that implements the Fig. 22 is used. [ Fig. 24A] Fig. 24A is a schematic view of an example of an overall configuration of a photodetection system using the Fig. 22 is used. [ Fig. 24B] Fig. 24B is a diagram showing an example of a circuit configuration of the Fig. 24A illustrated photodetection system. [ Fig. 25] Fig. 25 is a view showing an example of a schematic configuration of an endoscopic surgery system. [ Fig. 26] Fig. 26 is a block diagram showing an example of a functional configuration of a camera head and a camera control unit (CCU). [ Fig. 27] Fig. 27 is a block diagram showing an example of a schematic configuration of a vehicle control system. [ Fig. 28] Fig. 28 is a diagram of assistance in explaining an example of installation positions of an outside-vehicle information detection section and an imaging section. Modes for carrying out the invention

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The following description is merely a specific example of the present disclosure, and the present disclosure should not be limited to the following aspects. Furthermore, the present disclosure is not limited to the arrangements, dimensions, dimensional relationships, and the like of each component illustrated in the drawings. Note that the description will be made in the following order. 1. Embodiment (an example of an imaging member comprising, between a lower electrode and a photoelectric conversion layer, a semiconductor layer comprising two layers (a first layer and a second layer) with a predetermined film thickness ratio) 1-1. Imaging Element Configuration 1-2. Method for manufacturing the imaging element 1-3. Signal acquisition operation of the imaging element 1-4. Functions and Effects 2. Modification examples 2-1. Modification Example 1 (Another Example of the Configuration of the Photoelectric Conversion Section) 2-2. Modification Example 2 (Another Example of the Configuration of the Photoelectric Conversion Section) 2-3. Modification Example 3 (An Example of an Imaging Element Using a Color Filter to Diffuse Light) 2-4. Modification Example 4 (Another example of the imaging element that uses a color filter to scatter light) 2-5. Modification Example 5 (An Example of an Imaging Element in Which a Plurality of Photoelectric Conversion Sections Are Stacked) 3. Application examples 4. Practical application examples <1. Embodiment>

[0010] Fig. 1 illustrates a sectional configuration of an imaging element (an imaging element 10) according to an embodiment of the present disclosure. Fig. Figure 2 schematically illustrates an example of a planar configuration of the Fig. 1 illustrated imaging element 10, and Fig. 1 illustrates a section along a Fig. 2 illustrated line II. Fig. 3 schematically illustrates in an enlarged manner an example of a sectional configuration of a main part (a photoelectric conversion section 20) of the Fig. 1. The imaging element 10 forms, for example, a pixel (a unit pixel P) repeatedly formed in a pixel section 1A of an imaging device (e.g., an imaging device 1; see Fig. 22) such as a CMOS (Complementary Metal Oxide Semiconductor) image sensor used for an electronic device such as a digital still camera or a video camera. In the pixel section 1A, as shown in Fig. 2, for example, a pixel unit 1a including four unit pixels P arranged in two rows × two columns serves as a repeating unit and is repeatedly arranged in an array including a row direction and a column direction.

[0011] The imaging member 10 of the present embodiment is provided with a semiconductor layer 23 comprising a plurality of layers between a lower electrode 21 and a photoelectric conversion layer 24 in the photoelectric conversion section 20 provided on a semiconductor substrate 30. The lower electrode 21 includes a readout electrode 21A and an accumulation electrode 21B. The semiconductor layer 23 has a configuration in which, for example, a first layer 23A and a second layer 23B are stacked in this order from one side of a lower electrode 11, and a thickness of the first layer 23A is smaller than a thickness of the second layer 23B, and is 3 nm or more and 5 nm or less.This readout electrode 21A corresponds to a specific example of a "second electrode" of the present disclosure, and the accumulation electrode 21B corresponds to a specific example of a "first electrode" of the present disclosure. Furthermore, the first layer 23A corresponds to a specific example of a "first layer" of the present disclosure, and the second layer 23B corresponds to a specific example of a "second layer" of the present disclosure. (1-1. Imaging Element Configuration)

[0012] The imaging element 10 is, for example, a so-called vertical spectroscopic imaging element in which a photoelectric conversion section 20 and two photoelectric conversion regions 32B and 32R are stacked in a vertical direction. The photoelectric conversion section 20 is provided on one side of a back surface (a first surface 30A) of the semiconductor substrate 30. The photoelectric conversion regions 32B and 32R are formed to be embedded in the semiconductor substrate 30 and are stacked in a thickness direction of the semiconductor substrate 30.

[0013] The photoelectric conversion section 20 and the photoelectric conversion regions 32B and 32R selectively detect light rays in wavelength ranges different from each other to perform photoelectric conversion. For example, the photoelectric conversion section 20 detects a green (G) color signal. The photoelectric conversion regions 32B and 32R respectively detect blue (B) and red (R) color signals depending on a difference in absorption coefficients. This allows the imaging element 10 to detect a variety of color signals in one pixel without using color filters.

[0014] Note that in the present embodiment, a description is given of a case where electrons from electron / hole pairs (excitons) generated by photoelectric conversion are read as signal charge (in a case where an n-type semiconductor region is used as a photoelectric conversion layer). Additionally, in the diagram, "+ (plus)" appended to "p" and "n" indicates a higher p-type or n-type impurity concentration.

[0015] A front surface (a second surface 30B) of the semiconductor substrate 30 is provided with, for example, floating diffusions (floating diffusion layers) FD1 (a region 36B in the semiconductor substrate 30), FD2 (a region 37C in the semiconductor substrate 30), and FD3 (a region 38C in the semiconductor substrate 30), transfer transistors Tr2 and Tr3, an amplifier transistor (modulation element) AMP, a reset transistor RST, and a selection transistor SEL. The second surface 30B of the semiconductor substrate 30 is further provided with a multilayer wiring layer 40 with a gate insulating layer 33 therebetween. The multilayer wiring layer 40 has, for example, a configuration in which wiring layers 41, 42, and 43 are stacked in an insulating layer 44. An edge part of the semiconductor substrate 30, iea peripheral region 1B around the pixel portion 1A is provided with a vertical drive circuit 111, a column signal processing circuit 112, a horizontal drive circuit 113, an output circuit 114, a control circuit 115, an input / output terminal 116, and the like, which will be described later.

[0016] Note that the diagram illustrates one side of the first surface 30A of the semiconductor substrate 30 as a light incident side S1 and one side of the second surface 30B thereof as a wiring layer side S2.

[0017] In the photoelectric conversion part 20, the semiconductor layer 23 and the photoelectric conversion layer 24 are stacked in this order from a lower electrode 21 side between the lower electrode 21 and an upper electrode 25, which are arranged to face each other. The photoelectric conversion layer 24 is formed using an organic material. As described above, in the semiconductor layer 23, the first layer 23A and the second layer 23B are stacked in this order from the lower electrode 21 side. The photoelectric conversion layer 24 includes a p-type semiconductor and an n-type semiconductor and has a bulk heterojunction structure therein. The bulk heterojunction structure is a p / n junction formed by mixing a p-type semiconductor and an n-type semiconductor.

[0018] The photoelectric conversion section 20 further includes an insulating layer 22 between the lower electrode 21 and the semiconductor layer 23. The insulating layer 22 is provided, for example, over the entire area of ​​the pixel section 1A and has an opening 22H on the readout electrode 21A constituting the lower electrode 21. The readout electrode 21A is electrically coupled to the semiconductor layer 23 via this opening 22H.

[0019] It should be noted that Fig. 1 illustrates an example in which the semiconductor layer 23, the photoelectric conversion layer 24, and the upper electrodes 25 are formed separately for each imaging element 10, but the semiconductor layer 23, the photoelectric conversion layer 24, and the upper electrode 25 may be provided, for example, as a continuous layer common to a plurality of imaging elements 10.

[0020] For example, an insulating layer 26 and an interlayer insulating layer 27 are stacked between the first surface 30A of the semiconductor substrate 30 and the lower electrode 21. In the insulating layer 26, a layer (fixed charge layer) 26A having a fixed electric charge and a dielectric layer 26B having an insulating property are stacked in this order from one side of the semiconductor substrate 30.

[0021] The photoelectric conversion regions 32B and 32R each allow light to be scattered in the vertical direction by utilizing a difference in the wavelengths of light rays to be absorbed according to the light incidence depth in the semiconductor substrate 30, which includes a silicon substrate. The photoelectric conversion regions 32B and 32R each have a pn junction in a predetermined region in the semiconductor substrate 30.

[0022] A through electrode 34 is provided between the first surface 30A and the second surface 30B of the semiconductor substrate 30. The through electrode 34 is electrically coupled to the readout electrode 21A. The photoelectric conversion section 20 is coupled, via the through electrode 34, to a gate Gamp of the amplifier transistor AMP and to a source / drain region 36B of the reset transistor RST (a reset transistor Tr1rst), which also serves as the floating diffusion FD1. This allows the imaging element 10 to favorably transfer carriers (here, electrons) generated by the photoelectric conversion section 20 provided on the first surface 30A side of the semiconductor substrate 30 to the second surface 30B side of the semiconductor substrate 30 via the through electrode 34, thus improving the characteristics.

[0023] The lower end of the through electrode 34 is coupled to a wiring (a coupling portion 41A) in the wiring layer 41, and the coupling portion 41A and the gate Gamp of the amplifier transistor AMP are coupled to each other via a lower first contact 45. The coupling portion 41A and the floating diffusion FD1 (region 36B) are coupled to each other via, for example, a lower second contact 46. The upper end of the through electrode 34 is coupled to the sense electrode 21A via, for example, a pad portion 39A and an upper first contact 39C.

[0024] A protective layer 51 is provided over the photoelectric conversion portion 20. For example, wiring 52 and a light-blocking film 53 are provided in the protective layer 51. The wiring 52 electrically couples the upper electrode 25 and a peripheral circuit part 130 around the pixel portion 1A. An optical element, such as an on-chip lens 54 or a planarization layer (not shown), is further disposed over the protective layer 51.

[0025] In the imaging element 10 of the present embodiment, light that has entered the photoelectric conversion section 20 from the light incident side S1 is absorbed by the photoelectric conversion layer 24. Excitons generated thereby move to an interface between an electron donor and an electron acceptor constituting the photoelectric conversion layer 24 to undergo exciton separation. In other words, the excitons are dissociated into electrons and holes. Carriers (electrons and holes) generated here are transported to various electrodes by diffusion due to a carrier concentration difference or by an internal electric field caused by a work function difference between an anode (e.g., the upper electrode 25) and a cathode (e.g., the lower electrode 21). The transported carriers are detected as a photocurrent.In addition, applying a potential between the lower electrode 21 and the upper electrode 25 also makes it possible to control the transport directions of electrons and holes.

[0026] Below, configurations, materials, and the like of each of the sections are described in detail.

[0027] The photoelectric conversion section 20 is an organic photoelectric conversion element that absorbs, for example, green light corresponding to a portion or the entirety of a selective wavelength range (e.g., 450 nm or more and 650 nm or less) to generate excitons.

[0028] The lower electrode 21 includes, for example, the readout electrode 21A and the accumulation electrode 21B, which are arranged side by side on an interlayer insulating layer 28. The readout electrode 21A is provided to transfer charge carriers generated in a photoelectric conversion layer 25 to the floating diffusion FD1, and is provided sequentially for each pixel unit 1a including four pixels arranged in, for example, two rows × two columns.

[0029] For example, the sense electrode 21A is coupled to the floating diffusion FD1 via the upper first contact 39C, the pad portion 39A, the through electrode 34, the coupling portion 41A, and the lower second contact 46.

[0030] The accumulation electrode 21B is provided for accumulating, in an oxide semiconductor layer 23, electrons among, for example, the carriers generated in the photoelectric conversion layer 25 as signal charge. The accumulation electrode 21B is provided for each of the pixels. The accumulation electrode 21B is provided for each of the unit pixels P in a region that opposes and covers the light-receiving surfaces of the photoelectric conversion regions 32B and 32R formed in the semiconductor substrate 30. It is preferable that the accumulation electrode 21B be larger than the readout electrode 21A. This makes it possible to accumulate more carriers.

[0031] The lower electrode 21 comprises an electrically conductive film with light transmittance. The lower electrode 21 is configured, for example, by ITO (indium tin oxide). In addition to ITO, a tin oxide (SnO2 )-based material doped with a dopant, or a zinc oxide-based material in which zinc oxide (ZnO) is doped with a dopant may be used as a constituent of the lower electrode 21. Examples of the zinc oxide-based material include aluminum zinc oxide (AZO) doped with aluminum (Al) as a dopant, gallium zinc oxide (GZO) doped with gallium (Ga), and indium zinc oxide (IZO) doped with indium (In). In addition, IGZO, ITZO, CuI, InSbO 4 , ZnMgO, CuInO 2 , MgIn 2 O 4 , CdO, ZnSnO 3 or the like may be used in addition.

[0032] The insulating layer 22 is provided to electrically separate the accumulation electrode 21B and the semiconductor layer 23 from each other. The insulating layer 22 is provided, for example, over the interlayer insulating layer 27 to cover the lower electrode 21. The insulating layer 22 is provided with the opening 22H on the readout electrode 21A of the lower electrode 21, and the readout electrode 21A and the semiconductor layer 23 are electrically coupled to each other via this opening 22H. The insulating layer 22 is configured, for example, by a monolayer film comprising one of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiON), or the like, or a stacked film comprising two or more thereof. The insulating layer 22 has a thickness of, for example, 20 nm to 500 nm.

[0033] The semiconductor layer 23 is provided to accumulate carriers (electrons) generated by the photoelectric conversion layer 24. As described above, the semiconductor layer 23 is provided between the lower electrode 21 and the photoelectric conversion layer 24 and has a stacked structure in which the first layer 23A and the second layer 23B are stacked in this order from the lower electrode 21 side. The electrons generated by the photoelectric conversion layer 24 are accumulated above the accumulation electrode 21B from the vicinity of an interface between the insulating layer 22 and the first layer 23A to the entire semiconductor layer 23 and are transferred to the readout electrode 21A via the first layer 23A.Although described in detail later, the electrons accumulated above the accumulation electrode 21B are transferred to the readout electrode 21A by controlling a potential of the accumulation electrode 21B to generate a potential gradient. The electrons are transferred from the readout electrode 21A to the floating diffusion FD1.

[0034] The first layer 23A and the second layer 23B each have a predetermined thickness. Specifically, a thickness (t1) of the first layer 23A is smaller than a thickness (t2) of the second layer 23B; for example, a ratio (t1 / t2) between the thickness (t1) of the first layer 23A and the thickness (t2) of the second layer 23B is 0.16 or less.

[0035] It is possible to form the semiconductor layer 23 (the first layer 23A and the second layer 23B) using, for example, the following materials. The imaging member 10 of the present embodiment reads, as signal charge, electrons of the carriers generated by the photoelectric conversion layer 24. This makes it possible to form the semiconductor layer 23 using an n-type oxide semiconductor material. Specific examples thereof include IGZO (In-Ga-Zn-O-based oxide semiconductor), ITZO (In-Sn-Zn-O-based oxide semiconductor), ZTO (Zn-Sn-O-based oxide semiconductor), IGZTO (In-Ga-Zn-Sn-O-based oxide semiconductor), GTO (Ga-Sn-O-based oxide semiconductor), IGO (In-Ga-O-based oxide semiconductor), or the like.In addition, it is possible to use AlZnO, GaZnO, InZnO or the like, wherein the above-described oxide semiconductor is doped with aluminum (Al), gallium (Ga), indium (In) or the like as a dopant, or to use a material containing CuI, InSbO. 4 , ZnMgO, CuInO 2 , MgIn 2 O 4 , CdO or the like.

[0036] At least one of the oxide semiconductor materials described above is preferably used for the first layer 23A and the second layer 23B; particularly, indium oxide such as IGZO is preferably used. For example, the first layer 23A is formed using indium oxide having a higher indium content ratio than that of indium oxide forming the second layer 23B. As an example, the first layer 23A may be formed using IGZO with a ratio of In:Ga:Zn = 4:2:3, and the second layer 23B may be formed using IGZO with a ratio of In:Ga:Zn = 1:1:1.

[0037] The first layer 23A and the second layer 23B each have, for example, a crystalline property or an amorphous property. Alternatively, one of the first layer 23A or the second layer 23B may have a crystalline property and the other may have an amorphous property. In addition, in a case where the first layer 23A and the second layer 23B each have a crystalline property, the first layer 23A may have a stacked structure of an amorphous layer and a crystalline layer. Specifically, a region (an initial layer having a film thickness of several nm at the time the first layer 23A is formed) of the first layer 23A may be an amorphous layer. In a case where the first layer 23A and the second layer 23B are each formed as a crystalline layer, the first layer 23A serves the role of a seed crystal of the second layer 23B.This makes it possible to form the second layer 23B with favorable film quality. Thus, it is possible to reduce a defect level at an interface between the first layer 23A and the second layer 23B. In a case where the first layer 23A is defined as a crystalline layer and the second layer 23B is defined as an amorphous layer, impurities in the layers are reduced compared to a case of direct formation on the insulating layer 22. This makes it possible to reduce the defect level caused by the impurities. In addition, the inhibition of crystalline growth caused by the impurities is also reduced, thereby making it possible to enhance a crystalline property.In a case where the first layer 23A is defined as an amorphous layer and the second layer 23B is defined as a crystalline layer, and in a case where the first layer 23A and the second layer 23B are each defined as an amorphous layer, the impurities in silicon are also reduced. This makes it possible to reduce the defect level.

[0038] Fig. 4 illustrates a relationship between a delayed electric charge amount and a film thickness of the first layer 23A. The delayed electric charge amount refers to an amount of electric charge transferred after a certain period of time has elapsed from the start of transfer to the time at which the electric charge accumulated in the semiconductor layer 23 was transferred to the floating diffusion FD1; a smaller value of the delayed electric charge amount indicates a more favorable carrier conductivity. Fig. 5 illustrates a relationship between a drain current and a film thickness of the first layer 23A. The drain current is a current flowing to a drain when the semiconductor layer 23 is set as a channel layer in the transistor; a smaller value of the drain current indicates higher reliability. Fig. 6 illustrates a relationship between a variation amount of a threshold voltage and a film thickness of the second layer 23B.

[0039] Fig. 7A illustrates a simulation result of a relationship between a carrier concentration and a distance from an interface between the insulating layer 22 and the semiconductor layer 23. Fig. Figure 7B is an enlarged view of the film thickness range from 0 nm to 10 nm shown in Fig. 7A, where the vertical axis is standardized.

[0040] It is over Fig. 4 that the first layer 23A with a predetermined film thickness makes it possible to maintain a favorable charge carrier conductivity. Fig. 5 that the first layer 23A having a thickness of several nm or less does not exert any influence on the reliability. It can be said that setting the thickness of the first layer 23A to, for example, 5 nm or less is advantageous from the results of the Fig. 4 and Fig. 5 makes it possible to improve reliability while maintaining carrier conductivity. Meanwhile, electrons to be accumulated in the semiconductor layer 23 are accumulated near the interface between the insulating layer 22 and the first layer 23A. The electrons accumulated in the semiconductor layer 23 are reduced while being away from the interface between the insulating layer 22 and the first layer 23A. For example, when the distance from the interface between the insulating layer 22 and the first layer 23A is about 3 nm, the carrier concentration is reduced by about one order of magnitude. From the above, the thickness of the first layer 23A is set to 3 nm or more and 5 nm or less.

[0041] It is over Fig. 6 that increasing the thickness of the second layer 23B beyond a predetermined thickness reduces the variation in the threshold voltage (Vth). For example, in a case where the second layer 23B has a reduced film thickness of 20 nm, a back channel occurs due to a fixed electric charge on a surface of the second layer 23B, thereby increasing the variation in the threshold voltage (Vth). In a case where the second layer 23B has an increased film thickness of 60 nm, the variation in the threshold voltage (Vth) is reduced. Meanwhile, when simulating a film thickness distribution of the carrier concentration upon accumulation of electrons in the second layer 23B at an actual drive voltage, it is seen that the carrier (electron) concentration is reduced as the distance from the interface between the insulating layer 22 and the semiconductor layer 23 is increased, as shown in Fig. 7A. However, when many electrons are present on a surface of the semiconductor layer 23, the number of electrons trapped by the fixed electric charge increases, thereby increasing the variation of the threshold voltage (Vth). Therefore, for example, when the carrier concentration in a state where no voltage is applied is set to 1.0E + 16 cm -3 and electrons on the surface are smaller than the value in a state where electrons are accumulated in the semiconductor layer 23, the variation amount of the threshold voltage (Vth) is considered to be within a standard. That is, the thickness of the semiconductor layer 23 is 35 nm or more from Fig. 7A. Here, the thickness of the first layer 23A is set to 3 nm or more and 5 nm or less as described above. Therefore, the thickness of the second layer 23B is 32 nm or more.

[0042] The photoelectric conversion layer 24 converts optical energy into electrical energy. The photoelectric conversion layer 24 includes, for example, two or more types of organic materials (a p-type semiconductor material or an n-type semiconductor material), each functioning as a p-type semiconductor or an n-type semiconductor. The photoelectric conversion layer 24 has therein a junction surface (p / n junction surface) between the p-type semiconductor material and the n-type semiconductor material. The p-type semiconductor functions relatively as an electron donor (donor), and the n-type semiconductor functions relatively as an electron acceptor (acceptor). The photoelectric conversion layer 24 provides a field in which excitons generated by absorbing light are separated into electrons and holes.In particular, excitons are separated into electrons and holes at the interface (p / n junction) between the electron donor and the electron acceptor.

[0043] The photoelectric conversion layer 24 may include an organic material, that is, a so-called coloring material, in addition to the p-type semiconductor material and the n-type semiconductor material. The organic material, that is, the coloring material, photoelectrically converts light in a predetermined wavelength range while transmitting light in another wavelength range. In a case where the photoelectric conversion layer 24 is formed using the three types of organic materials of a p-type semiconductor material, an n-type semiconductor material, and a coloring material, it is preferable that the p-type semiconductor material and the n-type semiconductor material are materials each having light transmittance in a visible region (e.g., 450 nm to 800 nm). The photoelectric conversion layer 24 has, for example, a thickness of 50 nm to 500 nm.

[0044] Examples of organic materials constituting the photoelectric conversion layer 24 include a quinacridone derivative, a naphthalene derivative, an anthracene derivative, a phenanthrene derivative, a tetracene derivative, a pyrene derivative, a perylene derivative, and a fluoranthene derivative. The photoelectric conversion layer 24 comprises two or more of the above-described organic materials in combination. The above-described organic materials function as a p-type semiconductor or an n-type semiconductor depending on the combination.

[0045] Note that the organic materials constituting the photoelectric conversion layer 24 are not particularly limited. For example, it is possible to use a polymer such as phenylenevinylene, fluorene, carbazole, indole, pyrene, pyrrole, picoline, thiophene, acetylene, diacetylene, or the like, or a derivative thereof, in addition to the organic materials described above.Alternatively, it is possible to use a metal complex dye, a cyanine-based dye, a merocyanine-based dye, a phenylxanthene-based dye, a triphenylmethane-based dye, a rhodacyanine-based dye, a xanthene-based dye, a macrocyclic azaannulene-based dye, an azulene-based dye, a naphthoquinone-based dye, an anthraquinone-based dye, a chain compound in which a condensed polycyclic aromatic group such as pyrene, an aromatic ring, or a heterocyclic compound is condensed, a cyanine-type dye bonded by two nitrogen-containing hetero rings comprising quinoline, benzothiazole, benzoxazole, and the like, having a squarylium group and a croconic methine group as a bonded chain or by a squarylium group and a croconic methine group, or the like.Note that examples of the metal complex dye include a dithiol metal complex-based dye, a metallophthalocyanine dye, a metalloporphyrin dye, or a ruthenium complex dye. A ruthenium complex dye is particularly preferred among these, but the metal complex dye is not limited thereto.

[0046] The upper electrode 25 comprises an electrically conductive film with light transmittance in the same manner as the lower electrode 21. The upper electrode 25 is configured, for example, by ITO (indium tin oxide). In addition to this ITO, a tin oxide (SnO 2)-based material doped with a dopant, or a zinc oxide-based material in which zinc oxide (ZnO) is doped with a dopant may be used as a constituent of the upper electrode 25. Examples of the zinc oxide-based material include aluminum zinc oxide (AZO) doped with aluminum (Al) as a dopant, gallium zinc oxide (GZO) doped with gallium (Ga), and indium zinc oxide (IZO) doped with indium (In). In addition, IGZO, ITZO, CuI, InSbO 4 , ZnMgO, CuInO 2 , MgIn 2 O 4 , CdO, ZnSnO 3 or the like may be used in addition. The upper electrodes 25 may be separate for each of the pixels, or the upper electrode 25 may be formed as an electrode common to the pixels. The upper electrode 25 has a thickness of, for example, 10 nm to 200 nm.

[0047] Note that the photoelectric conversion portion 20 may be provided with other layers between the lower electrode 21 and the photoelectric conversion layer 24 (e.g., between the semiconductor layer 23 and the photoelectric conversion layer 24) and between the photoelectric conversion layer 24 and the upper electrode 25. For example, in the photoelectric conversion portion 20, the semiconductor layer 23, a buffer layer that also serves as an electron blocking film, the photoelectric conversion layer 24, a buffer layer that also serves as a hole blocking film, a work function adjusting layer, and the like may be stacked in order from the lower electrode 21 side.In addition, the photoelectric conversion layer 24 may have a pin-bulk heterostructure in which, for example, a p-type blocking layer, a layer (i-layer) comprising a p-type semiconductor and an n-type semiconductor, and an n-type blocking layer are stacked.

[0048] The insulating layer 26 covers the first surface 30A of the semiconductor substrate 30 and reduces the interface state with the semiconductor substrate 30. In addition, the insulating layer 26 is provided to suppress the generation of a dark current from the interface with the semiconductor substrate 30. In addition, the insulating layer 26 extends from the first surface 30A of the semiconductor substrate 30 to a side surface of the opening 34H (see Fig. 11), in which the through electrode 34 is formed. The through electrode 34 penetrates the semiconductor substrate 30. The insulating layer 26 has, for example, a stacked structure of the charge-fixed layer 26A and the dielectric layer 26B.

[0049] The fixed charge layer 26A may be a positive fixed electric charge film or a negative fixed electric charge film. As for the component, the fixed charge layer 26A is preferably formed using an electrically conductive material or a semiconductor material having a wider band gap than that of the semiconductor substrate 30. This makes it possible to suppress the generation of a dark current at the interface of the semiconductor substrate 30. Examples of the component of the fixed charge layer 26A include hafnium oxide (HfO x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), tantalum oxide (TaOx ), titanium oxide (TiO x ), lanthanum oxide (LaO x ), praseodymium oxide (PrOx), cerium oxide (CeO x ), neodymium oxide (NdOx), promethium oxide (PmOx), samarium oxide (SmO x ), europium oxide (EuO x ), gadolinium oxide (GdOx), terbium oxide (TbOx), dysprosium oxide (DyOx), holmium oxide (HoO x ), thulium oxide (TmOx), ytterbium oxide (YbO x ), lutetium oxide (LuOx), yttrium oxide (YO x ), hafnium nitride (HfNx), aluminum nitride (AlNx), hafnium oxynitride (HfO x N y ) and aluminum oxynitride (AlO x N y ).

[0050] The dielectric layer 26B is provided to prevent light reflection caused by a refractive index difference between the semiconductor substrate 30 and the interlayer insulating layer 27. As a constituent of the dielectric layer 26B, a material having a refractive index between a refractive index of the semiconductor substrate 30 and a refractive index of the interlayer insulating layer 27 is preferably used. Examples of the constituent of the dielectric layer 26B include silicon oxide, TEOS, silicon nitride, silicon oxynitride (SiON), and the like.

[0051] The interlayer insulating layer 27 is configured by, for example, a monolayer film comprising one of silicon oxide, silicon nitride, silicon oxynitride, or the like, or a stacked film comprising two or more thereof.

[0052] A shield electrode 28 is provided on the interlayer insulating film 27 together with the lower electrode 21. The shield electrode 28 is provided to prevent capacitive coupling between the adjacent pixel units 1a. For example, the shield electrode 28 is provided around the pixel unit 1a including four pixels arranged in two rows × two columns, and a fixed potential is applied to the shield electrode 28. The shield electrode 28 also extends between pixels adjacent in the row direction (Z-axis direction) and the column direction (X-axis direction) in the pixel unit 1a.

[0053] The semiconductor substrate 30 is configured, for example, by an n-type silicon (Si) substrate and includes a p-well 31 in a predetermined region.

[0054] The photoelectric conversion regions 32B and 32R are each configured by a photodiode (PD) having a pn junction in a predetermined region in the semiconductor substrate 30, and enable light to be scattered in the vertical direction by utilizing a difference in the wavelengths of light rays to be absorbed depending on the incident depth of light in the Si substrate. The photoelectric conversion region 32B, for example, selectively detects blue light and accumulates signal charge corresponding to blue; the photoelectric conversion region 32B is provided at a depth where the blue light can be efficiently photoelectrically converted.The photoelectric conversion region 32R selectively detects, for example, red light and accumulates signal charge corresponding to red; the photoelectric conversion region 32R is provided at a depth where the red light can be efficiently photoelectrically converted. Note that blue (B) is a color corresponding to, for example, a wavelength range of 450 nm to 495 nm, and red (R) is a color corresponding to, for example, a wavelength range of 620 nm to 750 nm. It is sufficient that each of the photoelectric conversion regions 32B and 32R can detect light in part or all of each wavelength range.

[0055] The photoelectric conversion region 32B includes, for example, a p+ region serving as a hole accumulation layer and an n-type region serving as an electron accumulation layer. The photoelectric conversion region 32R includes, for example, a p+ region serving as a hole accumulation layer and an n-type region serving as an electron accumulation layer (having a stacked pnp structure). The n-type region of the photoelectric conversion region 32B is coupled to the vertical transfer transistor Tr2. The p+ region of the photoelectric conversion region 32B bends along the transfer transistor Tr2 and is connected to the p+ region of the photoelectric conversion region 32R.

[0056] The gate insulating layer 33 is configured, for example, by a monolayer film comprising one of silicon oxide, silicon nitride, silicon oxynitride, or the like, or a stacked film comprising two or more thereof.

[0057] The through electrode 34 is provided between the first surface 30A and the second surface 30B of the semiconductor substrate 30. The through electrode 34 functions as a connector for the photoelectric conversion section 20 and the gate Gamp of the amplifier transistor AMP, as well as the floating diffusion FD1, and serves as a transmission path for the carriers generated by the photoelectric conversion section 20. A reset gate Grst of the reset transistor RST is arranged adjacent to the floating diffusion FD1 (a source / drain region 36B of the reset transistor RST). This allows the reset transistor RST to reset the carriers accumulated in the floating diffusion FD1.

[0058] The pad portions 39A and 39B, the upper first contact 39C, an upper second contact 39D, the lower first contact 45, the lower second contact 46, and the wiring 52 may be formed using a doped silicon material such as PDAS (Phosphorus Doped Amorphous Silicon) or a metal material such as aluminum (Al), tungsten (W), titanium (Ti), cobalt (Co), hafnium (Hf), or tantalum (Ta).

[0059] The protective layer 51 and the on-chip lens 54 are configured by a material having light transmittance, and are configured, for example, by a monolayer film comprising one of silicon oxide, silicon nitride, silicon oxynitride, or the like, or a stacked film comprising two or more thereof. The protective layer 51 has a thickness of, for example, 100 nm to 30,000 nm.

[0060] For example, the light-blocking film 53 is provided in the protective layer 51 together with the wiring 52 to cover a region of the readout electrode 21A in direct contact with the semiconductor layer 23 without covering at least the accumulation electrode 21B. The light-blocking film 53 can be formed using, for example, tungsten (W), aluminum (Al), an alloy of Al and copper (Cu), or the like.

[0061] Fig. 8 is an equivalent circuit diagram of the Fig. 1 illustrated imaging element 10. Fig. Figure 9 schematically illustrates an arrangement of transistors comprising a control and the lower electrode 21 of the Fig. 1 illustrated imaging element 10.

[0062] The reset transistor RST (a reset transistor TR1rst) resets carriers transferred from the photoelectric conversion section 20 to the floating diffusion FD1 and is configured, for example, by a MOS transistor. Specifically, the reset transistor TR1rst is configured by the reset gate Grst, a channel formation region 36A, and source / drain regions 36B and 36C. The reset gate Grst is coupled to a reset line RST1. One source / drain region 36B of the reset transistor TR1rst also serves as the floating diffusion FD1. The other source / drain region 36C constituting the reset transistor TR1rst is coupled to a power supply line VDD.

[0063] The amplifier transistor AMP (an amplifier transistor TR1amp) is a modulation element that modulates the amount of electric charge generated by the photoelectric conversion section 20 to a voltage and is configured, for example, by a MOS transistor. Specifically, the amplifier transistor AMP is configured by the gate Gamp, a channel formation region 35A, and the source / drain regions 35B and 35C. The gate Gamp is coupled to the sense electrode 21A and the one source / drain region 36B (the floating diffusion FD1) of the reset transistor TR1rst via the lower first contact 45, the coupling section 41A, the lower second contact 46, the through electrode 34, and the like. In addition, one source / drain region 35B shares a region with the other source / drain region 36C, which forms the reset transistor TR1rst, and is coupled to the power supply line VDD.

[0064] A selection transistor SEL (a selection transistor TR1sel) is configured by a gate Gsel, a channel formation region 34A, and source / drain regions 34B and 34C. The gate Gsel is coupled to a selection line SEL1. One source / drain region 34B shares a region with the other source / drain region 35C, which forms the amplifier transistor AMP, and the other source / drain region 34C is coupled to a signal line (data output line) VSL1.

[0065] The transfer transistor TR2 (a transfer transistor TR2trs) is provided to transfer signal charge corresponding to blue, which has been generated and accumulated in the photoelectric conversion region 32B, to the floating diffusion FD2. The photoelectric conversion region 32B is formed at a deep position from the second surface 30B of the semiconductor substrate 30, and it is therefore preferable that the transfer transistor TR2trs of the photoelectric conversion region 32B be configured by a vertical transistor. The transfer transistor TR2trs is coupled to a transfer gate line TG2. The floating diffusion FD2 is provided in the region 37C near a gate Gtrs2 of the transfer transistor TR2trs. The carriers accumulated in the photoelectric conversion region 32B are read to the floating diffusion FD2 via a transfer channel formed along the gate Gtrs2.

[0066] The transfer transistor TR3 (a transfer transistor TR3trs) is provided to transfer signal charge corresponding to red, which has been generated and accumulated in the photoelectric conversion region 32R, to the floating diffusion FD3. The transfer transistor TR3 (transfer transistor TR3trs) is configured by, for example, a MOS transistor. The transfer transistor TR3trs is coupled to a transfer gate line TG3. The floating diffusion FD3 is provided in a region 38C near a gate Gtrs3 of the transfer transistor TR3trs. The carriers accumulated in the photoelectric conversion region 32R are read to the floating diffusion FD3 via a transfer channel formed along the gate Gtrs3.

[0067] The second surface 30B side of the semiconductor substrate 30 is further provided with a reset transistor TR2rst, an amplifier transistor TR2amp, and a selection transistor TR2sel, which form the control of the photoelectric conversion region 32B. Furthermore, a reset transistor TR3rst, an amplifier transistor TR3amp, and a selection transistor TR3sel, which form the control of the photoelectric conversion region 32R, are provided.

[0068] The reset transistor TR2rst is configured with a gate, a channel formation region, and source / drain regions. The gate of the reset transistor TR2rst is coupled to a reset line RST2, and one source / drain region of the reset transistor TR2rst is coupled to the power supply line VDD. The other source / drain region of the reset transistor TR2rst also serves as the floating diffusion FD2.

[0069] The amplifier transistor TR2amp is configured with a gate, a channel formation region, and source / drain regions. The gate is coupled to the other source / drain region (the floating diffusion FD2) of the reset transistor TR2rst. The one source / drain region forming the amplifier transistor TR2amp shares a region with the one source / drain region forming the reset transistor TR2rst and is coupled to the power supply line VDD.

[0070] The selection transistor TR2sel is configured with a gate, a channel formation region, and source / drain regions. The gate is coupled to a selection line SEL2. One source / drain region forming the selection transistor TR2sel shares a common region with the other source / drain region forming the amplifier transistor TR2amp. The other source / drain region forming the selection transistor TR2sel is coupled to a signal line (data output line) VSL2.

[0071] The reset transistor TR3rst is configured with a gate, a channel formation region, and source / drain regions. The gate of the reset transistor TR3rst is coupled to a reset line RST3, and one source / drain region forming the reset transistor TR3rst is coupled to the power supply line VDD. The other source / drain region forming the reset transistor TR3rst also serves as the floating diffusion FD3.

[0072] The amplifier transistor TR3amp is configured with a gate, a channel formation region, and source / drain regions. The gate is coupled to the other source / drain region (the floating diffusion FD3), which forms the reset transistor TR3rst. The one source / drain region forming the amplifier transistor TR3amp shares a region with the one source / drain region forming the reset transistor TR3rst and is coupled to the power supply line VDD.

[0073] The selection transistor TR3sel is configured with a gate, a channel formation region, and source / drain regions. The gate is coupled to a selection line SEL3. One source / drain region forming the selection transistor TR3sel shares a common region with the other source / drain region forming the amplifier transistor TR3amp. The other source / drain region forming the selection transistor TR3sel is coupled to a signal line (data output line) VSL3.

[0074] The reset lines RST1, RST2, and RST3, the select lines SEL1, SEL2, and SEL3, and the transfer gate lines TG2 and TG3 are each coupled to a vertical drive circuit forming a drive circuit. The signal lines (data output lines) VSL1, VSL2, and VSL3 are coupled to a column signal processing circuit 112 forming the drive circuit. (1-2. Method for manufacturing the imaging element)

[0075] The imaging member 10 according to the present embodiment can be manufactured, for example, as follows.

[0076] Fig. 10 to Fig. 15 illustrate a method for manufacturing the imaging element 10 in the order of steps. First, as shown in Fig. 10, for example, the p-well 31 is formed in the semiconductor substrate 30, and the n-type photoelectric conversion regions 32B and 32R are formed in this p-well 31. A p+ region is formed near the first surface 30A of the semiconductor substrate 30.

[0077] As in Fig. For example, as illustrated in FIG. 10, n+ regions serving as floating diffusions FD1 to FD3 are formed on the second surface 30B of the semiconductor substrate 30, and the gate insulating layer 33 and the gate wiring layer 47 are then formed. The gate wiring layer 47 includes the respective gates of the transfer transistor Tr2, the transfer transistor Tr3, the selection transistor SEL, the amplifier transistor AMP, and the reset transistor RST. This forms the transfer transistor Tr2, the transfer transistor Tr3, the selection transistor SEL, the amplifier transistor AMP, and the reset transistor RST. Further, the multilayer wiring layer 40 is formed on the second surface 30B of the semiconductor substrate 30. The multilayer wiring layer 40 includes the wiring layers 41 to 43 and the insulating layer 44. The wiring layers 41 to 43 include the lower first contact 45, the lower second contact 46, and the coupling portion 41A.

[0078] As the base of the semiconductor substrate 30, for example, an SOI (silicon on insulator) substrate is used in which the semiconductor substrate 30, an embedded oxide film (not shown), and a holding substrate (not shown) are stacked. Although in Fig. 10, the embedded oxide film and the support substrate are bonded to the first surface 30A of the semiconductor substrate 30. After the ion implantation, an annealing treatment is performed.

[0079] Next, a support substrate (not shown), another semiconductor base, or the like is bonded to the multilayer wiring layer 40 provided on the second surface 30B side of the semiconductor substrate 30, and the substrate is turned over. Subsequently, the semiconductor substrate 30 is separated from the embedded oxide film and the support substrate of the SOI substrate to expose the first surface 30A of the semiconductor substrate 30. The steps described above can be performed using a technique used in a normal CMOS process, such as ion implantation and CVD (Chemical Vapor Deposition) methods.

[0080] Next, as in Fig. 11, the semiconductor substrate 30 is processed from the side of the first surface 30A, for example, by dry etching, to form, for example, an annular opening 34H. In terms of depth, the opening 34H penetrates from the first surface 30A to the second surface 30B of the semiconductor substrate 30 and reaches, for example, the coupling portion 41A, as shown in Fig. 11 shown.

[0081] Subsequently, for example, the charge pinned layer 26A and the dielectric layer 26B are formed in this order on the first surface 30A of the semiconductor substrate 30 and on a side surface of the opening 34H. The charge pinned layer 26A can be formed, for example, by forming a hafnium oxide film or an aluminum oxide film using an atomic layer deposition (ALD) method. The dielectric layer 26B can be formed, for example, by forming a silicon oxide film using a plasma CVD method. Next, for example, the pad portions 39A and 39B are formed at predetermined positions on the dielectric layer 26B. In the pad portions 39A and 39B, a barrier metal comprising a stacked film (Ti / TiN film) of titanium and titanium nitride and a tungsten film are stacked. This allows the pad portions 39A and 39B to be used as light-blocking films.Thereafter, the interlayer insulating film 27 is formed on the dielectric layer 26B and the pad portions 39A and 39B, and a surface of the interlayer insulating film 27 is planarized using a CMP (Chemical Mechanical Polishing) method.

[0082] Then, as in Fig. 12, openings 27H1 and 27H2 are formed on the pad portions 39A and 39B, respectively, and then an electrically conductive material such as Al is embedded in the openings 27H1 and 27H2 to form the upper first contact 39C and the upper second contact 39D.

[0083] Next, as in Fig. 13, for example, an electrically conductive film 21x is formed on the interlayer insulating layer 27 by a sputtering method and then patterned using a photolithography technique. Specifically, a photoresist PR is formed at a predetermined position of the electrically conductive film 21x, and then dry etching or wet etching is used to process the electrically conductive film 21x. Thereafter, the photoresist PR is removed to thereby form the readout electrode 21A and the accumulation electrode 21B, as shown in Fig. 14 shown.

[0084] Then, as in Fig. 15, the insulating layer 22, the semiconductor layer 23 including the first layer 23A and the second layer 23B, the photoelectric conversion layer 24, and the upper electrode 25 are formed. Regarding the insulating layer 22, for example, a silicon oxide film is formed using the ALD method, and then a surface of the insulating layer 22 is planarized using the CMP method. After that, the opening 22H is formed on the readout electrode 21A, for example, using wet etching. The semiconductor layer 23 (the first layer 23A and the second layer 23B) can be formed using a sputtering method, for example. The photoelectric conversion layer 24 is formed using a vacuum deposition method, for example. The upper electrode 25 is formed using a sputtering method, for example, in the same manner as the lower electrode 21.Finally, the on-chip lens 54 and the protective layer 51, which includes the wiring 52 and the light-blocking film 53, are arranged on the upper electrode 25. As described above, the structure shown in FIG. Fig. 1 illustrated imaging element 10 is completed.

[0085] Note that in a case where another layer comprising an organic material, such as a buffer layer that also serves as an electron blocking film, a buffer layer that also serves as a hole blocking film, or a work function adjusting layer, is formed between the semiconductor layer 23 and the photoelectric conversion layer 24 and between the photoelectric conversion layer 24 and the upper electrode 25 as described above, it is preferable to form the layers continuously (in an in-situ vacuum process) in a vacuum step. Furthermore, the method for forming the photoelectric conversion layer 24 is not necessarily limited to an approach using a vacuum deposition method. For example, a spin coating technique, a printing technique, or the like may be used.Further, examples of a method for forming transparent electrodes (the lower electrode 21 and the upper electrode 25) include, depending on a material constituting the transparent electrode, a physical vapor deposition (PVD) method such as a vacuum deposition method, a reactive deposition method, an electron beam deposition method, or an ion plating method, a pyrosol method, a method of pyrolyzing an organic metal compound, a spraying method, a dipping method, various CVD methods including an MOCVD method, an electroless plating method, and an electroplating method, in addition to the sputtering method. (1-3. Signal acquisition operation in the imaging element)

[0086] When light enters the photoelectric conversion section 20 via the on-chip lens 54 in the imaging element 10, the light passes through the photoelectric conversion section 20 and the photoelectric conversion regions 32B and 32R in this order. As the light passes through the photoelectric conversion section 20 and the photoelectric conversion regions 32B and 32R, the light is photoelectrically converted for each of the color light beams of green (G), blue (B), and red (R). The following describes the processes of detecting signals of the respective colors. (Detecting the green color signal by the photoelectric conversion section 20)

[0087] First, green light of the light rays that have entered the imaging element 10 is selectively detected (absorbed) and photoelectrically converted by the photoelectric conversion section 20.

[0088] The photoelectric conversion section 20 is coupled to the gate G of the amplifier transistor TR1amp and the floating diffusion FD1 via the through electrode 34. Thus, electrons from excitons generated by the photoelectric conversion section 20 are taken out from the lower electrode 21 side, transferred to the second surface 30S2 side of the semiconductor substrate 30 via the through electrode 34, and accumulated in the floating diffusion FD1. At the same time, the amplifier transistor TR1amp modulates the amount of electric charge generated by the photoelectric conversion section 20 to a voltage.

[0089] Additionally, the reset gate Grst of the reset transistor TR1rst is located adjacent to the floating diffusion FD1. This allows the reset transistor TR1rst to reset carriers accumulated in the floating diffusion FD1.

[0090] The photoelectric conversion section 20 is coupled not only to the amplifier transistor TR1amp but also to the floating diffusion FD1 via the through electrode 34, thereby allowing the reset transistor TR1rst to easily reset the carriers accumulated in the floating diffusion FD1.

[0091] In contrast, in a case where the through electrode 34 and the floating diffusion FD1 are not coupled to each other, it is difficult to reset the carriers accumulated in the floating diffusion FD1, causing a large voltage to be applied to pull the carriers out to the upper electrode 25 side. Therefore, the photoelectric conversion layer 24 may be damaged. In addition, a structure that enables reset in a short period of time increases dark noise, resulting in a trade-off. This structure is therefore difficult.

[0092] Fig. 16 illustrates an operation example of the imaging element 10. (A) illustrates the potential at the accumulation electrode 21B, (B) illustrates the potential at the floating diffusion FD1 (readout electrode 21A), and (C) illustrates the potential at the gate (Gsel) of the reset transistor TR1rst. In the imaging element 10, respective voltages are individually applied to the readout electrode 21A and the accumulation electrode 21B.

[0093] In the imaging element 10, the drive circuit applies a potential V1 to the readout electrode 21A and applies a potential V2 to the accumulation electrode 21B in an accumulation period. Here, it is assumed that the potentials V1 and V2 satisfy V2>V1. This allows charge carriers (signal charge: electrons) generated by photoelectric conversion to be attracted to the accumulation electrode 21B and accumulated in a region of the semiconductor layer 23 opposite to the accumulation electrode 21B (accumulation period). Incidentally, the value of the potential in the region of the semiconductor layer 23 opposite to the accumulation electrode 21B becomes more negative with the elapse of the photoelectric conversion time. Note that holes are sent from the upper electrode 25 to the drive circuit.

[0094] In the imaging element 10, a reset operation is performed in the latter half of the accumulation period. Specifically, at time t1, a sampling section changes the voltage of a reset signal RST from a low level to a high level. This brings the reset transistor TR1rst into an ON state in the unit pixel P. As a result, the voltage of the floating diffusion FD1 is set to a power supply voltage, and the voltage of the floating diffusion FD1 is reset (reset period).

[0095] After the reset operation is completed, the carriers are read. Specifically, the drive circuit applies a potential V3 to the sense electrode 21A and applies a potential V4 to the accumulation electrode 21B at a time t2. Here, it is assumed that the potentials V3 and V4 satisfy V3<V4. This allows the carriers accumulated in the region corresponding to the accumulation electrode 21B to be read from the sense electrode 21A to the floating diffusion FD1. That is, the carriers accumulated in the semiconductor layer 23 are read to the controller (transfer period).

[0096] The drive circuit applies the potential V1 to the readout electrode 21A and reapplies the potential V2 to the accumulation electrode 21B after the readout operation is completed. This allows charge carriers generated by photoelectric conversion to be attracted to the accumulation electrode 21B and accumulated in the region of the photoelectric conversion layer 24 opposite to the accumulation electrode 21B (accumulation period). (Detecting the blue color signal and the red color signal by the photoelectric conversion areas 32B and 32R)

[0097] Subsequently, the blue light and the red light of the light beams transmitted through the photoelectric conversion section 20 are respectively absorbed and photoelectrically converted in order by the photoelectric conversion region 32B and the photoelectric conversion region 32R. In the photoelectric conversion region 32B, electrons corresponding to the incident blue light are accumulated in an n-type region of the photoelectric conversion region 32B, and the accumulated electrons are transferred to the floating diffusion FD2 through the transfer transistor Tr2. Similarly, in the photoelectric conversion region 32R, electrons corresponding to the incident red light are accumulated in an n-type region of the photoelectric conversion region 32R, and the accumulated electrons are transferred to the floating diffusion FD3 through the transfer transistor Tr3. (1-4. Functions and Effects)

[0098] The imaging member 10 according to the present embodiment includes the semiconductor layer 23 between the lower electrode 21 and the photoelectric conversion layer 24 in the photoelectric conversion section 20. The lower electrode 21 includes the readout electrode 21A and the accumulation electrode 21B. The semiconductor layer 23 includes the first layer 23A and the second layer 23B stacked in this order from the lower electrode 11 side. The thickness of the first layer 23A is smaller than the thickness of the second layer 23B and is set to 3 nm or more and 5 nm or less. This reduces the influence of a fixed electric charge on the surface of the semiconductor layer 23 while maintaining carrier conduction in the semiconductor layer 23. This will be described below.

[0099] In recent years, a stacked imaging element in which a plurality of photoelectric conversion portions are stacked in the vertical direction has been developed as an imaging element constituting a CCD image sensor, a CMOS image sensor, or the like. The stacked imaging element has a configuration in which two photoelectric conversion regions each including a photodiode (PD) are formed to be stacked in, for example, a silicon (Si) substrate, and a photoelectric conversion portion including a photoelectric conversion layer comprising an organic material is provided over the Si substrate.

[0100] The stacked imaging element is required to have a structure that accumulates and transfers signal charge generated by each of the photoelectric conversion portions. For example, among a pair of electrodes arranged to oppose each other with the photoelectric conversion layer interposed therebetween, the electrode on one side of the photoelectric conversion region is configured by two electrodes of a first electrode and a charge accumulation electrode in the organic photoelectric conversion portion. This makes it possible to accumulate signal charge generated by the photoelectric conversion layer. Such an imaging element temporarily accumulates signal charge above the charge accumulation electrode and then transfers the signal charge to the floating diffusion FD in the Si substrate.This allows a charge accumulation section to be completely depleted and charge carriers to be erased at the beginning of exposure. This makes it possible to suppress the occurrence of phenomena such as an increase in kTC noise, a deterioration in random noise, and a reduction in the image quality of a captured image.

[0101] Incidentally, an imaging member including a plurality of electrodes on the photoelectric conversion region side is provided with a compound oxide layer comprising indium gallium zinc compound oxide (IGZO) between the photoelectric conversion layer and the first electrode comprising the charge accumulation electrode as described above. This achieves an improvement in photoresponse sensitivity. The compound oxide layer has a two-layer structure and is provided for the purpose of preventing stagnation of charge carriers from the photoelectric conversion layer to the compound oxide layer. However, the compound oxide layer is a cause of deterioration in reliability.It is suspected that the deterioration of reliability is caused by a frequent oxygen defect in an oxide semiconductor layer (a lower layer) provided on a side of the first electrode and by a fixed electric charge on a surface of the oxide semiconductor layer (an upper layer) provided on a side of the photoelectric conversion layer.

[0102] In contrast, in the present embodiment, the semiconductor layer 23 is provided between the lower electrode 21 and the photoelectric conversion layer 24. The lower electrode 21 includes the readout electrode 21A and the accumulation electrode 21B. The semiconductor layer 23 includes the first layer 23A and the second layer 23B stacked in this order from the lower electrode 11 side. The thickness of the first layer 23A is smaller than the thickness of the second layer 23B and is set to 3 nm or more and 5 nm or less. This reduces the oxygen defect in the first layer 23A, making it possible to maintain carrier conduction in the semiconductor layer 23.In addition, allowing the second layer 23B to have a thicker film than the first layer 23A (setting the ratio (t1 / t2) between the thickness (t1) of the first layer 23A and the thickness (t2) of the second layer 23B to 0.16 or less) reduces the influence of a fixed electric charge on the surface of the semiconductor layer 23, thereby reducing the amount of variation of the threshold voltage (Vth).

[0103] As described above, it is possible for the imaging element 10 of the present embodiment to improve reliability.

[0104] Next, modification examples (Modification Examples 1 to 5) of the present disclosure will be described. Hereinafter, components similar to those of the previous embodiment are denoted by the same reference numerals, and descriptions thereof will be omitted where appropriate. <2. Modification Examples>(2-1. Modification Example 1)

[0105] Fig. 17 schematically illustrates a sectional configuration of a main part (a photoelectric conversion portion 20A) of an imaging member according to Modification Example 1 of the present disclosure. The photoelectric conversion portion 20A according to the present modification example differs from that of the previous embodiment in that a protective layer 29 is provided between the semiconductor layer 23 and the photoelectric conversion layer 24.

[0106] The protective layer 29 is provided to prevent desorption of oxygen from the oxide semiconductor material forming the semiconductor layer 23. Examples of a material forming the protective layer 29 include TiO 2 , titanium silicide oxide (TiSiO), niobium oxide (Nb 2 O 5 ), TaO xand the like. For example, one atomic layer is effective for the thickness of the protective layer 29. The protective layer 29 preferably has a thickness of 0.5 nm or more and 10 nm or less, for example.

[0107] In this way, in the present modification example, the protective layer 29 is provided between the semiconductor layer 23 and the photoelectric conversion layer 24. This makes it possible to reduce the desorption of oxygen from the surface of the semiconductor layer 23. This reduces the generation of a trap at the interface between the semiconductor layer 23 (particularly, the second layer 23B) and the photoelectric conversion layer 24. In addition, it becomes possible to prevent signal charge (electrons) from flowing back to the photoelectric conversion layer 24 from one side of the semiconductor layer 23. This achieves an effect of enabling suppression of a reduction in reliability caused by the desorption of oxygen, in addition to the effects of the previous embodiment. (2-2. Modification Example 2)

[0108] Fig. 18 schematically illustrates a sectional configuration of a main part (a photoelectric conversion portion 20B) of an imaging member according to Modification Example 2 of the present disclosure. The photoelectric conversion portion 20B according to the present modification example further includes a third layer 23C on the second layer 23B in addition to the components of the photoelectric conversion portion 20A according to the foregoing Modification Example 1.

[0109] In the semiconductor layer 23 according to the present modification example, the first layer 23A, the second layer 23B, and the third layer 23C are stacked in this order from the lower electrode 21 side. The first layer 23A and the second layer 23B have configurations similar to those of the previous embodiment.

[0110] The third layer 23C is provided to suppress oxygen deficiency in the semiconductor layer 23 and has an amorphous property. In the same way as the first layer 23A and the second layer 23B, the third layer 23C can be formed using an indium oxide semiconductor. Specific examples thereof include IGZO and IGO. The bond of zinc (Zn) to oxygen (O) is weaker than that of indium (In), and thus, forming the third layer 23C using IGO that does not contain Zn makes it possible to suppress oxygen deficiency in the semiconductor layer 23. The third layer 23C has a thickness of, for example, 1 nm or more and 10 nm or less. The third layer 23C corresponds to a specific example of a "third layer" of the present disclosure.

[0111] Thus, in the present modification example, the semiconductor layer 23 has a three-layer structure of the first layer 23A, the second layer 23B, and the third layer 23C. Furthermore, the protective layer 29 is provided between the semiconductor layer 23 and the photoelectric conversion layer 24. This makes it possible to further prevent the desorption of oxygen from the surface of the semiconductor layer 23 (particularly the third layer 23C), thus further improving reliability.

[0112] Furthermore, the present technology is also applicable to an imaging element having the following configurations. (2-3. Modification Example 3)

[0113] Fig. 19A schematically illustrates a sectional configuration of an imaging element 10A according to Modification Example 3 of the present disclosure.

[0114] Fig. Figure 19B schematically illustrates an example of a planar configuration of the Fig. 19A illustrated imaging element 10A. Fig. 19A illustrates a section along a Fig. 19B. The imaging element 10A is a stacked imaging element in which, for example, a photoelectric conversion region 32 and an organic photoelectric conversion part 60 are stacked. In the pixel section 1A of an imaging device (e.g., the imaging device 1) including this imaging element 10A, the pixel unit 1a including four pixels arranged in two rows × two columns serves as a repeating unit and is repeatedly arranged in an array including the row direction and the column direction.

[0115] The imaging element 10A according to the present modification example is provided with color filters 55 over the photoelectric conversion portions 60 (light incident side S1) for the respective unit pixels P. The respective color filters 55 selectively transmit red light (R), green light (G), and blue light (B). Specifically, in the pixel unit 1a including four pixels arranged in two rows × two columns, two color filters each selectively transmitting green light (G) are arranged on a diagonal line, and color filters selectively transmitting red light (R) and blue light (B) are individually arranged on orthogonal diagonal lines. The unit pixels (Pr, Pg, and Pb) provided with the respective color filters each detect corresponding color light, for example, in the photoelectric conversion portion 60.That is, the respective pixels (Pr, Pg and Pb) that detect red light (R), green light (G) and blue light (B) are arranged in a Bayer arrangement in the pixel section 1A.

[0116] The photoelectric conversion section 60 includes, for example, a lower electrode 61, an insulating layer 62, a semiconductor layer 63, a photoelectric conversion layer 64, and an upper electrode 65. The lower electrode 61, the insulating layer 62, the semiconductor layer 63, the photoelectric conversion layer 64, and the upper electrode 65 each have a configuration similar to that of the photoelectric conversion section 20 according to the previous embodiment. The photoelectric conversion region 32 detects light in a wavelength range different from that of the photoelectric conversion section 60.

[0117] In the imaging element 10A, light rays (red light (R), green light (G), and blue light (B)) in a visible light range among the light rays transmitted through the color filters 55 are absorbed by the photoelectric conversion portions 60 of the unit pixels (Pr, Pg, and Pb) provided with the respective color filters. Other light, for example, light (infrared light (IR)) in an infrared light range (e.g., 700 nm or more and 1000 nm or less), is transmitted through the photoelectric conversion portions 60. The infrared light (IR) transmitted through the photoelectric conversion portion 60 is detected by the photoelectric conversion region 32 of each of the unit pixels Pr, Pg, and Pb. Each of the unit pixels Pr, Pg, and Pb generates signal charge corresponding to the infrared light (IR).That is, the imaging device 1 including the imaging element 10A is capable of simultaneously generating both a visible light image and an infrared light image. (2-4. Modification Example 4)

[0118] Fig. 20A schematically illustrates a sectional configuration of an imaging member 10B according to Modification Example 4 of the present disclosure. Fig. Figure 20B schematically illustrates an example of a planar configuration of the Fig. 20A illustrated imaging element 10B. Fig. Figure 20A illustrates a section along a Fig. 20B. In the above-described Modification Example 7, the example in which the color filters 55 that selectively transmit red light (R), green light (G), and blue light (B) are provided over the photoelectric conversion portions 60 (light incident side S1) was described, but the color filters 55 may be provided respectively between the photoelectric conversion region 32 and the photoelectric conversion portion 60, as shown in, for example, Fig. 20A illustrates.

[0119] For example, the imaging element 10B has a configuration in which color filters (color filter 55R), each of which selectively transmits at least red light (R), and color filters (color filter 55B), each of which selectively transmits at least blue light (B), are arranged on the respective diagonal lines in the pixel unit 1a. The photoelectric conversion section 60 (photoelectric conversion layer 64) is configured to selectively absorb a wavelength corresponding to green light, for example, in the same manner as the previous embodiment. This allows the photoelectric conversion sections 60 and the respective photoelectric conversion regions (photoelectric conversion regions 32R and 32G) arranged under the color filters 55R and 55B to detect signals corresponding to R, G, and B.The imaging element 10B according to the present modification example allows the respective photoelectric conversion sections of R, G, and B to each have a larger area than that of the imaging element having a typical Bayer arrangement. This makes it possible to improve the S / N ratio. (2-5. Modification Example 5)

[0120] Fig. 21 schematically illustrates a sectional configuration of an imaging member 10C according to Modification Example 5 of the present disclosure. In the imaging member 10C of the present modification example, two photoelectric conversion parts 20 and 80 and a photoelectric conversion region 32 are stacked in the vertical direction.

[0121] The photoelectric conversion sections 20 and 80 and the photoelectric conversion area 32 selectively detect light rays in wavelength ranges different from each other to perform photoelectric conversion. For example, the photoelectric conversion section 20 detects a green (G) color signal. For example, the photoelectric conversion section 80 detects a blue (B) color signal. For example, the photoelectric conversion area 32 detects a red (R) color signal. This allows the imaging element 10C to detect a variety of types of color signals in one pixel without using a color filter.

[0122] The photoelectric conversion part 80 is stacked, for example, above the photoelectric conversion part 20. In the same manner as the photoelectric conversion part 20, the photoelectric conversion part 80 has a configuration in which a lower electrode 81, a semiconductor layer 83, a photoelectric conversion layer 84, and an upper electrode 85 are stacked in this order from the first surface 30A side of the semiconductor substrate 30. The semiconductor layer 83 includes, for example, a first semiconductor layer 83A and a second semiconductor layer 83B. In the same manner as the photoelectric conversion part 20, the lower electrode 81 is configured by a readout electrode 81A and an accumulation electrode 81B. The lower electrode 81 is electrically separated by an insulating layer 82. The insulating layer 82 is provided with an opening 82H on the readout electrode 81A.An interlayer insulating layer 87 is provided between the photoelectric conversion portion 80 and the photoelectric conversion portion 20.

[0123] A through electrode 88 is coupled to the readout electrode 81A. The through electrode 88 penetrates the interlayer insulating film 87 and the photoelectric conversion portion 20 and is electrically coupled to the readout electrode 21A of the photoelectric conversion portion 20. Further, the readout electrode 81A is electrically coupled to the floating diffusion FD provided in the semiconductor substrate 30 via the through electrodes 34 and 88, thereby allowing carriers generated in the photoelectric conversion layer 84 to be temporarily accumulated. Furthermore, the readout electrode 81A is electrically coupled to the amplifier transistor AMP or the like provided in the semiconductor substrate 30 via the through electrodes 34 and 88. <3. Application examples>(Application example 1)

[0124] Fig. 22 illustrates an example of an overall configuration of an imaging device (imaging device 1) using the Fig. 1 or other drawings (e.g., imaging element 10).

[0125] The imaging device 1 is, for example, a CMOS image sensor. The imaging device 1 receives incident light (image light) from an object through an optical lens system (not shown) and converts the amount of incident light formed as an image on an imaging surface into electrical signals in units of pixels to output the electrical signals as pixel signals. The imaging device 1 includes the pixel portion 1A as an imaging surface on the semiconductor substrate 30. In addition, the imaging device 1 includes, for example, a vertical drive circuit 111, the column signal processing circuit 112, a horizontal drive circuit 113, an output circuit 114, a control circuit 115, and an input / output terminal 116 in a peripheral region of this pixel portion 1A.

[0126] The pixel section 1A includes, for example, the plurality of unit pixels P arranged two-dimensionally in a matrix. The unit pixels P are provided, for example, with a pixel drive line Lread (specifically, a row selection line and a reset control line) for each of the pixel rows and with a vertical signal line Lsig for each of the pixel columns. The pixel drive line Lread transmits drive signals for reading signals from the pixels. One end of the pixel drive line Lread is coupled to an output end of the vertical drive circuit 111 corresponding to each of the rows.

[0127] The vertical drive circuit 111 is a pixel drive section configured by a shift register, an address decoder, and the like, and drives the unit pixels P of the pixel section 1A, for example, row by row. Signals output from the respective unit pixels P in the pixel rows selectively scanned by the vertical drive circuit 111 are supplied to the column signal processing circuit 112 through the respective vertical signal lines Lsig. The column signal processing circuit 112 is configured by an amplifier, a horizontal selection switch, and the like provided for each of the vertical signal lines Lsig.

[0128] The horizontal drive circuit 113 is configured by a shift register, an address decoder, and the like. The horizontal drive circuit 113 sequentially drives horizontal selection switches of the column signal processing circuit 112 while scanning the horizontal selection switches. The selective scanning by this horizontal drive circuit 113 causes signals of the respective pixels transmitted through the respective vertical signal lines Lsig to be sequentially output to a horizontal signal line 121 and causes the signals to be transmitted to the outside of the semiconductor substrate 30 through the horizontal signal line 121.

[0129] The output circuit 114 performs signal processing on signals sequentially supplied from the respective column signal processing circuits 112 via the horizontal signal line 121 and outputs the signals. For example, the output circuit 114 performs only buffering in some cases, and in other cases performs black level adjustment, column variation correction, various types of digital signal processing, and the like.

[0130] The circuit portion including the vertical drive circuit 111, the column signal processing circuit 112, the horizontal drive circuit 113, the horizontal signal line 121, and the output circuit 114 may be formed directly on the semiconductor substrate 30 or may be provided on an external control IC. Additionally, the circuit portion may be formed in another substrate coupled by a cable or the like.

[0131] The control circuit 115 receives a clock supplied from the outside of the semiconductor substrate 30, data for an instruction about an operation mode, and the like, and also outputs data such as internal information on the imaging device 1. The control circuit 115 further includes a timing generator that generates various timing signals and controls the driving of the peripheral circuits, including the vertical driving circuit 111, the column signal processing circuit 112, the horizontal driving circuit 113, and the like, based on the various timing signals generated by the timing generator.

[0132] The input / output port 116 exchanges signals with the outside. (Application example 2)

[0133] In addition, the imaging device 1 described above is applicable, for example, to various types of electronic devices including an imaging system such as a digital still camera and a video camera, a mobile phone with an imaging function, or other device with an imaging function.

[0134] Fig. 23 is a block diagram illustrating an example of a configuration of an electronic device 1000.

[0135] As in Fig. 23, the electronic device 1000 includes an optical system 1001, the imaging device 1, and a DSP (Digital Signal Processor) 1002, and has a configuration in which the DSP 1002, a memory 1003, a display device 1004, a recording device 1005, an operating system 1006, and a power supply system 1007 are coupled to each other via a bus 1008, thereby making it possible to capture a still image and a moving image.

[0136] The optical system 1001 includes one or a plurality of lenses and receives incident light (image light) from an object to form an image on an imaging surface of the imaging device 1.

[0137] The imaging device 1 described above is used as the imaging device 1. The imaging device 1 converts the amount of incident light formed as an image on the imaging surface by the optical system 1001 into electrical signals in units of pixels and supplies the electrical signals to the DSP 1002 as pixel signals.

[0138] The DSP 1002 performs various types of signal processing on the signals from the imaging device 1 to capture an image and causes the memory 1003 to temporarily store data on the image. The image data stored in the memory 1003 is recorded in the recording device 1005 or is supplied to the display device 1004 to display the image. In addition, the operating system 1006 receives various operations from the user and supplies operation signals to the respective blocks of the electronic device 1000. The power supply system 1007 supplies electric power required to drive the respective blocks of the electronic device 1000. (Application example 3)

[0139] Fig. 24A schematically illustrates an example of an overall configuration of a photodetection system 2000 including the imaging device 1. Fig. 24B illustrates an example of a circuit configuration of the photodetection system 2000. The photodetection system 2000 includes a light-emitting device 2001 as a light source unit that emits infrared light L2, and a photodetector 2002 as a light-receiving unit including a photoelectric conversion element. The above-described imaging device 1 can be used as the photodetector 2002. The photodetection system 2000 may further include a system control unit 2003, a light source drive unit 2004, a sensor control unit 2005, a light source-side optical system 2006, and a camera-side optical system 2007.

[0140] The photodetector 2002 is capable of detecting light L1 and light L2. The light L1 is reflected light from outside ambient light, which is reflected from an object (measurement target) 2100 ( Fig. 24A). The light L2 is light reflected by the object 2100 after being emitted from the light-emitting device 2001. The light L1 is, for example, visible light, and the light L2 is, for example, infrared light. The light L1 is detectable at the photoelectric conversion section in the photodetector 2002, and the light L2 is detectable at a photoelectric conversion region in the photodetector 2002. It is possible to acquire image information about the object 2100 from the light L1 and acquire information about a distance between the object 2100 and the photodetection system 2000 from the light L2. For example, the photodetection system 2000 may be mounted on an electronic device such as a smartphone or on a mobile body such as a car.The light-emitting device 2001 may be configured, for example, by a semiconductor laser, a surface-emitting semiconductor laser, or a vertical cavity surface-emitting laser (VCSEL). An iTOF method may be used as a method for the photodetector 2002 to detect the light L2 emitted from the light-emitting device 2001; however, this is not limiting. In the iTOF method, the photoelectric conversion section is capable of measuring a distance to the object 2100, for example, by time-of-flight (TOF). As a method for the photodetection device 2002 to detect the light L2 emitted from the light-emitting device 2001, it is possible to use, for example, a structured light method or a stereo vision method.For example, in the structured light method, light with a predetermined pattern is projected onto the object 2100, and distortion of the pattern is analyzed, making it possible to measure the distance between the photodetection system 2000 and the object 2100. In addition, in the stereovision method, for example, two or more cameras are used to capture two or more images of the object 2100 viewed from two or more different viewpoints, making it possible to measure the distance between the photodetection system 2000 and the object. Note that it is possible for the system control unit 2003 to synchronously control the light-emitting device 2001 and the photodetector 2002. <4. Practical Application Examples> (Example of a practical application to an endoscopic surgery system)

[0141] The technology according to an embodiment of the present disclosure (present technology) is applicable to various products. For example, the technology according to an embodiment of the present disclosure can be applied to a system for endoscopic surgery.

[0142] Fig. 25 is a view illustrating an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (present technology) can be applied.

[0143] In Fig. 25 illustrates a state in which a surgeon (doctor) 11131 uses an endoscopic surgery system 11000 to perform surgery on a patient 11132 on a patient bed 11133. As shown, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical instruments 11110 such as a pneumoperitoneum tube 11111 and an energy treatment device 11112, a support arm device 11120 supporting the endoscope 11100 thereon, and a trolley 11200 on which various endoscopic surgery devices are mounted.

[0144] The endoscope 11100 includes a lens tube 11101 having a region of a predetermined length from a distal end thereof to be inserted into a body cavity of the patient 11132, and a camera head 11102 connected to a proximal end of the lens tube 11101. In the illustrated example, the endoscope 11100 is shown as including a rigid endoscope with the hard-type lens tube 11101. However, the endoscope 11100 may otherwise be incorporated as a flexible endoscope with the flexible-type lens tube 11101.

[0145] The lens barrel 11101 has an opening at a distal end thereof, into which an objective lens is fitted. A light source device 11203 is connected to the endoscope 11100 such that light generated by the light source device 11203 is introduced into a distal end of the lens barrel 11101 through a light guide extending inside the lens barrel 11101 and radiated through the objective lens toward an observation target in a body cavity of the patient 11132. Note that the endoscope 11100 may be a straight-view endoscope, an oblique-view endoscope, or a side-view endoscope.

[0146] An optical system and an image pickup element are provided inside the camera head 11102 such that reflected light (observation light) from the observation target is condensed by the optical system onto the image pickup element. The observation light is photoelectrically converted by the image pickup element to generate an electrical signal corresponding to the observation light, namely, an image signal corresponding to an observation image. The image signal is transmitted as raw data to a CCU 11201.

[0147] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), or the like, and integrally controls the operation of the endoscope 11100 and a display device 11202. Further, the CCU 11201 receives an image signal from the camera head 11102 and performs various image processes for displaying an image based on the image signal, such as a demosaic process.

[0148] The display device 11202 displays thereon an image based on an image signal for which the image processes have been performed by the CCU 11201, under a control of the CCU 11201.

[0149] The light source device 11203 includes a light source, such as a light-emitting diode (LED), and supplies irradiation light to the endoscope 11100 when imaging a surgical area.

[0150] An input device 11204 is an input interface for the endoscopic surgery system 11000. A user can input various types of information or instructions to the endoscopic surgery system 11000 via the input device 11204. For example, the user would input an instruction or the like to change an image acquisition condition (type of irradiation light, magnification, focal length, or the like) by the endoscope 11100.

[0151] A treatment instrument control device 11205 controls a drive of the energy treatment device 11112 for cauterizing or cutting a tissue, occluding a blood vessel, or the like. A pneumoperitoneum device 11206 introduces gas into a body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to expand the body cavity, ensure the field of view of the endoscope 11100, and ensure the working space for the surgeon. A recording device 11207 is a device capable of recording various types of information related to a surgical procedure. A printer 11208 is a device capable of printing various types of information related to a surgical procedure in various forms such as text, images, or graphics.

[0152] It is particularly noteworthy that the light source device 11203, which supplies irradiation light to the endoscope 11100 when imaging a surgical area, may include a white light source, for example, an LED, a laser light source, or a combination thereof. When a white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output timing can be controlled with a high degree of accuracy for each color (each wavelength), adjustment of the white balance of a captured image can be performed by the light source device 11203. Furthermore, in this case, when laser beams from the respective RGB laser light sources are irradiated at an observation target in a time-division manner, driving of the image pickup elements of the camera head 11102 is controlled in synchronization with the irradiation timing.Then, images corresponding individually to the R, G, and B colors can also be captured in a time-division manner. According to this method, a color image can be obtained even if no color filters are provided for the image pickup element.

[0153] Furthermore, the light source device 11203 can be controlled to change the intensity of the emitted light every predetermined time. By controlling the driving of the image pickup element of the camera head 11102 in synchronization with the timing of the change in the intensity of the light to capture images in a time-division manner and synthesizing the images, a high dynamic range image free from underexposed blocked shadows and overexposed highlights can be generated.

[0154] Furthermore, the light source device 11203 may be configured to supply light having a predetermined wavelength band suitable for special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in body tissue to irradiate light of a narrow band compared with irradiation light in ordinary observation (namely, white light), narrow-band observation (narrow-band imaging) is performed to image a predetermined tissue such as a blood vessel or a surface region of the mucosal membrane in high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescent light formed by irradiation with excitation light.In fluorescence observation, it is possible to perform observation of fluorescent light from a body tissue by irradiating excitation light onto the body tissue (autofluorescence observation), or to obtain a fluorescent light image by locally injecting a reagent such as indocyanine green (ICG) into a body tissue and irradiating excitation light corresponding to a fluorescence wavelength of the reagent onto the body tissue. The light source device 11203 may be configured to provide such narrow-band light and / or excitation light suitable for special light observation as described above.

[0155] Fig. 26 is a block diagram showing an example of a functional configuration of the camera head 11102 and the Fig. 25 represents the CCU 11201.

[0156] The camera head 11102 includes a lens unit 11401, an image pickup unit 11402, a drive unit 11403, a communication unit 11404, and a camera head control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera head 11102 and the CCU 11201 are connected to each other for communication by a transmission cable 11400.

[0157] The lens unit 11401 is an optical system provided at a junction with the lens barrel 11101. Observation light received by a distal end of the lens barrel 11101 is guided to the camera head 11102 and introduced into the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses, including a zoom lens and a focusing lens.

[0158] The number of image pickup elements included in the image pickup unit 11402 may be one (single-plate type) or a plurality (multi-plate type). For example, when the image pickup unit 11402 is configured as the multi-plate type, image signals corresponding to respective R, G, and B are generated by the image pickup elements, and the image signals may be synthesized to obtain a color image. The image pickup unit 11402 may also be configured to include a pair of image pickup elements for acquiring respective image signals for the right eye and the left eye, suitable for three-dimensional (3D) display. When 3D display is performed, the depth of a living body tissue in a surgical area can be more accurately recognized by the surgeon 11131.Note that when the image pickup unit 11402 is configured like that of the stereoscopic type, a plurality of systems of lens units 11401 are provided corresponding to the individual image pickup elements.

[0159] Furthermore, the image pickup unit 11402 does not necessarily have to be provided on the camera head 11102. For example, the image pickup unit 11402 may be provided immediately behind the objective lens inside the lens barrel 11101.

[0160] The control unit 11403 includes an actuator and, under the control of the camera head control unit 11405, moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along an optical axis. Consequently, the magnification and focus of a captured image can be appropriately adjusted by the image pickup unit 11402.

[0161] The communication unit 11404 includes a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits an image signal acquired by the image acquisition unit 11402 as raw data to the CCU 11201 via the transmission cable 11400.

[0162] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera head 11102 from the CCU 11201 and supplies the control signal to the camera head control unit 11405. The control signal includes information related to image capturing conditions, such as information that a frame rate of a captured image is determined, information that an exposure value is determined in image capturing, and / or information that a magnification and a focal point of a captured image are determined.

[0163] Note that image acquisition conditions such as frame rate, exposure value, magnification, or focal point can be specified by the user or automatically adjusted by the control unit 11413 of the CCU 11201 based on a captured image signal. In the latter case, an automatic exposure (AE) function, an automatic focus (AF) function, and an automatic white balance (AWB) function are integrated into the endoscope 11100.

[0164] The camera head control unit 11405 controls the driving of the camera head 11102 based on a control signal from the CCU 11201 received by the communication unit 11404.

[0165] The communication unit 11411 includes a communication device for transmitting and receiving various types of information to and from the camera head 11102. The communication unit 11411 receives an image signal transmitted thereto from the camera head 11102 via the transmission cable 11400.

[0166] Furthermore, the communication unit 11411 transmits a control signal for controlling the driving of the camera head 11102 to the camera head 11102. The image signal and the control signal may be transmitted by electrical communication, optical communication, or the like.

[0167] The image processing unit 11412 performs various image processes on an image signal in the form of raw data transmitted to it from the camera head 11102.

[0168] The control unit 11413 performs various types of control related to the image acquisition of a surgical area or the like by the endoscope 11100 and the display of an acquired image obtained by the image acquisition of the surgical area or the like. For example, the control unit 11413 generates a control signal for controlling the drive of the camera head 11102.

[0169] Further, based on an image signal for which image processing has been performed by the image processing unit 11412, the control unit 11413 controls the display device 11202 to display a captured image depicting the area of ​​a surgical operation or the like. Then, the control unit 11413 can recognize various objects in the captured image using various image recognition technologies. For example, the control unit 11413 can recognize a surgical instrument such as forceps, a specific area of ​​a living body, bleeding, haze when the energy treatment device 11112 is used, and so on by recognizing the shape, color, and so on of edges of objects included in a captured image.The control unit 11413 can cause, when controlling the display device 11202 to display a captured image, various types of surgically assisting information to be displayed in an overlapping manner with an image of the surgical operation area using a detection result. When surgically assisting information is displayed in an overlapping manner and presented to the surgeon 11131, the burden on the surgeon 11131 can be reduced, and the surgeon 11131 can continue the surgical operation safely.

[0170] The transmission cable 11400 connecting the camera head 11102 and the CCU 11201 is an electrical signal cable suitable for communication of electrical signals, an optical fiber suitable for optical communication, or a composite cable suitable for both electrical and optical communication.

[0171] Although in the illustrated example, communication is performed by wired communication using the transmission cable 11400, communication between the camera head 11102 and the CCU 11201 may be performed by wireless communication.

[0172] An example of the endoscopic surgery system to which the technology according to an embodiment of the present disclosure is applicable has been described above. The technology according to an embodiment of the present disclosure is applicable, for example, to the image pickup unit 11402 of the configurations described above. Applying the technology according to an embodiment of the present disclosure to the image pickup unit 11402 makes it possible to improve detection accuracy.

[0173] It should be noted that although the system for endoscopic surgery has been described here as an example, the technology according to an embodiment of the present disclosure can also be applied to, for example, a system for microscopic surgery and the like. (Example of a practical application on a mobile body)

[0174] The technology according to an embodiment of the present disclosure (present technology) is applicable to various products. For example, the technology according to an embodiment of the present disclosure can be implemented in the form of a device to be mounted on any type of mobile body. Non-limiting examples of the mobile body may include an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an aircraft, an unmanned aerial vehicle (drone), a ship, a robot, a construction machine, and an agricultural machine (tractor).

[0175] Fig. 27 is a block diagram illustrating an example of a schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to an embodiment of the present disclosure can be applied.

[0176] The vehicle control system 12000 comprises a plurality of electronic control units that are interconnected via a communication network 12001. In the Fig. 27, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output section 12052, and an interface (I / F) 12053 of the vehicle-mounted network are illustrated as a functional configuration of the integrated control unit 12050.

[0177] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various types of programs. For example, the drive system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a drive motor, or the like, a driving force transmission mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0178] The body system control unit 12020 controls the operation of various types of devices provided on a vehicle body according to various types of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, an automatic window device, or various types of lights such as a headlight, a taillight, a brake light, a turn signal, a fog light, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals from various types of switches can be input to the body system control unit 12020.The body system control unit 12020 receives these input radio waves or signals and controls a door locking device, the automatic window device, the lights or the like of the vehicle.

[0179] The vehicle-external information detection unit 12030 detects information about the external environment of the vehicle including the vehicle control system 12000. For example, the vehicle-external information detection unit 12030 is connected to an imaging section 12031. The vehicle-external information detection unit 12030 causes the imaging section 12031 to capture an image of the vehicle's external environment and receives the captured image. Based on the received image, the vehicle-external information detection unit 12030 can perform processing for detecting an object such as a person, a vehicle, an obstacle, a traffic sign, a sign on a road surface, or the like, or processing for detecting a distance thereto.

[0180] The imaging section 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to a received amount of light. The imaging section 12031 may output the electrical signal as an image, or may output the electrical signal as information about a measured distance. In addition, the light received by the imaging section 12031 may be visible light, or may be invisible light, such as infrared rays or the like.

[0181] The vehicle interior information detection unit 12040 detects information about the interior of the vehicle. The vehicle interior information detection unit 12040 is connected, for example, to a driver condition detection section 12041 that detects the condition of a driver. The driver condition detection section 12041 includes, for example, a camera that records the driver. Based on detection information input from the driver condition detection section 12041, the vehicle interior information detection unit 12040 can calculate a driver's fatigue level or a driver's concentration level, or can determine whether the driver is dozing.

[0182] The microcomputer 12051 may calculate a control target value for the driving force generating device, the steering mechanism, or the braking device based on the information about the interior or exterior of the vehicle obtained by the vehicle outside information detecting unit 12030 or the vehicle inside information detecting unit 12040, and output a control command to the drive system control unit 12010.For example, the microcomputer 12051 may perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS), the functions of which include collision avoidance or impact mitigation for the vehicle, following travel based on a following distance, constant speed travel, vehicle collision warning, vehicle lane departure warning, or the like.

[0183] In addition, the microcomputer 12051 can perform cooperative control intended for automatic driving that makes the vehicle drive autonomously without depending on driver intervention or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like based on the information about the external environment or the interior of the vehicle, the information being obtained by the outside-vehicle information detecting unit 12030 or the inside-vehicle information detecting unit 12040.

[0184] In addition, the microcomputer 12051 may output a control command to the body system control unit 12020 based on the information about the external environment of the vehicle obtained by the external vehicle information detection unit 12030. For example, the microcomputer 12051 may perform cooperative control intended to prevent glare by controlling the headlight to switch from high beam to low beam, for example, according to the position of a preceding vehicle or an oncoming vehicle detected by the external vehicle information detection unit 12030.

[0185] The sound / image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of transmitting information optically or acoustically to an occupant of the vehicle or to the external environment of the vehicle. In the example of Fig. 27, a speaker 12061, a display section 12062, and an instrument panel 12063 are illustrated as the output device. The display section 12062 may include, for example, at least one of an in-vehicle display and a head-up display.

[0186] Fig. 28 is a diagram showing an example of the installation position of the imaging section 12031.

[0187] In Fig. 28, the imaging section 12031 includes imaging sections 12101, 12102, 12103, 12104 and 12105.

[0188] The imaging sections 12101, 12102, 12103, 12104, and 12105 are arranged, for example, at positions on a front end, side mirrors, a rear bumper, and a rear door of the vehicle 12100, and a position on an upper part of a windshield inside the vehicle. The imaging section 12101 provided at the front end and the imaging section 12105 provided at the upper part of the windshield inside the vehicle predominantly obtain an image from in front of the vehicle 12100. The imaging sections 12102 and 12103 provided at the side mirrors predominantly obtain an image from the sides of the vehicle 12100. The imaging section 12104 provided at the rear bumper or the tailgate predominantly obtains an image from behind the vehicle 12100.The imaging section 12105 provided at the upper part of the windshield inside the vehicle is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0189] Furthermore, Fig.28 illustrates an example of photographing ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided at the front end. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging sections 12102 and 12103 provided at the side mirrors. An imaging range 12114 represents the imaging range of the imaging section 12104 provided at the rear bumper or the tailgate. A bird's-eye view image of the vehicle 12100 when viewed from above is obtained, for example, by superimposing image data imaged by the imaging sections 12101 to 12104.

[0190] At least one of the imaging sections 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera formed of a plurality of imaging elements, or may be an imaging element including pixels for detecting phase differences.

[0191] For example, the microcomputer 12051 may determine a distance to each three-dimensional object within the imaging areas 12111 to 12114 and a time change of the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, in particular, as a preceding vehicle, a nearest three-dimensional object that is located on a travel path of the vehicle 12100 and that travels at a predetermined speed (for example, equal to 0 km / h or higher) in substantially the same direction as the vehicle 12100.Furthermore, the microcomputer 12051 can predetermine a following distance to be maintained from a preceding vehicle and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), or the like. Therefore, it is possible to perform cooperative control for automatic driving, which allows the vehicle to drive autonomously without depending on the driver's intervention or the like.

[0192] For example, the microcomputer 12051 can classify three-dimensional object data about three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large vehicle, a pedestrian, a telephone pole, and other three-dimensional objects based on the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional objects to automatically avoid an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually recognize and obstacles that are difficult for the driver of the vehicle 12100 to visually recognize. The microcomputer 12051 then determines a collision risk that indicates a risk of collision with each obstacle.In a situation where the collision risk is equal to or higher than a set value and thus a possibility of a collision exists, the microcomputer 12051 issues a warning to the driver via the speaker 12061 or the display section 12062 and performs forced deceleration or evasive steering via the drive system control unit 12010. The microcomputer 12051 can thereby assist driving to avoid a collision.

[0193] At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may detect a pedestrian by determining whether or not there is a pedestrian in captured images of the imaging sections 12101 to 12104. Such detection of a pedestrian is performed, for example, by a procedure for extracting characteristic points in the captured images of the imaging sections 12101 to 12104 as infrared cameras and a procedure for determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points indicating the contour of the object.When the microcomputer 12051 determines that there is a pedestrian in the captured images of the imaging sections 12101 to 12104 and thus detects the pedestrian, the audio / video output section 12052 controls the display section 12062 to display a quadrangular contour line for highlighting so as to be superimposed on the detected pedestrian. The audio / video output section 12052 can also control the display section 12062 to display an icon or the like representing the pedestrian at a desired position.

[0194] While descriptions have been given above with reference to the embodiment and modification examples 1 to 5, as well as application examples and practical application examples, the present disclosure is not limited to the foregoing embodiment and the like and can be modified in various ways. For example, in the foregoing embodiment, the imaging element has a configuration in which the photoelectric conversion section 20 detecting green light and the photoelectric conversion regions 32B and 32R detecting blue light and red light, respectively, are stacked, however, the present disclosure is not limited to such a structure. For example, red light or blue light may be detected in the photoelectric conversion section, or green light may be detected in the photoelectric conversion region.

[0195] Furthermore, the number of the photoelectric conversion section and the photoelectric conversion region and the ratio therebetween are not limitative. Two or more photoelectric conversion sections may be provided, or only one photoelectric conversion section may be used to obtain color signals of a plurality of colors.

[0196] Furthermore, the foregoing embodiment and the like illustrate the configuration of the two electrodes of the readout electrode 21A and the accumulation electrode 21B as the plurality of electrodes constituting the lower electrode 21. However, in addition to this, three or more electrodes such as a transfer electrode and a discharge electrode may be provided.

[0197] It should be noted that the effects described herein are merely exemplary and not limiting, and they may further include other effects.

[0198] It should be noted that the present technology may also have the following configurations. According to the present technology of the following configurations, a semiconductor layer including a first layer and a second layer stacked in this order from one side of a first electrode and a second electrode arranged side by side, the first layer having a thickness smaller than a thickness of the second layer and being 3 nm or more and 5 nm or less, is provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer. This reduces the influence of a fixed electric charge on a surface of the semiconductor layer while maintaining carrier conduction in the semiconductor layer. It is therefore possible to improve reliability. (1) A photoelectric conversion element comprising: a first electrode and a second electrode arranged side by side; a third electrode arranged to oppose the first electrode and the second electrode; a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode; and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, the first layer having a thickness smaller than a thickness of the second layer, the thickness of the first layer being 3 nm or more and 5 nm or less. (2) The photoelectric conversion element according to (1), wherein a ratio (t1 / t2) between a film thickness (t1) of the first layer and a film thickness (t2) of the second layer is 0.16 or less. (3) The photoelectric conversion element according to (1) or (2), wherein the first layer and the second layer are each formed using indium oxide, and a content ratio of indium contained in a first indium oxide forming the first layer is higher than a content ratio of indium contained in a second indium oxide forming the second layer. (4) The photoelectric conversion element according to any one of (1) to (3), wherein the second layer has a film thickness of 32 nm or more. (5) The photoelectric conversion element according to any one of (1) to (4), wherein the first layer and the second layer each have a crystalline property. (6) The photoelectric conversion element according to any one of (1) to (4), wherein the first layer and the second layer each have an amorphous property. (7) The photoelectric conversion element according to any one of (1) to (6), wherein the semiconductor layer further comprises a third layer having an amorphous property between the photoelectric conversion layer and the second layer. (8) The photoelectric conversion element according to (7), wherein the third layer has a film thickness of 1 nm or more and 10 nm or less. (9) The photoelectric conversion element according to any one of (1) to (8), further comprising an insulating layer provided between the first electrode and the semiconductor layer and between the second electrode and the semiconductor layer, the insulating layer having an opening above the first electrode, and the second electrode and the semiconductor layer are electrically coupled to each other via the opening. (10) The photoelectric conversion element according to any one of (1) to (9), further comprising, between the photoelectric conversion layer and the semiconductor layer, a protective layer comprising an inorganic material. (11) The photoelectric conversion element according to any one of (1) to (10), wherein the first electrode and the second electrode are arranged on a side opposite to a light incident surface with respect to the photoelectric conversion layer. (12) The photoelectric conversion element according to any one of (1) to (11), wherein respective voltages are individually applied to the first electrode and the second electrode. (13) A photodetection device comprising a plurality of pixels each comprising one or a plurality of photoelectric conversion elements, wherein the photoelectric conversion element comprises a first electrode and a second electrode arranged side by side, a third electrode arranged to be opposite to the first electrode and the second electrode, a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode, and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, the first layer having a thickness smaller than a thickness of the second layer, the thickness of the first layer being 3 nm or more and 5 nm or less. (14) The photodetection device according to (13), wherein the photoelectric conversion element further comprises one or a plurality of photoelectric conversion regions that perform photoelectric conversion of a wavelength region different from the one or a plurality of photoelectric conversion elements. (15) Photodetection device according to (14), wherein the one or more photoelectric conversion regions are formed to be embedded in a semiconductor substrate, and the one or more photoelectric conversion portions are arranged on one side of a light incident surface of the semiconductor substrate. (16) The photodetection device according to (15), wherein a multilayer wiring layer is formed on a surface of the semiconductor substrate on a side opposite to the light incident surface. (17) A photoelectric conversion element comprising: a first electrode and a second electrode arranged side by side; a third electrode arranged to oppose the first electrode and the second electrode; a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode; and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, wherein a ratio (t1 / t2) between a film thickness (t1) of the first layer and a film thickness (t2) of the second layer is 0.16 or less.

[0199] This application claims the benefit of Japanese priority patent application JP2022-039791 filed with the Japan Patent Office on March 15, 2022, the entire contents of which are incorporated herein by reference.

[0200] Those skilled in the art should understand that various modifications, combinations, sub-combinations and changes may occur depending on design requirements and other factors, provided they are within the scope of the appended claims or their equivalents. QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] WO 2019 / 035252

[0003] JP 2022-039791

[0199]

Claims

[1] Photoelectric conversion element comprising: a first electrode and a second electrode arranged side by side; a third electrode arranged to oppose the first electrode and the second electrode; a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode; and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, the first layer having a thickness smaller than a thickness of the second layer, the thickness of the first layer being 3 nm or more and 5 nm or less. [2] The photoelectric conversion element according to claim 1, wherein a ratio (t1 / t2) between a film thickness (t1) of the first layer and a film thickness (t2) of the second layer is 0.16 or less. [3] A photoelectric conversion element according to claim 1, wherein the first layer and the second layer are each formed using indium oxide, and a content ratio of indium contained in a first indium oxide forming the first layer is higher than a content ratio of indium contained in a second indium oxide forming the second layer. [4] The photoelectric conversion element according to claim 1, wherein the second layer has a film thickness of 32 nm or more. [5] The photoelectric conversion element according to claim 1, wherein the first layer and the second layer each have a crystalline property. [6] A photoelectric conversion element according to claim 1, wherein the first layer and the second layer each have an amorphous property. [7] The photoelectric conversion element according to claim 1, wherein the semiconductor layer further comprises a third layer having an amorphous property between the photoelectric conversion layer and the second layer. [8] The photoelectric conversion element according to claim 7, wherein the third layer has a film thickness of 1 nm or more and 10 nm or less. [9] The photoelectric conversion element according to claim 1, further comprising an insulating layer provided between the first electrode and the semiconductor layer and between the second electrode and the semiconductor layer, wherein the insulating layer has an opening above the first electrode, and the second electrode and the semiconductor layer are electrically coupled to each other via the opening. [10] The photoelectric conversion element according to claim 1, further comprising, between the photoelectric conversion layer and the semiconductor layer, a protective layer comprising an inorganic material. [11] The photoelectric conversion element according to claim 1, wherein the first electrode and the second electrode are arranged on a side opposite to a light incident surface with respect to the photoelectric conversion layer. [12] A photoelectric conversion element according to claim 1, wherein respective voltages are individually applied to the first electrode and the second electrode. [13] A photodetection device comprising a plurality of pixels each comprising one or a plurality of photoelectric conversion elements, wherein the photoelectric conversion element comprises a first electrode and a second electrode arranged side by side, a third electrode arranged to be opposite to the first electrode and the second electrode, a photoelectric conversion layer provided between the first electrode and the third electrode and between the second electrode and the third electrode, and a semiconductor layer provided between the first electrode and the photoelectric conversion layer and between the second electrode and the photoelectric conversion layer, the semiconductor layer comprising a first layer and a second layer stacked in this order from one side of the first electrode and the second electrode, the first layer having a thickness smaller than a thickness of the second layer, the thickness of the first layer being 3 nm or more and 5 nm or less. [14] The photodetection device according to claim 13, wherein the photoelectric conversion element further comprises one or a plurality of photoelectric conversion regions that perform photoelectric conversion of a wavelength region different from the one or the plurality of photoelectric conversion elements. [15] Photodetection device according to claim 14, wherein the one or more photoelectric conversion regions are formed to be embedded in a semiconductor substrate, and the one or more photoelectric conversion portions are arranged on one side of a light incident surface of the semiconductor substrate. [16] The photodetection device according to claim 15, wherein a multilayer wiring layer is formed on a surface of the semiconductor substrate on a side opposite to the light incident surface.

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