Fast switching microLEDs based on INGAALP or INGAALAS for high-speed data transmission

Abstract

The invention relates to a micro-LED comprising a semiconductor layer stack with a first layer of a first doping type, a second layer of a second doping type, and an active region arranged between the first and second layers. The semiconductor layer stack comprises a bottom and a top surface, as well as mesa-structured side surfaces connecting the top and bottom surfaces, and a central region with a lateral dimension that is less than half a lateral dimension of the semiconductor layer stack. Furthermore, the semiconductor layer stack comprises a material comprising at least one phosphide and one arsenide, and a current path from the first layer to the second layer through the active region is confined to the central region.

Description

[0001] The present application claims priority from German patent application DE 10 2023 115 113.4, filed on June 8, 2023, the disclosure of which is included in its entirety by reference.

[0002] The present invention relates to a µ-LED for use as a means for optical data transmission and to a method for manufacturing the µ-LED. BACKGROUND

[0003] Today's internet relies on large data centers. However, their high energy consumption poses a problem when it comes to ensuring their operation is powered exclusively by sustainable energy sources. Most of the electricity is not used for computations, but for data transmission over short distances (< 10 m): from the CPU to the GPU, from server to server, from rack to rack.

[0004] The use of micro-LEDs for optical and data transmission offers several advantages. Besides their small size, which facilitates easier connection to optical fibers, these vertical or horizontal optoelectronic components offer improved scalability and can be easily implemented in large numbers into existing designs. In this context, a micro-LED is an optoelectronic component with a diameter, or more generally, a dimension of less than 50 µm, and specifically less than 20 µm. In some specialized applications, a micro-LED can have a diameter between 1 µm and 10 µm.

[0005] Compared to conventional LEDs with larger dimensions, micro-LEDs require very little current, resulting in overall low power consumption and thus reducing heat generated during operation. This not only saves energy, making it particularly suitable for short- and medium-range connections, but also simplifies the requirements for the thermal interface material and enables a dense arrangement of such optoelectronic components. However, in addition to the requirement of high quantum efficiency to provide sufficient light, data transmission also demands high switching capability, or more generally, a large amplitude modulation depth at high frequencies. Current optical data transmission ranges from several hundred megahertz to several gigahertz, for example, in the range between 10 GHz and 50 GHz.

[0006] Consequently, current micro-LEDs within this frequency range must be switched on and off, or at least their emission amplitude modulated. Given that a light pulse requires a certain duration to be detected at the receiver, such high frequencies necessitate a radiative recombination lifetime in the range of a few tens of picoseconds or less. The radiative recombination lifetime is the time the minority charge carriers need to recombine under radiation after the current through the micro-LEDs has been switched off. Therefore, the radiative recombination lifetime directly affects the decay time of a light pulse emitted by the micro-LEDs.

[0007] Several measures have been proposed to reduce the rise and fall times during pulse- or amplitude-modulated emission, as current µ-LEDs are limited in this respect, resulting in a switching time of only a few hundred megahertz and rise and fall times of 100 ps or more.

[0008] For example, background doping can be implemented in the quantum barriers of the respective optoelectronic components to increase the charge carrier density. While this is suitable in some cases, it requires precise control during the epitaxial growth of the quantum barriers. Alternatively, non-radiative defect centers can be provided within the active region to increase non-radiative recombination, which competes with the radiative recombination of the charge carrier. However, due to the diffusion of dopants or defect centers and other properties, these induced measures are subject to reliability problems and are difficult to control during device manufacturing.

[0009] It is therefore an objective of the present invention to provide an optoelectronic component that can be used for optical data transmission with reduced energy consumption, while maintaining or even increasing the achievable data transmission rate or reducing the switching time required. SUMMARY OF THE INVENTION

[0010] This and other objectives are addressed by the subject matter of the independent claims. Features and further aspects of the proposed principles are set forth in the dependent claims.

[0011] The inventors have recognized that in optoelectronic components such as micro-LEDs based on gallium arsenide (GaAs) or indium aluminum gallium arsenide (InAlGaAs) material systems, increasing the current density through the optoelectronic component increases the charge carrier concentration in the region of radiative recombination. This leads to higher recombination rates and thus to higher switching speeds achievable with the optoelectronic component. The current density for a given current and size of the optoelectronic component is increased, in particular, by reducing the area through which the current flow passes through the active region of the optoelectronic component.

[0012] In one aspect of the proposed principle, an optoelectronic device such as a micro-LED comprises a semiconductor layer stack. The semiconductor layer stack includes a first layer with a first doping type and a second layer with a second doping type. The first doping type can, for example, be n-type doping, while the second doping type can be a corresponding p-type doping. In this respect, the first and second layers can comprise a variety of sublayers, each with different doping concentrations and doping profiles. For example, doped sublayers opposite an active region can have a higher doping concentration suitable for current distribution across the entire area of ​​the respective doped layer.

[0013] An active region is located between the first and second layers. In some aspects, the active region may comprise a simple pn junction. In others, the active region may comprise a quantum well layer. Alternatively, the active region may comprise a multiple quantum well structure with a multitude of alternating barrier layers or quantum well layers.

[0014] According to the proposed principle, the material for the semiconductor layer stack comprises gallium arsenide (GaAs) or aluminum gallium arsenide (InAlGaAs). This material combination is suitable for emitting light in the red and infrared regions of the spectrum. In this respect, the aluminum content (Al) of the aluminum gallium arsenide Al x Ga 1-xThe aluminum content of layers within the layer stack can vary with parameter x and range from 0% to 70%. In some aspects, the aluminum content varies depending on the color and can reach up to 80% in the outer layers, decreasing towards the active region. At longer wavelengths, i.e., in the infrared spectrum, the aluminum content can be 30% or less. In some aspects, the active region may contain no aluminum or less than 10%; in others, the active region may contain InAlGaAs with an In content of 0% to 50%. In this respect, an active region can comprise a multi-quantum well with barrier layers containing more than 10% aluminum and quantum well layers containing less than 10% aluminum.

[0015] The semiconductor layer stack comprises a top and a bottom opposite the top, as well as mesa-structured side faces connecting the top and bottom. The mesa-structured side faces extend from the first layer to the second layer. The side faces can be inclined at varying degrees. In some aspects, the side faces extend along a specific crystal direction, particularly one that generates few natural non-radiative recombination centers. In other aspects, the inclination of the side faces can change. In particular, the inclination of the side faces near the active region can be smaller than the inclination farther away, and especially on one of the first or second layers.

[0016] The semiconductor layer stack further comprises a central region with a lateral dimension that is less than half a lateral dimension of the semiconductor layer stack. In particular, the semiconductor layer comprises a central region that extends between the top and bottom surfaces and is spaced from the side surfaces by at least one quarter of the distance between two opposing side surfaces.The term “central region” can be understood, in particular, as a region extending around the center of mass of the semiconductor layer stack and spaced from the side faces by, for example, at least one-quarter of the distance between two opposite side faces, such that the central region has a lateral dimension that is less than three-quarters or less than half of a lateral dimension of the semiconductor layer stack, the lateral dimension extending laterally between opposite side faces. Less than half of the lateral dimension can, in particular, mean that the central region comprises approximately less than one-ninth of the area of ​​the semiconductor layer stack.

[0017] According to the proposed principle, the current path from the first layer to the second layer through the active region is restricted to the central area. This can be achieved through several measures, which are discussed in the following sections. These various aspects allow, for example, the optimization of the active region size for high current densities / switching speeds while maintaining a suitable size for the semiconductor layer stack to dissipate the heat generated during operation of the optoelectronic device. This improved thermal management can thus have a positive impact on the reliability and lifespan of the optoelectronic device.

[0018] In some aspects, the semiconductor layer stack includes a partially oxidized Al x Ga 1-xAs layer, which is arranged between the first layer and the active region and / or between the second layer and the active region. The parameter x is in particular greater than 0.5, and in particular greater than 0.9, and in particular greater than 0.97. The oxidized part of the partially oxidized Al x Ga 1-x The As layer extends from the side surfaces to the central area, while the central area is formed by the Al x Ga 1-x The acetylene layer remains essentially unoxidized. The partially oxidized aluminum layer... x Ga 1-x The arsenic layer, for example, can have a thickness in the range of 5 nm to 20 nm and / or is optionally doped. Using the oxidized section of the partially oxidized aluminum x Ga 1-xThe acetylene layer creates a current limit for current applied to the first and second layers, since the oxidized region has an insulating effect and the current therefore flows only through the non-oxidized central region into and through the adjacent active region. While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0019] The oxidation of Al x Ga 1-x The oxidation of the as-layer can be carried out, for example, in a wet oven after mesa structuring of the semiconductor layer stack. The depth of oxidation can be controlled, in particular, by adjusting the duration of the oxidation step in the wet oven. The partially oxidized aluminum x Ga 1-xThe acetylene layer can be located in the blocking / active region of the semiconductor layer stack on the first layer, on the second layer, or on both layers.

[0020] In some aspects, the active region includes a mixed, particularly quantum-well mixed, region outside the central region with a larger band gap than the active region within the central region. This mixed region of the active region creates a current limiting effect on the current applied to the first and second layers, since the mixed region, with its larger band gap than the central region, has a more or less insulating or at least current-conducting effect, and the current therefore flows largely through the active region and the central region. While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0021] Quantum well mixing can simultaneously lead to an increase in the number of defects (hanging bonds / non-radiative recombination centers) along the side faces of the active region, thus influencing the possibilities for non-radiative recombination within the active region. In particular, this restricts the diffusion length / mean free path of the charge carriers to a central region of the active region where charge carrier recombination can occur with light emission, resulting in a shortened charge carrier lifetime.

[0022] The term "charge carrier lifetime" refers specifically to the time t until a charge carrier within the active region recombines, either through light emission or non-radiatively. A long charge carrier lifetime is associated with a long switch-off time of the optoelectronic components and thus with a reduced possible switching time, since charge carriers with a long lifetime within the active region can continue to recombine through light emission long after the optoelectronic components have been disconnected from their power supply. Such "afterglow" precludes high switching frequencies, e.g., in the GHz range. However, quantum well mixing of the active region in areas outside the central region can reduce the charge carrier lifetime, leading to a long switch-off time of the optoelectronic component.

[0023] In some aspects, the active region, and in particular the semiconductor layer stack, includes an ion-implanted region outside the central region with lower conductivity than the active region within the central region, and especially the semiconductor layer stack within the central region. Ion implantation can be achieved, in particular, by bombarding the side faces of the semiconductor layer stack with ions, resulting in an ion-implanted region outside the central region. The type and quantity of ions implanted into the semiconductor layer stack outside the central region can be selected such that the ion-implanted region outside the central region exhibits lower conductivity or higher insulation properties than within the central region.Additionally or alternatively, due to ion implantation, the active area outside the central area may have a larger band gap than within the active area.

[0024] The ion-doped region outside the central region limits the current applied to the first and second layers. This is because the ion-doped region, with its larger band gap and / or lower conductivity compared to the central region, has a more or less insulating or at least conductive effect, causing the current to flow largely through the central region and thus the active area. While this results in a smaller emission area for the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination. This, in turn, leads to higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0025] As described for quantum well mixing, ion implantation can simultaneously increase the number of defects (hanging bonds / non-radiative recombination centers) along the sides of the active region, thereby affecting the possibilities for non-radiative recombination within the active region. Specifically, this restricts the diffusion length / mean free path of the charge carriers to a central region of the active region where charge carrier recombination can occur with light emission, resulting in a shortened charge carrier lifetime. Conversely, ion implantation of the active region in areas outside the central region can shorten the charge carrier lifetime, leading to a long turn-off time of the optoelectronic device.

[0026] In some aspects, the first and / or second layer is confined to the central region. In particular, the first and / or second layer can be selectively deposited on the active region, thus limiting its application to the central area. This creates a current limiting effect on any current applied to the first and second layers, as they are already confined to the central region. This leads to a current-guiding effect, causing the current to flow largely through the active region in the central area. While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0027] Several other aspects concern the semiconductor layer stack. In some cases, the semiconductor layer stack comprises a first and a second, specifically undoped, cladding layer. The cladding layers are located directly adjacent to the active region and can, for example, consist of undoped aluminum gallium arsenide. The cladding layer is typically used to prevent unwanted diffusion of dopants from the doped first and / or second layer into the active region. The thickness of the cladding layer can range from a few nanometers to several tens of nanometers.

[0028] In some aspects, the active region can be a quantum well layer with an additional doping level in the range of 1e16 1 / cm². 3 and 1e18 1 / cm 3The additional doping level increases the charge carrier density within the quantum well layer, thereby reducing the lifetime of the charge carriers. In conjunction with the other measures, the overall radiation lifetime can be further reduced.

[0029] In several other aspects, the active region comprises a multi-quantum well structure with a multitude of alternating barrier and quantum well layers. The barrier layers have a higher Al content than the adjacent quantum well layers. In this respect, at least two barrier layers can have a doping level in the range of 1 e^16 1 / cm². 3 up to 1e18 1 / cm 3 exhibiting similar characteristics to the previous embodiment, the charge carrier density in the barrier layers is increased, thereby reducing the radiation lifetime.

[0030] In other aspects, the active region can comprise a variety of quantum dots, particularly GaAs / AlGaAs quantum dots. Inserting quantum dots instead of quantum wells into the active region can also increase the overall switching speed due to their faster recombination. Similar to the previous embodiments, this aspect can be combined with the implementation of non-radiative recombination centers.

[0031] In this respect, the optoelectronic device can be implemented as a vertical or horizontal optoelectronic device. In a horizontal optoelectronic device, the device comprises its respective highly doped or otherwise conductive contact areas on the same side of the layer stack and preferably opposite the main emission surface of the device. A vertical optoelectronic device comprises highly doped or otherwise conductive contact areas on two opposite sides, one of which may also include the main emission surface. The proposed principle, described later in the various embodiments, is not limited to vertical or horizontal optoelectronic devices but can be implemented in both.

[0032] In some aspects, the optoelectronic device further comprises at least one regrowth layer covering the side faces and / or optionally a passivation layer arranged on exposed surfaces of the regrowth layer and / or exposed surfaces of the semiconductor layer stack. The at least one regrowth layer can, for example, be a structure of alternating layers with different doping types, such as a pnp or npn structure, covering the side faces of the semiconductor layer stack. Such an embodiment can also be suitable for current limiting within the semiconductor layer stack, particularly even without the aforementioned aspects, if the lateral dimensions of the semiconductor layer stack are reduced to an absolute minimum, thereby reducing the emission area of ​​the active region.Simultaneously, this leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic component. The at least one regrowth layer and / or passivation layer acts as a current-limiting structure to direct the current through the active region and protect the side surfaces from other undesirable effects.

[0033] In some aspects, the optoelectronic device further comprises a first contact element arranged on the first layer and / or a second contact element arranged on the second layer. The first and / or second contact element serves, in particular, to supply a current to the optoelectronic device. The first and / or second contact element may, for example, consist of a transparent conductive oxide (TCO) to allow light generated in the active region to exit the optoelectronic device, and / or the first and / or second contact element, when viewed from the underside, may have a structure in which a central region of the first and / or second layer remains free of the first contact element, in particular forming a ring. However, it is also conceivable that the first and / or second contact element completely covers the respective underlying semiconductor layer.

[0034] According to at least one aspect, the central area of ​​the active region has a lateral dimension that is smaller than the diffusion length of the material system of the active region. This allows the lifetime of the charge carriers to be further reduced and the desired switching times for the optoelectronic device to be achieved.

[0035] According to at least one aspect, the optoelectronic device is configured to have an on and / or off time in the range of 0.5 ns to 10 ns, in particular an on and / or off time of up to 0.1 ns. With such a switching time, fast switching frequencies, e.g., in the GHz range, can be achieved.

[0036] According to a further aspect of the present invention, the optoelectronic device according to at least one of the aforementioned aspects can be used as a means for optical data transmission, in particular for short-range communication of less than 10 m. The optoelectronic device according to at least one of the aforementioned aspects can be used in particular for data transmission in large data centers and the like, to transmit data over short distances (<<10 m), for example, from CPU to GPU, from server to server, and / or from rack to rack.

[0037] Further aspects relate to a method for manufacturing an optoelectronic device. The method comprises a semiconductor layer stack with a first layer and a second layer. The first layer includes a first doping type, and the second layer includes a second doping type. An active region is located between the first and second layers. The semiconductor layer stack comprises a material containing at least one of phosphide and one of arsenide and is, for example, based on a GaAs / AlGaAs material combination.

[0038] In a further step, a mesa etching process is performed to form side surfaces that connect a top and bottom surface of the semiconductor layer stack and expose portions of the active region around the perimeter. From a top view, this perimeter can be in the shape of a circle, a rectangle, or a polygon, such as a hexagon.

[0039] The semiconductor layer stack is then processed to create a central region with a lateral dimension less than half the lateral dimension of the semiconductor layer stack, and to restrict the current path from the first layer to the second layer through the active region to this central region. Thus, the semiconductor layer stack is processed to limit the current applied to the first and second layers to a central region, at least within the active region. This can be achieved through several measures, which are discussed in the following sections. These various measures allow, for example, the optimization of the active region size for high current densities / switching speeds, while maintaining a suitable size for the semiconductor layer stack to dissipate the heat generated during the operation of the optoelectronic device.The improved thermal management can therefore have a positive effect on the reliability and lifespan of the optoelectronic device.

[0040] In some aspects, the step of deploying a semiconductor layer stack includes the deposition of an aluminum alloy. x Ga 1-x The As layer is arranged between the first layer and the active region and / or between the second layer and the active region. The parameter x is, in particular, greater than 0.5, greater than 0.9, and greater than 0.97. The Al x Ga 1-x The acetylene layer can, for example, have a thickness in the range of 5 nm to 20 nm and / or is optionally doped in the same range as the first and second doped layers of the layer stack. Suitable doping concentrations are known to those skilled in the art.

[0041] In some aspects, the semiconductor layer stack processing step includes the partial oxidation of the Al x Ga 1-x As layer(s) such that the oxidized part of the partially oxidized Al x Ga 1-x The As layer extends from the side faces to the central region, and the central part remains essentially unoxidized. Therefore, the semiconductor layer stack comprises a partially oxidized Al layer. x Ga 1-x As layer, which is located between the first layer and the active region and / or between the second layer and the active region. The oxidized part of the partially oxidized Al x Ga 1-x The As layer extends from the side surfaces to the central area, while the central area of ​​the Al x Ga 1-x The acetylene layer remains essentially unoxidized. Due to the oxidized portion of the partially oxidized aluminum... x Ga 1-xThe acetylene layer creates a current limit for current applied to the first and second layers, since the oxidized region has an insulating effect and the current therefore flows only through the non-oxidized central region into and through the adjacent active region. While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0042] The oxidation of Al x Ga 1-x The oxidation of the as-layer can be carried out, for example, in a wet oven after mesa structuring of the semiconductor layer stack. The depth of oxidation can be controlled, in particular, by adjusting the duration of the oxidation step in the wet oven. The partially oxidized aluminum x Ga 1-xThe acetylene layer can be located in the blocking / active region of the semiconductor layer stack on the first layer, on the second layer, or on both layers.

[0043] In some aspects, the step of processing the semiconductor layer stack includes the implantation of ions into at least the active region and, in particular, the semiconductor layer stack outside the central region, thereby forming an ion-implanted region outside the central region with a lower conductivity and / or a higher band gap than the active region within the central region and, in particular, the semiconductor layer stack within the central region.Ion implantation can be achieved by bombarding the side surfaces with ions, followed, for example, by an annealing step, so that at least the active region, and in particular the semiconductor layer stack outside the central region, forms an ion-implanted region outside the central region. This region exhibits lower conductivity and / or a larger band gap than the active region within the central region, and especially the semiconductor layer stack within the central region. The ion-implanted region outside the central region limits the current applied to the first and second layers because it acts as an insulator, causing the current to flow only through the active region within the central region.Although this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the area of ​​radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device.

[0044] In some aspects, the semiconductor layer stack processing step involves mixing, specifically quantum well mixing, the active region outside the central region. This creates an active region with a larger band gap than the active region within the central region. The mixed region outside the central region limits the current applied to the first and second layers because it acts as an insulator, causing the current to flow only through the central region and the active region. While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the radiative recombination region, resulting in higher recombination rates and thus faster switching speeds of the optoelectronic device.The mixing of the active area can be carried out by any method known in engineering.

[0045] In some aspects, the step of deploying or processing the semiconductor layer stack involves structuring and / or selectively growing the first and / or second layer, such that the first and / or second layer is confined to the central region. Specifically, selectively growing the first and / or second layer on the active region involves deploying a hard mask of, for example, SiO2 or Si3N4 on the active region adjacent to the central region and growing the first and / or second layer on the active region within the central region. Confining the first and / or second layer results in current limiting of the current applied to the first and second layers, as the current flows only through the central region and the active region.While this results in a smaller emission area of ​​the active region, it also leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device. The structuring and / or growth of the first and / or second layer can be carried out using any method known in the art.

[0046] In some aspects, the process further includes a step of regrowth of at least one regrowth layer on the side surfaces and / or optionally a step of growth of a passivation layer on exposed surfaces of the regrowth layer(s) and / or on exposed surfaces of the semiconductor layer stack.

[0047] In some aspects, the method further includes a step of providing a first contact element on the first layer and / or a lower contact element on the second layer. The first and / or second contact element can be formed according to the aspects described above for the optoelectronic device.

[0048] In some aspects, the step of deploying the semiconductor layer stack includes the deployment of a first and a second, specifically undoped, cladding layer directly adjacent to the active region. These layers prevent the diffusion of dopants but can also be used as a charge carrier blocking structure.

[0049] The optoelectronic device presented here, such as a micro-LED, is suitable for a variety of applications requiring high switching or current modulation frequencies. In some aspects, the optoelectronic device, based on the proposed principle, is used in optical data transmission, particularly in the short and medium range with modulation frequencies greater than 1 GHz and especially greater than 10 GHz. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Further aspects and embodiments according to the proposed principle will become clear with reference to the various embodiments and examples, which are described in detail in connection with the accompanying drawings, in which Fig. 1A to 1D show steps of a method for manufacturing an optoelectronic device according to some aspects of the proposed principle; Fig. Figures 2A to 2D show steps of a method for manufacturing a further embodiment of an optoelectronic device according to some aspects of the proposed principle; Fig. Figures 3A to 3D show steps of a method for manufacturing a further embodiment of an optoelectronic device according to some aspects of the proposed principle; Fig. Figures 4A to 4D show steps of a method for manufacturing a further embodiment of an optoelectronic device according to some aspects of the proposed principle; and Fig. Figures 5A to 5D show steps of a method for manufacturing a further embodiment of an optoelectronic device according to some aspects of the proposed principle. DETAILED DESCRIPTION

[0051] The following embodiments and examples reveal various aspects and their combinations according to the proposed principle. The embodiments and examples are not always to scale. Likewise, various elements may be enlarged or reduced to highlight individual aspects. It is understood that the individual aspects of the embodiments and examples shown in the figures can readily be combined without contradicting the principle of the invention. Some aspects have a regular structure or shape. It should be noted that in practice, minor differences and deviations from the ideal form may occur without contradicting the inventive concept.

[0052] Furthermore, the individual figures and aspects are not necessarily depicted in the correct size, nor do the proportions between individual elements need to be essentially accurate. Some aspects are emphasized through magnification. However, terms such as "above," "over," "below," "under," "larger," "smaller," and the like are correctly represented in relation to the elements within the figures. Thus, it is possible to deduce such relationships between the elements based on the figures.

[0053] The Fig. Figures 1A to 1D illustrate steps of a method for fabricating an optoelectronic device, in particular a µ-LED 1, according to the proposed principle. These steps are carried out similarly in all embodiments shown here. However, certain deviations and variations from the illustrated steps can be implemented without altering the overall scope. Although only vertical optoelectronic devices are shown here, the proposed principle is not limited to such devices. Rather, the respective contact surfaces can be arranged on the same side, with a via passing through the active region and connecting the desired doped layer.

[0054] Fig. Figure 1A illustrates the epitaxial deposition of a semiconductor layer stack 2 onto the respective growth substrate 11. The growth substrate 11 comprises an n-doped gallium arsenide layer, which serves as the wafer substrate on which the subsequent layers are epitaxially deposited. In addition, the n-doped gallium arsenide substrate can include a variety of buffer layers to smooth and level its surface, for example, to provide a substantially defect-free surface.

[0055] In a subsequent step, an n-doped aluminum gallium arsenide layer 3 is epitaxially deposited as the first semiconductor layer onto the surface of the growth substrate. Depending on the required specifications, the first layer 3 can have a doping distribution and / or a varying doping concentration. For example, the doping concentration can be higher closer to the growth substrate 11 than further away to improve charge carrier injection into the aluminum gallium arsenide layer 3. Furthermore, the aluminum content of the first layer 3 can vary and also exhibit a corresponding distribution across its thickness. Therefore, the first layer 3 can comprise one or more sublayers in which the aforementioned varying concentrations and distributions of dopants and aluminum content are implemented.

[0056] On the first layer 3, there is initially an Al x Ga 1-xAs layer 12 is arranged, where the parameter x is greater than 0.5 and, in particular, greater than 0.9 and, in particular, greater than 0.97. The first Al x Ga 1-x As layer 12 can, in particular, have such an Al content that the first Al x Ga 1-x As layer 12 can be easily oxidized.

[0057] On the first Al x Ga 1-x An undoped first cladding layer 14 of aluminum gallium arsenide is deposited onto the as-polymer layer 12. The aluminum content of this layer can be similar to that of the first layer 3, but can also vary to improve charge carrier diffusion into the active region 5, which is epitaxially deposited on the first cladding layer 14. The thickness of the first cladding layer 14 is in the range of 10 nm to 50 nm. The purpose of the first cladding layer 14 is to prevent the diffusion of dopants from the first layer 3 or the first layer 3. x Ga 1-xTo prevent the As layer 12 from entering the active area 5.

[0058] The active region 5 is deposited and, in this embodiment, comprises a pn junction or a multiple quantum well structure. The multiple quantum well structure comprises, for example, a plurality of barrier layers or quantum well layers, wherein the aluminum content of the barrier layers is somewhat higher than the aluminum content of the respective quantum well layers. Consequently, a varying band gap is provided in the semiconductor material of the active region 5, thereby trapping the charge carriers between the "valleys" of the band gap.

[0059] The active area 5 is covered by a further mantle layer 15 made of aluminium gallium arsenide, which is similar to the first mantle layer 14.

[0060] On the second mantle layer 15 there is a second Al x Ga 1-xAs layer 13 is arranged, where the parameter x is greater than 0.5 and, in particular, greater than 0.9 and, in particular, greater than 0.97. The second Al x Ga 1-x As layer 13 can, in particular, have such an Al content that the second Al x Ga 1-x As layer 13 can be easily oxidized.

[0061] On the second Al x Ga 1-x A p-doped layer 4 is deposited as a second semiconductor layer on the arsenic layer 13. Similar to the n-doped layer 3, the doping concentration and the doping distribution of the p-doped aluminum gallium arsenide layer 4 can be varied.

[0062] In this respect, both layers 3 and 4 can comprise not only aluminum gallium arsenide sublayers, but also one or more gallium arsenide sublayers or aluminum gallium arsenide sublayers with varying aluminum content. The purpose of these sublayers is to distribute the injected charge carriers across the entire area of ​​the semiconductor layer stack 2 and to ensure continuous and uniform diffusion towards the active region.

[0063] The top surface of the second layer 4 is covered with a highly doped gallium arsenide contact layer 16. The contact layer 16 not only establishes a connection to a conductive metal or a transparent conductive oxide, but also later serves as the main exit surface during operation of the device 1.

[0064] The first and second Al x Ga 1-xLayers 12 and 13, for example, are very thin layers containing aluminum gallium arsenide with a high aluminum content. They are located between the first and second layers 3 and 4 and their respective cladding layers 14 and 15, or more generally, between the first and second layers 3 and 4 and the active region 5. The aluminum content of the Al x Ga 1-x As layers include a very high aluminium content with a parameter x greater than 0.9 and especially greater than 0.97.

[0065] The next step in the proposed procedure is in Fig. Figure 1B shows a mask layer material (not shown) applied to the p-doped gallium arsenide contact layer 16 and subsequently structured to form a central part of the hard mask layer.

[0066] In plan view, the central part forms a circle, a rectangle, or another polygon, for example, a hexagonal structure. Subsequently, one or more mesa etching steps are performed to create facets 2c that expose the facets of the active area 5 as well as the first and second layers 3 and 4, respectively. The result of the mesa etching process is in Fig. 1B is shown and can be achieved by several successive mesa etching steps. In a two-step process, the side surfaces 2c of the semiconductor layer stack 2 and, in particular, of the active region 5 can be additionally cleaned and annealed, for example, after the first etching step, to remove any plasma damage from the side surfaces 2c.

[0067] For example, in a first mesa etching step, material from the contact layer 16, the p-doped aluminum gallium arsenide layer 4, the cladding layers 14 and 15, the first and second Al x Ga 1-xAs-layers 12 and 13, as well as the active region 5, are removed by plasma etching or a similar suitable process. The exposed surfaces are cleaned with NH3 or another suitable gas and annealed. This cleaning reduces damage and non-radiative recombination centers after the mesa etching process, resulting in better-defined surface areas 2c, preferably with only a small number of non-radiative recombination centers and thus a defined surface condition.

[0068] To increase the charge carrier density within the active region 5, the semiconductor layer stack 2 is then as shown in Fig. 1C shown processed. The semiconductor layer stack is therefore exposed to an oxygen-containing atmosphere (represented by the two arrows), causing oxidation of the aluminum within the first and second Al layers. x Ga 1-xAs layers 12 and 13 are triggered. Due to the oxygen-containing atmosphere and the high Al content of layers 12 and 13, a portion of layers 12 and 13, starting at the side surfaces 2c, is oxidized, resulting in oxidized thin sections of layers 12 and 13 up to a central region 10 of the semiconductor layer stack 2.

[0069] Oxidation leads to a reduction in the conductivity of the first and second aluminum layers. x Ga 1-x As layers 12 and 13 are located on a smaller central part of it, similar to openings for the charge carriers, as in Fig. 1D representation. Therefore, the charge density within the active region 5 in the central area is significantly increased by the resulting aperture-like structure, while at the same time, for example, a defined number of non-radiative recombination centers can be formed below and above the active region 5 as well as at its circumference. This allows the rise and fall times of the optoelectronic device to be reduced by changing the charge carrier density within the active region. To achieve this in Fig. To obtain the optoelectronic component shown in Figure 1D, the growth substrate 11 is removed, upper and lower contact elements 7a, 7b are provided on the upper and lower surfaces 2a, 2b of the semiconductor layer stack 2, and the side surfaces are passivated by means of a passivation layer 8. In the embodiment shown, the lower contact element 7a is arranged by way of example on the lower surface 2a and has the form of a ring that leaves the central region 10 of the semiconductor layer stack 2 uncovered.

[0070] The method according to the proposed principle follows the latter approach, but can be combined with other measures to increase the charge density or the band gap structure in order to achieve faster radiative recombination.

[0071] The Fig. Figures 2A to 2D illustrate one embodiment of each. The steps of providing a semiconductor layer stack 2 and mesa-structuring the semiconductor layer stack 2, which are described in the Fig. 2A and Fig. The figures shown in 2B refer to those shown in the Fig. 1A and Fig. 1B embodiment shown, however without providing the first and second Al x Ga 1-x As layer. To increase the charge carrier density within the active region 5, the semiconductor layer stack 2 is then as shown in Fig. 2C shown processed.

[0072] To increase the charge carrier density within the active region 5, a structured mask 9 is provided on the semiconductor layer stack 2 to perform quantum well mixing (indicated by the vertical arrows) of the active region 5 in a region between the side faces 2c and the central region 10. This results in mixed regions 17 of the active region 5 with a larger band gap than the active region within the central region 10, which is not quantum well mixed.

[0073] The mixing leads to a larger band gap in the active region 5 outside the central region 10. Therefore, the charge density within the active region 5 within the central region is significantly increased by the resulting aperture-like structure, while simultaneously a defined number of non-radiating recombination centers are formed below and above the active region 5, as well as at its periphery. This allows the rise and fall times of the optoelectronic device to be reduced by modifying the charge carrier density within the active region and increasing the number of non-radiating recombination centers in the mixed region 17.

[0074] To the in Fig. To obtain the optoelectronic device shown in Figure 2D, the growth substrate 11 is removed, upper and lower contact elements 7a, 7b are provided on the upper and lower surfaces 2a, 2b of the semiconductor layer stack 2, and the side surfaces 2c are passivated by means of a passivation layer 8. In the embodiment shown, the lower contact element 7a is arranged by way of example on the lower surface 2a and has the form of a ring that leaves the central region 10 of the semiconductor layer stack 2 uncovered.

[0075] The Fig. Figures 3A to 3D illustrate another embodiment of current limiting to the central region of an optoelectronic device 1. The Fig. 3A and Fig. The steps shown in Figure 3B for the provision of a semiconductor layer stack 2 and the mesa structuring of the semiconductor layer stack 2 thus refer to those described in the Fig. 2A and Fig. 2B embodiment shown, with the difference that an active region is provided with a simple pn junction and not with a quantum well or multiple quantum well layer. However, this is to be understood as exemplary and can also be implemented in the same way as in the Fig. 2A and Fig. 2B. To increase the charge carrier density within the active region 5, the semiconductor layer stack 2 is then as shown in Fig. 3C shown edited.

[0076] To increase the charge carrier density within the active region 5, a structured mask 9 is provided on the semiconductor layer stack 2 to perform ion bombardment of the side faces 2c (indicated by the arrows) of the semiconductor layer stack 2 in a region between the side faces 2c and the central region 10. This creates ion-implanted regions 18 of the semiconductor layer stack 2 with semi-insulating properties and, in particular, lower conductivity than the semiconductor layer stack 2 within the central region 10. Furthermore, the ion bombardment can cause the active region outside the central region 10 to have a larger band gap than the active region 5 within the central region 10.

[0077] The ion bombardment leads to reduced conductivity in the layers adjacent to the active region 5 and to a larger band gap in the active region 5 outside the central region 10. Therefore, the charge density within the active region 5 in the central region is significantly increased by the resulting aperture-like structure, while simultaneously a defined number of non-radiating recombination centers are formed below and above the active region 5 and at its periphery. This allows the rise and fall times of the optoelectronic device to be reduced by changing the charge carrier density within the active region and the number of non-radiating recombination centers in the mixing region 17 to be increased.

[0078] To the in Fig. To obtain the optoelectronic device shown in 3D, the growth substrate 11 is removed and upper and lower contact elements 7a, 7b are provided on the upper and lower surfaces 2a, 2b of the semiconductor layer stack 2. In the illustrated embodiment, the lower contact element 7a is arranged by way of example on the lower surface 2a and has the form of a ring that leaves the central region 10 of the semiconductor layer stack 2 uncovered.

[0079] The Fig. Figures 4A to 4D illustrate another embodiment of current limiting to the central region of an optoelectronic device 1. The steps of providing a semiconductor layer stack 2 and mesa-structuring the semiconductor layer stack 2, which are described in the Fig. 4A to 4C, as shown, refer to those in the Fig. 3A and Fig. 3B, the embodiment shown differs in that the second layer 4 and the contact layer 16 are selectively provided on the active region 5 only in the central region 10 of the semiconductor layer stack 2 using a structured mask 9. This step can already be understood in this embodiment as the step by which the charge carrier density within the active region 5 is increased. The semiconductor layer stack 2 is then, as in Fig. 4C shown, mesa-structured to obtain side faces 2c of the semiconductor layer stack 2.

[0080] The selective growth results in current being injected into the active region 5 only in the central region 10. Therefore, the charge density within the active region 5 in the central region is significantly increased by the resulting aperture-like structure. This allows the rise and fall times of the optoelectronic device to be reduced by altering the charge carrier density within the active region 5.

[0081] To do this in Fig. To obtain the optoelectronic component shown in Figure 4D, the growth substrate 11 is removed, upper and lower contact elements 7a, 7b are provided on the upper and lower surfaces 2a, 2b of the semiconductor layer stack 2, and the side surfaces 2c are passivated by means of a passivation layer 8. In the embodiment shown, the lower contact element 7a is arranged by way of example on the lower surface 2a and has the form of a ring that leaves the central region 10 of the semiconductor layer stack 2 uncovered.

[0082] The Fig. Figures 5A to 5D illustrate another embodiment of current limiting to the central region of an optoelectronic device 1. The Fig. 5A and Fig. The steps shown in Figure 5B for the provision of a semiconductor layer stack 2 and the mesa structuring of the semiconductor layer stack 2 refer to those described in the Fig. 3A and Fig. 3B embodiment shown, with the difference that by means of mesa structuring using a structured mask 9 a smaller semiconductor layer stack 2 with smaller lateral dimensions is pixelated compared to the aforementioned embodiments.

[0083] This allows the charge carrier density within the active region 5 to be increased compared to a larger layer stack 2 with larger lateral dimensions, assuming the same current is applied to the active region 5. To further increase the efficiency of the optoelectronic device, growth layers 6 are provided along the side faces 2c of the semiconductor layer stack 2. These growth layers 6 can, for example, be a structure of alternating layers with different doping types, such as a pnp or npn structure, covering the side faces 2c of the semiconductor layer stack 2. Such an embodiment can be particularly suitable for current limiting within the semiconductor layer stack 2, especially in combination with one of the aspects mentioned above.This leads to a higher charge carrier concentration in the region of radiative recombination, resulting in higher recombination rates and thus higher switching speeds of the optoelectronic device 1. The regrowth layers 6 act as a current-limiting structure to conduct the current through the active region 5 and to protect the side surfaces 2c from undesired effects.

[0084] To do this in Fig. To obtain the optoelectronic component shown in Figure 5D, the growth substrate 11 is removed and upper and lower contact elements 7a, 7b are provided on the upper and lower surfaces 2a, 2b of the semiconductor layer stack 2. In the embodiment shown, the lower contact element 7a is arranged by way of example on the lower surface 2a and has the form of a ring that leaves the central region 10 of the semiconductor layer stack 2 uncovered. REFERENCE MARK LIST 1 Optoelectronic component, µ-LED 2 layer stacks 2a Top 2b Underside 2c side surface 3-layer 4-layer 5 active area 6 Regeneration layer 7a Contact element 7b Contact element 8 Passivation layer 9 Mask 10 central area 11 Growth substrate 12 Al x Ga 1-x As-layer 13 Al x Ga 1-x As-layer 14. Mantle layer 15 mantle layer 16 Contact layer 17 Mixed area 18 Implanted area QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] DE 10 2023 115 113.4

[0001]

Images