INSULATOR FOR CRYOELECTRIC CHIPS AT EXTREMELY LOW TEMPERATURES BELOW 10K

Description

Technical area

[0001] The invention relates to an isolator system between two chips which are operated thermally insulated from each other at different temperatures below 10K, wherein information is exchanged between a first and a second chip of the two chips via a connection system of electrical connections. Description

[0002] Conventional computers operate with semiconductor components and integrated circuits. These circuits always operate with systems based on a logical "0" or "1"—i.e., switches "on" or "off." In semiconductor memory, this is achieved by keeping the potential either above or below a threshold. These two states form the smallest unit in computers and are called a "bit."

[0003] These semiconductor components often consist of doped silicon elements to create the circuits. For example, transistor circuits can be arranged in such semiconductor components and linked to form a logic circuit. Thanks to ever-improving chemical and physical manufacturing processes, these semiconductor components can now be produced in ever greater compactness. However, this compactness is reaching its physical limits. Both the density of the circuits and the temperature frequently lead to problems in such semiconductor components. Optimization can still be achieved, in particular, through multiple layer models, higher switching speeds, or in the choice of semiconductor material. Nevertheless, the computing power is often insufficient for many applications, such as in cryptographic technology or in calculating weather or climate models, due to the enormous amounts of data.

[0004] Models for so-called quantum computers have long been known to significantly increase computing power. However, for various reasons, they have not yet been technically feasible. Quantum computer models utilize the quantum mechanical states of particles, such as electrons. A quantum mechanical system with two states is called a "qubit" as the smallest unit for storing information. A qubit, for example, is defined by the quantum mechanical states of spin "up" and spin "down."

[0005] The principle of electron spin qubits is always the same, regardless of the material system chosen. The components are often based on a semiconductor heterostructure, an interface between a semiconductor and an insulator, or various material defects. The semiconductor heterostructure contains a two-dimensional electron gas (2DEG). Semiconductor heterostructures are monocrystalline layers of semiconductors with different compositions grown on top of one another. These layer structures provide numerous technically relevant quantization effects with regard to their electronic and optical properties. They are therefore particularly suitable for the production of microelectronic components. The currently most important material combination for the production of semiconductor heterostructures for qubits is the Si / SiGe system.

[0006] The potential of quantum computers lies in so-called quantum bits (also called qubits). There are various types of qubit technologies, all of which face the same challenge: their states are highly unstable. To ensure that the qubits remain controllable for computing processes long enough, they must be cooled to extremely low (cryogenic) temperatures, often below 0.1 K. Connecting large numbers of qubits to the necessary readout and control electronics requires a very high interconnect density, which can be achieved, for example, using microfabricated interconnect elements. Dissipation of the control circuits is expected to significantly exceed the cooling capacity available at qubit temperature. Therefore, methods and devices are needed that enable both high interconnect density and thermal isolation.Due to the higher operating temperature (over 1 K), the control circuit has an order of magnitude higher cooling capacity available.

[0007] Thermally insulating electrical connections often require a support structure with similar structural properties to silicon to maintain mechanical stability. However, the support structure must also have low thermal conductivity. State of the art

[0008] In Anzilotti-Kimura, ND [et al.]: Acoustic phonon nanowave devices based on aperiodic multilayers: Experiment and theory; Physical Review B 76, 2007, No. 17, 174301, multilayer acoustic nanowave devices based on aperiodic stacks of GaAs and AlAs layers are described. The multilayer acoustic nanowave devices can be fabricated using standard molecular beam epitaxy (MBE) technology. These nanostructures were developed to exhibit optimized acoustic reflectivity curves in the terahertz range. Various techniques are used for the design, optimization, and characterization of such acoustic phonon devices.

[0009] In Aliev, GN [et al.]: Hypersonic acoustic mirrors and microcavities in porous silicon; Applied Physics Letters (APL), Vol. 96, 2010, No. 12, 124101, hypersonic acoustic mirrors and microcavities in porous silicon are described. Periodic solid-state structures exhibit transmission stopbands for waves of specific frequencies. The implementation and direct measurement of acoustic band gaps in porous silicon multilayer structures, which exhibit 50 dB stopbands for longitudinal acoustic waves in the gigahertz range, is illustrated. Furthermore, the realization of an acoustic microcavity structure in porous silicon is demonstrated.

[0010] De Boor, J. [ua]: Temperature and structure size dependence of the thermal conductivity of porous silicon in EPL (Europhysics Letters), Vol 96, 2011 No. 1, 16001 describes the temperature and structure size dependence of the thermal conductivity of porous silicon. In order to evaluate the potential of porous silicon as a thermoelectric material, it is shown how measurements of the thermal conductivity were carried out as a function of temperature and the average structure size. It is described how investigations on samples with average structure sizes between 7 nm and 100 nm show a significant reduction in thermal conductivity. The dependence on structure size and temperature is explained by a simple kinetic model based on the reduction of the effective phonons mean free path.

[0011] Nanophononic thin-film filters and mirrors are known from Lanzilotti-Kimura, ND [et al.]: Nanophononic thin-film filters and mirrors studied by picosecond ultrasonics in Applied Physics Letters (APL), Vol. 96, 2010, No. 5, 053101. Optimized acoustic phonon thin-film filters are investigated using picosecond ultrasound. A broadband mirror and a color filter based on aperiodic multilayers were optimized to operate in the subterahertz range and were fabricated by molecular beam epitaxy. It illustrates how time-resolved differential optical reflectivity experiments were performed with pump and probe pulses incident on opposite sides of the substrate. Furthermore, the effects of the free surface and the influence of an Al cap layer on the behavior of the aperiodic devices are analyzed.

[0012] US 6 605 339 B1 shows an arrangement for cryogenic systems where a thermally insulating layer (including a Bragg reflector) is placed on microscopic columns in order to keep the thermal conductivity as low as possible.

[0013] One problem with controlling or reading qubits is that no techniques are currently known that enable the required thermal insulation while maintaining high interconnect density at extremely low temperatures below -260°C. However, this is a key component for the integration of qubits and cryoelectric circuits. Disclosure of the invention

[0014] The object of the invention is therefore to avoid the disadvantages of the prior art and to provide an insulation system with appropriate wiring between two chips which are operated at different temperatures below 10K.

[0015] According to the invention, the object is achieved in that, in an insulator system between two chips of the type mentioned at the outset, a Bragg reflector is provided for thermal insulation, which has passages for the electrical connections.

[0016] The invention is based on the principle that the insulator system acting as a Bragg reflector leads to high phonon scattering perpendicular to the Bragg reflector, thus significantly suppressing thermal conduction. This insulator system is placed between the chips to be insulated. The electrical connections can be routed through the insulator system for information exchange with high connection density.

[0017] In an advantageous embodiment of the inventive insulator system, the Bragg reflector consists of a layer system whose layers have different physical properties. In such a layer system, suitable interference occurs, which is accompanied by high phonon scattering. This phonon scattering results in only low heat conduction in the insulator system designed as a Bragg reflector.

[0018] A further advantageous embodiment of the inventive insulator system between two chips consists in the fact that the layers of the layer system comprise different materials with different acoustic impedances. This measure is also taken to enhance the interference effect, whereby the phonon scattering of the material only allows for reduced heat conduction.

[0019] In a particular variant of the inventive insulator system, the thickness of the layers of the layer system is designed differently. This represents a further advantageous feature of the insulator system to enhance phonon scattering over a broad wavelength range, thereby further reducing thermal conductivity at cryogenic temperatures. For example, the thickness can be increased by approximately 1% from layer to layer within the layer system.

[0020] Furthermore, in a preferred embodiment of the inventive insulator system, the layers are made of porous silicon. Complementary porous materials or materials with low thermal conductivity, e.g., sintered materials, can be used. In principle, porous silicon has proven particularly suitable for this application. Different materials with low thermal conductivity can also be combined to cover different phonon energies.

[0021] An advantageous embodiment of the isolator system according to the invention is that the first chip has a monitoring and control circuit, and the second chip has a computing unit. This is a measure that makes the isolator system particularly suitable for quantum computers. The monitoring and control circuit is not operated at such low temperatures, typically around 2K, whereas the qubit chips usually only have stable and usable states at around 100mK. Therefore, a temperature difference of at least an order of magnitude regularly exists. In experiments in which qubits are operated at a few 100mK, a temperature difference of typically an order of magnitude occurs. With the isolator system according to the invention, only a very small amount of heat exchange takes place between the two chips.

[0022] To ensure that the electrical connections themselves do not generate heat and are also of low thermal conductivity, the electrical connections in the inventive insulator system are designed to be superconducting, particularly as superconducting vias – contact connections. These superconducting connections generate virtually no heat and, at the same time, have only low thermal conductivity, thus preventing any thermal influence on the assembly.

[0023] In a preferred embodiment of the inventive insulator system, solid bodies with channels containing superfluid helium and / or a solid body with high thermal conductivity are provided for heat dissipation. This allows the heat generated in the layer system to be dissipated from the insulator system to the outside. The insulating effect is thus maximized. The channels containing superfluid helium can also be routed along the chips and / or through the chips. With a suitable arrangement of the channels, they can then also be used to dissipate heat from the chips. Alternatively, or in combination, a solid body, such as copper, can also be used to dissipate heat from the system.

[0024] A preferred embodiment of the inventive isolator system comprises Bragg reflectors arranged in series. The cascaded arrangement of the Bragg reflectors allows chips to be insulated from each other even with large temperature differences, which can extend over several orders of magnitude. This measure can further significantly minimize heat exchange.

[0025] In a further advantageous embodiment of the inventive insulator system, the solid bodies with channels containing superfluid helium and / or the solid bodies with high thermal conductivity, such as copper, are provided between the series-connected Bragg reflectors for heat dissipation. This measure serves to optimize the cooling performance of the series-connected Bragg reflectors by dissipating the heat generated by each Bragg reflector. This further improves thermal insulation.

[0026] Further embodiments and advantages emerge from the subject matter of the dependent claims and the drawings with the associated descriptions. Exemplary embodiments are explained in more detail below with reference to the attached drawings. The invention is not intended to be limited to these exemplary embodiments alone. They serve merely to explain the invention in more detail. The present invention is intended to relate to all subject matter which a person skilled in the art would now and in the future consider obvious for implementing the invention. The following detailed description relates to the best possible modes of carrying out the disclosure. The description is therefore not to be taken in a limiting sense, but merely serves to illustrate the general principles of the invention, since the scope of the invention is defined by the appended claims. List of characters

[0027] Fig. 1 shows in a schematic diagram an embodiment of two wired chips which are operated at different temperatures below 10K. Fig. 2 shows a schematic diagram of the vertical section of a layer system that isolates the two wired chips from each other. Fig. 3 shows a schematic diagram of several Bragg reflectors connected in series, which isolate the two chips from each other. Preferred embodiment

[0028] In Fig. 1In a quantum computer, 10 denotes a first chip, and 12 denotes a second chip. A control and readout circuit is integrated into the first chip 12. This first chip 10 is preferably designed as a CMOS (Complementary Metal Oxide Semiconductor). In the present embodiment, the second chip 12 is a qubit chip. The states of the qubit chips are relatively unstable. To ensure that they remain controllable, the qubit chip 12 is cooled to extremely low—cryogenic—temperatures below 0.1 K.

[0029] Accordingly, the two chips 10, 12 are operated at different temperatures below 10K. The first chip 10 does not need to be cooled quite as much as the second chip 12. In one application, the first chip 10 is in a temperature range of approximately 2K. The dissipated power of such a chip 10 is approximately 1W. The second chip is then operated at approximately 100mK. The cooling power here is approximately 1mW.

[0030] The two chips 10, 12 are connected to each other via a connection system 14. The electrical connections 16 consist of signal lines 18, which have a high connection density. With this connection system 14, more than 10< connections are possible and provided. The two chips 10, 12 exchange information as signals via the signal lines 18, particularly for reading and controlling. The signal lines 18 are superconducting and therefore have low thermal conductivity.

[0031] Due to the higher operating temperature of over 1 K, the control circuitry has an order of magnitude higher cooling capacity. A thermal isolator system 20 is provided between chips 10 and 12. The thermal isolator system 20 is indicated by dashed lines 22 and Fig. 2explained in more detail. The thermal isolator system 20 is designed as a Bragg reflector 24.

[0032] In Fig. 2 The thermal insulator system 20 is shown schematically in section. The insulator system 20 consists of a layer system 26 acting as the Bragg reflector 24. The insulator system 20 thus formed leads to high phonon scattering perpendicular to the Bragg reflector 24, so that thermal heat conduction is strongly suppressed. The layer system 26 consists of layers 28 with different physical properties. The thicknesses of the layers 28 of the layer system 26 vary and are selected such that the phonon transmission is sufficiently small over the entire relevant wavelength range. The layers 28 of the layer system 26 consist of different materials with different acoustic impedance.

[0033] In this exemplary embodiment, only a few layers 28 are shown for clarity. In reality, however, there are approximately five hundred layers 28. The thickness of the layers 28 increases by approximately 1% from layer to layer. Interference results in high phonon scattering and thus also in the insulator system 20 with low thermal conduction. Simulations show that a smaller number of layers 28, e.g., twenty, is sufficient, with the increase in the thickness of the layers 28 from bilayer to bilayer being greater, e.g., 40%, to achieve low thermal conduction.

[0034] Through-holes 29 through the layer system 26 are shown. These are holes 30, each in a layer 28, with an internally conductive coating, which are routed through the layer system 26 as signal lines 18. The signal lines 18 exchange the information signals between the first chip 10 and the second chip 12. The layers 28 form the support structure 32 required for the superconducting signal lines 18. The arrangement of the lines allows a connection density on the order of more than 10 6< electrical signal lines.

[0035] In Fig. 3A schematic diagram shows an insulator system 20 in which several Bragg reflectors 24 are connected in series, thermally isolating the two chips 10, 12 from each other. This cascade-like arrangement 34 can bridge even larger temperature differences. Solid bodies 36 with good thermal conductivity are provided between the layer systems 26 that form the Bragg reflectors. These solid bodies 36 conduct the heat out of the insulator system 20. To enhance the effect of thermal conduction out of the insulator system 20, channels 38 are provided in the thermally conductive solid bodies 36, through which superfluid helium is passed. This accelerates heat dissipation. The respective amount of heat Q dissipated from the insulator system 20 is symbolized by arrows 40. List of reference symbols

[0036] 10First chip 12Second chip 14Connection system 16Electrical connections 18Signal lines 20Insulator system 22Dashed lines 24Bragg reflector 26Layer system 28Layers 29Vias 30Coated holes 32Support structure 34Cascade arrangement 36Thermally conductive solids 38Channels 40Arrows

Claims

1. An isolator system (20) between two chips (10, 12), which are operated thermally insulated from one another at different temperatures below 10K, wherein information is exchanged between a first chip (10) and a second chip (12) of the two chips (10, 12) via a connection system (14) of electrical connections (16), further comprising a Bragg reflector (24) for thermal insulation, which has passages (29) for the electrical connections (16).

2. The isolator system (20) between two chips (10, 12) according to claim 1, wherein the Bragg reflector (24) consists of a system of layers (26), the layers (28) of which have different physical properties.

3. The isolator system (20) between two chips (10, 12) according to claim 2, wherein the layers (28) of the system of layers (26) have different materials with different acoustic impedance.

4. The isolator system (20) between two chips (10, 12) according to one of claims 1 to 3, wherein the thickness of the layers (28) of the system of layers (26) is configured differently.

5. The isolator system (20) between two chips (10, 12) according to one of claims 1 to 4, wherein a layer (28) contains porous material and / or porous silicon.

6. The isolator system (20) between two chips (10, 12) according to one of claims 1 to 5, wherein the first chip (10) has a monitoring and control circuit and the second chip (12) has a computing unit.

7. The isolator system (20) between two chips (10, 12) according to one of claims 1 to 6, wherein the electrical connections (16) are configured to be superconducting, in particular as superconducting vias.

8. The isolator system (20) between two chips (10, 12) according to one of claims 1 to 7, further comprising solids (36) with channels (38) with superfluid helium and / or a solid with high thermal conductivity for heat dissipation.

9. The isolator system (20) between two chips (10, 12) according to claim 8, wherein Bragg reflectors (24) are arranged to be connected in series.

10. The isolator system (20) between two chips (10, 12) according to claim 9, wherein the solids (36) with the channels (38) with superfluid helium and / or the solids (36) with high thermal conductivity are arranged between the Bragg reflectors (24) connected in series for heat dissipation.