INFORMATION TECHNOLOGY SYSTEM, VEHICLE AND METHOD FOR IMPLEMENTING AN UPDATE TO A TARGET SYSTEM

Description

[0001] The invention relates to an information technology system of the type defined in more detail in the preamble of claim 1, a vehicle and a method for introducing an update to a target system of the type defined in more detail in the preamble of claim 8.

[0002] With increasing digitalization, the relevance of computer systems for use in vehicles also grows. Modern vehicles now have a multitude of different control units, for example, for controlling the combustion process of an internal combustion engine, for adjusting the chassis with active suspension, and for providing driver assistance systems such as adaptive cruise control, high-beam assist, and the like. With increasing levels of automation, these control units must process more data in less time. Consequently, the computing requirements increase. Therefore, to provide fully automated or even autonomous driving functions, it is necessary to integrate state-of-the-art graphics processors into vehicles that can calculate a large number of matrix operations in a short time.

[0003] Over the lifespan of a vehicle, it may be necessary to update the programs executable by its control units several times. This can involve both the firmware of a control unit and the application program running on that control unit. In addition to replacing individual code sections and introducing entirely new code sections, parameter sets can also be exchanged. For example, the parameter of a moisture sensor can be changed so that an automatically activated windshield wiper only activates after a significant amount of precipitation. Similarly, characteristic maps can be adjusted, such as the speed map of an oil pump depending on the oil temperature. Furthermore, by implementing such updates to the vehicle's computer systems, new functions can be introduced and security vulnerabilities can be closed.

[0004] It is desirable to install relevant updates on the aforementioned computer systems as quickly as possible. During the installation of an update, the computer system may be unavailable, meaning that the functionality it provides cannot be used. A vehicle user must therefore wait, which reduces convenience. Furthermore, particularly security-relevant updates should be installed quickly to prevent an attacker, such as a hacker, from compromising the computer system. The larger an update is, i.e., the more data it contains, the more urgent the need to expedite the process.

[0005] Communication with the computer systems installed in a vehicle is possible in a variety of ways. Vehicles typically have an on-board diagnostic interface, which facilitates communication between an external computer system and the vehicle's internal computer systems. This involves the use of specific communication protocols, such as the communication protocol described by ISO 14229. Unified Diagnostic Services.An external computer system, such as a desktop computer, laptop, or tablet, can be connected to a corresponding internal computer system via a wired connection (e.g., USB or Ethernet) or wirelessly (e.g., Bluetooth or Wi-Fi). To increase user convenience, updates can also be delivered to the vehicle via mobile network. This eliminates the need for vehicle users to visit a workshop or manually download an update from the internet on a desktop computer, copy it to a USB drive, and then insert the USB drive into a corresponding port in the vehicle. Instead, the vehicle, using a telematics unit, accesses a corresponding server of the vehicle manufacturer via mobile network and downloads the update.

[0006] The interaction between in-vehicle and external computer systems represents an innovative environment. For example, DE 10 2012 110 559 A1 describes a method for securely downloading firmware using a diagnostic link connector and the OnStar system. To increase cybersecurity, the firmware to be implemented on an in-vehicle computer system is signed twice by two different actors.

[0007] Furthermore, DE 10 2019 216 841 A1 describes a vehicle diagnostic communication device and a system containing it. The vehicle diagnostic communication device is designed to estimate the time required for a diagnostic procedure.

[0008] US Patent 7,787,481 B1 discloses a network interface system that connects a central computer to a network for data exchange. The network interface system comprises a storage system and a media access control system with at least one local buffer, designed to read a second data structure from the storage system while a first data structure is being transferred to the network. This is intended to improve access to the storage system for multiple network-connected devices.

[0009] US Patent 2014 / 0019571 A1 describes a method for processing data packets from a data packet receive queue in a memory access device. Depending on how the receive queue is used when programs access data packets, the use of an additional queue is proposed, which is intended for heuristically predictive caching of data packets.

[0010] Furthermore, US patent 2021 / 0150757 A1 discloses the training and inference using a neural network to predict the orientation of objects in images. It describes a processor capable of supporting the training of one or more artificial neural networks for identifying the orientation of objects in images, taking into account a property that differs from the object's orientation. The processor can process images that do not include a label as the baseline truth for the respective artificial neural network. As an alternative property of the objects, symmetric consistency between the original image and a mirrored image can be used. Using a discriminator and a generator, a view of the object from an alternative perspective can be artificially generated.

[0011] Furthermore, US 2016 / 0280023 A1 reveals a drawbar control system.

[0012] Furthermore, US 2019 / 0047579 A1 reveals a tightly coupled locking step for processor cores to increase functional safety.

[0013] The present invention is based on the objective of providing an improved information technology system with the help of which the introduction of updates into a computer system can be accelerated.

[0014] According to the invention, this problem is solved by an information technology system with the features of claim 1. Advantageous embodiments and further developments, as well as a vehicle comprising a part of said information technology system and a method for introducing an update onto a target system, are set forth in the dependent claims.

[0015] A generic information technology system, comprising: a source system, in turn comprising a source information store, a file reader module, and a system interface module; and a target system, in turn comprising a target information store, a system interface module, a payload buffer module, and a memory access module; wherein the source system and the target system are communicatively coupled to each other via a bidirectional data link; the source system is configured, after receiving a response message from the target system, to use the file reader module to read the source information store, to package the information read from the source information store into a data transfer block, and to transmit this block to the target system via the data link; wherein the source system requires an initial latency period for reading the source information store and packaging the data transfer block;The target system is configured to receive the data transfer block, extract the information it contains and write it to the payload buffer module, then generate a response message and, using the memory access module, transfer the information from the payload buffer module to the target information memory; the target system requires a second latency for extracting and writing the information and for generating the response message; is further developed according to the invention by the fact that The source system and / or the target system each further comprise a data transfer acceleration module, in turn comprising a data transfer block buffer; wherein the data transfer acceleration module is arranged in the source system between the data line and the system interface module and is configured to receive a first data transfer block and send it over the data line, after receiving a data transfer block itself output a reply message to the system interface module in order to cause the packing of at least one further data transfer block, to temporarily store the further data transfer block in the data transfer block buffer and to send a further data transfer block temporarily stored in the data transfer block buffer to the target system after receiving a reply message from it;and wherein the data transfer acceleration module is located in the target system between the data line and the system interface module and is configured to receive a first data transfer block and forward it to the system interface module, to issue a response message itself after receiving a data transfer block and to send this message over the data line in order to cause the transmission of at least one further data transfer block from the source system to the target system, to temporarily store at least one further data transfer block in the data transfer block buffer and, after receiving a response message from the system interface module, to forward another data transfer block to the system interface module or, after receiving a negative response message from the system interface module, to send the negative response message over the data line and to delete all further data transfer blocks from the data transfer block buffer.

[0016] The information technology system according to the invention reduces the time required to transfer information from the source system to the target system. This is because, while the target system is operating (i.e., during the second latency period), the source system is inactive or idle. However, the source system requires the first latency period to read the source information memory using the file reader module and to package a corresponding data transfer block from it. The information technology system according to the invention is designed such that the source system is also active while the target system is operating (i.e., during the second latency period), thus shortening the waiting time for the target system after sending the response message until it receives a corresponding further data transfer block from the source system. The first latency period can be on the order of 100 ms and the second latency period on the order of 600 ms.For each data transfer block to be transmitted, a corresponding waiting time can be reduced, for example, by 200 to 300 ms. Summing this reduction across all data transfer blocks to be transmitted from the source system to the target system, it results in a significant time reduction for introducing the corresponding data or information into the target system.

[0017] Depending on the design of the source and target systems, the first latency may be greater than the second latency.

[0018] The data transfer acceleration module can be implemented exclusively in the source system, exclusively in the target system, or in both systems. Due to its placement between the data line and the respective system interface module, the data transfer acceleration module can be easily integrated into the system. The architecture of the source or target system does not need to be modified, as the data transfer acceleration module is positioned upstream of the source or target system in the corresponding data flow direction.

[0019] An information technology system is generally a network of computer systems. Accordingly, the source system and the target system together form a computer system. Each computer system comprises hardware and / or software components. This can be any computing device, such as a desktop computer, laptop, tablet computer, smartphone, an embedded system (e.g., a system-on-a-chip), a server, an edge computing device, and the like.

[0020] The information to be transferred from the source system to the target system can be any conceivable type of information, meaning files and corresponding file formats. It can be program code for creating an executable program such as firmware or an application program, or it can be information to be processed by such an executable program, such as parameters, constants, and the like.

[0021] Both the source and target information storage devices are computer-readable physical storage media. All conceivable designs are possible.

[0022] The file reader module, a respective system interface module, the payload buffer module, and the memory access module are implemented using hardware and / or software. Pure software modules are particularly preferred. The file reader module enables the source system to access the source information memory, at least for reading. The file reader module can also be configured as File Reader The system interface module serves as a connection interface and can also be referred to as such on the source system side. Dialogue Sequencer The system interface module can also be referred to as such in the target system. Diagnostic moduleThis is particularly relevant when the target system is a vehicle diagnostic communication module. The payload buffer module serves to temporarily store the information to be written to the target information memory. The target information memory may have a clock frequency that differs from that of the rest of the target system. To accommodate this, the memory access module can operate at the clock frequency of the target information memory and thus read information asynchronously from the payload buffer module. The memory access module can also be described as Flash Access be designated.

[0023] The source system and the target system may each contain further hardware and / or software modules, which will not be discussed in detail here.

[0024] The respective data transfer acceleration modules can be implemented solely through hardware, solely through software, or through a combination of hardware and software.

[0025] A bidirectional data connection can be wired or wireless. A wired data connection might be, for example, an Ethernet cable or a USB cable. Appropriate communication protocols are used. The data connection can also involve direct access to a bus system, such as a CAN bus.

[0026] A wireless data connection can be established, for example, by an NFC connection, Bluetooth connection, Wi-Fi connection, or similar technology. A mobile network connection can also serve as a wireless data connection.

[0027] The response message issued by the target system serves to inform the source system that the target system is now ready to receive another data transfer block.

[0028] A data transfer block can also be described as a message. This message, or data transfer block, comprises one or more headers or Header, which contain information on how the respective data transfer block is to be further processed on the target system. Furthermore, a so-called payload or Payload The payload is part of the corresponding message, i.e., the data transfer block. It is the actual information to be written to the target information storage. As the data transfer block traverses the individual modules on the target system, parts of the header are removed successively by each module until the payload finally ends up in the payload buffer module and subsequently in the memory access module or the target information storage.

[0029] The size of the data transfer block buffer can be arbitrary. The size of the data transfer block buffer in the source system and the data transfer acceleration module in the target system can be the same or different. For example, the data transfer block buffer can be large enough to hold at least ten data transfer blocks.

[0030] The target system is capable of generating and sending a negative response message to the source system, informing it that the target system can no longer receive any further data transfer blocks. A data transfer acceleration module implemented in the source system can process such negative response messages. In this case, the data transfer block buffer of the data transfer acceleration module in the source system can also be cleared. The file reader module and the system interface module in the source system are then instructed by the data transfer acceleration module not to generate any further data transfer blocks until a response message is received from the target system.

[0031] An advantageous enhancement of the information technology system involves configuring the data transfer acceleration module in the source and / or target system to issue response messages until the respective data transfer block buffer is full. This further reduces the time required to transfer information from the source to the target system. In other words, the respective data transfer acceleration module can operate continuously, regardless of the target system's operating mode, until the respective data transfer block buffer is filled.

[0032] According to a further advantageous configuration of the information technology system, the source system and the target system are configured to use Unified Diagnostic Services as a communication protocol. This enables the use of the information technology system in the automotive environment. The target system can then be, for example, the computer architecture in a vehicle, or parts of the computer architecture can constitute the target system. The target system can then be addressed by the source system, colloquially speaking, via vehicle diagnostics. In this case, the source system is a corresponding development computer or software running on such a computer. In this context, the source system is also referred to as a tester. The target system is referred to as the target. For example, the source system is configured as a DTS9 development tester.

[0033] A further advantageous embodiment of the information technology system according to the invention provides that the source information storage and / or the target information storage comprises flash memory. Flash memory can be addressed particularly quickly and contains no moving parts that could impede access in the event of vibrations, for example, when a corresponding vehicle drives over bumps. Thus, flash memory is particularly suitable for the formation of said source information storage and / or target information storage. The flash memory can be permanently installed in the source system and / or the target system, or it can be a removable storage module, such as an M.2 SSD, an SD card, or the like.

[0034] According to a further advantageous embodiment of the information technology system, the target system is implemented as an embedded system. The target system can have one or more processing units. Such a processing unit is, for example, a system-on-a-chip, also known as a SoC. The target system can, for example, be embedded in a vehicle. The target system, or the processing unit(s) forming the target system, can be implemented as part of the vehicle's control units.

[0035] Preferably, the source system is implemented as a server or server cluster, and at least part of the data connection runs through the internet. The target system can be connected to the internet via a mobile network, for example. This allows the target system to receive information from the server or server cluster. The server can be operated or used by a vehicle manufacturer. This allows the vehicle manufacturer to distribute information to the vehicles in its fleet. Thanks to the use of the internet, and especially mobile internet connectivity for the vehicles, they then do not need to visit a workshop to receive this information.

[0036] In a vehicle according to the invention, a target system as described above is part of the vehicle or implemented in said vehicle. The vehicle thus comprises at least one data transfer acceleration module. The vehicle can be any type of vehicle, such as a car, truck, van, bus, or the like. Instead of a road vehicle, it could also be a rail vehicle, watercraft, or aircraft.

[0037] Furthermore, a method for introducing an update to a target system using an information technology system described above is described. According to the invention, the method provides for adapting or introducing a parameter data set, an application program, and / or firmware into the target system by means of the update.

[0038] Using the method according to the invention, it is possible to reduce the time required to implement said update on the target system. This is made possible by the functionality of the data transfer acceleration module contained in the information technology system used.

[0039] Further advantageous embodiments of the information technology system according to the invention and of the method for introducing the update onto the target system also result from the exemplary embodiments, which are described in more detail below with reference to the figures.

[0040] This shows: Fig. 1 a schematic representation of an information technology system known from the prior art; Fig. 2 a schematic representation of an information technology system according to the invention with a data transfer acceleration module implemented on a source system; Fig. 3 a schematic representation of an information technology system according to the invention with a data transfer acceleration module implemented on a target system; Fig. 4 a schematic representation of an information technology system according to the invention with a data transfer acceleration module implemented on both the source system and the target system; and Fig. 5 a schematic representation of the in Fig. 4 shown information technology system, in which the data transfer block buffer of both data transfer acceleration modules fills up.

[0041] Figure 1Figure 1 shows an information technology system 1 known from the prior art. This system comprises a source system 2, which is in bidirectional communication with a target system 5 via a data line 9. The source system 2, in turn, comprises a file reading module 3 and a system interface module 4. The target system 5 also comprises a system interface module 6, a payload buffer module 7, and a memory access module 8. The respective modules are implemented by hardware and / or software. The source system 2 and the target system 5 can also be implemented by hardware components and / or software components. In the embodiments shown in the figures, the corresponding modules are implemented as software modules 14. As shown by way of example for the target system 5, the source system 2 and the target system 5 can also have further software modules 14.

[0042] The figures each show excerpts from the data transmission process between source system 2 and target system 5. The task is to transfer information from a source information storage unit belonging to source system 2 to a target information storage unit of target system 5 via data line 9. The file read module 3 has at least read access, and the memory access module 8 has at least write access to the respective information storage unit. Both the file read module 3 and the memory access module 8 can also have read and write access.

[0043] As soon as the target system 5 is ready to receive information, it sends a response message 10 to the system interface module 4 of the source system 2 via the system interface module 6. The data transmission is not instantaneous, but occurs with a certain latency, so a corresponding arrow 101 symbolizing the response message 10 is displayed. Figure 1The arrows point not only to the left but also downwards. Source system 2 requires an initial latency t1 to process the corresponding request from target system 5. System interface module 4 then communicates with file reader module 3, which accesses the source information store. Information read from the source information store is then packaged into a data transfer block. The respective processing times of file reader module 3 and system interface module 4 are indicated by vertical lines. The file transfer between file reader module 3 and system interface module 4 also involves a certain latency, which is why the arrows here are also tilted vertically.

[0044] The source system 2 sends each data transfer block to the target system 5 by means of an information message 15.

[0045] The target system 5 requires a second latency t2 to process the information message 15, i.e., to process the data transfer block. This second latency t2 is measured between the receipt of the information message 15 by the system interface module 6 and the output of the response message 10 by the system interface module 6. The information message 15 comprises a header and a payload. The header contains information describing how the information message 15 should be processed on the target system 5. The payload is the aforementioned information read from the source information memory. The data transfer block, or information message 15, traverses the individual software modules 14 of the target system 5 successively, with a portion of the header being processed or removed at each software module 14. The remaining payload is then written to the payload buffer module 7.After successful writing, the target system 5 issues a response message 10. The memory access module 8 accesses the payload buffer module 7 asynchronously to write the corresponding information to the target information store. The cycle described above then restarts.

[0046] Furthermore, the target system 5 exhibits an initial time difference Δt between the output of the response message 10 and the receipt of the next data transfer block via the information message 15.

[0047] Figure 2 Figure 1 shows an information technology system 1 according to the invention, in which a data transfer acceleration module 11 is integrated into the source system 2. Here too, the system interface module 6 transmits a response message 10 to the source system 2, which is passed on by the data transfer acceleration module 11 to the system interface module 4.

[0048] Accordingly, the source system 2 packs a data transfer block and passes it on, indicated by an arrow 201, to the data transfer acceleration module 11.

[0049] The data transfer acceleration module 11 forwards the corresponding data transfer block in the form of an information message 15 to the system interface module 6 of the target system 5. However, the data transfer acceleration module 11 prevents the source system 2 from waiting idly until another response message 10 is received from the target system 5. Instead, the data transfer acceleration module 11 itself issues a response message 12, whereupon the system interface module 4 and the file read module 3 become active again and generate a new data transfer block. This additional data transfer block is then written to a data transfer block buffer contained within the data transfer acceleration module 11 for temporary storage. This process continues until the data transfer block buffer is full or until no more information needs to be read from the source information memory.

[0050] The process on target system 5 is analogous to that in Figure 1 in the illustrated embodiment. However, as soon as the target system 5 transmits another response message 10 to the source system 2, the advantage of implementing the data transfer acceleration module 11 in the source system 2 becomes apparent. Thus, after receiving the response message 10 from the source system 2, it is not necessary to wait for the initial latency t1 before the source system 2 transmits an information message 15 back to the target system 5. The data transfer acceleration module 11 reads the next data transfer block from the data transfer block buffer and forwards it directly or, as shown in Figure 2 indicated by a comparatively short vertical line 202, after a comparatively short time, by means of the information message 15, indicated by an arrow 203, to the system interface module 6 of the target system 5.

[0051] A comparison of Figure 1 and Figure 2shows that in this case the first time difference Δt is shorter than in the case described in Figure 1 The information technology system 1, as depicted and known from the prior art, achieves this time saving. This savings is accumulated across all data transfer blocks exchanged between the source system 2 and the target system 5 via data line 9, significantly reducing the time required to transfer the information. This allows, for example, parameter data sets, firmware, or application programs to be updated or newly implemented in the target system 5 more quickly.

[0052] Figure 3Figure 1 shows another possible embodiment of the information technology system 1 according to the invention. Here, a data transfer acceleration module 11 is implemented in the target system 5. The system interface module 6 outputs the aforementioned response message 10, which is forwarded by the data transfer acceleration module 11 to the source system 2. A data transfer block is then generated by the source system 2 and transmitted to the target system 5 in an information message 15, see arrow 301.

[0053] The data transfer block contained in information message 15 is forwarded by the data transfer acceleration module 11 to the system interface module 6. The subsequent process on the target system 5 is analogous to the execution in Figures 1 and 2 .

[0054] To accelerate data transfer, the data transfer acceleration module 11 now sends its own response message 13 (see arrow 302) to the source system 2. The source system 2 then generates another data transfer block and transmits it back to the data transfer acceleration module 11 of the target system 5 via data line 9. Here, too, the data transfer acceleration module 11 includes a data transfer block buffer in which the received data transfer block is temporarily stored. This process can be repeated several times until the data transfer block buffer is completely filled or no further information needs to be transferred between the source system 2 and the target system 5.

[0055] After the payload is written to the payload buffer module 7, the system interface module 6, indicated by arrow 303, forwards the response message 10 to the data transfer acceleration module 11. The data transfer acceleration module 11 then accesses the data transfer block buffer and is able to immediately transmit another data transfer block, temporarily stored in the data transfer block buffer, back to the system interface module 6, indicated by arrow 304. Thus, not only is the waiting time associated with the first latency t1 eliminated, but also the waiting time associated with data transmission via data line 9. Accordingly, the first time difference Δt is also reduced here.

[0056] If the corresponding data transfer procedure is to be continued, the data transfer acceleration module 11 forwards the response message 10, indicated by an arrow 305, to the system interface module 4 of the source system 2, so that further data transfer blocks are generated there. Depending on the time overlap of the transmission of response messages 10 and 13, the data transfer acceleration module 11 can also wait here, so that instead of response message 13, response message 10 is then transmitted (not shown).

[0057] If, however, the data transfer acceleration module 11 receives a negative response message (not shown) from the system interface module 6, which means that the target system 5 will no longer accept any further information, the data transfer acceleration module 11 can forward said negative response message to the system interface module 4 of the source system 2, so that the source system 2 stops generating the data transfer blocks or at least pauses it until a new response message 10 is received from the target system 5. At the same time, the data transfer acceleration module 11 clears the data transfer block buffer.

[0058] Figure 4 Figure 1 shows a further embodiment of the information technology system 1 according to the invention, in which both the source system 2 and the target system 5 each have a data transfer acceleration module 11. The components described in Figure 1 are: Figures 2 and 3The described advantages regarding the time required to transfer information from source system 2 to target system 5 are thus combined.

[0059] Thus, it is generally possible that by combining the provision of one data transfer acceleration module 11 each in the source system 2 and the target system 5, the data transfer block buffer of the data transfer acceleration module 11 in the target system 5 can be filled more quickly. However, this depends on whether data transfer blocks from the data transfer block buffer of the data transfer acceleration module 11 in the source system 2 are already present, as well as on the initial latency t1 and the latency during data transmission over data line 9. In the Figure 4In the illustrated embodiment, the data transfer block buffer of the data transfer acceleration module 11 in the source system 2 is initially empty. Furthermore, the initial latency t1 is greater than the latency of the data transmission over data line 9. Therefore, the data transfer acceleration module 11 in the source system 2 can only transfer another data transfer block to the data transfer acceleration module 11 in the target system 5 once such a data transfer block has been forwarded by the system interface module 4. If, however, the initial latency t1 were lower than the latency of the data transmission over data line 9, then upon receiving the response message 13, the data transfer acceleration module 11 of the source system 2 would already have a data transfer block in its buffer, which could then be transmitted directly to the target system 5 over data line 9.

[0060] Figure 5Figure 501 illustrates an embodiment in which both data transfer block buffers are already partially filled and will subsequently be completely filled. An arrow 501 indicates that another data transfer block is written to the data transfer block buffer of the data transfer acceleration module 11 in the source system 2.

[0061] The target system 5 informs the source system 2 that it is ready to receive information by transmitting the response message 10. Since corresponding data transfer blocks are already contained in the data transfer block buffer of the data transfer acceleration module 11 of the source system 2, such a data transfer block can be directly transmitted to the target system 5, indicated by an arrow 502.

[0062] This data transfer block, indicated by an arrow 503, is then transmitted from the data transfer acceleration module 11 in the target system 5 to the system interface module 6. Similarly, the data transfer acceleration module 11 of the target system 5 sends a response message 13 to the source system 2, indicated by an arrow 504.

[0063] Since, as already mentioned, data transfer blocks are contained in the data transfer block buffer of the source system 2, the data transfer acceleration module 11 of the source system 2 can directly transmit another data transfer block to the target system 5, indicated by an arrow 505. In the embodiment shown here, the data transfer block buffer of the data transfer acceleration module 11 in the target system 5 is now full, so no further response messages 13 are transmitted to the source system 2. However, since the data transfer block buffer in the source system 2 is not yet full, it continues to be filled.

[0064] Indicated by arrow 506, the system interface module 6 outputs the response message 10, which is received by the data transfer acceleration module 11 of the target system 5. The data transfer acceleration module 11 of the target system 5 can then immediately, indicated by arrow 507, read another data transfer block from the data transfer block buffer and pass this block to the system interface module 6. This frees up space in the data transfer block buffer of the data transfer acceleration module 11 of the target system 5. The data transfer acceleration module 11 of the target system 5 then forwards the response message 10 to the source system 2 to initiate the transmission of another data transfer block, as it can now receive one. This new data transfer block is transmitted by a corresponding information message 15, indicated by arrow 508.The data transfer block buffer in target system 5 is then full again, so no further reply messages 13 are sent.

[0065] As indicated by arrow 509, the data transfer block buffer of the data transfer acceleration module 11 of the source system 2 also fills up. Only after the data transfer acceleration module 11 of the source system 2, indicated by arrow 510, has received another response message 10, can, as indicated by arrow 511, another data transfer block be transmitted to the target system 5 and corresponding space be created in the data transfer block buffer in the source system 2.

[0066] Figure 5 Arrows 501 to 505 illustrate, firstly, how the data transfer block buffer of the data transfer acceleration module 11 in the target system 5 can be accelerated by providing one data transfer acceleration module 11 each in the source system 2 and in the target system 5. Secondly, it illustrates Figure 5 , that despite full data transfer block buffers of both data transfer acceleration modules 11, a time saving in data transmission is possible, since, as indicated by arrow 511, a data transfer block can be transmitted to the target system 5 more quickly.

Claims

1. Information technology system (1), comprising: - a source system (2), in turn comprising a source information memory and a file reading module (3) and a system interface module (4); and - a target system (5), in turn comprising a target information memory and a system interface module (6), a payload buffer module (7) and a memory access module (8); - the source system (2) and the target system (5) are communicatively coupled to one another via a bidirectional data line (9); - the source system (2) is configured to read the source information memory by means of the file reading module (3) after receiving a response message (10) from the target system (5), to pack information read from the source information memory into a data transfer block and to send this to the target system (5) via the data line (9); - the source system (2) requiring a first latency time (t1) to read the source information memory and pack the data transfer block; - the target system (5) being configured to receive the data transfer block, to extract the information contained therein and to write it into the payload buffer module (7), then to generate a response message (10) and to transfer the information from the payload buffer module (7) to the target information memory by means of the memory access module (8); - the target system (5) requiring a second latency time (t2) to extract and write the information and to generate the response message (10), characterized in that the source system (2) and / or the target system (5) each further comprise a data transfer acceleration module (11), in turn comprising a data transfer block buffer; - the data transfer acceleration module (11) being arranged in the source system (2) between the data line (9) and the system interface module (4) and being configured to receive a first data transfer block and to send it via the data line (9), to output a response message (12) itself to the system interface module (4) after receiving a data transfer block in order to cause the packing of at least one further data transfer block, to temporarily store the further data transfer block in the data transfer block buffer, and to transmit a further data transfer block temporarily stored in the data transfer block buffer to the target system (5) after receiving a response message (10) from the target system; and - the data transfer acceleration module (11) being arranged in the target system (5) between the data line (9) and the system interface module (6) and being configured to receive a first data transfer block and forward it to the system interface module (6), to output a response message (13) itself after receiving a data transfer block and to send said response message via the data line (9) in order to cause at least one further data transfer block to be sent from the source system (2) to the target system (5), to temporarily store at least one further data transfer block in the data transfer block buffer and, after receiving a response message (10) from the system interface module (6), to forward a further data transfer block to the system interface module (6), or, after receiving a negative response message from the system interface module (6), to send the negative response message via the data line (9) and to delete all further data transfer blocks from the data transfer block buffer.

2. Information technology system (1) according to claim 1, characterized in that the data transfer acceleration module (11) in the source system (2) and / or in the target system (5) is further configured to output response messages (12, 13) until the particular data transfer block buffer is full.

3. Information technology system (1) according to claim 1 or 2, characterized in that the source system (2) and the target system (5) are configured to use Unified Diagnostic Services as a communication protocol.

4. Information technology system (1) according to any of claims 1 to 3, characterized in that the source information memory and / or the target information memory comprises flash memory.

5. Information technology system (1) according to any of claims 1 to 4, characterized in that the target system (5) is designed as an embedded system.

6. Information technology system (1) according to any of claims 1 to 5, characterized in that the source system (2) is designed as a server or server network and at least part of the data line (9) runs through the Internet.

7. Vehicle, characterized by a target system (5) of an information technology system (1) according to any of claims 1 to 6.

8. Method for introducing an update to a target system (5) using an information technology system (1) according to any of claims 1 to 6, characterized in that by means of the update, a parameter data set, an application program and / or a firmware in the target system (5) is adapted or newly introduced into the target system (5).