Semiconductor storage device

DE602022032003T2Active Publication Date: 2026-03-11SAMSUNG ELECTRONICS CO LTD
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Patent Information

Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-08-11
Publication Date
2026-03-11

AI Technical Summary

Technical Problem

The integration of two-dimensional semiconductor devices is limited by the cost of fine pattern forming technology, while three-dimensional semiconductor memory devices face challenges in achieving high integration and efficient data storage states.

Method used

A semiconductor memory device with a substrate, alternating gate electrodes and interlayer dielectric layers, incorporating ferroelectric and charge trap patterns, and vertical channel structures to enhance data storage capabilities and efficiency.

Benefits of technology

The proposed structure enables a larger memory window and faster erase operations, allowing for multi-state memory devices with improved integration and reduced operation time.

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