Efficient compilation method for multi-core quantum computers

Abstract

Disclosed is a computationally economic compilation method for improving quantum code execution on a multi-core quantum computing system, by minimizing the amount of inter-core quantum operations required for execution. The methos comprises segmenting the entire program code, identifying a group Gc of contiguous segment sequences and a group Gnc of non- overlapping combinations of the Gc members, converting the Gc members to a respective group of graphs, mapping the qubits to cores using a graph solver program thus obtaining a respective group of inter-core quantum operation amounts, calculating accordingly the operation amounts associated with the Gnc members, and selecting the mapped Gc members, i.e., mapped contiguous code parts, that would yield the minimum overall inter-core operation amount.

Description

[0001] EFFICIENT COMPILATION METHOD FOR MULTI-CORE QUANTUM COMPUTERS

[0002] FIELD OF THE INVENTION

[0003] The present invention relates generally to quantum computers programming, and more particularly to methods and systems that provide optimized techniques of mapping quantum program code to multi-core quantum computing systems.

[0004] BACKGROUND OF THE INVENTION

[0005] Modular Quantum Computing architectures consisting of multiple quantum cores have been proposed in the academic and patent literature as a method for scaling quantum computers, see for example US patent US9858531B. In such architectures, each core contains a limited number of qubits. Qubits on different cores can interact via various solutions of inter-core communication, for example by using entanglement generated with an optical interconnect, see for example David Awschalom et al. PRX Quantum 2, 017002. Another solution may be shuttling qubits between cores, see for example Kielpinski, D., Monroe, C. & Wineland, D. Nature 417, 709-711 (2002). Inter-core communication can be used to move information around in one of two ways: (a) interoperations: where two qubits on different cores interact indirectly e.g., by using remote gates, (b) information exchange operations where the information encoded in a qubit is moved to another qubit on a different core e.g. using teleportation.

[0006] Quantum compilers are used to take quantum code and modify it in order to improve execution on some target architecture. In many cases compilers include subroutines for optimal mapping of logical qubits to physical qubits. In general, the output of a compiler is a modified code which can be used as the input for another pass of the same or a different compiler. Once all compiler passes are completed, the resulting code is run on the quantum computer. Different compilers for multi-core architectures have been designed to improve performance by either minimizing the number of inter-operations or minimizing the number of information exchange operations. Missing in the art is a compilation method that would optimize performance while accounting for both of the above means.

[0007] SUMMARY OF THE INVENTION

[0008] In accordance with an embodiment of the present invention, a processor- implemented method is disclosed for compiling quantum program code, hereinafter denoted as “code”, so as to improve its execution performance over a multi-core quantum computing system, hereinafter denoted as "system". In a typical embodiment, the cores are linked by entanglement-based one- time-use links whose generation time duration varies randomly. The code comprises core local instructions and instructions that involve multiple cores thus needing those entanglement-based inter core links. The disclosed method comprises the following compilation steps:

[0009] Step (a) comprises partitioning the code to two or more successive segments based on some predetermined rules. A partitioning example may be uniform partitioning, in terms of inter-qubit logical operations, to two or more segments. In some embodiments, the segmentation is determined based on identifying code characteristics differences between adjacent segments.

[0010] Step (b) comprises identifying a group, denoted as "Gc", that includes at least part of all possible contiguous sequences of one or more code segments. In some embodiments, a criterion of not including all the contiguous sequences may be ensuring a minimum length difference therebetween, in terms of inter-qubit logical operations. A segment that includes the entire code is typically included in Gc.

[0011] Step (c) that follows comprises identifying a group, denoted as "Gnc", that includes at least part of all possible non-overlapping combinations of Gc members. If Gc magnitude is high, the number of resulted Gnc members may entail too complex computation in the following steps. Therefore, in some embodiments, only a part thereof is considered; an example criterion may be some minimum length difference between the chosen combinations.

[0012] Step (d), also directly based on step (b), comprises converting each Gc member to a corresponding graph, thus creating a respective graph group, denoted as "Ggc". The conversion is performed by associating each logical qubit contained in the contiguous code part constituting the converted Gc member with a different vertex in the graph, and then associate each inter-qubit operation in the converted Gc member with a different edge between the pair of vertices corresponding to that operation.

[0013] Next, in step (e), a graph- solver program, denoted as "solver", is provided. Such a program, may be achieved over the Internet, possibly under an open-source license. The purpose of employing the solver is to map the logical qubits contained in each Gc member to the different physical cores. The solver does it by processing the graph corresponding to each Gc member as follows: partitioning the graph vertices into exclusive groups representing the system cores such that the groups number and magnitudes are constrained by the number of the system cores and number of physical qubits within each core respectively, while attempting to minimize the total amount of the resulting in ter- group edges, which corresponds to the amount of operations between different cores, denoted as "inter-operations". Step (f) coming next comprises the actual application of the solver to all the Ggc graphs, thus creating a respective group of solver results, denoted "Gsc", wherein each Gsc member now corresponds to a respective Gc member and to its corresponding contiguous code part now already containing physical qubits. The solver application to any Gsc member graph also provides the amount, denoted as "Asc", of inter-operations now related to the contiguous program part corresponding to that Gsc member.

[0014] Step (g) that follows comprises calculating a group of inter-operation amounts, denoted as "Gamnt", one-to-one corresponding to Gnc and calculated as follows:

[0015] I. for the Gnc member that is the entire code segment, determining its corresponding Gamnt member as the Asc associated with the Gsc member, denoted as Cse, corresponding to the entire code segment.

[0016] II. for any Gnc member that is not the entire code segment, calculating its associated Gamnt member by summing the Asc amounts associated with all the Gsc members corresponding to that any Gnc member, and for all the code parts outside those all Gsc members, if there are such code parts, also including in the calculated Gamnt the amount of all the Cse inter-operations belonging to said outside code parts.

[0017] III. for any Gnc member that is not the entire code segment, also including in the Gamnt member calculated in II above penalties that are possibly associated with code transitions between adjacent Gsc members, and / or therebetween and Cse code parts outside thereof, wherein the penalty associated with each such transition is calculated as the amount of inter-operations needed to transfer qubits between cores due to this each such transitions. In some embodiments, these operations comprise in typical embodiments qubit teleportation.

[0018] Step (h) comprises determining the optimal compiled code structure, in the sense of having minimum amount of inter-operations, i.e., having minimum Gamnt member, as follows:

[0019] I. selecting the Gnc member for which the minimum Gamnt member is achieved in step (g) above.

[0020] II. expressing the code in physical qubit terms according to the Gsc members corresponding to the selected Gnc member and the Cse code parts outside thereof, and

[0021] III. adding to the code inter-operations for transferring qubits between cores, if needed, based on step (g)III above.

[0022] In some embodiments, the calculation of the Asc amounts take into consideration weighting that is associated with the edges of the solver processed graphs, i.e., with the code logical operations. In those and also in other embodiments, calculating the Gamnt members comprises using weighted sums of the involved inter-operations, including those associated with qubit transfer operations.

[0023] In some embodiments an optional step may be applied when the system is structured such that some cores are connected to the other cores through physical connections having substantially higher latency than that of the physical connections interconnecting the other cores. This step comprises remapping logical qubits to physical qubits such that those cores having high latency physical connections would be involved with less inter-operations per core relative to the other cores.

[0024] In some embodiments, at least part of the code segments is predetermined based on the following criterion of limited qubit distribution in a segment: the ratio between the number of different qubits in the segment to the total number of inter-qubit operations therein is not greater than a predetermined maximum threshold. In one of those embodiments, the system is computationally scaled down for at least part of the Gc members not meeting the above-mentioned criterion, by calculating for such Gc members the above-mentioned ratio, and computationally scaling down the system for that at least part of the Gc members by the calculated ratio, provided that this calculated ratio is not lower than a predetermined minimum threshold higher than the above maximum threshold.

[0025] Embodiments of the present invention also include various processing arrangements for carrying out the above method steps. Such processing arrangements may be, but is not limited to, a conventional computer or server, either desktop or mobile, a distributed computerized system, a quantum computer and any suitable combination thereof.

[0026] BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The present invention will be more fully understood from the following detailed description of the embodiments thereof, taken together with the drawings in which:

[0028] Fig. 1 depicts a flowchart that schematically illustrates a method of compiling a quantum program code to a multi-core quantum computing system, in accordance with an embodiment of the present invention.

[0029] Figs. 2a to 2j depicts compilation of an example quantum program code for a physical multicore quantum computing system, in accordance with an embodiment of the present invention; and DETAILED DESCRIPTION OF EMBODIMENTS

[0030] Embodiments of the present invention provide processor-implemented methods of optimizing a quantum program code, comprising logical qubits. In these embodiments, the code shall be executed on a multi-core quantum computing system, having a known number of cores and known number of physical qubits in each core. The optimization is achieved by mapping logical code qubits to physical qubits in the system cores, while attempting to minimize the total inter-core operations, denoted as "inter-operations". The rationale of this optimization strategy is that such inter-operations are typically performed through a high latency interconnect system. Such a system may employ entanglement-based one-time-use Einstein-Podolsky-Rosen (EPR) links, whose generation time duration varies randomly and typically takes much longer time than inter-qubit operation time inside the individual cores. Minimizing the amount of such links also helps to increase the code execution reliability. An additional advantage provided by the disclosed techniques is achieving the above optimization with reasonable computational burden.

[0031] Referring now to Fig. 1, there is shown a flowchart 100, which schematically illustrates a method of mapping a quantum program code to a multi-core quantum computing system, in accordance with an embodiment of the present invention. The flowchart begins with method step lOOp, where a code is provided for mapping to a given system, as described above. Step 100a comprises partitioning the code to two or more successive segments based on some predetermined rules. A partitioning example may be uniform partitioning, in terms of inter-qubit logical operations, to two or more segments. In some embodiments, the segmentation is determined based on identifying code characteristics differences between adjacent segments.

[0032] Step 100b comprises identifying a group, denoted as "Gc", that includes at least part of all possible contiguous sequences of one or more code segments. In some embodiments, a criterion of not including all the contiguous sequences may be ensuring a minimum length difference therebetween, in terms of inter-qubit logical operations. A segment that includes the entire code is typically included in Gc. In some embodiments, at least part of the code segments is predetermined based on the following criterion of limited qubit distribution in a segment: the ratio between the number of different qubits in the segment to the total number of inter-qubit operations therein is not greater than a predetermined maximum threshold. In one of those embodiments, the system is computationally scaled down for at least part of the Gc members not meeting the above-mentioned criterion, by calculating for such Gc members the above-mentioned ratio, and computationally scaling down the system for that at least part of the Gc members by the calculated ratio, provided that this calculated ratio is not lower than a predetermined minimum threshold higher than the above maximum threshold.

[0033] Step 100c that follows comprises identifying a group, denoted as "Gnc", that includes at least part of all possible non-overlapping combinations of Gc members. If Gc magnitude is high, the number of resulted Gnc members may entail too complex computation in the following steps. Therefore, in some embodiments, only a part thereof is considered; an example criterion may be some minimum length difference between the chosen combinations.

[0034] Step lOOd, also directly based on step 100b, comprises converting each Gc member to a corresponding graph, thus creating a respective graph group, denoted as "Ggc". The conversion is performed by associating each logical qubit contained in the contiguous code part constituting the converted Gc member with a different vertex in the graph, and then associate each inter-qubit operation in the converted Gc member with a different edge between the pair of vertices corresponding to that operation.

[0035] Next, in step lOOe, a graph-solver program, denoted as "solver", is provided. Such a program, may be achieved over the Internet, possibly under an open-source license. The purpose of employing the solver is to map the logical qubits contained in each Gc member to the different physical cores. The solver does it by processing the graph corresponding to each Gc member as follows: partitioning the graph vertices into exclusive groups representing the system cores such that the groups number and magnitudes are constrained by the number of the system cores and number of physical qubits within each core respectively, while attempting to minimize the total amount of the resulting in ter- group edges, which corresponds to the amount of operations between different cores, denoted as "inter-operations".

[0036] Step lOOf coming next comprises the actual application of the solver to all the Ggc graphs, thus creating a respective group of solver results, denoted "Gsc", wherein each Gsc member now corresponds to a respective Gc member and to its corresponding contiguous code part now already containing physical qubits. The solver application to any Gsc member graph also provides the amount, denoted as "Asc", of inter-operations now related to the contiguous program part corresponding to that Gsc member. In some embodiments, the calculation of the Asc amounts take into consideration weighting that is associated with the edges of the solver processed graphs, i.e., with the code logical operations.

[0037] Flowchart 100 proceeds to step 100g that comprises calculating a group of inter-operation amounts, denoted as "Gamnt", one-to-one corresponding to Gnc and calculated as follows: I. for the Gnc member that is the entire code segment, determining its corresponding Gamnt member as the Asc associated with the Gsc member, denoted as Cse, corresponding to the entire code segment.

[0038] II. for any Gnc member that is not the entire code segment, calculating its associated Gamnt member by summing the Asc amounts associated with all the Gsc members corresponding to that any Gnc member, and for all the code parts outside those all Gsc members, if there are such code parts, also including in the calculated Gamnt the amount of all the Cse inter-operations belonging to said outside code parts.

[0039] III. for any Gnc member that is not the entire code segment, also including in the Gamnt member calculated in II above penalties that are possibly associated with code transitions between adjacent Gsc members, and / or therebetween and Cse code parts outside thereof, wherein the penalty associated with each such transition is calculated as the amount of inter-operations needed to transfer qubits between cores due to this each such transitions. In some embodiments, these operations comprise qubit teleportation, denoted as remote:TP in the example depicted in Fig. 2.

[0040] In some embodiments, calculating the Gamnt members comprises using weighted sums of the involved inter-operations, including those associated with qubit transfer operations.

[0041] Step lOOh comprises determining the optimal compiled code structure, in the sense of having minimum amount of inter-operations, i.e., having minimum Gamnt member, as follows:

[0042] I. selecting the Gnc member for which the minimum Gamnt member is achieved in step 100g above.

[0043] II. expressing the code in physical qubit terms according to the Gsc members corresponding to the selected Gnc member and the Cse code parts outside thereof, and

[0044] III. adding to the code inter-operations for transferring qubits between cores, if needed, based on step 100g. Ill above.

[0045] Flowchart 100 terminates with an optional step lOOi that may be applied when the system is structured such that some cores are connected to the other cores through physical connections having substantially higher latency than that of the physical connections interconnecting the other cores. This step comprises remapping logical qubits to physical qubits such that those cores having high latency physical connections would be involved with less inter-operations per core relative to the other cores.

[0046] Flowchart 100 is an example flowchart, which was chosen purely for the sake of conceptual clarity. In alternative embodiments, any other suitable flowchart can also be used for illustrating the disclosed method. Method steps that are not mandatory for understanding the disclosed techniques were omitted from Fig. 1 for the sake of simplicity.

[0047] Fig. 2a to 2j, which are now described and denoted for brevity "Figs 2", illustrate an example of mapping a quantum code 202, depicted in Fig. 2a, to a physical multi-core system, in accordance with an embodiment of the principles of the method steps described above with reference to Fig. 1. Since mapping a real-life practical code would have entailed an enormously complex description, an especially simple code was chosen. Code 202 includes 4 logical qubits qO to q3 and it has to be compiled for a two-core physical system, each core having 3 physical qubits. For the sake of simplicity, all the logical operations as well as physical inter-operations are assigned an equal weight. For simplicity, also some groups, described with reference to Fig. 1, which have a lot of members are only partially shown.

[0048] Fig. 2b, which corresponds to method step 100a, illustrates partitioning of code 202 into 5 segments SI to S5, indicated by respective reference numerals 204, 206,... 212.

[0049] Based on step 100b, Figs. 2 show a group Gc of contiguous code parts that can be formed based on the above partitioning: Gc0=[s 1 |s2|s3 |s4|s5] = entire code 202, Gcl=[sl], Gc2=[s2], Gc3=[s3], Gc4=[s4], Gc5=[s5], Gc6=[sl|s2|s3], Gc7=[sl|s2], Gc8=[s3|s4|s5] ... wherein | indicates segment concatenation so as to form contiguous code.

[0050] Based on step 100c, Figs. 2 also show a group Gnc, each of which is a non-overlapping combination of Gc members: Gncl={Gc0}, Gnc2={Gcl,Gc2,Gc3,Gc4,Gc5}, Gnc3={Gc6,Gc4,Gc5}, Gnc4={Gc7,Gc8}, Gnc5={Gcl,Gc2,Gc8}...

[0051] Based on steps lOOd and lOOf, Figs. 2 also respectively show group Ggc and its respective group Gsc. Ggc includes graphs to which their respective Gc members are converted. Gsc includes these Ggc graphs after being mapped, by the solver provided in step lOOe, to the aforementioned physical system. The shown graphs are: <Ggc0,Gsc0>, <Ggcl,Gscl>, <Ggc2,Gsc2>, <Ggc3,Gsc3>, <Ggc4,Gsc4>, <Ggc5,Gsc5>, <Ggc6,Gsc6>.

[0052] Based on step lOOf, Figs. 2 also show, associated with each Gsc member, a respective Asc member, i.e., AscO to Asc6, indicating the corresponding number of inter-operations between coreO and corel.

[0053] Referring now to Fig. 2c, there is shown GcO, which is equal to Gncl and to the entire code 202. Also shown their corresponding graph GgcO and its mapped version GscO, which are depicted together as block 214. Block 214 includes cores 216 and 218, which are connected with 4 interoperations. Hence, the amount AscO is equal 4. Fig. 2d depicts a resulting compiled code 220 that is associated with Gncl, which includes the mapping to cores 216 and 218. The 4 inter-operations of Fig. 2c are indicated as "remote: ex". As there are no penalties due to code transitions, Gamntl = AscO = 4.

[0054] Fig. 2e that follows depicts Gnc2 code structure 222 as specified above. Fig. 2f depicts the Ggc and Gsc members 224, 226... 232 that correspond to Gnc2 code parts. It stems from the Gsc drawings that their respective inter-operations Asci = Asc2 = Asc3 = Asc4 = Asc5 = 0. Fig 2g depicts the compiled code, 234, associated with Gnc2. There are 0 inter-operations (remote: ex) because all the associated Asc members equal 0. However, 4 transitions between mapped code parts result in respective 4 qubit transfers, indicated as "remote: tp", which results in transfer penalty of 4 teleportations. Summing both the Asc members and the penalty results in Gamnt2 = 4.

[0055] Fig 2h depicts Gnc3 code structure 236 as specified above. Fig. 2i depicts the Ggc and Gsc members 240, 230 and 232 that correspond to Gnc3 code parts. It stems from the Gsc drawings that their respective inter-operations are Asc6 = 1 and Asc4 = Asc5 = 0. Fig 2j depicts the compiled code, 242, associated with Gnc3. There is one inter-operations (remote: ex) contributed by Asc6. However, 2 transitions between mapped code parts result in respective 2 qubit transfers (remote: tp), which results in transfer penalty of 2 teleportations. Summing both the Asc and the penalty components results in Gamnt3 = 3. This turns to be the optimal compilation, taking into account the above results, as well as results obtained for other Gnc members but not shown in Figs. 2 for the sake of simplicity.

[0056] It will thus be appreciated that the embodiments described above are cited by way of example, and that the present invention is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the present invention includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons skilled in the art upon reading the foregoing description and which are not disclosed in the prior art.

Claims

CLAIMS1 . A processor-implemented compilation method for efficient mapping of a quantum logical qubits in a program code, denoted as "code", to a multi-core quantum computing physical system, denoted as "system", and having a known number of cores and known number of physical qubits in each core, the method comprising the following steps: a. partitioning the code to two or more predetermined successive segments; b. identifying a group, denoted as "Gc", including at least part of all possible contiguous sequences of one or more code segments; c. identifying a group, denoted as "Gnc", including at least part of all possible nonoverlapping combinations of Gc members; d. converting each Gc member to a corresponding graph, thus creating a graph group, denoted as "Ggc", by associating each logical qubit in said each Gc member with a different vertex in the graph, and each inter-qubit operation in said each Gc member with a different edge between the pair of vertices involved in said each inter-qubit operation; e. providing a graph-solver program, denoted as "solver", adapted to map the logical qubits in a given Gc member to respective physical qubits within the system cores by processing the graph corresponding to said given Gc member as follows: partitioning the graph vertices into exclusive groups representing the system cores such that the groups number and magnitudes are constrained by the number of the system cores and number of physical qubits within each core respectively, while attempting to minimize the total amount of the resulting inter-group edges, i.e., the amount of operations between different cores, denoted as "inter-operations"; f. applying the solver to all the Ggc members, thus creating a respective group of solver results, denoted "Gsc", wherein each member includes the contiguous code part of its corresponding Gc member, now containing physical qubits, and is associated with an amount, denoted as "Asc", of the inter-operations included in said contiguous code part; g. calculating a group of inter-operation amounts, denoted as "Gamnt", one-to-one corresponding to Gnc and calculated as follows:i. for the Gnc member that is the entire code segment, determining its correspondingGamnt member as the Asc associated with the Gsc member, denoted as Cse, corresponding to the entire code segment; ii. for any Gnc member that is not the entire code segment, calculating its associatedGamnt member by summing the Asc amounts associated with all the Gsc members corresponding to said any Gnc member, and for all the code parts outside said all Gsc members, if there are such code parts, also including in said associated Gamnt the amount of all the Cse inter-operations belonging to said outside code parts, and iii. for any Gnc member that is not the entire code segment, also including in the Gamnt member calculated in II above penalties that are possibly associated with code transitions between adjacent Gsc members, and / or therebetween and Cse code parts outside thereof, wherein the penalty associated with each such transition is calculated as the amount of inter-operations needed to transfer qubits between cores due to said each such transitions; and h. determining a compiled code structure, in the sense of having minimum Gamnt member, as follows: i. selecting the Gnc member for which the minimum Gamnt member is achieved in step g above, ii. expressing the code in physical qubit terms according to the Gsc members corresponding to the selected Gnc member and the Cse code parts outside thereof, and iii. adding to the code inter-operations for transferring qubits between cores, if needed, based on step g.III above. . The method of claim 1, comprising optionally weighting the edges of the solver processed graphs, and correspondingly affect the Asc amounts resulting in step f. . The method of claim 1, comprising optionally calculating the Gamnt members in step g using weighted sums of the involved inter-operations and qubit transfer operations. . The method of claim 1, wherein the inter-core operations needed to transfer qubits between cores comprise qubit teleportation. . The method of claim 1, comprising predetermining at least part of the code segments based on the following criterion of maximum qubit distribution in a segment: the ratio between thenumber of different qubits involved in the segment to the total number of inter-qubit operations therein is not greater than a predetermined maximum threshold. . The method of claim 5, comprising computationally scaling down the system for at least part of the Gc members not meeting the above-mentioned criterion, by calculating for such Gc members the above-mentioned ratio, and computationally scaling down the system for said at least part of the Gc members by the calculated ratio, provided that said calculated ratio is not lower than a predetermined minimum threshold higher than the above maximum threshold. . The method of claim 1, comprising a further step, conditioned on being the system structured such that a relatively small group of cores are connected to the other cores through physical connections having substantially higher latency than that of the physical connections interconnecting the other cores, said further step comprising remapping logical qubits to physical qubits such that said cores having high latency physical connections would be involved with less inter-operations per core relative to said other cores. . A processing arrangement for carrying out the method of claim 1.

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