Semiconductor module having at least a first semiconductor assembly, a second semiconductor assembly and a heat sink

Abstract

The invention relates to a semiconductor module (2) having at least a first semiconductor assembly (4), a second semiconductor assembly (6) and a common heat sink (14), wherein: the heat sink (14) is configured such that a cooling fluid is conducted in a cooling-fluid flow direction (18); the semiconductor assemblies (4, 6) are disposed on a surface (12) of the heat sink (14); the semiconductor assemblies (4, 6) each have a substrate (22, 24), and on each of said substrates at least one semiconductor element (28) is connected, in particularly integrally; the substrates (22, 24) each comprise a dielectric material layer (30, 32). In order to achieve improved reliability, according to the invention a second dielectric material layer (32) of the second semiconductor assembly (6) differs, at least in respect of its thermal conductivity, from a first dielectric material layer (30) of the first semiconductor assembly (4).

Description

[0001] Description

[0002] Semiconductor module with at least a first semiconductor arrangement, a second semiconductor arrangement and a heat sink

[0003] The invention relates to a semiconductor module with at least a first semiconductor arrangement, a second semiconductor arrangement and a common heat sink.

[0004] Furthermore, the invention relates to a power converter with at least one such power semiconductor module.

[0005] Furthermore, the invention relates to a method for producing such a semiconductor module.

[0006] Furthermore, the invention relates to a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to simulate the behavior of such a semiconductor module.

[0007] In such power converters, semiconductor modules are usually enclosed, in particular by a housing, for example via a solid metallic base plate, and screwed onto a heat sink. A power converter can be, for example, a rectifier, an inverter, a converter or a DC-DC converter. The semiconductor elements used in the semiconductor modules include transistors, diodes, triacs or thyristors. The transistors are designed, for example, as insulated-gate bipolar transistors (IGBTs), field-effect transistors or bipolar transistors. The semiconductor elements are usually contacted on a substrate.

[0008] The published patent application WO 2022 / 002464 A1 describes a power module with at least two power units, each comprising at least one power semiconductor and a substrate. In order to reduce the required installation space of the power module and to improve the all-clear function, it is proposed that the respective at least one power semiconductor be connected, in particular in a materially bonded manner, to the respective substrate, wherein the substrates of the at least two power units are each directly bonded to a surface of a common heat sink.

[0009] US Patent Application No. 10,014,238 B2 describes an electronic assembly containing a thermal management system, which may include a heat sink with electronic components mounted thereon. The electronic components may be mounted on the heat sink in a staggered arrangement along a center line substantially perpendicular to the flow direction of a coolant.

[0010] Against this background, it is an object of the present invention to provide a semiconductor module which has improved reliability.

[0011] This object is achieved according to the invention by a semiconductor module with at least a first semiconductor arrangement, a second semiconductor arrangement and a common heat sink, wherein the heat sink is configured such that a cooling fluid is conducted in a cooling fluid flow direction, wherein the semiconductor arrangements are arranged on a surface of the heat sink, wherein the semiconductor arrangements each have a substrate to which at least one semiconductor element is connected, in particular in a materially bonded manner, wherein the substrates each comprise a dielectric material layer, wherein a second dielectric material layer of the second semiconductor arrangement differs from a first dielectric material layer of the first semiconductor arrangement at least with regard to its thermal conductivity, wherein the second semiconductor arrangement is arranged closest to a downstream end of the heat sink,wherein the second dielectric material layer has a higher thermal conductivity than the first dielectric material layer. Furthermore, the object is achieved according to the invention by a power converter having at least one such semiconductor module.

[0012] Moreover, the object is achieved according to the invention by a method for producing such a semiconductor module, wherein at least one semiconductor element is connected, in particular materially, to a substrate for producing the semiconductor arrangements, wherein in a further step the semiconductor arrangements are connected, in particular materially, on the surface of the heat sink.

[0013] Furthermore, the object is achieved according to the invention by a computer program product comprising instructions which, when the program is executed by a computer, cause the computer to simulate a behavior, in particular thermal, mechanical and / or electrical, of such a semiconductor module.

[0014] The advantages and preferred embodiments listed below with regard to the semiconductor module can be transferred analogously to the power converter, the method and the computer program product.

[0015] The invention is based on the idea of ​​improving the reliability of a semiconductor module by uniformly dissipating heat from semiconductor arrangements arranged on a surface of a common heat sink. The heat is dissipated via a cooling fluid which is conducted in a cooling fluid flow direction. The cooling fluid can be, among other things, gaseous, for example air. Additionally or alternatively, liquid cooling fluids or phase change cooling can also be used. The semiconductor arrangements each have a substrate to which at least one semiconductor element is connected. The semiconductor elements are connected to the respective substrate, for example in a materially bonded manner, in particular by soldering, sintering or adhesion.

[0016] The substrates of the semiconductor arrangements each comprise a dielectric material layer for producing an electrically insulating and thermally conductive connection between the respective semiconductor elements and the common heat sink. Such dielectric material layers can contain, among other things, a ceramic material. In order to achieve uniform all-clear, a second dielectric material layer of the second semiconductor arrangement differs from a first dielectric material layer of the first semiconductor arrangement at least with regard to its thermal conductivity. For example, for the second semiconductor arrangement, which, for example, has higher thermal losses than the first semiconductor arrangement, a second dielectric material layer is used which has a higher thermal conductivity than the first dielectric material layer.This ensures uniform heat dissipation even when the waste heat levels vary, which has a positive effect on the reliability of the semiconductor module and extends its service life.

[0017] A computer program product which comprises instructions which, when the program is executed by a computer, cause the computer to simulate a behavior of the semiconductor module, in particular a thermal, mechanical and / or electrical behavior, can comprise a “digital twin” or be designed as such. Such a digital twin is described, for example, in the published patent application US 2017 / 0286572 A1. The disclosure content of US 2017 / 0286572 A1 is incorporated by reference into the present application. The “digital twin” is, for example, a digital representation of the components relevant for the operation of the semiconductor module.

[0018] The second semiconductor arrangement is arranged closest to a downstream end of the heat sink, wherein the second dielectric material layer has a higher thermal conductivity than the first dielectric material layer. For example, the common heat sink is supplied with a cooling air flow on one side, e.g. via a fan, wherein the cooling air flow is directed from an upstream end to a downstream end of the common heat sink. In particular, the second semiconductor arrangement is arranged between the first semiconductor arrangement and the downstream end of the common heat sink. Due to the thermal losses of the first semiconductor arrangement, the cooling fluid heats up when it reaches the second semiconductor arrangement. Due to the higher thermal conductivity of the second dielectric material layer, more uniform heat dissipation and thus thermal optimization is achieved.

[0019] A further embodiment provides that the semiconductor module has at least one third semiconductor arrangement, which is arranged between the first semiconductor arrangement and the second semiconductor arrangement, comprising a third substrate to which at least one semiconductor element is connected, in particular in a materially bonded manner, wherein the third substrate comprises a third dielectric material layer, wherein the third dielectric material layer differs from the first dielectric material layer and / or the second dielectric material layer at least with regard to its thermal conductivity. Among other things, the at least three semiconductor arrangements can each comprise a half-bridge for implementing a three-phase power converter, in particular when there are more than three semiconductor arrangements of a multi-level power converter. Additionally or alternatively, semiconductor arrangements can be connected in parallel, which enables simple scaling or.Modularization of the semiconductor module is possible.

[0020] A further embodiment provides that the second dielectric material layer has a higher thermal conductivity than the first dielectric material layer and / or the third dielectric material layer. Due to the higher thermal conductivity of the second dielectric material layer, which is arranged closest to the downstream end of the heat sink, more uniform heat dissipation and thus thermal optimization is achieved. A further embodiment provides that the semiconductor devices are arranged in a staggered pattern along an axis on a surface of the heat sink, wherein the cooling fluid flow direction extends substantially along the axis. The axis can be referred to, inter alia, as the flow axis, wherein the cooling fluid flow direction runs substantially parallel to the flow axis.For example, the semiconductor arrays are distributed alternately, particularly at variable spacing, along the flow axis. Alternating means that the semiconductor arrays are shifted alternately to the left and right relative to the axis. This achieves more uniform cooling of the semiconductor arrays.

[0021] A further embodiment provides that a substrate surface of the semiconductor device arranged closest to the downstream end of the heat sink is at least 20% larger, in particular at least 50% larger, than a substrate surface of another semiconductor device arranged on the surface of the heat sink. In this way, improved heat spreading can be achieved, which additionally results in more uniform heat dissipation, which has a positive effect on the reliability of the semiconductor module and extends its service life.

[0022] A further embodiment provides that a semiconductor arrangement arranged closest to the downstream end of the heat sink is configured as at least part of an inverter. In particular, the semiconductor arrangement arranged at the downstream end of the heat sink has a dielectric material layer with a higher thermal conductivity. Such inverters comprise switchable semiconductor elements, in particular transistors such as IGBTs, while a rectifier, which can form a converter with an inverter, can be manufactured with non-switchable semiconductor elements, such as diodes. Therefore, in such an inverter, a larger temperature swing can occur during operation when current flows, with a higher thermal conductivity of the dielectric material layer significantly reducing the temperature swing, which has a positive effect on the service life of the semiconductor module.

[0023] A further embodiment provides that the substrates of the semiconductor devices are each directly bonded to the surface of the common heat sink via a bonding layer. A directly bonded connection is understood to mean a direct connection that includes connecting means for producing the bonded connection, such as adhesives, a solder alloy, sintering paste, etc., but excludes an additional connecting element such as an additional conductor, a bonding wire, a spacer, a base plate, thermal paste, etc. By eliminating such an additional connecting element, an improved thermal connection of the semiconductor elements is achieved, so that heat dissipation is improved. In addition, the directly bonded connection saves installation space.

[0024] A further embodiment provides that at least the first dielectric material layer of the first substrate contains aluminum oxide and at least the second dielectric material layer of the second substrate contains aluminum nitride. While aluminum oxide is more cost-effective, aluminum nitride makes a smaller contribution to the temperature difference, so that the temperature difference is reduced overall. For example, aluminum oxide contributes 40 K to the temperature difference, while aluminum nitride only contributes 36 K. By using the more expensive aluminum nitride in the semiconductor arrangement arranged at the downstream end of the heat sink, more uniform heat dissipation is achieved and thus the service life of the semiconductor module is improved.

[0025] A further embodiment provides that a first connecting layer for connecting the first substrate is thinner than a second connecting layer for connecting the second substrate. For example, the second connecting layer is 1.2 times thicker than the first connecting layer. In particular, the expansion coefficient of aluminum nitride differs more from that of a metallic surface of the heat sink, which contains, for example, copper or aluminum, than the expansion coefficient of aluminum oxide. A thicker connecting layer absorbs more stress due to unequal expansion coefficients and thus has a stronger stress-buffering effect between the respective dielectric material layer and the metallic heat sink. A thicker second connecting layer therefore prevents the heat sink from bending due to unequal expansion coefficients.

[0026] A further embodiment provides that a first connecting layer for connecting the first substrate is made of a first alloy, and a second connecting layer for connecting the second substrate is made of a second alloy, wherein the first alloy differs from the second alloy in terms of its composition. For example, the second connecting layer for connecting the second substrate is exposed to greater thermal stress, so that a less expensive and lower-performance alloy is sufficient for the first connecting layer for connecting the first substrate.

[0027] A further embodiment provides that the second alloy has a higher mass fraction of antimony than the first alloy. For example, a low-cost SAG (tin / silver / copper) solder is used for the first alloy, while a more high-performance tin-antimony alloy is used for the second alloy to connect the second substrate, which is subject to higher thermal stress. Thus, an improved cost position is achieved while maintaining high reliability of the semiconductor module.

[0028] A further embodiment provides that the substrates of the semiconductor devices each have a thickness of 25 pm to 400 pm, in particular 50 pm to 250 pm. Such a thickness represents a compromise with regard to thermal optimization and heat sink deflection.

[0029] In the following, the invention is described and explained in more detail with reference to the exemplary embodiments shown in the figures.

[0030] It shows :

[0031] FIG 1 is a schematic perspective view of a first embodiment of a semiconductor module,

[0032] FIG 2 shows a schematic cross-sectional view of a second embodiment of a semiconductor module,

[0033] FIG 3 is a schematic cross-sectional view of a third embodiment of a semiconductor module,

[0034] FIG 4 is a schematic representation of a fourth embodiment of a semiconductor module in a plan view,

[0035] FIG 5 is a schematic representation of a power converter with a semiconductor module.

[0036] The exemplary embodiments explained below are preferred embodiments of the invention. In the exemplary embodiments, the described components of the embodiments each represent individual features of the invention that can be considered independently of one another. These features also further develop the invention independently of one another and are thus to be regarded as part of the invention, either individually or in a combination other than that shown. Furthermore, the described embodiments can also be supplemented by further features of the invention already described. The same reference numerals have the same meaning in the various figures.

[0037] FIG 1 shows a schematic perspective illustration of a first embodiment of a semiconductor module 2, which comprises a first semiconductor arrangement 4, a second semiconductor arrangement 6, and a third semiconductor arrangement 8, wherein the semiconductor arrangements 4, 6, 8 are mounted in a staggered pattern along an axis 10 on a surface 12 of a common heat sink 14. The common heat sink 14 is configured by cooling ribs 16, which are designed as cooling fins, so that a gaseous cooling fluid flows in a coolant flow direction 18 along the cooling fins, wherein the cooling fluid flow direction 18 extends substantially parallel to the axis 10. The semiconductor module 2 is therefore cooled on one side.

[0038] The second semiconductor arrangement 6 is arranged closest to a downstream end 20 of the common heat sink 14. In addition, the semiconductor arrangements 4, 6, 8 each comprise a substrate 22, 24, 26, to which semiconductor elements 28 are connected, in particular in a materially bonded manner. By way of example, the semiconductor elements 28 are embodied as transistors T and diodes D connected in opposite parallel. In particular, the transistors T are embodied as vertical power transistors, for example as insulated-gate bipolar transistors (IGBTs). The materially bonded connection of the semiconductor elements 28 to the respective substrate 22, 24, 26 can be produced, among other things, by soldering, sintering, or adhesion.

[0039] The substrates 22, 24, 26 each comprise a dielectric material layer 30, 32, 34, in particular metallized on both sides, via which the respective semiconductor elements 28 are connected to the common heat sink 14 in an electrically insulating and thermally conductive manner. By way of example, a second dielectric material layer 32 of the second semiconductor arrangement 6 differs at least from a first dielectric material layer 30 of the first semiconductor arrangement 4 with regard to its thermal conductivity. In addition, a third dielectric material layer 34 of the third semiconductor arrangement 8 can differ from the first dielectric material layer 30 and / or the second dielectric material layer 6 with regard to its thermal conductivity.

[0040] For example, the cooling fluid flowing in the coolant flow direction 18 can heat up due to the heat loss generated in the semiconductor elements 28 of the first semiconductor arrangement 4 and third semiconductor arrangement 8, so that a higher thermal conductivity of the second dielectric material layer 32 leads to more uniform cooling of the semiconductor arrangements 4, 6, 8. For example, the first dielectric material layer 30 of the first substrate 22 and the third dielectric material layer 34 of the third substrate 26 are made of aluminum oxide, while the second dielectric material layer 32 of the second substrate 24 closest to the downstream end 20 of the common heat sink 14 is made of aluminum nitride, which has a higher thermal conductivity than aluminum oxide.In this way, temperature swings during operation of the semiconductor module 2, for example in the region of the second semiconductor arrangement 4, are reduced, which has a positive effect on the service life of the semiconductor module 2.

[0041] FIG. 2 shows a schematic cross-sectional view of a second embodiment of a semiconductor module 2, which comprises, by way of example, two semiconductor arrangements 4, 6, wherein the second semiconductor arrangement 6 is arranged closest to the downstream end 20 of the heat sink 14. The substrates 22, 24 each have a thickness d of 25 pm to 400 pm, in particular 50 pm to 250 pm. Furthermore, they are each constructed from a dielectric material layer 30, 32 that is metallized on both sides and contains a ceramic material. The first dielectric material layer 30 of the first substrate 22 is made of aluminum oxide, while the second dielectric material layer 32 of the second substrate 24 closest to the downstream end 20 of the common heat sink 14 is made of aluminum nitride, which has a higher thermal conductivity than aluminum oxide.The semiconductor elements 28 are integrally connected to the respective substrate 22, 24 via a first metallization 36. In addition, the substrates 22, 24 of the semiconductor arrangements 4, 6 each have a second metallization 38 on a side facing away from the semiconductor elements 28, which are directly integrally connected to the surface 12 of the common heat sink 14 via a connecting layer 40, 42. The semiconductor elements 28 are thus electrically insulating and thermally conductively connected to the common heat sink 14 via respective dielectric material layers 30, 32. The direct integral connection via the respective connecting layer 40, 42 can be produced, among other things, by soldering or sintering, but no additional connecting elements such as metal blocks, sheets or thermal paste are used.The first bonding layer 40 for bonding the first substrate 22 is made of a first alloy, and the second bonding layer 42 for bonding the second substrate 24 is made of a second alloy. The first alloy differs from the second alloy in terms of its composition. In particular, the second alloy contains a higher mass fraction of antimony than the first alloy. For example, the first alloy is an inexpensive SAG (tin / silver / copper) solder, while the second alloy is a tin-antimony alloy.The second dielectric material layer 32 of the second substrate 24, made of aluminum nitride, ensures greater deflection of the heat sink 14 than the first dielectric material layer 30 of the first substrate 22, made of aluminum oxide, due to its different expansion coefficient compared to the metallic heat sink 14. This deflection is at least partially compensated for by the more performant second alloy. The heat sink 14 is made of a first metallic material 44, for example aluminum or an aluminum alloy. Cavities 46 are introduced into its surface 12 and are filled with a second metallic material 48, which has a higher thermal conductivity than the first metallic material. For example, the second metallic material 48 contains copper.The semiconductor arrangements 4, 6 are each assigned a cavity 46 filled with the second metallic material 48, wherein the second metallic material 48 is substantially flush with the surface 12 of the heat sink 14. The connecting layers 40, 42 are each fully bonded to the second metallic material 48 of the cavities 46. In particular, the second metallic material 48 is introduced into the cavities 46 by means of an additive process, for example by means of cold gas spraying. The semiconductor arrangements 4, 6 can each be assigned a dedicated sensor, in particular a temperature sensor, in order to monitor the temperature of the semiconductor elements 28.

[0042] A power board 50 arranged essentially parallel to the surface 12 of the heat sink 14 is connected to the semiconductor arrangements 4, 6 via freely positionable contacts 52, wherein the freely positionable contacts 52 are materially connected to the first metallizations 36 of the respective substrates 22, 24 of the semiconductor arrangements 4, 6. In this context, a power board 50 is to be understood as a printed circuit board which is designed, for example, as a printed circuit board (PCB), in particular a multi-layered one. The printed circuit board contains, for example, an interface to the power units, a driver circuit, a control circuit, and / or capacitors. A freely positionable contact 52 in this context is to be understood as meaning, among other things, a pin which, due to its structural properties, can be freely arranged on a substrate 22, 24.Such structural properties are, for example, a foot which allows the pin to be arranged freely and stably on the substrate without a housing or other stabilizing means, for example by means of a material-fit connection to the substrate, and / or a wobble circle which makes it easier to find a hole in the power board 50 and ensures greater stability and robustness, for example in the event of thermal expansion during operation. The freely positionable contacts 52 have an elastically yielding section and are connected to the power board 50, for example by means of a press-fit connection. The further design of the semiconductor module 2 in FIG. 2 corresponds to the design in FIG. 1.

[0043] 3 shows a schematic cross-sectional view of a third embodiment of a semiconductor module 2. The first dielectric material layer 30 of the first substrate 22 is made of aluminum oxide, while the second dielectric material layer 32 of the second substrate 24 closest to the downstream end 20 of the common heat sink 14 is made of aluminum nitride. The first connecting layer 40 for connecting the first substrate 22 has a first thickness dl, while the second connecting layer 42 for connecting the second substrate 24 has a second thickness d2, wherein the second thickness d2 of the second connecting layer 42 is greater than the first thickness dl of the first connecting layer 40. In particular, the second thickness d2 is 1.2 times or 20% greater than the first thickness dl.The second dielectric material layer 32 made of aluminum nitride, due to its different expansion coefficient compared to the metallic heat sink 14, ensures greater deflection of the heat sink 14 than the first dielectric material layer 30 made of aluminum oxide, which is at least partially compensated for by the thicker second connecting layer 42. The thicker second connecting layer thus acts more strongly as a stress-buffering layer between the respective dielectric material layer 30, 32 and the metallic heat sink 14. The further embodiment of the semiconductor module 2 in FIG. 3 corresponds to the embodiment in FIG. 2.FIG 4 shows a schematic representation of a fourth embodiment of a semiconductor module 2 in a plan view, which has, by way of example, three semiconductor arrangements 4, 6, 8, wherein the semiconductor arrangements 4, 6, 8 are arranged in an offset pattern along an axis 10 on the surface 12 of the heat sink 14. The second semiconductor arrangement 6 is arranged closest to the downstream end 20 of the heat sink 14. Relative to the axis 10, the third semiconductor arrangement 8 is arranged between the first semiconductor arrangement 4 and the second semiconductor arrangement 6. The first semiconductor arrangement 4 is configured as a, in particular three-phase, rectifier 54, while the second semiconductor arrangement 6 is configured as a, in particular three-phase, inverter 56. The third semiconductor arrangement 8 is configured as a monitoring device 58, e.g. of an intermediate circuit voltage, in particular as a braking chopper.The inverter 56 comprises switchable semiconductor elements such as transistors, in particular IGBTs, while diodes are used in the rectifier. A substrate area of ​​the inverter 56 is at least 1.5 times, in particular 2 times as large as a substrate area of ​​the rectifier 54 or the monitoring device 58. The dielectric material layer 32 of the inverter 56 is made of aluminum nitride, while the dielectric material layers 30, 34 of the rectifier 54 and the monitoring device 58 are made of less expensive aluminum oxide. The further embodiment of the semiconductor module 2 in FIG. 4 corresponds to the embodiment in FIG. 3.

[0044] FIG 5 shows a schematic representation of a power converter 60 with a semiconductor module 2. The power converter 60 can comprise more than one semiconductor module 2.

[0045] In summary, the invention relates to a semiconductor module 2 with at least a first semiconductor arrangement 4, a second semiconductor arrangement 6 and a common heat sink 14, wherein the heat sink 14 is configured such that a cooling fluid is guided in a cooling fluid flow direction 18, wherein the semiconductor arrangements 4, 6 are arranged on a surface 12 of the heat sink 14, wherein the semiconductor arrangements 4, 6 each have a substrate 22, 24, to which at least one semiconductor element 28 is connected, in particular in a materially bonded manner, wherein the substrates 22, 24 each comprise a dielectric material layer 30, 32. In order to achieve improved reliability, it is proposed that a second dielectric material layer 32 of the second semiconductor arrangement 6 differs from a first dielectric material layer 30 of the first semiconductor arrangement 4 at least with regard to its thermal conductivity.

Claims

Patent claims 1. A semiconductor module (2) comprising at least a first semiconductor arrangement (4), a second semiconductor arrangement (6), and a common heat sink (14), wherein the heat sink (14) is configured to conduct a cooling fluid in a cooling fluid flow direction (18), wherein the semiconductor arrangements (4, 6) are arranged on a surface (12) of the heat sink (14), wherein the semiconductor arrangements (4, 6) each have a substrate (22, 24) to which at least one semiconductor element (28) is connected, in particular in a materially bonded manner, wherein the substrates (22, 24) each comprise a dielectric material layer (30, 32), characterized in that a second dielectric material layer (32) of the second semiconductor arrangement (6) differs from a first dielectric material layer (30) of the first semiconductor arrangement (4) at least with regard to its thermal conductivity,wherein the second semiconductor device (6) is arranged closest to a downstream end (20) of the heat sink (14), wherein the second dielectric material layer (32) has a higher thermal conductivity than the first dielectric material layer (30)., 2. Semiconductor module (2) according to claim 1, comprising at least one third semiconductor arrangement (8) which is arranged between the first semiconductor arrangement (4) and the second semiconductor arrangement (6), comprising a third substrate (26) on which at least one semiconductor element (28) is connected, in particular materially, wherein the third substrate (26) comprises a third dielectric material layer (34), wherein the third dielectric material layer (34) differs from the first dielectric material layer (30) and / or the second dielectric material layer (32) at least with regard to its thermal conductivity.

3. Semiconductor module (2) according to claim 2, wherein the second dielectric material layer (32) has a higher thermal conductivity than the first dielectric material layer (30) and / or the third dielectric material layer (34).

4. Semiconductor module (2) according to one of the preceding claims, wherein the semiconductor devices (4, 6, 8) are arranged in a staggered pattern along an axis (10) on a surface (12) of the heat sink (14), wherein the cooling fluid flow direction (18) extends substantially along the axis (10).

5. Semiconductor module (2) according to one of the preceding claims, wherein a substrate area of ​​the semiconductor arrangement (4, 6, 8) arranged closest to the downstream end (20) of the heat sink (14) is at least 20% larger, in particular at least 50% larger, than a substrate area of ​​a further semiconductor arrangement (4, 6, 8) arranged on the surface (12) of the heat sink (14).

6. Semiconductor module (2) according to one of the preceding claims, wherein a semiconductor arrangement (4, 6, 8) arranged closest to the downstream end (20) of the heat sink (14) is configured as at least part of an inverter.

7. Semiconductor module (2) according to one of the preceding claims, wherein the substrates (22, 24, 26) of the semiconductor devices (4, 6, 8) are each directly materially connected to the surface (12) of the common heat sink (14) via a connecting layer (40, 42).

8. Semiconductor module (2) according to claim 7, wherein at least the first dielectric material layer (30) of the first substrate (22) contains aluminum oxide and at least the second dielectric material layer (32) of the second substrate (24) contains aluminum nitride.

9. Semiconductor module (2) according to claim 8, wherein a first connecting layer (40) for connecting the first substrate (22) is thinner than a second connecting layer (42) for connecting the second substrate (24).

10. Semiconductor module (2) according to one of claims 8 or 9, wherein a first connecting layer (40) for connecting the first substrate (22) is made of a first alloy and a second connecting layer (42) for connecting the second substrate (24) is made of a second first alloy, wherein the first first alloy differs from the second alloy in terms of its composition.

11. Semiconductor module (2) according to claim 10, wherein the second alloy has a higher mass fraction of antimony than the first alloy.

12. Semiconductor module (2) according to one of the preceding claims, wherein the substrates (22, 24, 26) of the semiconductor arrangements (4, 6, 8) each have a thickness d of 25 pm to 400 pm, in particular 50 pm to 250 pm.

13. Semiconductor module (2) according to one of the preceding claims, wherein the semiconductor elements (28) of the semiconductor arrangements (4, 6) are designed as transistors (T) and diodes (D) connected in parallel.

14. Power converter (60) with at least one semiconductor module (2) according to one of the preceding claims.

15. A method for producing a semiconductor module (2) according to one of claims 1 to 13, wherein in each case at least one semiconductor element (28) is connected, in particular materially, on a substrate (22, 24, 26) for producing the semiconductor arrangements (4, 6, 8), wherein in a further step the semiconductor arrangements (4, 6, 8) are connected, in particular materially, on the surface (12) of the heat sink (14).

16. A computer program product comprising instructions which, when the program is executed by a computer, cause the computer to simulate a behavior, in particular thermal, mechanical and / or electrical, of a semiconductor module (2) according to one of claims 1 to 13.

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