Multi-transmission radio frequency frontend circuit

Abstract

A multi-transmission radio frequency (RF) frontend circuit is provided. Herein, a pair of power amplifiers are configured to amplify an RF signal based on a pair of modulated voltages generated by a pair of power management integrated circuits (PMICs). Knowing that for concurrent transmission of the RF signal, such as uplink multiple-input multiple-output (MIMO), a total output power of the power amplifiers must not exceed a certain power limit. As such, one of the power amplifiers can be a higher power class power amplifier to output the higher power and another one of the power amplifiers can be a lower power class power amplifier to output the lower power. This creates an opportunity to make one of the PMICs a lower power class PMIC to help reduce the footprint of the multi-transmission RF frontend circuit.

Description

MULTI-TRANSMISSION RADIO FREQUENCY FRONTEND CIRCUITRelated Applications

[0001] This application claims the benefit of U.S. provisional patent application serial number 63 / 483,993, filed on February 9, 2023, and U.S. provisional patent application serial number 63 / 466,917, filed on May 16, 2023, the disclosures of which are hereby incorporated herein by reference in their entireties.Field of the Disclosure

[0002] The technology of the disclosure relates generally to a radio frequency (RF) frontend circuit capable of supporting multiple concurrent transmissions.Background

[0003] Mobile communication devices have become increasingly common in current society for providing wireless communication services. The prevalence of these mobile communication devices is driven in part by the many functions that are now enabled on such devices. Increased processing capabilities in such devices means that mobile communication devices have evolved from being pure communication tools into sophisticated mobile multimedia centers that enable enhanced user experiences.

[0004] A state-of-the-art mobile communication device must be able to communicate a radio frequency (RF) signal(s) in a variety of wireless communication systems, such as long-term evolution (LTE) and new radio (NR), based on a variety of transmit / receive configurations, such as uplink / downlink multiple-input, multiple-output (UL / DL-MIMO), enhanced dual-connectivity (EN- DC), and diversity receive (DRX). As an example, many multi-transmission proposals have been made for third-generation partnership project (3GPP) release 18 to support concurrent UL-MIMO and EN-DC transmissions on multiple RF bands. In this regard, a wireless communication device is required to concurrently transmit at least three RF signals (2xMIMO + 1 xEN-DC).

[0005] Embodiments of the disclosure relate to a multi-transmission radio frequency (RF) frontend circuit. Herein, a pair of power amplifiers are configured to amplify an RF signal based on a pair of modulated voltages generated by a pair of power management integrated circuits (PMICs). Knowing that for concurrent transmission of the RF signal, such as uplink multiple-input multipleoutput (MIMO), a total output power of the power amplifiers must not exceed a certain power limit (e.g., 26 dBm). In this regard, one of the power amplifiers may amplify the RF signal to a higher power (e.g., 27 dBm) while the other one of the power amplifiers may amplify the RF signal to a lower power (e.g., 21 dBm). As such, one of the power amplifiers can be a higher power class power amplifier to output the higher power and another one of the power amplifiers can be a lower power class power amplifier to output the lower power. This creates an opportunity to make one of the PMICs a lower power class PMIC to help reduce the footprint of the multi-transmission RF frontend circuit.

[0006] In one aspect, a multi-transmission RF frontend circuit is provided. The multi-transmission RF frontend circuit includes a pair of power amplifiers. Each power amplifier in the pair of power amplifiers is configured to amplify an RF signal for concurrent transmission based on a selected one of a pair of modulated voltages. The multi-transmission RF frontend circuit also includes a higher power class PMIC and a lower power class PMIC. Each of the higher power class PMIC and the lower power class PMIC is configured to generate a respective one of the pair of modulated voltages. The multi-transmission RF frontend circuit also includes a switch circuit. The switch circuit is configured to couple each of the pair of power amplifiers to a selected one of the higher power class PMIC and the lower power class PMIC to receive the selected one of the pair of modulated voltages.

[0007] In another aspect, a wireless device is provided. The wireless device includes transmit circuitry. The transmit circuitry includes a pair of power amplifiers. Each power amplifier in the pair of power amplifiers is configured to amplify an RF signal for concurrent transmission based on a selected one of apair of modulated voltages. The transmit circuitry also includes a higher power class PMIC and a lower power class PMIC. The higher power class PMIC and the lower power class PMIC are each configured to generate a respective one of the pair of modulated voltages. The wireless device also includes antenna switching circuitry. The antenna switching circuitry includes a switch circuit. The switch circuit is configured to couple each of the pair of power amplifiers to a selected one of the higher power class PMIC and the lower power class PMIC to receive the selected one of the pair of modulated voltages.

[0008] In another aspect, a method for operating a multi-transmission RF frontend circuit is provided. The method includes configuring a pair of power amplifiers to each amplify an RF signal for concurrent transmission based on a selected one of a pair of modulated voltages. The method also includes configuring a higher power class PMIC and a lower power class PMIC to each generate a respective one of the pair of modulated voltages. The method also includes configuring a switch circuit to couple each of the pair of power amplifiers to a selected one of the higher power class PMIC and the lower power class PMIC to receive the selected one of the pair of modulated voltages.

[0009] Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.Brief Description of the Drawing Figures

[0010] The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.

[0011] Figure 1 is a schematic diagram of an exemplary existing multitransmission radio frequency (RF) frontend circuit that requires three power class 2 (PC2) power management integrated circuits (PMICs) to support three simultaneous transmissions; and

[0012] Figure 2 is a schematic diagram of an exemplary multi-transmission RF frontend circuit configured according to an embodiment of the present disclosure to support three simultaneous transmissions based on a pair of PC2 PMICs and a power class 3 (PC3) PMIC;

[0013] Figures 3A-3O are schematic diagrams providing exemplary illustrations of various operating scenarios of the multi-transmission RF frontend circuit of Figure 2;

[0014] Figure 4 is a schematic diagram of an exemplary PMIC, which can be provided in the multi-transmission RF frontend circuit of Figure 2 as any of the PC2 PMICs and the PC3 PMIC;

[0015] Figure 5 is a schematic diagram of an exemplary user element wherein the multi-transmission RF frontend circuit of Figure 2 can be provided; and

[0016] Figure 6 is a flowchart of an exemplary process for operating the multitransmission RF frontend circuit of Figure 2.Detailed Description

[0017] The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.

[0018] It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0019] It will be understood that when an element such as a layer, region, or substrate is referred to as being "on" or extending "onto" another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being "over" or extending "over" another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being "directly over" or extending "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0020] Relative terms such as "below" or "above" or "upper" or "lower" or "horizontal" or "vertical" may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.

[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises," "comprising," "includes," and / or "including" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0022] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0023] Embodiments of the disclosure relate to a multi-transmission radio frequency (RF) frontend circuit. Herein, a pair of power amplifiers are configured to amplify an RF signal based on a pair of modulated voltages generated by a pair of power management integrated circuits (PMICs). Knowing that for concurrent transmission of the RF signal, such as uplink multiple-input multipleoutput (MIMO), a total output power of the power amplifiers must not exceed a certain power limit (e.g., 26 dBm). In this regard, one of the power amplifiers may amplify the RF signal to a higher power (e.g., 27 dBm) while the other one of the power amplifiers may amplify the RF signal to a lower power (e.g., 21 dBm). As such, one of the power amplifiers can be a higher power class power amplifier to output the higher power and another one of the power amplifiers can be a lower power class power amplifier to output the lower power. This creates an opportunity to make one of the PMICs a lower power class PMIC to help reduce the footprint of the multi-transmission RF frontend circuit.

[0024] Before discussing the multi-transmission RF frontend circuit of the present disclosure, starting at Figure 2, a brief overview of an existing multitransmission RF frontend circuit is first provided with reference to Figure 1 to help explain the technical problems to be solved by the multi-transmission RF frontend circuit of the present disclosure.

[0025] Figure 1 is a schematic diagram of an exemplary existing multitransmission RF frontend circuit 10 that requires three power class 2 (PC2) power management integrated circuits (PMICs) 12, 14, 16 to support three simultaneous transmissions. Herein, the existing multi-transmission RF frontend circuit 10 includes a first antenna 18, a second antenna 20, and a third antenna22. As an example, the first antenna 18 is configured to transmit a first RF signal 24 as an anchor signal for enhanced-dual-connectivity (EN-DC), while the second antenna 20 and the third antenna 22 are configured to transmit a second RF signal 26 as a pair of uplink MIMO (UL-MIMO) signals. Per the multitransmission proposals made in the third-generation partnership project (3GPP) release 18, the first RF signal 24 and the second RF signal 26 are required to be transmitted simultaneously.

[0026] The existing multi-transmission RF frontend circuit 10 includes a first power amplifier 28, a second power amplifier 30, and a third power amplifier 32. The first power amplifier 28 is configured to amplify the first RF signal 24 based on a first modulated voltage Vcm (e.g., an envelope tracking voltage), the second power amplifier 30 is configured to amplify the second RF signal 26 based on a second modulated voltage Vcc2 (e.g., an envelope tracking voltage), and the third power amplifier 32 is also configured to amplify the second RF signal 26 based on a third modulated voltage Vcca (e.g., an envelope tracking voltage). Given that in 3GPP release 18 each of the first RF signal 24 and the second RF signal 26 may be transmitted with a transmission power up to PC2 (e.g., 26 dBm), the existing multi-transmission RF frontend circuit 10 thus requiring the PC2 PMICs 12, 14, 16 to meet the 3GPP transmission power requirement.

[0027] Understandably, by employing the PC2 PMICs 12, 14, 16, the existing multi-transmission RF frontend circuit 10 will inadvertently command a larger footprint, which is undesirable given the increasing scarcity in board space of a mobile communication device. Thus, the technical problem to be solved herein is to support multiple simultaneous transmissions concurrent to reducing the footprint of the existing multi-transmission RF frontend circuit.

[0028] In this regard, Figure 2 is a schematic diagram of an exemplary multitransmission RF frontend circuit 34 configured according to an embodiment of the present disclosure to support three simultaneous transmissions based on a pair of PC2 PMICs 36, 38 (a.k.a. “higher power class PMICs”) and a power class 3 (PC3) PMIC 40 (a.k.a. “lower power class PMIC”). To distinguish from the PC2PMIC 36, the PC2 PMIC 38 is also referred to as “a second PC2 PMIC 38” hereinafter.

[0029] Herein, the key difference between the multi-transmission RF frontend circuit 34 and the existing multi-transmission RF frontend circuit 10 of Figure 1 is that the PC3 PMIC 40 replaces one of the PC2 PMICs 12, 14, 16 in the existing multi-transmission RF frontend circuit 10. As the PC3 PMIC 40 is estimated to be twenty percent (20%) smaller than any of the PC2 PMICs 12, 14, 16, the multi-transmission RF frontend circuit 34 can thus be implemented on a smaller footprint compared to the existing multi-transmission RF frontend circuit 10. As a result, the multi-transmission RF frontend circuit 34 can offer a solution to the above-identified technical problem.

[0030] In an embodiment, the multi-transmission RF frontend circuit 34 includes a pair of power amplifiers 42, 44 (a.k.a. first and second power amplifiers). Each of the power amplifiers 42, 44 is configured to amplify an RF signal 46 to a pair of output powers Poun, POUT2 based on a selected one of a pair of modulated voltages Vcci, Vcc2. In a non-limiting example, the RF signal 46, as amplified by the power amplifiers 42, 44 will be simultaneously transmitted from a pair of antennas 48, 50 as a pair of UL-MIMO signals. In this embodiment, the multi-transmission RF frontend circuit 34 further includes a third power amplifier 52. The third power amplifier 52 is configured to amplify a second RF signal 54 to a respective output power POUTS based on a modulated voltage Vccs. In a non-limiting example, the output power POUTS is between PC3 and PC2 (PC3 < POUTS < PC2). Herein, the second RF signal 54 can be an EN- DC anchor signal, which is configured to be transmitted from a third antenna 56.

[0031] Herein, the multi-transmission RF frontend circuit 34 is configured to simultaneously transmit the pair of UL-MIMO signals 48, 50 and the EN-DC anchor signal 54. As such, the multi-transmission RF frontend circuit 34 can also support three concurrent transmissions as does the existing multi-transmission RF frontend circuit 10.

[0032] In contrast to the existing multi-transmission RF frontend circuit 10, the multi-transmission RF frontend circuit 34 is configured to take advantage of thefact that, for UL-MIMO transmission, only a sum of the output powers POUTI , POUT2 can be as high as the maximum power level of PC2 (a.k.a. 26 dBm). In this regard, it is possible for one of the output powers POUTI , POUT2 to be higher than the maximum power level of PC2, while another one of the output powers OUTI , POUT2 can be lower than the maximum power level of PC3 (a.k.a. 23 dBm). In other words, one of the power amplifiers 42, 44 can operate as a PC2 power amplifier and another one of the power amplifiers 42, 44 can operate as a PC3 power amplifier. Accordingly, it is possible to generate one of the modulated voltages Vcm, Vcc2 as a PC2 voltage and another one of the modulated voltages Vcci, Vcc2 as a PC3 voltage. Hence, it is possible to replace one of the PC2 PMICs 12, 14, 16 in Figure 1 with the PC3 PMIC 40 in Figure 2 to help reduce the footprint of the multi-transmission RF frontend circuit 34.

[0033] Herein, the PC2 PMIC 36 is configured to generate the modulated voltage Vcm as a PC2 voltage and the PC3 PMIC 40 is configured to generate the modulated voltage Vcc2 as a PC3 voltage. To be able to flexibly route the modulated voltages Vcm, Vcc2 to any of the power amplifiers 42, 44 based on different transmission scenarios, the multi-transmission RF frontend circuit 34 further includes a switch circuit 58. In an embodiment, the switch circuit 58 includes switches S1 , S2, S3, S4, which can be any type of switches as deemed suitable. In a non-limiting example, the switches S1 , S2, S3, S4 may be controlled, individually or collectively, by a transceiver circuit 60 via a control signal 62. As discussed in Figures 3A-3C, the switch circuit 58 can be controlled to couple each of the power amplifiers 42, 44 to a selected one of the PC2 PMIC 36 and the PC3 PMIC 40 to receive a selected one of the modulated voltages Vcci , VCC2.

[0034] Figures 3A-3C are schematic diagrams providing exemplary illustrations of various operating scenarios of the multi-transmission RF frontend circuit 34 of Figure 2. Common elements between Figures 2 and 3A-3C are shown therein with common element numbers and will not be re-described herein.

[0035] With reference to Figure 3A, the power amplifier 42 is configured to amplify the RF signal 46 to the output power POUTI that is higher than or equal to PC3 but lower than PC2 and the power amplifier 44 is configured to amplify the RF signal 46 to the output power POUT2 that is lower than PC3. In this regard, the switch circuit 58 can be controlled to close switches S1 , S4 and open switches S2, S3. Accordingly, the power amplifier 42 will receive the modulated voltage Vcci as generated by the PC2 PMIC 36 and the power amplifier 44 will receive the modulated voltage Vcc2 as generated by the PC3 PMIC 40.

[0036] With reference to Figure 3B, the power amplifier 42 is configured to amplify the RF signal 46 to the output power POUTI that is higher than PC3 but lower than PC2. Likewise, the power amplifier 44 is also configured to amplify the RF signal 46 to the output power POUT2 that is higher than PC3 but lower than PC2. In this regard, the switch circuit 58 can be controlled to close switches S1 , S4 and open switches S2, S3. Accordingly, the power amplifier 42 will receive the modulated voltage Vcci as generated by the PC2 PMIC 36 and the power amplifier 44 will receive the modulated voltage Vcc2 as generated by the PC3 PMIC 40.

[0037] Alternatively, the switch circuit 58 can be controlled to close switches S2, S3 and open switches S1 , S4. Accordingly, the power amplifier 42 will receive the modulated voltage Vcc2 as generated by the PC3 PMIC 40 and the power amplifier 44 will receive the modulated voltage Vcci as generated by the PC2 PMIC 36.

[0038] With reference to Figure 3C, the power amplifier 42 is configured to amplify the RF signal 46 to the output power POUTI that is lower than PC3 and the power amplifier 44 is configured to amplify the RF signal 46 to the output power POUT2 that is higher than or equal to PC3 but lower than PC2. In this regard, the switch circuit 58 can be controlled to close switches S2, S3 and open switches S1 , S4. Accordingly, the power amplifier 42 will receive the modulated voltage Vcc2 as generated by the PC3 PMIC 40 and the power amplifier 44 will receive the modulated voltage Vcci as generated by the PC2 PMIC 36.

[0039] Figure 4 is a schematic diagram of an exemplary PMIC 64, which can be provided in the multi-transmission RF frontend circuit 34 of Figure 2 as any of the PC2 PMICs 36, 38 and the PC3 PMIC 40. Common elements between Figures 2 and 4 are shown therein with common element numbers and will not be re-described herein.

[0040] In an embodiment, the PMIC 64 includes a multi-level charge pump (MCP) 66 coupled in series to a power inductor 68. In a non-limiting example, the MCP 66 can be a buck-boost direct-current-direct-current (DC-DC) voltage converter that can operate based on a defined duty cycle to generate a low- frequency voltage VDC. The power inductor 68 is configured to induce a low- frequency current IDC based on the low-frequency voltage VDC.

[0041] The PMIC 64 also includes a voltage amplifier 70 coupled in series to an offset capacitor COFF. The voltage amplifier 70 is configured to generate an initial modulated voltage VAMP to track a modulated target voltage VTGT. In an embodiment, the modulated target voltage VTGT may be generated by the transceiver circuit 60. The offset capacitor COFF is configured to raise the initial modulated voltage VAMP by an offset voltage VOFF to thereby generate any of the modulated voltages Vcm, Vcc2, Vccs (Vcci / Vcc2 / Vcc3 = VAMP + VOFF). In an embodiment, the offset capacitor COFF may be charged to the offset voltage VOFF by the low-frequency current IDC.

[0042] When acting as the PC2 PMICs 36, 38, the voltage amplifier 70 is configured to generate the modulated voltage Vcm or the modulated voltage Vccs based on a higher supply voltage VSUPH. In contrast, when acting as the PC3 PMIC 40, the voltage amplifier 70 will operate based on a lower supply voltage VSUPL to help maintain a higher operating efficiency and reduced power consumption. More importantly, when acting as the PC3 PMIC 40, the power inductor 68 will be made smaller, thus helping to reduce the size of the PC3 PMIC 40.

[0043] The multi-transmission RF frontend circuit 34 of Figure 2 can be provided in a user element (e.g., a wireless device) to support the embodiments described above. In this regard, Figure 5 is a schematic diagram of anexemplary user element 100 wherein the multi-transmission RF frontend circuit 34 of Figure 2 can be provided.

[0044] Herein, the user element 100 can be any type of user elements, such as mobile terminals, smart watches, tablets, computers, navigation devices, access points, and like wireless communication devices that support wireless communications, such as cellular, wireless local area network (WLAN), Bluetooth, and near field communications. The user element 100 will generally include a control system 102, a baseband processor 104, transmit circuitry 106, receive circuitry 108, antenna switching circuitry 110, multiple antennas 112, and user interface circuitry 1 14. In a non-limiting example, the control system 102 can be a field-programmable gate array (FPGA), as an example. In this regard, the control system 102 can include at least a microprocessor(s), an embedded memory circuit(s), and a communication bus interface(s). The receive circuitry 108 receives radio frequency signals via the antennas 1 12 and through the antenna switching circuitry 110 from one or more base stations. A low noise amplifier and a filter cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) will then downconvert the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using analog-to-digital converter(s) (ADC).

[0045] The baseband processor 104 processes the digitized received signal to extract the information or data bits conveyed in the received signal. This processing typically comprises demodulation, decoding, and error correction operations, as will be discussed in greater detail below. The baseband processor 104 is generally implemented in one or more digital signal processors (DSPs) and application specific integrated circuits (ASICs).

[0046] For transmission, the baseband processor 104 receives digitized data, which may represent voice, data, or control information, from the control system 102, which it encodes for transmission. The encoded data is output to the transmit circuitry 106, where a digital-to-analog converter(s) (DAC) converts the digitally encoded data into an analog signal and a modulator modulates theanalog signal onto a carrier signal that is at a desired transmit frequency or frequencies. A power amplifier will amplify the modulated carrier signal to a level appropriate for transmission, and deliver the modulated carrier signal to the antennas 1 12 through the antenna switching circuitry 110. The multiple antennas 1 12 and the replicated transmit and receive circuitries 106, 108 may provide spatial diversity. Modulation and processing details will be understood by those skilled in the art.

[0047] In an embodiment, the transmit circuitry 106, the antenna switching circuitry 1 10, and the antennas 1 12 can be collectively configured to function as the multi-transmission RF frontend circuit 34 of Figure 2. In a non-limiting example, the antennas 1 12 are functionally equivalent to the antennas 48, 50 and the third antenna 56, the antenna switching circuitry 110 can be configured to include the switch circuit 58, and the transmit circuitry 106 can be configured to include the PC2 PMICs 36, 38 and the PC3 PMIC 40.

[0048] In an embodiment, the multi-transmission RF frontend circuit 34 of Figure 2 can be operated based on a process. In this regard, Figure 6 is a flowchart of an exemplary process 200 for operating the multi-transmission RF frontend circuit 34 of Figure 2.

[0049] Herein, the process 200 includes configuring the pair of power amplifiers 42, 44 to each amplify the RF signal 46 for concurrent transmission based on a selected one of a pair of modulated voltages Vcm, Vcc2 (step 202). The process 200 also includes configuring the higher power class PMIC 36 and a lower power class PMIC 40 to each generate a respective one of the pair of modulated voltages Vcci, Vcc2 (step 204). The process 200 also includes configuring the switch circuit 58 to couple each of the pair of power amplifiers 42, 44 to a selected one of the higher power class PMIC 36 and the lower power class PMIC 40 to receive the selected one of the pair of modulated voltages Vcci, Vcc2 (step 206).

[0050] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvementsand modifications are considered within the scope of the concepts disclosed herein and the claims that follow.

Claims

ClaimsWhat is claimed is:1 . A multi-transmission radio frequency, RF, frontend circuit (34) comprising: a pair of power amplifiers (42, 44) each configured to amplify an RF signal(46) for concurrent transmission based on a selected one of a pair of modulated voltages (Vcci, Vcc2); a higher power class power management integrated circuit, PMIC, (36) and a lower power class PMIC (40) each configured to generate a respective one of the pair of modulated voltages; and a switch circuit (58) configured to couple each of the pair of power amplifiers (42, 44) to a selected one of the higher power class PMIC (36) and the lower power class PMIC (40) to receive the selected one of the pair of modulated voltages.

2. The multi-transmission RF frontend circuit (34) of claim 1 , further comprising: a third power amplifier (52) configured to amplify a second RF signal (54) for concurrent transmission with the RF signal (46) based on a third modulated voltage (Vccs); and a second higher power class PMIC (38) configured to generate the third modulated voltage.

3. The multi-transmission RF frontend circuit (34) of claim 2, wherein: each of the higher power class PMIC (36) and the second higher power class PMIC (38) is a power class 2, PC2, PMIC; and the lower power class PMIC (40) is a power class 3, PC3, PMIC.

4. The multi-transmission RF frontend circuit (34) of claim 2, wherein:the pair of power amplifiers (42, 44) are coupled to a pair of antennas (48, 50) configured to transmit the amplified RF signal (46) as a pair of multiple-input multiple-output, MIMO, signals; and the third power amplifier (52) is coupled to a third antenna (56) configured to transmit the second RF signal (54) as an enhanced dualconnectivity, EN-DC, anchor signal.

5. The multi-transmission RF frontend circuit of claim 2, wherein the higher power class PMIC and the second higher power class PMIC are provided in an integrated higher power class PMIC that is separated from the lower power class PMIC.

6. The multi-transmission RF frontend circuit of claim 1 , wherein the lower power class PMIC has a smaller footprint than the higher power class PMIC.

7. The multi-transmission RF frontend circuit of claim 1 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power lower than a power class 2, PC2, maximum power but higher than or equal to a power class 3, PC3, maximum power and a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power lower than the PC3 maximum power; and the switch circuit is further configured to: couple the higher power class PMIC to the first one of the pair of power amplifiers; and couple the lower power class PMIC to the second one of the pair of power amplifiers.

8. The multi-transmission RF frontend circuit of claim 1 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power higher than a power class 3, PC3,maximum power and lower than a power class 2, PC2, maximum power; a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power that is equal to the first output power; and the switch circuit is further configured to: couple the higher power class PMIC to the first one of the pair of power amplifiers; and couple the lower power class PMIC to the second one of the pair of power amplifiers.

9. The multi-transmission RF frontend circuit of claim 1 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power lower than a power class 3, PC3, maximum power and a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power higher than or equal to the PC3 maximum power but lower than a power class 2, PC2, maximum power; and the switch circuit is further configured to: couple the lower power class PMIC to the first one of the pair of power amplifiers; and couple the higher power class PMIC to the second one of the pair of power amplifiers.

10. The multi-transmission RF frontend circuit of claim 1 , wherein each of the lower power class PMIC and the higher power class PMIC comprises: a voltage amplifier (70) configured to generate an initial modulated voltage (VAMP) based on a modulated target voltage (VTGT); and an offset capacitor (COFF) coupled in series to the voltage amplifier and configured to raise the initial modulated voltage by an offset voltage (VOFF) to thereby generate any of the pair of modulated voltages.1 1. A wireless device (100) comprising: transmit circuitry (106) comprising: a pair of power amplifiers (42, 44) each configured to amplify an RF signal (46) for concurrent transmission based on a selected one of a pair of modulated voltages (Vcci, Vcc2>; and a higher power class power management integrated circuit, PMIC, (36) and a lower power class PMIC (40) each configured to generate a respective one of the pair of modulated voltages; and antenna switching circuitry (1 10) comprising a switch circuit (58) configured to couple each of the pair of power amplifiers (42, 44) to a selected one of the higher power class PMIC (36) and the lower power class PMIC (40) to receive the selected one of the pair of modulated voltages.

12. The wireless device of claim 11 , wherein the transmit circuitry (106) further comprises: a third power amplifier (52) configured to amplify a second RF signal (54) for concurrent transmission with the RF signal (46) based on a third modulated voltage (Vccs); and a second higher power class PMIC (38) configured to generate the second modulated voltage.

13. The wireless device (100) of claim 12, wherein: each of the higher power class PMIC (36) and the second higher power class PMIC (38) is a power class 2, PC2, PMIC; and the lower power class PMIC (40) is a power class 3, PC3, PMIC.

14. The wireless device (100) of claim 12, wherein:the pair of power amplifiers (42, 44) are coupled to a pair of antennas (48, 50) configured to transmit the amplified RF signal (46) as a pair of multiple-input multiple-output, MIMO, signals; and the third power amplifier (52) is coupled to a third antenna (56) configured to transmit the second RF signal (54) as an enhanced dualconnectivity, EN-DC, anchor signal.

15. The wireless device (100) of claim 12, wherein the higher power class PMIC and the second higher power class PMIC are provided in an integrated higher power class PMIC that is separated from the lower power class PMIC.

16. The wireless device of claim 11 , wherein the lower power class PMIC has a smaller footprint than the higher power class PMIC.

17. The wireless device of claim 11 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power lower than a power class 2, PC2, maximum power but higher than or equal to a power class 3, PC3, maximum power and a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power lower than the PC3 maximum power; and the switch circuit is further configured to: couple the higher power class PMIC to the first one of the pair of power amplifiers; and couple the lower power class PMIC to the second one of the pair of power amplifiers.

18. The wireless device of claim 11 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power higher than a power class 3, PC3,maximum power and lower than a power class 2, PC2, maximum power; a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power that is equal to the first output power; and the switch circuit is further configured to: couple the higher power class PMIC to the first one of the pair of power amplifiers; and couple the lower power class PMIC to the second one of the pair of power amplifiers.

19. The wireless device of claim 11 , wherein: a first one of the pair of power amplifiers is configured to amplify the RF signal to a first output power lower than a power class 3, PC3, maximum power and a second one of the pair of power amplifiers is configured to amplify the RF signal to a second output power higher than or equal to the PC3 maximum power but lower than a power class 2, PC2, maximum power; and the switch circuit is further configured to: couple the lower power class PMIC to the first one of the pair of power amplifiers; and couple the higher power class PMIC to the second one of the pair of power amplifiers.

20. The wireless device of claim 11 , wherein each of the lower power class PMIC and the higher power class PMIC comprises: a voltage amplifier (70) configured to generate an initial modulated voltage (VAMP) based on a modulated target voltage (VTGT); and an offset capacitor (COFF) coupled in series to the voltage amplifier and configured to raise the initial modulated voltage by an offset voltage (VOFF) to thereby generate any of the pair of modulated voltages.21 . A method for operating a multi-transmission radio frequency, RF, frontend circuit (34) comprising: configuring a pair of power amplifiers (42, 44) to each amplify an RF signal (46) for concurrent transmission based on a selected one of a pair of modulated voltages (Vcci, Vcc2); configuring a higher power class power management integrated circuit, PMIC, (36) and a lower power class PMIC (40) to each generate a respective one of the pair of modulated voltages (Vcci, VCCP); and configuring a switch circuit (58) to couple each of the pair of power amplifiers (42, 44) to a selected one of the higher power class PMIC (36) and the lower power class PMIC (40) to receive the selected one of the pair of modulated voltages (Vcci, Vcc2).

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