Method for listening to a multipoint-type bus (MDB)
Patent Information
- Application Number
- EP2024715675
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-06
- Filing Date
- 2024-03-12
- Publication Date
- 2026-01-21
AI Technical Summary
Current MDB bus architecture limits data exchange between multiple master and slave devices, as it only allows one master device to receive data from slave devices, leading to insufficient current for optocouplers when two masters are connected, making it impossible for two master devices to communicate effectively.
A method involving an adaptation circuit that connects between slave and master devices on the MDB bus, transforming data signals by increasing voltage differences and reducing transition times, allowing a terminal to observe and acquire data without affecting the signal shape, and using a terminal with appropriate connectors to connect to the bus, enabling simultaneous data acquisition from both master and slave devices.
Enables effective data exchange between multiple master and slave devices on an MDB bus by ensuring sufficient current for optocouplers and proper signal transformation, allowing simultaneous communication without the need for specialized connectors or additional power supplies.
Smart Images

Figure FR2024050296_19092024_PF_FP_ABST
Abstract
Description
[0001] DESCRIPTION
[0002] TITLE: Method for listening to a multipoint MDB type bus
[0003] Technical field
[0004] The present invention relates to the field of electronic payment systems, and in particular to systems comprising a master device and several slave or peripheral devices interconnected by a multi-drop bus ("Multi Drop Bus" - MDB). This type of bus is commonly used in vending machines to connect a central control unit to peripheral devices. The slave devices may include, in particular, a coin mechanism, a bill reader, a bank card payment terminal, etc.
[0005] State of the art
[0006] An MDB bus is configured to operate in a master-slave mode. Each slave is assigned a unique address. The master successively queries each slave using the slave's address, and each slave responds when queried. If a slave does not respond within a predefined time, the master considers it no longer present on the bus.
[0007] In many situations, it is useful to be able to acquire data transmitted by the multidrop bus both from the master device to a slave device and from a slave device to the master device. However, the MDB bus architecture only supports a single master device, and only the master device can receive data transmitted by a slave device.
[0008] Indeed, when two master devices are connected to the same MDB bus linked to one or more slave devices, the current supplied by an optocoupler of the slave device is divided by two. However, the signal inputs of the master and slave devices are equipped with optocouplers. It turns out that this electrical level is insufficient to power the diodes of the optocouplers of the two master devices. Communications then become impossible.
[0009] There is a dedicated device with a connector configured to receive only data transmitted by the master device and slave devices, to observe the transmissions passing through the bus. This device can be connected to a computer, for example, via a USB interface ("Universal Serial Bus"). Such a device is somewhat complex and therefore relatively expensive. In addition, it is not always possible, particularly for reasons of space and security, to place a computer in an electronic payment system. This solution is therefore generally not suitable for monitoring the operation of such a system over a long period.
[0010] It is desirable to be able to observe data exchanges between a master device and slave devices interconnected by a multipoint MDB bus, by directly accessing the bus using a terminal.
[0011] Summary
[0012] Embodiments relate to a method for listening to data transmitted by a multi-drop bus (MDB), the method comprising steps of: connecting a terminal to a first link to be observed of the MDB bus, transmitting a data signal transmitted by a slave device to a master device; interposing an adaptation circuit on the first link to be observed, between a connection point of the slave device and a connection point of the master device and the terminal; receiving a data signal transmitted by the slave device at the connection point of the slave device; transforming the data signal, by the adaptation circuit, by increasing a voltage difference between a high state and a low state of the data signal, and by reducing a transition time between the high state and the low state; transmitting, by the adaptation circuit, the transformed data signal to the connection point of the master device and the terminal;and acquiring, by the terminal and the master device, data transmitted by the transformed data signal, at the connection point of the master device and the terminal.;
[0013] In this way, it is possible to connect a terminal configured to observe the data transmitted by a slave device to a master device interconnected by an MDB type bus. In fact, thanks to the adaptation circuit, the connection of the terminal in parallel with the master device does not affect the shape of the signal transmitted by the slave device in a significant way that could prevent the master device from receiving the data transmitted by this signal.
[0014] According to one embodiment, the method comprises: a step of raising, by the adaptation circuit, a current intensity of the data signal transmitted to the master device and the terminal in order to reach a nominal value to power two optocouplers without the current intensity being excessive to power a single optocoupler, and / or a step of blocking, by the adaptation circuit, an optocoupler of the slave device transmitting the data signal, following a transition from the low state to the high state, in a switching time equivalent to that reached when a single master device is connected to the bus.
[0015] According to one embodiment, the connection of the terminal to the first link is carried out using a master type connector of the terminal.
[0016] Thus, it is not necessary to provide a terminal equipped with a connector specifically designed to connect to the data transmission link transmitted by the slave devices on the MDB bus.
[0017] According to one embodiment, the method comprises steps of: connecting the terminal to a second link to be observed of the MDB bus, the second link transmitting a data signal transmitted by the master device to the slave device; and acquiring, by the terminal, data transmitted by the data signal transmitted by the master device, on the second link to be observed.
[0018] Thus, the terminal can be configured as a slave device and be used to observe the data transmitted by the master device to one of the slave devices via the MDB bus.
[0019] According to one embodiment, the connection of the terminal to the second link is carried out using a slave type connector of the terminal.
[0020] Thus, it is not necessary to provide a terminal equipped with a connector specifically designed to connect to the data transmission link transmitted by the master device on the MDB bus.
[0021] According to one embodiment, the method comprises a step of transmission, by the terminal, of the acquired data to a processing unit, directly or via a data transmission network such as the Internet.
[0022] Embodiments may also relate to a signal adaptation device comprising an adaptation circuit configured to: connect between a first connection point of a link to be observed of a multi-drop bus (MDB) and a second connection point of the link to be observed, the link to be observed transmitting a data signal transmitted at the first connection point by a slave device to a master device connected to the second connection point and configured to receive the data signal; receive the data signal at the first connection point; transform the data signal by increasing a voltage difference between a high state and a low state of the data signal, and by reducing a transition time between the high state and the low state; and transmit the transformed data signal to the second connection point, the second connection point being connected to a terminal configured to observe the data signal.Thanks to the adaptation device, it is possible to connect a terminal configured to observe the data transmitted by a slave device to a master device interconnected by an MDB type bus. In fact, the adaptation device prevents the connection of a terminal in parallel with the master device from affecting the shape of the signal transmitted by the slave device in a significant way that may prevent the master device from receiving the data transmitted by this signal.
[0023] According to one embodiment, the device comprises: a first connector for connecting to a master device, a second connector for connecting to at least one slave device, in particular the slave connector of the terminal, and a third connector for connecting to a master connector of a terminal to observe the data signals transmitted from the at least one slave device to the master device.
[0024] Thanks to the connectors, the adaptation device can be easily implemented when one wishes to use a terminal to collect the data exchanged between the master device and the slave devices.
[0025] According to one embodiment, the adaptation circuit comprises: a power supply circuit connected to transmission links of a power supply voltage and a ground voltage of the MDB bus, the power supply circuit being configured to form a voltage source, from the power supply and ground voltages, a bipolar transistor comprising an emitter terminal connected to the second connection point, a first resistor connecting a collector terminal of the transistor to ground, a second resistor connecting a base terminal of the transistor to the first connection point, and a third resistor connecting the voltage source to the base terminal of the bipolar transistor or to the first connection point.
[0026] Thus, the adaptation device can be realized simply with a few passive components and a single active component.
[0027] According to one embodiment: the first resistor has a value set so that the data signal transmitted by the at least one slave device to the master device has a current intensity reaching a nominal value to power two optocouplers without the current intensity being excessive to power a single optocoupler, and / or the first and second resistors have values chosen to block the bipolar transistor, following a transition from the low state to the high state of the data signal, in a switching time equivalent to that reached when a single master device is connected to the bus.
[0028] According to one embodiment: the first resistor has a value between 40 and 60 Q, the second resistor has a value between 220 and 1.1 kQ, the third resistor has a value between 2.5 and 5.5 kQ when it is connected to the base terminal of the bipolar transistor and between 200 Q and 1 kQ when it is connected to the first connection point.
[0029] By a simple choice of values of the resistors of the adaptation device, the data signal from a slave device can be brought into a correct shape when a second master device such as the terminal is connected to the MDB bus.
[0030] According to one embodiment, the power source is between 3 and 6 V.
[0031] Embodiments may also relate to a payment system comprising: a master device, at least one slave device, a terminal for observing data exchanges between the master device and the slave device playing the role of both master device and slave device, an adaptation device as previously defined, and a multipoint type bus (MDB) connecting a master type connector of the master device and a master type connector of the terminal to the adaptation device and a slave type connector of each slave device to the adaptation device.
[0032] According to one embodiment, the terminal comprises a slave type connector connected by the bus to the adaptation device.
[0033] According to one embodiment, the terminal is a payment terminal having a function of observing the data transmitted by the bus between the master device and the at least one slave device.
[0034] Brief description of the figures
[0035] The present invention will be better understood with the aid of the following description of exemplary embodiments with reference to the appended figures, in which identical reference signs correspond to structurally and / or functionally identical or similar elements.
[0036] Figure 1 schematically represents a bus to which a master device and slave devices are interconnected,
[0037] Figure 2 schematically represents an MDB type bus to which are connected a master device, slave devices and a terminal configured to acquire the data transmitted between the master device and the slave devices, according to one embodiment,
[0038] Figure 3 is an electrical diagram of an adaptation device for connecting the terminal to the bus, according to one embodiment, Figures 4A, 4B, 4C represent timing diagrams of signals present in the MDB bus, respectively in the absence of a second master device and the adaptation device, in the presence of a second master device and in the absence of the adaptation device, and in the presence of a second master device and the adaptation device,
[0039] Figure 5 is an electrical diagram of an adaptation device for connecting the terminal to the bus, according to another embodiment,
[0040] Figure 6 represents a timing diagram of signals present in the MDB bus, in the presence of a second master device and the adaptation device.
[0041] Detailed description
[0042] Figure 1 represents a system 1 comprising a bus B1 of the multi-drop type MDB ("Multi Drop Bus"), a master device MS1 and slave devices SL1, SL2, SL3, the devices MS1, S1-SL3 being connected to the bus B1. The system 1 is for example an automatic distributor in which the master device MS1 is a central control unit and the slave devices SL1-SL3 are payment terminals comprising for example a coin mechanism, a banknote reader, a bank card payment terminal.
[0043] It is desirable to connect a second master device MS2 to be able to acquire the data transmitted by the slave devices SL1-SL3. However, if we simply connect the bus link B1 dedicated to the transmission of data emitted by the slave devices to the second master device, the current emitted by the optocoupler of each of the slave devices on its signal transmission port is distributed in the two branches connected to the respective ports of the two master devices. The intensity of this current is divided by two. However, the signal inputs of the ports of the master devices are equipped with optocouplers. It turns out that the current thus received by the optocouplers on the reception terminal of the master devices MS1, MS2 is insufficient to power the light-emitting diodes of the optocouplers of the master devices. As a result, the signals emitted by the slave devices cannot be received by any of the master devices.
[0044] By grounding the data transmission link of the slave devices through a resistor, it is possible to send more current to the LEDs of the optocouplers of the master devices. However, this solution prevents the signal from returning to its high state and therefore the terminal for receiving data transmitted by the master devices. It can also be observed that the transition times between the high and low states of the signals transmitted by the slave devices are too high, which prevents the master devices from detecting the data transmitted from the transmitted signals. Adding a power supply to reduce these times is insufficient.
[0045] Figure 2 schematically represents a system 10 comprising a bus B2 of type MDB, to which are connected the master device MS1, slave devices SL1, SL2 and a terminal MT configured to acquire the data transmitted between the master device and the slave devices, according to one embodiment. The terminal MT can be a payment terminal further having a function of acquiring data transmitted by the bus B2.
[0046] The master device MS1 comprises a master type connector MC connected to the bus B2 and bringing together terminals MVO, MG, MRX, MTX and MCC. The slave devices SL1, SL2 each comprise a slave type connector SC connected to the bus B2 and bringing together terminals SVI, SG, STX, SRV and SCC.
[0047] According to one embodiment, the terminal MT also comprises a master type connector MC for connecting to the bus B2 as a master device, to be able to acquire data transmitted by the slave devices SL1, SL2.
[0048] According to one embodiment, the MT terminal also comprises a slave type connector SC for connecting to the bus B2 as a slave device, to be able to acquire data transmitted by the master device MS1. Thanks to the SC connector, the MT terminal can also be configured to behave as a slave device with respect to the master device MS1, in the same way as the slave devices SL1, SL2.
[0049] The bus B2 comprises a transmission link L1 of a supply voltage supplied by the master device MS1. The link L1 is connected to the voltage output terminal MVO of the connector MC of the master device MS1, and to the voltage input terminal SVI of the connector SC of each of the slave devices SL1, SL2. According to one embodiment, the supply voltage supplied by the master device MS1 is a direct voltage of between 12 and 45 V.
[0050] The bus B2 also includes a transmission link L2 of a ground voltage supplied by the master device MS1. The link L2 is connected to the ground voltage output terminal MG of the connector MC of the master device MS1, and to the ground voltage input terminal SG of the connector SC of the slave devices SL1, SL2. In the example of Figure 2, the connector SC terminal MT is also connected to the link L2. The bus B2 also includes a transmission link L3 of data transmitted by the slave devices SL1, SL2 to the master device MS1. The link L3 is connected to the data input terminal MRX of the connector MC of the master device MS1, and to the data output terminal STX of the connector SC of the slave devices SL1, SL2. In the example of Figure 2, the connector SC terminal MT is also connected to the link L3.
[0051] The bus B2 also includes a data transmission link L4 transmitted by the master device MS1 to the slave devices SL1, SL2. The link L4 is connected to the data output terminal MTX of the connector MC of the master device MS1, and to the data input terminal SRX of the connector SC of the slave devices SL1, SL2. In the example of Figure 2, the connector SC terminal MT is also connected to the link L4.
[0052] Bus B2 also includes a common data transmission link L5. Link L5 is connected to the common transmission terminal MCC of the MC connector of the master device MS1, and to the common transmission terminal SCC of the SC connector of the slave devices SL1, SL2. In the example of Figure 2, the SC connector terminal MT is also connected to link L5.
[0053] According to one embodiment, the bus B2 comprises an adaptation device AD with three connectors AC1, AC2, AC3. The connector AC1 is connected to the connector MC of the master device MS1 by a bus section TB1. The connector AC2 is connected to the slave type connectors SC of the slave devices SL1, SL2 and of the terminal MT by a bus section TB2. The connector AC3 is connected to the master type connector MC of the terminal MT by a bus section TB3.
[0054] According to one embodiment, the adaptation device AD comprises an adaptation circuit ACT interposed on the data transmission link L3 between the MRX terminal of the MC connector and the STX terminal of the SC connector. Thus, the adaptation circuit comprises a data input terminal ARX connected to an STX terminal and a data output terminal ATX connected to the data input terminals MRX of the master device MS1 and of the terminal.
[0055] Furthermore, the ACT circuit is powered via terminals AVI and AG connected respectively to the terminals MVO and MG of the master device MS1 by the bus section TB1. The ACT circuit is configured to conform the data signal transmitted on the link L3 by the slave devices SL1, SL2 or the terminal MT as slave, so that it can be processed by the master device MS1 and the terminal MT as master, to extract the transmitted data therefrom. For this purpose, the ACT circuit is configured to increase the voltage difference between the high state and the low state of the data signal transmitted by the data output terminal STX of the connector SC of the slave devices SL1, SL2, and to decrease the duration of the transitions between the high state and the low state of this signal. The voltage difference between the high state and the low state of the data signal can be increased by decreasing only the voltage of the low state.
[0056] Thanks to these provisions, the master device MS1 and the terminal MT can simultaneously receive the data transmitted by each of the slave devices SL1, SL2. Thanks to its slave type SC connector, the terminal MT also receives all the data transmitted by the master device MS1. The terminal MT can for example be configured to store the data thus received in a memory with a view to exploiting them, for example to analyze them, and / or to transmit them to a local or remote processing unit connected to the terminal, directly or via a data transmission network, such as the Internet network.
[0057] Figure 3 represents the ACT circuit, according to an exemplary embodiment. In the exemplary embodiment of Figure 3, the ACT circuit comprises a PNP bipolar transistor T1, and three resistors R1, R2, R3. The transistor T1 comprises an emitter terminal connected to the ATX terminal, a collector terminal connected to ground (defined by the voltage at the AG terminal) via the resistor R1, and a base terminal connected to the ARX terminal via the resistor R2 and to a voltage source ALM via the resistor R3. The voltage source ALM is connected to the AVI and AG terminals and configured to generate a DC voltage SV from the voltage supplied by the master device MS1 between the MVO and MG terminals.
[0058] The transistor of optocoupler OP2 on link L3 of the slave device is powered to the low state of the data signal emitted by the slave device. This transistor is therefore on in the low state. Transistor T1 is then also on, which allows the data signal at terminal ATX to also reach the low state. The value of resistor R1 is chosen so as to obtain a current on terminal ATX that is sufficient to power the LEDs of optocouplers OP1 of master device MS1 and terminal MT, connected to link L3 of bus B2. When the signal emitted by slave device SL1 or SL2 reaches the high state. The LED of optocoupler OP2 of slave device SL1 or SL2 is no longer powered. However, the transistor of optocoupler OP2 and transistor T1 take too long to turn off. The rise time of the data signal is then excessive.
[0059] Resistor R1 defines the current supplied to the ATX terminal which can be connected to the optocoupler OP1 of the MRX input of the master device and possibly to the optocoupler OP1 of the MRX input of the MT terminal. The value of resistor R1 can therefore be set to supply a nominal current to two optocouplers, without this current being excessive when only one optocoupler is connected to the ATX terminal.
[0060] Resistor R3 connecting the base of transistor T1 to the voltage source allows transistor T1 to be turned off more quickly by bringing the data signal up more quickly to the voltage supplied by the voltage source. Thus, in the high state of the data signal transmitted by link L3, transistor T1 is turned off. Transistor T1 is thus biased by resistors R2 and R3. However, if the values of resistors R2 and R3 are too high, the transistor of optocoupler OP2 of the slave device takes too long to switch from the on state to the off state. If the values of resistors R2 and R3 are reduced, the switching of this transistor is faster and can reach the switching time obtained when a single slave device is connected to a single master device.If the values of resistors R2 and R3 are too low, the switching times obtained are too different from those encountered when a single slave device is connected to a single master device.
[0061] For example, the supply voltage SV is between 3 and 6 V, for a DC voltage at terminal AVI between 12 and 45 V. Resistor R1 is between 40 and 60 Q, resistor R2 is between 220 Q and 1.1 kQ, and resistor R3 is between 2.5 and 5.5 kQ. In another example, resistor R2 is set at 510 Q and resistor R3 is set at 3.9 kQ.
[0062] Figures 4A, 4B, 4C represent timing diagrams of signals present in the MDB bus, respectively, in the absence of the terminal MT, with the terminal and in the absence of the adaptation device AD, and with the terminal and the adaptation device. Figure 4A shows timing diagrams C1, C2, C3. Timing diagram C1 represents a data signal emitted by a slave device SL1, SL2, upstream of the optocoupler OP2. Timing diagram C2 represents the corresponding data signal at the input of the optocoupler OP1 of the master device MS1. Timing diagram C3 represents the corresponding data signal received by the master device MS1 downstream of the optocoupler OP1. According to timing diagram C2, the low state voltage of the data signal is located approximately 2.2 V from the high state voltage.
[0063] Figure 4B shows timing diagrams C11, C12, C13. Timing diagram C11 represents a data signal emitted by a slave device SL1, SL2, upstream of optocoupler OP2. Timing diagram C12 represents the corresponding data signal at the input of optocoupler OP1 of the master device MS1 and the terminal MT. Timing diagram C13 represents the corresponding data signal received by the master device MS1 or the terminal MT downstream of optocoupler OP1. According to timing diagram C12, the low state voltage of the data signal is too high (about 3 V) to block the transistor of optocoupler OP1. As a result, the signal at the output of optocoupler OP1 remains in the high state (timing diagram C13).
[0064] Figure 4C shows timing diagrams C21, C22, C23, C24. Timing diagram C21 represents a data signal emitted by a slave device SL1, SL2, upstream of optocoupler OP2. Timing diagram C22 represents the corresponding data signal, at the output of optocoupler OP2 (at the input of the ACT circuit). Timing diagram C23 represents the corresponding data signal received by the master device MS1 or the terminal MT upstream of optocoupler OP1 (at the output of the ACT circuit). Timing diagram C24 represents the corresponding data signal received by the master device MS1 or the terminal MT downstream of optocoupler OP1. According to timing diagram C23, the low state voltage of the data signal is located approximately at that of the low state of timing diagram C2. The switching time of transistor T1 influences the time interval TC1 between the rising edges of signals C21 and C24 and the time interval TC2 between the rising edges of signals C21 and C22.In Figure 4C, the time interval TC1 is about 52 ps, when the resistors R1, R2 and R3 are respectively equal to 51 Q, 510 Q and 3.9 kQ. Under these conditions, the time interval TC2 is about 25 ps.
[0065] Figure 5 shows an adaptation circuit ACT1, according to another exemplary embodiment. The circuit ACT1 differs from the adaptation circuit ACT in that the resistor R3 is removed, and replaced by a resistor R4 connected between the ATX terminal and the voltage source ALM.
[0066] According to one embodiment, the resistor R2 is between 220 and 1.1 kΩ and the resistor R4 is between 200 kΩ and 1 kΩ.
[0067] Figure 6 shows timing diagrams C31, C32, C33, C34. Timing diagram C31 represents the data signal emitted by a slave device SL1, SL2, upstream of optocoupler OP2. Timing diagram C32 represents the corresponding data signal, at the output of optocoupler OP2 (at the input of circuit ACT1). Timing diagram C33 represents the corresponding data signal received by the master device MS1 or the terminal MT upstream of optocoupler OP1 (at the output of circuit ACT1). Timing diagram C34 represents the corresponding data signal received by the master device MS1 or the terminal MT downstream of optocoupler OP1.
[0068] The switching time of transistor T1 influences the time interval TC1 between the rising edges of signals C31 and C34 and the time interval TC2 between the rising edges of signals C31 and C32. In Figure 6, the time interval TC1 is reduced to about 24 ps, when the resistors R1, R2 and R4 are respectively equal to 51 Q, 510 Q and 300 Q. Under these conditions, the time interval TC2 is about 4 ps. By thus modifying the resistors (R3 replaced by R4) of the ACT adaptation circuit, the current supplied to the base of transistor T1 in the ACT1 circuit is approximately four times higher than in the ACT circuit, which makes it possible to divide the opening time of transistor T1 by at least four, with however a slight degradation of the closing time of transistor T1 resulting in small deviations of the falling edges of signals C31, C32, C33 with the falling edge of signal C34.
[0069] It will be clear to those skilled in the art that the present invention is susceptible to various alternative embodiments. In particular, the invention is not limited to the example circuit presented in Figure 3. Indeed, other circuits can easily be imagined by those skilled in the art to increase the voltage difference of the data signal between the high state and the low state of this signal, and reduce the duration of the transitions between the high state and the low state of this signal.
Claims
CLAIMS 1. Method for listening to data transmitted by a multipoint bus (MDB), the method comprising steps consisting in: connecting a terminal (MT) to a first link (L3) to be observed of the MDB bus (B2), transmitting a data signal emitted by a slave device (SL1, SL2) to a master device (MS1); interposing an adaptation circuit (ACT) on the first link to be observed, between a connection point (STX) of the slave device and a connection point (MRX) of the master device and the terminal; receiving a data signal transmitted by the slave device at the connection point of the slave device; transforming the data signal, by the adaptation circuit, by increasing a voltage difference between a high state and a low state of the data signal, and by reducing a transition time between the high state and the low state; transmitting, by the adaptation circuit, the transformed data signal to the connection point of the master device and the terminal;and acquiring, by the terminal and the master device, data transmitted by the transformed data signal, at the connection point of the master device and the terminal.; 2. Method according to claim 1, comprising: a step of raising, by the adaptation circuit (ACT), a current intensity of the data signal transmitted to the master device (MS1) and the terminal (MT) in order to reach a nominal value to supply two optocouplers (OP1) without the current intensity being excessive to supply a single optocoupler, and / or a step of blocking, by the adaptation circuit (ACT), an optocoupler (OP2) of the slave device (SL1, SL2) transmitting the data signal, following a transition from the low state to the high state, in a switching time equivalent to that reached when a single master device is connected to the bus (B2).
3. Method according to claim 1 or 2, wherein the connection of the terminal (MT) to the first link (L3) is carried out using a master type connector (MC) of the terminal.
4. Method according to one of claims 1 to 3, comprising steps consisting of: connecting the terminal (MT) to a second link to be observed (L4) of the MDB bus (B2), the second link transmitting a data signal emitted by the master device (MS1) to the slave device (SL1, SL2); and acquiring, by the terminal, data transmitted by the data signal transmitted by the master device, on the second link to be observed.
5. Method according to claim 4, wherein the connection of the terminal (MT) to the second link (L4) is carried out using a slave type connector (MC) of the terminal.
6. Method according to one of claims 1 to 5, comprising a step of transmission, by the terminal (MT) of the acquired data to a processing unit, directly or via a data transmission network such as the internet.
7. Signal adaptation device (AD) comprising an adaptation circuit (ACT) configured to: connect between a first connection point (STX) of a link to be observed (L3) of a multipoint type bus (MDB) (B2) and a second connection point (MRX) of the link to be observed, the link to be observed transmitting a data signal emitted at the first connection point by a slave device (SL1, SL2) to a master device (MS1) connected to the second connection point and configured to receive the data signal; receive the data signal at the first connection point; transform the data signal by increasing a voltage difference between a high state and a low state of the data signal, and by reducing a transition time between the high state and the low state; and transmit the transformed data signal to the second connection point, the second connection point being connected to a terminal (MT) configured to observe the data signal.
8. Device according to claim 7, comprising: a first connector (AC1) for connecting to a master device (MS1), a second connector (AC2) for connecting to at least one slave device (SL1, SL2, MT), and a third connector (AC3) for connecting to a master connector (MC) of a terminal (MT) for observing the data signals transmitted by the at least one slave device to the master device.
9. Device according to claim 7 or 8, wherein the adaptation circuit (ACT) comprises: a power supply circuit (ALM) connected to transmission links (L1, L2) of a supply voltage and a ground voltage of the MDB bus (B2), the power supply circuit being configured to form a voltage source (SV), from the supply and ground voltages, a bipolar transistor (T1) comprising an emitter terminal connected to the second connection point (MRX), a first resistor (R1) connecting a collector terminal of the transistor to ground, a second resistor (R2) connecting a base terminal of the transistor to the first connection point (STX), and a third resistor (R3, R4) connecting the voltage source (SV) to the base terminal of the bipolar transistor or to the first connection point.
10. Device according to claim 9, in which: the first resistor (R1) has a value set so that the data signal transmitted by the at least one slave device (SL1, SL2) to the master device (MS1) has a current intensity reaching a nominal value to power two optocouplers (OP1) without the current intensity being excessive to power a single optocoupler, and / or the first and second resistors (R2, R3) have values chosen to block the bipolar transistor (T1), following a transition from the low state to the high state of the data signal, in a switching time equivalent to that reached when a single master device is connected to the bus (B2).
11. Device according to claim 9 or 10, in which: the first resistor (R1) has a value between 40 and 60 Q, the second resistor (R2) has a value between 220 and 1.1 kQ, the third resistor (R3, R4) has a value between 2.5 and 5.5 kQ when it is connected to the base terminal of the bipolar transistor (T1), and between 200 Q and 1 kQ when it is connected to the first connection point (STX).
12. Device according to one of claims 9 to 11, in which the power source (SV) is between 3 and 6 V.
13. Electronic payment system including: a master device (MS1), at least one slave device (SL1, SL2), a terminal (MT) for observing data exchanges between the master device and the slave device playing both the role of master device and slave device, an adaptation device (AD) according to one of claims 7 to 12, and a multipoint type bus (MDB) (B2) connecting a master type connector (MC) of the master device and a master type connector (MC) of the terminal to the adaptation device and a slave type connector (SC) of the at least one slave device (SL1, SL2, MT) to the adaptation device.
14. System according to claim 13, in which the terminal (MT) comprises a slave type connector (SC) connected by the bus (B2) to the adaptation device (AD).
15. System according to claim 14, in which the terminal (MT) is a payment terminal having a function of observing the data transmitted by the bus (B2) between the master device (MS1) and the at least one slave device (SL1, SL2).