Connector
Patent Information
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- IQM FINLAND OY
- Filing Date
- 2024-07-24
- Publication Date
- 2026-06-10
Smart Images
Figure FI2024050399_06022025_PF_FP_ABST
Abstract
Description
[0001] Connector
[0002] Technical field
[0003] The invention relates to an electrical connector for connecting one or more cables to a device, where the connector is exposed to a range of temperatures. The invention also concerns a superconducting electronic device comprising the connector, a quantum computing system comprising the superconducting electronic device and a use of the connector.
[0004] Background
[0005] Conventional connectors are often made of copper, which has much greater thermal expansion than silicon, sapphire or ceramics. When used with devices made on silicon, sapphire or ceramic substrates, such conventional connectors can lead to broken or deteriorated connections when thermal cycling between different temperatures, such as from room temperature to cryogenic temperatures.
[0006] One way to address the problem is by introducing a copper printed circuit board (PCB), such that a connector is connected to the PCB, while the PCB is connected to the device by wire bonding. Wire bonding, however, needs to be performed manually and carefully, which takes a lot of time and requires special equipment. Moreover, wire bonding is fragile and can be easily broken when handling.
[0007] Summary
[0008] An object of the present invention is to provide an alternative and improved connector for use in applications with thermal cycling. The characterizing features of the connector according to the invention are given in claim 1 . Another object of the invention is to provide an improved superconducting electronic device, a quantum computing system and a use of the connector, the characterizing features of which are given in the other independent claims. According to a first aspect of the invention, a connector for connecting one or more cables to a first substrate is provided. The connector comprises a connector substrate for aligning one or more cables, where the connector substrate has one or more through-holes extending from a first side of the connector substrate to a second side of the connector substrate, each through- hole being suitable for aligning one or more of the cables. The connector substrate has a coefficient of linear thermal expansion in the range of 0.5 to 1 .5 of the coefficient of linear thermal expansion of the first substrate.
[0009] Each through-hole of the connector substrate may be suitable for inserting either one of the cables whole or a core of one of the cables.
[0010] The connector substrate thickness may be less than the wavelength at which the cables are configured to operate.
[0011] Each through-hole may be suitable for aligning one of the one or more cables.
[0012] The connector may comprise a holder for holding two or more cables. A through-hole of the one or more through-holes may be configured to align the two or more cables with the aid of the holder. The connector may comprise more than one such holder and more than one through-hole of the one or more through-holes may be configured to each align two or more cables with the aid of the respective holder.
[0013] The coefficient of linear thermal expansion of the connector substrate may correspond to the coefficient of thermal expansion of the first substrate. For example, connector substrate and first substrate may be made of the same material.
[0014] Walls of the one or more through-holes may be non-conductive.
[0015] The connector substrate may be dielectric.
[0016] The connector substrate may be made of Si, ceramics, for example low-temperature co-fired ceramics, or sapphire. The connector substrate may comprise at least two through-holes. The distance between the nearest neighbour through-holes may be at least 0.5 mm.
[0017] According to a second aspect of the invention, a superconducting electronic device is provided. The superconducting electronic device comprises the connector as described above, the one or more cables, and the first substrate, on which one or more superconducting circuits are located.
[0018] The connector substrate of the superconducting electronic device may be arranged adjacent to the first substrate such that when the one or more cables are inserted through the one or more through-holes, the core of each of the one or more cables is directly electrically connected to an electrical contact element on the first substrate.
[0019] The one or more of the through-holes of the connector substrate may be aligned with one or more electrical contact elements of the first substrate.
[0020] The superconducting electronic device may further comprise a clamp bar for pressing together the first substrate and the connector substrate.
[0021] The cables and the superconducting electronic device may be configured to operate at a chosen wavelength. Thickness of the connector substrate may be less than such chosen wavelength.
[0022] The superconducting electronic device may comprise a holder. The holder may hold two or more cables. A through-hole of the one or more through-holes of the connector may align the two or more cables with the aid of the holder. The holder may thus assist aligning two or more cables with one of the through- holes of the connector. The superconducting electronic device may comprise more than one of such holders assisting aligning a plurality of cables with more than one through-hole of the one or more through-holes of the connector.
[0023] The one or more cables may be coaxial cables.
[0024] At least one of the first side or the second side of the connector substrate may be coated by a conducting or a superconducting material to provide a connection between the shields of the one or more coaxial cables and a common ground.
[0025] The one or more superconducting circuits on the first substrate may include one or more superconducting qubits.
[0026] According to a third aspect of the invention, a quantum computing system is provided. The quantum computing system comprises superconducting electronic device as described above.
[0027] The quantum computing system may further comprise a cryostat and the connector may be located within the cryostat.
[0028] The quantum computing system may further comprise one or more con- trol / readout systems, wherein the one or more control / readout systems may be located outside of the cryostat and the superconducting electronic device may be located within the cryostat; and wherein the one or more cables may be configured to carry electromagnetic signals from the one or more control / readout systems to the superconducting electronic device.
[0029] According to a fourth aspect of the invention, a use of the connector according to the invention for connecting one or more cables to a first substrate is provided. The use of the connector comprises inserting one or more cables through one or more through-holes of the connector substrate and attaching the connector to the first substrate.
[0030] The inserting one or more cables may comprise inserting each of the one or more cables through a different through-hole of the connector substrate.
[0031] Brief description of the drawings
[0032] Embodiments of the invention are described below in more detail with reference to the accompanying drawings, in which:
[0033] Fig. 1 shows three-dimensional schematics of a connector according to an embodiment of the invention, Fig. 2 shows three-dimensional schematics as well as cross-sections of a superconducting electronic device according to several embodiments of the invention,
[0034] Fig. 3 shows a schematic cross section of a superconducting electronic device compressed by a clamp bar according to an embodiment of the invention,
[0035] Fig. 4 shows a schematic cross section of a superconducting electronic device according to another embodiment of the invention,
[0036] Fig. 5 shows a schematic cross section of a quantum system according to an embodiment of the invention.
[0037] Detailed description
[0038] Figure 1A shows a three-dimensional schematic of the connector 100 for connecting one or more cables 205 (see Figure 2) to a first substrate 206 (see Figure 2) according to an embodiment of the invention. The connector 100, shown in Figure 1 , comprises a connector substrate 101 with sixteen through- holes 102 extending from a first side 103a of the connector substrate 101 to a second side 103b of the connector substrate 101 , each through-hole 102 being suitable for aligning and preferably supporting one or more of the cables 205. The connector 100 may have a different number of through-holes 102. In particular, the connector 100 may have one or more through-holes 102. Preferably, the connector 100 has at least two through-holes 102, more preferably, at least four through-holes 102.
[0039] The connector 100 guides the one or more cables 205 to be connected to a first substrate 206 as shown in Figure 2, where four cables are illustrated passing through four of the through-holes 102. The connector substrate 101 of the connector 100 aligns and preferably provides mechanical support for the cables 205 such that the cables 205 are held in place by the connector 100.
[0040] The connector substrate 101 according to the invention has a coefficient of linear thermal expansion (CLTE) in the range of 0.5 to 1.5 of the first substrate’s 206 CLTE. Preferably, the CLTE of the connector substrate is in the range of 0.5 to 1 .5 of the first substrate at least at temperatures in a temperature range from cryogenic temperature, such as 10 mK, to room temperature. More preferably, the CLTE of the connector substrate is in the range of 0.5 to 1 .5 of the first substrate in the whole temperature range in which the connector is intended to be used. Preferably, CLTE of the connector substrate 101 corresponds to, or, in other words, is the same as the CLTE of the first substrate 206. More preferably, CLTE of the connector substrate 101 is the same as the CLTE of the first substrate at least at temperatures between 10 mK and 300 K. For example, the connector substrate 101 and the first substrate 206 may be made of the same material. Alternatively, the materials of the connector substrate 101 and first substrate 206 may be different as long as the temperature dependant CLTE of the connector substrate 101 is in the range of 0.5 to 1 .5 of the first substrate’s 206 temperature dependent CLTE at least for temperatures between 10 mK and 300 K. Some examples of CLTE at room temperature are: silicon 2.5-3.3 x10-6K’1, sapphire 5-6 x10-6K’1, various ceramics 2.6-10.5 x10-6K’1, and copper around 16-17 x10-6K’1. Hence, if the first substrate 206 is made of silicon, the connector substrate 101 could be made of, for example, similarly or differently prepared silicon, or of a different material with a suitable temperature dependent CLTE such that the CLTE values of the connector substrate at temperatures between 10 mK and 300K are in the range of 0.5 to 1 .5 of the CLTE values of the first substrate at said temperatures, wherein the different material could be some ceramics, such as engineered ceramics, which, in addition to a suitable CLTE temperature dependence may also provide improved structural integrity. As another example, if first substrate is made of sapphire, the connector could be made, for example, of silicon, sapphire or various ceramics. The similarity of the CLTEs between the first substrate and the connector reduces the difference in thermal expansion of said objects, which in turn reduces deterioration as well as breakage of the electrical contacts during thermal cycling. Such reduced contact deterioration is especially relevant for quantum computing applications where any change in contact properties and thus impedance leads to degradation in performance and increased number of errors.
[0041] According to an embodiment of the invention, the connector substrate 101 is made of a dielectric material. For example, the connector substrate 101 may be made of silicon, sapphire, or ceramics, such as low-temperature co-fired ceramics or other engineered ceramics. The dashed line marked with letter A in Figure 1A indicates a plane along which a cut is made as shown in Figure 1 B in order to illustrate the through- holes 102 and the walls 104 of the through-holes 102. According to an embodiment of the invention, the walls 104 of the one or more through-holes 102 are non-conductive.
[0042] While the through-holes 102 are arranged in a square pattern in Figure 1A, the connector 100 according to the invention may comprise through-holes 102 arranged in a different pattern, such as hexagonal or triangular. The through- holes 102 may also be arranged in a single line or any other pattern. Moreover, the through-holes 102 may be arranged in a non-repetitive pattern. According to an embodiment of the invention, the distance between the nearest neighbour through-holes 102 (marked with letter “d” in Figure 1A) is at least 0.5 mm. Preferably, the distance between the nearest neighbour through-holes 102 is at least 1 mm.
[0043] Figures 2A and 2B show three-dimensional schematics of the superconducting electronic device 200 according to two embodiments of the invention, comprising the connector 100, one or more cables 205, and a first substrate 206, on which one or more superconducting circuits are located. The first side 103a of the connector substrate 101 faces the side from which the cables 205 are inserted, whereas the second side 103b faces the first substrate 206. According to an embodiment of the invention, the one or more superconducting circuits on the first substrate 206 may include one or more superconducting qubits.
[0044] The cables 205 could be fitted, mechanically attached with a screw, welded, or glued to the connector 100.
[0045] Superconducting electronic device 200 of Figure 2B is like that of Figure 2A, except for a gap between the connector 100 and the first substrate 206. As shown in Figure 2B, the superconducting electronic device 200 may further comprise one or more electrical contact elements 207 on the first substrate 206. Electrical contact elements 207 may be In bumps, fuzz buttons, pogo pins, or any conducting material layer. The size of the gap may be equal to or larger than the thickness of the electrical contact elements 207. The size of the gap may also be zero or at least less than the thickness of the electrical contact elements 207 if recesses are provided in the connector substrate 101 that match the lateral size of the electrical contact elements 207.
[0046] As shown in Figures 2A-F, the connector substrate 101 may be arranged adjacent to the first substrate 206 such that when the one or more cables 205 are inserted through the one or more through-holes 102, at least the core 205a of each of the one or more cables 205 is electrically connected to the first substrate 206. More specifically, the core 205a of each of the one or more cables 205 may be directly electrically connected to an electrical contact element 207 on the first substrate 206. Each cable 205 may be connected to a different electrical contact element 207 or a plurality of cables 205 may be connected to the same electrical contact element 207 such that the number of the connected cables 205 may be more than the number of electrical contact elements 207 to which cables 205 are connected. The direct electrical contact here means the lack of an intermediate structures, such as interposers. The connector substrate 101 may be in contact or immediate proximity with the first substrate 206.
[0047] As shown in Figures 2A-F, the through-holes 102 of the connector substrate 101 may be aligned with one or more electrical contact elements 207 of the first substrate 206. The alignment could mean simply that there is full overlap between cross-section areas of a through-hole 102 and an electrical contact element 207. More particularly, the through-holes 102 of the connector substrate 101 may be aligned to be centred with the one or more electrical contact elements 207 of the first substrate 206.
[0048] Figure 2C shows a cross-section of Figure 2B cut along the plane indicated by letter B, thus illustrating an arrangement according to the embodiment of the superconducting electronic device 200.
[0049] According to an embodiment of the invention, the one or more cables 205 may be coaxial cables, comprising a core 205a and shell 205b as illustrated in, for example, Figures 2D-F. According to an embodiment of the invention, the one or more cables 205 may be microwave cables. Figures 2D-F show similar cross-sections as Figure 2C, but for coaxial or other type of cables comprising a core 205a and a shell 205b. Figure 2D illustrates superconducting electronic device 200 comprising a connector 100, first substrate 206 and the electrical contact elements 207. According to an embodiment shown in Figure 2D, the connector 100 comprises through holes 102 where each through-hole 102 is configured for inserting one of the cables 205 whole, i.e., such that the core 205a and the shell 205b of the cable are guided through the through-hole 102. Figure 2E similarly illustrates a connector 100 comprising through-holes 102 where each through-hole 102 is configured for inserting only the core 205a of one of the cables 205.
[0050] Connector substrate 101 thickness may be between 0.3-30 mm. Preferably, thickness of the connector substrate 101 is less than the wavelength for which the cables 205 and the superconducting electronic device 200 are configured to operate. This may be particularly beneficial for reducing or preventing crosstalk when only the core 205a of the coaxial cable passes through the through- hole 102.
[0051] Figure 2F shows a further embodiment of the invention where each through- hole 102 of the connector 100 is suitable for aligning and preferably supporting one or more of the one or more cables 205. In particular, Figure 2F illustrates four through-holes 102, where three of the through-holes 102 align and preferably support one core 205a of a cable 205 each, whereas the fourth through- hole 102 aligns and preferably supports three cables with the aid of a holder 208. The holder 208 may have any number of inputs and a single output. Preferably, the holder 208 has at least two inputs. According to a different embodiment, a through-hole 102 may be configured to permit a bundle of cables to be guided through and supported by the through-hole 102.
[0052] In order to improve the electrical connection, a superconducting electronic device may comprise a clamp bar 309 for pressing together the first substrate 206 and the connector substrate 101 as illustrated in Figure 3.
[0053] Figure 4 illustrates a superconducting electronic device 200 according to an embodiment of the invention comprising a conducting or superconducting coating 411 on the first side 103a of the connector substrate 101 to provide a connection between the shields 205b of the one or more coaxial cables and a common ground. A conducting or superconducting coating 411 may be present on either the first side 103a i.e., the side facing away from the first substrate 206, or the second side 103b, i.e., the side facing towards the first substrate 206, or both sides of the connector substrate 101 . If only the core 205a of a cable 205 is guided through the through-hole 102, as in Figure 4, the first side 103a of the connector substrate 101 is preferably coated. If the whole cable 205 passes through the through-hole 102, a coating on either first 103a or the second 103b or on both sides may be prefered. Preferably, at least one of the first side 103a or the second side 103b of the connector substrate 101 is coated by a conducting or a superconducting material 411 . More preferably, at least the first side 103a of the connector substrate is coated by a conducting or a superconducting material 411 . The coating 411 is preferably made of gold.
[0054] Figure 5 illustrates a quantum computing system 500 according to an embodiment of the invention comprising a superconducting electronic device 200, as described above, placed on a sample holder 310. As shown in Figure 5, the quantum computing system 500 may further comprise a cryostat 512 arranged such that the connector 100 is located within the cryostat 512. As also shown in Figure 5, the quantum computing system 500 may further comprise a con- trol / readout system 513 located outside of the cryostat 512 and connected to the superconducting electronic device 200 located essentially within the cryostat 512 with the exception of one or more cables 205, which are configured to carry electromagnetic signals from the control / readout system 513 to the superconducting electronic device 200.
[0055] While the current invention provides benefits especially for applications with thermal cycling where it is important that the connector 100 and the first substrate 206 of the superconducting electronic device 200 has the same or similar enough CLTE to avoid contact deterioration and breakage due to different thermal expansion or contraction, the current invention may also be used in any applications where a connector between a device chip and a set of independent cables is needed.
[0056] According to a further embodiment of the invention, the use of the connector 100 described above comprises inserting one or more cables 205 through one or more through-holes 102 of the connector substrate 101 and attaching the connector 100 to the first substrate 206. Inserting one or more cables may comprise inserting each of the one or more cables 205 through a different through-hole 102 of the connector substrate 101 . In other words, each cable 205 may be inserted through a corresponding number of through-holes 102.
[0057] Alternatively, a plurality of cables 205 can be inserted through a through-hole 102, or a plurality of cables 205 can be connected to a holder 208 from which a single cable is outputted and inserted through a through-hole 102.
Claims
Claims:
1. A connector (100) for connecting one or more cables (205) to a first substrate (206), the connector (100) comprising:- a connector substrate (101 ) for aligning one or more cables (205), the connector substrate (101 ) having one or more through-holes (102) extending from a first side (103a) of the connector substrate (101 ) to a second side (103b) of the connector substrate (101 ), each through-hole (102) being suitable for aligning one or more of the cables (205); wherein the connector substrate (101 ) has a coefficient of linear thermal expansion in the range of 0.5 to 1 .5 of the coefficient of linear thermal expansion of the first substrate (206).
2. A connector (100) according to claim 1 , wherein each through-hole (102) is suitable for inserting either one of the cables (205) whole or a core (205a) of one of the cables (205).
3. A connector (100) according to any of the preceding claims, wherein the connector substrate (101 ) thickness is less than the wavelength at which the cables (205) are configured to operate.
4. A connector (100) according to any of the preceding claims, wherein each through-hole (102) is suitable for aligning one of the one or more cables (205).
5. A connector (100) according to any of the preceding claims, further comprising a holder (208) for holding two or more cables, wherein a through- hole of the one or more through-holes (102) is configured to align the two or more cables (205) with the aid of the holder (208).
6. A connector (100) according to any of the preceding claims, wherein the coefficient of linear thermal expansion of the connector substrate (101 ) corresponds to the coefficient of thermal expansion of the first substrate (206).
7. The connector (100) according to claim 6, wherein connector substrate (101 ) and first substrate (206) are made of the same material.
8. A connector (100) according to any of the preceding claims, wherein walls (104) of the one or more through-holes (102) are non-conductive.
9. A connector (100) according to any of the preceding claims, wherein the connector substrate (101 ) is dielectric.
10. A connector (100) according to any of the preceding claims, wherein the connector substrate (101 ) is made of Si, ceramics, for example low-temperature co-fired ceramics, or sapphire.
11. A connector (100) according to any of the preceding claims, wherein the connector substrate (101 ) comprises at least two through-holes (102).
12. A connector (100) according to claim 11 , wherein the distance between the nearest neighbour through-holes (102) is at least 0.5 mm.
13. A superconducting electronic device (200) comprising:- the connector (100) of any of the preceding claims;- the one or more cables (205); and- the first substrate (206), on which one or more superconducting circuits are located.
14. A superconducting electronic device (200) according to claim 13, wherein the connector substrate (101 ) is arranged adjacent to the first substrate (206) such that when the one or more cables (205) are inserted through the one or more through-holes (102), the core (205a) of each of the one or more cables (205) is directly electrically connected to an electrical contact element (207) on the first substrate (206).
15. A superconducting electronic device (200) according to any of claims 13-14, wherein the one or more of the through-holes (102) of the connector substrate (101 ) are aligned with one or more electrical contact elements (207) of the first substrate (206).
16. A superconducting electronic device (200) according to any of claims 13-15, further comprising a clamp bar (309) for pressing together the first substrate (206) and the connector substrate (101 ).
17. A superconducting electronic device (200) according to any of claims 13-16, wherein the cables (205) and the superconducting electronic device (200) are configured to operate at a wavelength and the connector substrate (101 ) thickness is less than said wavelength.
18. A superconducting electronic device (200) according to any of claims 13-17, further comprising a holder (208) holding two or more cables (205), wherein a through-hole of the one or more through-holes (102) aligns the two or more cables (205) with the aid of the holder (208).
19. A superconducting electronic device (200) according to any of claims 13-18, wherein the one or more cables (205) are coaxial cables.
20. A superconducting electronic device (200) according to claim 19, wherein at least one of the first side (103a) or the second side (103b) of the connector substrate (101 ) is coated by a conducting or a superconducting material (41 1 ) to provide a connection between the shields (205b) of the one or more coaxial cables and a common ground.
21. A superconducting electronic device (200) according to any of claims 13-20, wherein the one or more superconducting circuits on the first substrate (206) include one or more superconducting qubits.
22. A quantum computing system (500) comprising the superconducting electronic device (200) of claim 21 .
23. The quantum computing system (500) of claim 22, further comprising a cryostat (512), wherein the connector (100) is located within the cryostat (512).
24. The quantum computing system (500) of claim 23, further comprising one or more control / readout systems (513), wherein the one or more con- trol / readout systems (513) are located outside of the cryostat (512) and thesuperconducting electronic device (200) is located within the cryostat (512); and wherein the one or more cables (205) are configured to carry electromagnetic signals from the one or more control / readout systems (513) to the superconducting electronic device (200).
25. Use of the connector (100) according to any of claims 1 -13 for connecting one or more cables (205) to a first substrate (206), comprising inserting one or more cables (205) through one or more through-holes (102) of the con- nector substrate (101 ) and attaching the connector (100) to the first substrate (206).
26. The use of the connector (100) according to claim 25, wherein inserting one or more cables (205) comprises inserting each of the one or more cables (205) through a different through-hole (102) of the connector substrate (101 ).