Indirect transfer switching power supply device with control circuit for active clamp

Abstract

The present invention relates to an indirect transfer switching power supply (100) configured to deliver an electrical output power to a load (LOAD) and comprising a voltage limiting system including a switch called a clamp switch (TCLAMP), the indirect transfer switching power supply device (100) further comprising a control circuit (M2) configured to, in operation, receive a first main input signal (PWM_IN) and a second main input signal representing a main current (IT), and to control, via a first control signal (PWM_CLAMP) determined from the first main input signal (PWM_IN) and the second input signal, the switching to the on state of the clamp switch (TCLAMP) for a time duration, the time duration varying increasing with the electrical output power. [Fig. 1]

Description

Title of the invention: Indirect transfer switching power supply device with control circuit for active clamp

[0001] The invention relates to the field of power electronics for acoustic applications. More particularly, the invention relates to switched-mode power supplies for loudspeakers and acoustic systems.

[0002] A power supply device provides one or more DC voltages, for example from the voltage of an electrical network or mains supply, thus delivering power to a load connected to the output. The load corresponds to circuits and modules in an electrical device, this electrical device being a loudspeaker.

[0003] Indirect transfer switching power supplies (also called flyback converters) include a transformer ensuring energy conversion from a primary circuit to a secondary circuit and a main switch, switching between a conducting state during which energy is stored in the primary circuit and a blocking state during which the stored energy is transferred to the secondary circuit.

[0004] Indirect transfer switching power supplies include a main control circuit configured to control the state of the main switch. The main control circuit can operate in different types of control modes. In a control mode called continuous conduction mode (CCM), the current through the primary winding never drops to zero during the switching cycle. In a control mode called discontinuous conduction mode, the current through the primary winding drops to zero before the main switch is switched to zero, which implies that all the energy stored in the transformer during the on-state phase is completely transferred to the load during the off-state phase.

[0005] In practice, since the transformer is not ideal, some of the primary circuit energy remains trapped in the primary winding due to the imperfect magnetic coupling of the transformer windings. This untransferred energy is associated with an inductance called leakage inductance. When the main switch of the indirect transfer switching power supply enters the off position, the energy stored in the leakage inductance causes an overvoltage that can damage the power supply components.

[0006] A voltage limiting system, also known as an active clamp circuit, is thus frequently used in a flyback converter, to... Protecting sensitive components by reducing overvoltages improves converter performance in terms of energy efficiency and electromagnetic interference reduction. The architecture of a voltage limiting system allows for the recycling of energy flowing through the transformer's leakage inductance by transferring it to the load.

[0007] Active clamp circuits can be classified into two categories, detailed briefly below.

[0008] In the first category, the active clamp circuit is autonomous. In other words, it is self-regulating, self-powered, and requires no control means. The clamp switch opens and closes in response to a voltage proportional to the current flowing in the branch of the active clamp. However, this first category cannot be used in all conduction modes while simultaneously producing smooth switching (ZVS) of the main transistor. It should also be noted that the autonomous active clamp introduces additional components in series with the components of the active clamp. These additional components increase the branch impedance and the losses during clamp operation.

[0009] In a second category, the active clamp circuit is powered and controlled by a separate system, which, for example, detects demagnetization of the flyback converter's main transformer or reads the current flowing through the flyback converter's main switch. This second category allows for improved power supply efficiency under heavy load by pushing the main switch to the zero-voltage conducting (ZVS) state. The disadvantages of circuits in this second category are, for example, that they cannot be used in all flyback converter conduction modes, or that they introduce discontinuities that can lead to destabilization or oscillations in the system, or that low-load efficiency is degraded. Furthermore, these circuits are difficult to design and require complex components.

[0010] An active clamp circuit typically includes a transistor called a clamp transistor. In standard active clamp operation, the control signals between the main switch of the power supply and the clamp transistor are complementary. In other words, the clamp transistor conducts when the main switch is blocked, and vice versa. This control mode is compatible with a converter operating between 80 and 100% of its power. However, when the power demand drops below 20 to 30%, losses increase and efficiency decreases considerably.

[0011] By design, the magnetizing inductance seen in the primary circuit tends to decrease with power. Symmetrically, the variations in magnetizing current when the clamp switch is conducting will be rapid, leading to a larger amplitude of the magnetizing current in the primary winding. This magnetizing current causes significant switching losses in both the main switch and the clamp switch; these losses are also proportional to the square of the voltage present at the input of the flyback converter.

[0012] Such standard use is therefore not satisfactory because it greatly degrades the efficiency of the converter, especially when the output powers required are low or zero.

[0013] There is therefore a need to improve the efficiency of a flyback converter including an active clamp circuit, particularly for low or zero output power, where switching losses are greater. This need is coupled with the need to provide a flyback converter that can also operate regardless of the conduction mode of the indirect transfer switching power supply.

[0014] The invention presented aims to solve this problem. Description of the invention

[0015] To this end, the invention proposes to integrate a control circuit into an indirect transfer switching power supply device, designed from simple components and capable of operating regardless of the conduction mode of the indirect transfer switching power supply device.

[0016] A switched-mode power supply with indirect transfer is thus proposed, configured to deliver electrical output power to a load from an electrical energy source, comprising: - a transformer comprising a primary winding connected to a primary circuit supplied by the electrical power source and a secondary winding supplying a secondary circuit to which the load is connected, the transformer having a leakage inductance viewed as an additional inductance in series with the primary winding, - a main switch configured to, when closed, close the primary circuit's power supply from the electrical power source and, when blocked, open said power supply circuit, - a voltage limiting system configured to transfer energy stored in the leakage inductance to the load, the limiting system comprising a capacitor called a clamp capacitor and a switch called a clamp switch, the limiting system being configured so that the clamp capacitor is electrically connected in parallel with the primary winding when the clamp switch is in a conducting state, the indirect transfer switching power supply device being characterized in that it further comprises a control circuit configured to generate a first binary control signal on the basis of a first binary main input signal and at least one second main input signal, the main switch being controlled from the first main input signal, the at least one second main input signal being representative of a current, called the main current, flowing through the main switch when the main switch is conducting, the control circuit (M2) being configured to generate the first control signal (PWM TCLAMP) with an activation time, during which the clamp switch (TCLAMP) is in the conducting state, defined between two successive switching to a high state of the first main input signal (PWM_IN), the activation time varying increasingly with the electrical output power.

[0017] Thus, thanks to the control circuit according to the invention, it is possible to adjust the activation time spent in the on state by the clamp switch of the voltage limiting system of the indirect transfer switching power supply to the electrical output power delivered by the indirect transfer switching power supply. In other words, the control circuit acts as a pulse-width modulator.

[0018] In particular, the lower the output power demand, the shorter the time spent in the conducting state of the clamp switch, and consequently, the lower the current flowing through the voltage limiting system. Losses in the leakage inductance are thus reduced, and the efficiency of the indirect transfer switching power supply is improved. More generally, the efficiency of the indirect transfer switching power supply is improved across the entire intended output power range, which can extend from a few watts to a few kilowatts.

[0019] Furthermore, the indirect transfer switching power supply incorporating the control circuit according to the invention can operate in any type of conduction mode: discontinuous (DCM), borderline (BCM), quasi-resonant (QRM), or continuous (CCM). The transition from one conduction mode to another, by increasing or decreasing the output electrical power, is achieved without discontinuity.

[0020] Also, the indirect transfer switching power supply incorporating the control circuit according to the invention can operate regardless of the operating mode of the main control circuit: by peak current (in English, "peak current mode control"), or by voltage (in English, "voltage mode control"). In other words, any type of main control circuit, for example a standard commercial integrated circuit, can be used.

[0021] More generally, the proposed solution makes it possible to reduce the losses of an indirect transfer switching power supply device suffering from the imperfection of its transformer and the resulting leakage induction.

[0022] Advantageously, the variation in the activation time is a jiggle of the falling edge of the first control signal.

[0023] Advantageously, the first control signal varies continuously with the output electrical power. In other words, the activation time varies continuously with the output electrical power.

[0024] Thus, the transition from one mode of conduction to another is carried out in a smooth manner.

[0025] Advantageously, the main switch is configured to switch between a conducting state and a blocked state.

[0026] Advantageously, the control circuit is configured to deliver at output, from the first main input signal, a second control signal intended to control the switching of the main switch.

[0027] In certain embodiments, when the power supply device is in continuous conduction mode, the first control signal and the second control signal are complementary.

[0028] Thus, in these embodiments, when for example the required electrical output power is maximum, the voltage limiting system plays its initial role of recycling the energy circulating in the leakage inductance by transferring it to the load.

[0029] Moreover, by design, although the continuous conduction mode is characterized by a non-zero current flowing through the main switch, a smooth switching of the main switch is nevertheless ensured due to the zero voltage switching configuration (ZVS) which also improves the efficiency of the indirect switching power supply device in this mode.

[0030] In some embodiments, the first main input signal is binary and alternately takes a first high value and a first low value.

[0031] In some of the preceding embodiments, the time between two high-state switching of the first main input signal defines a total period, the first main input signal taking a first high value for a first duration, the control circuit is further configured to: - convert the second main input signal into a binary signal called the second input signal, the second input signal taking a high value for a second duration, - to have the activation duration which is a function, on the one hand, of a difference between the total period and the first duration and, on the other hand, of the second duration.

[0032] Thus, the duration is determined both by the value over which the first main input signal takes the first low value, and by the second duration. By construction of the second input signal, the second duration depends on the value of the main current.

[0033] In some embodiments, the activation time is a function of the overlap period between said difference and the second time.

[0034] In some embodiments, the control circuit comprises a first module, a second module and a third module, the first module being configured to receive the first main input signal, and provide as output, via a first branch, a first input signal from the third module, the second module being configured to provide as output the second input signal to the third module, the third module being configured to generate, on the basis of the first input signal and the second input signal, the first control signal.

[0035] In some embodiments, the first branch of the first module (MA) includes an inverter.

[0036] Thus, the first branch generates the first input signal by means of a simple and standard component.

[0037] In some embodiments, the second module comprises: - a parallel association of a capacitor of value CT and a resistor of value RT forming a time constant system RT*CT taking as input a voltage function of said at least a second main input signal and delivering an intermediate signal; - a comparator receiving as input, via a first input terminal, the intermediate signal, and via a second input terminal, a reference signal, the comparator delivering the second input signal.

[0038] Thus, the control circuit according to the invention comprises simple components limited in number. Furthermore, the presence of the parallel connection constitutes an additional parameter allowing adjustment of the time duration in the high state of the transistor.

[0039] In some embodiments, the reference signal is derived from a hysteresis voltage source.

[0040] Thus, the use of the hysteresis voltage source makes it possible to adjust the width of the minimum duration in the high state of the clamp switch.

[0041] In some embodiments, the third module includes a logic gate configured to perform a logical AND function between, on the one hand, the first input signal and, on the other hand, the second input signal.

[0042] Thus, the control circuit according to the invention comprises a reduced number of simple components.

[0043] In some embodiments, the control circuit is configured to apply a first dead time between switching the main switch to the blocked state and switching the clamp switch to the on state, and to apply a second dead time between switching the clamp switch to the blocked state and switching the main switch to the on state.

[0044] It is thus possible to adjust the time period during which, in a switching cycle, the clamp switch is in the on state, in relation, moreover, to the switching of the main switch of the indirect transfer switching power supply device, by adjusting the first dead time and the second dead time.

[0045] In some embodiments, the first branch includes a first RC circuit comprising a first series resistor and a first parallel capacitor, the first RC circuit being configured to determine the first dead time.

[0046] In some embodiments, the first RC circuit further includes a first diode connected in parallel with the resistor.

[0047] In some embodiments, the second branch includes a second RC circuit comprising a second series resistor and a second parallel capacitor, the second RC circuit being configured to determine the second dead time.

[0048] In some embodiments, the second RC circuit further includes a second diode connected in parallel with the second resistor.

[0049] Thus again, the control circuit according to the invention comprises simple components and limited in number.

[0050] In some embodiments, the feeding device further comprises a modulation and control system for the first dead time and / or the second dead time.

[0051] Such a modulation and control system offers an additional degree of freedom to adjust the time duration during which, in a switching cycle, the clamp switch is in the conducting state.

[0052] In some embodiments, the control circuit includes a main current pickup block, the pickup block being configured to deliver the second main input signal.

[0053] Thus, in these embodiments, the control circuit can be easily integrated into the indirect transfer switching power supply device, since the latter already includes a main current capture block which can deliver the second main input signal.

[0054] In certain embodiments, the capture block is configured to apply a gain to the main current, the capture block further comprising a gain modulator comprising a first sub-module and a second sub-module, the first sub-module being configured, from an input voltage from a source to which the power supply device is connected, to generate a plurality of N binary signals encoding together a binary word, the second sub-module comprising N stages of which a set of stages is activated according to the value of the binary word, thus determining a gain modulation amplitude, so as to modulate via a control signal as a function of the gain modulation amplitude, the applied gain.

[0055] For example, the gain modulator comprises a plurality of N stages, where N is an integer greater than or equal to 2. The gain modulator may include a first sub-module configured to generate, from a voltage from the source to which the indirect transfer switching power supply is connected, a set of binary signals encoding a binary word. The binary signals are configured to be injected into the input of a second sub-module comprising the N stages. The value of the binary word determines the activation of a set of stages among the N stages. The set of activated stages determines a gain modulation amplitude on the basis of which the second sub-module controls, via a control signal, the main control circuit.

[0056] Thus, advantageously, with the integration of such a gain modulator, the indirect transfer switching power supply device can take into account, in its operation, the fluctuations of the source to which it is connected.

[0057] Another aspect of the invention relates to an acoustic enclosure comprising an indirect transfer switching power supply device as described above.

[0058] Another aspect of the invention relates to an amplification device comprising an indirect transfer switching power supply device as described above. Brief description of the drawings

[0059] Other features, details, and advantages of the invention will become apparent upon reading the detailed description below. This description is purely illustrative and should be read in conjunction with the accompanying drawings, in which: Fig. 1

[0060] [Fig.1] represents an example of a circuit of an indirect transfer switching power supply device comprising a control circuit according to an embodiment of the invention; Fig. 2

[0061] [Fig.2] represents an example of a control circuit according to the invention which may be integrated into the indirect transfer switching power supply device; Fig. 3

[0062] [Fig.3] represents an example of a first and second time-out introduced by the control circuit according to an embodiment of the invention; Fig. 4

[0063] [Fig.4] represents an example of a voltage source according to an embodiment of the invention; Fig. 5

[0064] [Fig.5] represents a hysteresis effect on a reference voltage that can be delivered by the voltage source of [Fig.4]; Fig. 6

[0065] [Fig.6] represents a first embodiment of a current collection block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 7

[0066] [Fig.7] represents a second embodiment of a current collection block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 8

[0067] [Fig.8] represents a third embodiment of a current collection block that can be used in the indirect transfer switching power supply device according to the invention; Fig. 9

[0068] [Fig.9] represents a set of signals from the switching power supply device indirect transfer according to the invention in a continuous conduction mode; Fig. 10

[0069] [Fig. 10] represents a set of signals from the indirect transfer switching power supply device according to the invention in a discontinuous conduction mode; Fig. 11

[0070] [Fig. 11] represents another set of signals from the indirect transfer switching power supply device according to the invention in a continuous conduction mode; Fig. 12

[0071] [Fig.12] represents another set of signals from the indirect transfer switching power supply device according to the invention in a discontinuous conduction mode. Fig. 13

[0072] [Fig. 13] schematically represents an acoustic enclosure comprising the indirect transfer switching power supply device according to the invention. Fig. 14

[0073] [Fig. 14] schematically represents an acoustic amplification device comprising the indirect transfer switching power supply device according to the invention. Detailed description

[0074] A switched-mode power supply with indirect transfer 100 is thus proposed, comprising a voltage limiting system (also called an active clamp circuit or voltage clamp circuit) and a control circuit M2. An embodiment of the switched-mode power supply with indirect transfer 100 is shown in [Fig. 1].

[0075] In the following disclosure, the terms "indirect transfer switching power supply" and "flyback converter" are used interchangeably. Furthermore, the terms "voltage limiting system," "active clamp circuit," and "voltage clamp circuit" are also used interchangeably.

[0076] By "on state" of a switch, we mean a configuration where a non-zero current flows through the switch. By "off state," we mean a configuration where no current flows through the switch.

[0077] In the embodiment illustrated in [Fig.1], the indirect transfer switching power supply device 100 includes a TRM AIN transformer comprising a primary winding LP connected to a primary circuit and a secondary winding supplying a secondary circuit to which a LO AD load is connected.

[0078] Furthermore, in the embodiment shown in [Fig.1], the primary circuit includes an input capacitor CIN, a main switch TMAIN coupled to the primary winding, a main control circuit Ul, a voltage clamp circuit CLAMP_NETWORK, and the control circuit M2 according to the invention.

[0079] The indirect transfer switching power supply device 100 is connected at its input, via the input module, to an electrical power source.

[0080] In the example of [Fig.1], the SOURCE provides energy via a rectifier bridge formed of four diodes Db.

[0081] The voltage across the input capacitor, hereinafter referred to as the input voltage, is denoted VCIN.

[0082] The main switch TMAIN is connected to a current collection network from which, in operation, an IVOUT voltage is derived, reflecting the IT current flowing in the main TMAIN switch. Preferably, the main TMAIN switch is a transistor incorporating by construction a diode which is connected to it in parallel.

[0083] The main control circuit U1 is configured to apply a gain to a current flowing in the main switch TMAIN, so as to control this current, and so as to maintain the voltage across the LO AD load constant or the current flowing through the LO AD load constant. The main control circuit U1 operates in a control mode that can be selected from several types of control modes.

[0084] The CLAMP_NETWORK voltage clamp circuit comprises the primary winding of the transformer TRMAIN, a leakage inductor LL viewed as (or modeled as) an additional inductor in series with the primary winding LP, a capacitor called the clamp capacitor CCLAMP, and a switch called the clamp switch TCLAMP. The current flowing from the leakage inductor LL into the primary winding is denoted ILP. The current entering the clamp switch TCLAMP is denoted IC. Preferably, the clamp switch TCLAMP is a transistor incorporating a diode connected to it in parallel.

[0085] According to the invention, the CLAMP_NETWORK voltage clamp circuit is controlled by the M2 control circuit according to the invention, as will be described below.

[0086] The secondary circuit includes an output diode DOUT, an output capacitor COUT providing an energy reserve, and the load LO AD. The current flowing in the secondary circuit is denoted ID.

[0087] To ensure smooth switching to zero voltage in the conducting state of the TMAIN transistor, two conditions can be met for the choice of the values ​​of the CCLAMP and LL components which form the resonant circuit of the clamp system.

[0088] The first condition requires that when the transistor TMAIN is opened, the energy ELL stored in the leakage inductance LL is of the same magnitude as the energy stored in the output parasitic capacitor Coss, equal to the sum between the parasitic capacitor CGd between the gate and the drain and the parasitic capacitor CDs between the source and the drain, of the main transistor TMAIN.

[0089] [Math.l]

[0090] When transistor TMAIN is opened, a current ILP flows in the main branch and the energy stored in (LL) will be given by:

[0091] [Math.2] EW —XL - / LP3 .g -

[0092] Before the TMAIN transistor is switched off, the energy stored in the output capacitor Coss of the main TMAIN transistor is given by:

[0093] [Math.3] F - / y ' V *"■ 'T ............... 1 2 \ / v /

[0094] With Vf being the forward conduction voltage of the output diode DOUT and the ratio N between the number of turns of the secondary and the number of turns of the primary of the transformer TRMAIN,

[0095] [Math.4]

[0096] and finally the parasitic output capacitor Coss.

[0097] Furthermore, here is the condition on the value of the leakage inductance denoted LL:

[0098] [Math.5]

[0099] Indeed, if the leakage inductance LL is chosen to be lower than the ideal value, the output parasitic capacitor Coss of the main transistor TMAIN will not be fully discharged before TMAIN switches to the on state. This would result in a degradation of the smooth switching effect at zero voltage. More generally, the smooth switching effect at zero voltage gradually diminishes as the energy stored in the leakage inductance LL decreases relative to that stored in the output parasitic capacitor Coss of the transistor TMAIN.

[0100] A second condition for ensuring zero-voltage switching in the on state of transistor TMAIN requires that half the resonance period of the circuit formed by the leakage inductance LL and the clamp capacitor CCLAMP always be greater than the longest off-state time of the main transistor TMAIN. That is:

[0101] [Math.6]

[0102] With the PCCLAMP resonance period of the clamp circuit given by:

[0103] [Math.7] p 2 ■ * ■ y (CCIAMP ■ LL)

[0104] And the longest time in the blocked state PoffTMAIN of the main transistor TMAIN defined by:

[0105] [Math.8]

[0106] With DMIN representing the minimum duty cycle of the PWM_MAIN control signal and Psw the period of the PWM_MAIN control signal. A condition for choosing the value of CCLAMP is deduced from this:

[0107] [Math.9] ■ ^ / (œLAMF. LL) > (1 ...

[0108] Or, by reordering the terms:

[0109] [Math. 10] ;r • LL

[0110] Furthermore, the ILP current flowing through the primary winding LP and the leakage inductance LL is a magnetizing current that is present in prior art indirect transfer switching power supplies, i.e., without the presence of the control circuit according to the invention M2, even when the power supply is at rest. Thus, advantageously, the integration of the control circuit M2 into the power supply aims to minimize the amplitude of the ILP current when the power supply is at rest.

[0111] For this purpose, the control circuit M2 according to the invention will allow the time period in the on state of the clamp switch TCLAMP to be adapted according to the power required at the output of the power supply device 100.

[0112] More specifically, during the transition of the power supply device 100 from one control mode to another, particularly from continuous conduction mode (CCM) to discontinuous conduction mode (DCM) via boundary conduction mode (BCM), the on-state time period of the clamp switch TCLAMP will be progressively reduced. This reduction will limit and reduce the flow of current ILP through the primary winding LP and the leakage inductance LL.

[0113] As illustrated in [Fig. 1], the control circuit M2 is connected to one terminal of the main control circuit Ul, so as to receive a first main input signal PWM_IN. The control circuit M2 is also connected to a first terminal of the main switch TMAIN, so as to receive two second main input signals I_SENS+ and I_SENS-, representing the two alternations of the IT current flowing through the main switch TMAIN. However, in other modes In implementation, only a second main input signal is used to obtain an image of the IT current flowing through the main switch TMAIN eg based on a single half-cycle. Referring back to [Fig. 1], the control circuit M2 is connected to the clamp switch TCLAMP of the voltage clamp circuit CLAMP_NETWORK, so as to control the switching of the latter via a first control signal PWM_CLAMP. The control circuit M2 is also connected to a second terminal of the main switch TMAIN, so as to control the latter via a second control signal PWM_MAIN.

[0114] The first main input signal PWM_IN delivered by the main control circuit U1 is of the PWM type, i.e., Pulse Width Modulation. In other words, the first main input signal PWM_IN is a switching signal (i.e., switching between a high state and a low state) whose duration in the high state (and therefore in the low state) varies. Any type of PWM control mode can be used as the input to the control circuit M2.

[0115] Fig. 2 illustrates one embodiment of the control circuit M2.

[0116] In this embodiment, the control circuit M2 comprises a first module MA, a second module MB and a third module MC which will be described below.

[0117] The first MA module is connected at its input to an output terminal of the main control circuit U1 and splits into a first branch and a second branch. The first MA module thus receives at its input the first main input signal PWM_IN from the main control circuit Ul.

[0118] The first branch is connected at its output to a first input terminal B1 of the third module MC of the control circuit M2.

[0119] The second branch is connected at its output to the main TMAIN switch, and delivers the second PWM_MAIN control signal, which controls the main TMAIN switch.

[0120] The first branch is intended to provide a first input signal PWM_B 1 to the third module MC via a first input terminal B1 of the third module M23.

[0121] In one embodiment, the first branch comprises an inverter INV1 receiving as input a portion of the first main input signal PWM_IN and a first RC circuit. The electrical signal output from the inverter powers the first RC circuit. The first RC circuit consists of a diode Dl, a resistor RI, and a capacitor Cl, as illustrated in [Fig. 2]. The capacitor Cl is connected in parallel and the resistor is connected in series. Furthermore, the diode Dl and the resistor RI are connected in parallel. As will be seen later, the first RC circuit is intended to generate a first dead time TMORT1 between the switching to the blocked state of the main switch TMAIN and the switching to the on state of the clamp transistor TCLAMP.

[0122] In one embodiment, the second branch includes a second RC circuit consisting of a diode D2, a resistor R2, and a capacitor C2, in which the capacitor C2 is connected in parallel and the resistor is connected in series, and the diode D2 and resistor R2 are connected in parallel. This second RC circuit feeds a gate switching circuit BUFF1, which provides the second PWM_MAIN control signal at its output. As will be seen later, the second RC circuit is intended to generate a second dead time TMORT2 between the switching to the blocked state of the clamp switch TCLAMP and the switching to the on state of the main switch TMAIN.

[0123] The second MB module is connected, at its input, to a current-harvesting network M21 of the transfer switch-mode power supply 100 and is connected, at its output, to a second input terminal Al of the third MC module. Thus, during operation, the second MB module provides a second PWM_A1 input signal to the third MC module via a second AL input terminal.

[0124] The current-sensing block M21 comprises two input terminals I_SENS+ and I_SENS-, and one output terminal IVOUT. The two input terminals I_SENS+ and I_SENS- are connected to the main switch TMAIN, so as to deliver to the output terminal IVOUT a voltage that is a function of the current IT (e.g., proportional to the current IT) flowing in the main branch of the primary circuit and in the main switch TMAIN.

[0125] In the embodiment shown in [Fig. 2], the second module MB comprises a sequence consisting of a diode DT, a third RC circuit, and a comparator COMP1. The third RC circuit consists of a capacitor CT and a resistor RT connected in parallel. The comparator COMP1 comprises a first input terminal IN+, a second input terminal IN-, and an output terminal. The output terminal of comparator COMP1 is connected to the second input terminal Al of the third module MC and delivers the second input signal PWM_A1.

[0126] Furthermore, diode DT rectifies the voltage from current-sensing block M21, so as to generate a transformed voltage through the third RC circuit, which is then injected into the first input terminal IN+ of comparator COMP1. The third RC circuit has a time constant RT*CT. A source M20 is connected to the second input terminal IN- of comparator COMP1, delivering a voltage VREF. Thus, by design, the second input signal depends on the comparison between the image voltage of the main current and the voltage VREF, which will allow discrimination between high and low values ​​of the main current.

[0127] As previously stated, the third MC module comprises two input terminals B1 and A1 and one output terminal. The output terminal of the third MC module is connected to the TCLAMP clamp switch of the voltage limiting system, so that the signal from the output terminal of the third MC module constitutes the second PWM_CLAMP control signal, configured to control the voltage limiting system, and more specifically the TCLAMP clamp switch.

[0128] In the embodiment illustrated in [Fig.2], the third module MC comprises a series association of an AND logic gate A performing an AND function and a transistor driver incorporating an isolation system BUFF2. The transistor driver BUFF2 thus provides an on / off output.

[0129] Figure 3 gives an example, for a given power state, of the forms of The first main input signal PWM_IN, the first control signal PWM_TCLAMP, and the second control signal PWM_MAIN. The signals shown are voltages expressed in Volts.

[0130] In [Fig. 3], the first dead time TMORT1 can be observed between the switching of the first control signal PWM_TCLAMP to the on state and the switching of the second control signal PWM_TMAIN to the off state. The second dead time TMORT2 can also be observed between the switching of the first control signal PWM_TCLAMP to the off state and the switching of the second control signal PWM_TMAIN to the on state. By design, the switching of the first main input signal PWM_IN to the on state triggers the switching of the main switch TMAIN to the on state. The first dead time TMORT1 and the second dead time TMORT2 can be adjusted by selecting the values ​​of, on the one hand, resistor RI and capacitor C1, and on the other hand, resistor R2 and capacitor C2.

[0131] Preferably, the first dead time TMORT1, defined by the values ​​of the resistance RI and the capacitance of the capacitor Cl, should be long compared to the switching time, as it allows the clamp transistor TCLAMP to switch to the zero-on state of voltage ZVS. It may be slightly longer than necessary to add margin to the operation of the power supply device 100. It should not be too long so as not to degrade the performance of the voltage limiting system.

[0132] Preferably, the second dead time TMORT2 should also be defined as precisely as possible by the values ​​of resistance R2 and capacitor C2. If the second dead time TMORT2 is too long, the zero-voltage switching is lost for the main switch TMAIN. If the second dead time TMORT2 is too short, there is a risk of a short circuit between the active clamp branch and the main branch.

[0133] An embodiment, illustrated in [Fig.4], of the voltage source M20 connected to the second input terminal IN- of the comparator COMP1 is described here. The voltage source receives a voltage at the input IN and generates a voltage VREF at the output.

[0134] In this embodiment, the voltage source denoted M20 consists of a resistor network that sets the base voltage. This network comprises a resistor RREF3 and a resistor RREF2. This voltage VREF is filtered by the capacitor CREF and injected into the negative input IN- of the comparator COMP1. Adjustable hysteresis is created by the component network consisting of the resistor RREF3, the transistor QREF, and a resistor RREF1. When comparator COMP1 switches to the high state, the voltage at the IN input switches the transistor QREF to the conducting state, which consequently readjusts the VREF voltage downwards. The amount of hysteresis applied determines the minimum pulse width for controlling the clamp switch TCLAMP via the second control signal PWM_CLAMP, as can be explained in [Fig. 5].

[0135] Figure 5 illustrates the effect of this hysteresis on the PWM_A1 signal at the output of comparator COMP1, which feeds the second input terminal Al of the third MC module. Due to the operation of comparator COMP1, it can be observed that the time period during which the VERF voltage is falling (represented by a dashed line in Figure 5) corresponds to a duration of the high state of the PWM_A1 signal. This duration depends on the time constant of the third RC circuit, which has a time constant RT*CT. Consequently, the signal from the third MC module can be adjusted by selecting the components forming the voltage source and the components of the third RC circuit. Thus, hysteresis allows adjustment of the minimum pulse width sent to transistors TCLAMP and TMAIN. Indeed, pulses that are too short do not actively participate in the operation of the resonant converter and can even degrade its efficiency.It is therefore desirable to control the minimum pulse width allowed for the control of the TCLAMP and TMAIN transistors.

[0136] Several possible embodiments of the current collection block M21 are now described.

[0137] In an embodiment illustrated in [Fig. 6], the current-sensing block M21 comprises a single current-reading resistor RSENS. The current flowing IT in the main branch induces a voltage IVOUT across RSENS. In one example, the value of the RSENS resistance is low and can be between 0.004 ohms and 0.1 ohms.

[0138] In another embodiment illustrated in [Fig. 7], the current-harvesting block M21 comprises a current transformer TSENS, a diode DTR, and a resistor RSENS. The transformer ratio can range from 1:100 to 1:500 depending on the desired electrical output power and the maximum IT current flowing in the primary circuit, and in particular in the main TMAIN switch of the power supply 100. The IT current representation should closely follow the actual current flowing in the main TMAIN switch. Peak current mode control requires a high transformer cutoff frequency of at least 10 times the power supply operating frequency. To ensure proper operation, this frequency should preferably be much higher. In this configuration, the RSENS resistance value can be between 5 ohms and 20 ohms.

[0139] Another embodiment, illustrated in [Fig. 8], of the current-gaining block M21 incorporates into the previous embodiment illustrated in [Fig. 7] means for controlling the current loop gain, consisting of a sub-module M100 and a sub-module M110. More specifically, the sub-modules M100 and M110 constitute a multi-stage current loop gain modulator. In this configuration, the diode DTR of the embodiment in [Fig. 8] is connected in series with the resistor RSENS, which is itself connected to an input terminal ISENS+ of the control means M110. A differential amplifier SENS_AMP is attached across the terminals of the resistor RSENS and provides an output voltage IVOUT proportional to the voltage induced in the resistor RSENS by the current flowing through the transformer TSENS. In this configuration, the value of the resistor RSENS can be between 0.5 ohms and 1 ohm.

[0140] More specifically, the submodule M100 can receive as input an AC_REC signal from the SOURCE to which the power supply 100 is connected and can convert this AC_REC signal into a set of N binary signals B0, Bl,..., BN-1 (N being equal to 4 in [Fig. 8]) which together encode a binary word. The N binary signals B0, Bl,... BN-1 can be injected into the submodule M10, so as to control a configuration of the control means M10 representative of a gain modulation amplitude value determined by the value of the binary word.The gain control means can thus generate at output a control signal as a function of the gain modulation amplitude value, which can be injected into the main control circuit Ul, so as to modulate the gain of the latter as a function, on the one hand, of the voltage from the source SOURCE and, on the other hand, of a signal I_SENS+ image of the current IT flowing in the primary circuit of the power supply device 100.

[0141] Advantageously, the integration of the control circuit M2 according to the invention is possible in any operating mode of the indirect transfer switching power supply device. Indeed, as indicated above, the control circuit M2 according to the invention makes it possible to progressively reduce the on-state time of the The clamp switch TCLAMP operates when the output power demand (LO AD load power) decreases, passing through continuous conduction mode (CCM) and then discontinuous conduction mode. Figures 9 and 10 illustrate this reduction in the on-state duration of the clamp switch TCLAMP, as will be described below.

[0142] Figure 9 illustrates the signal set of the power supply device 100 incorporating the control circuit M2 described above for an operating point in continuous conduction mode. This is, for example, an operating point where the output power demand is high.

[0143] In [Fig. 9], the first PWM_MAIN control signal, apart from the time constant introduced by the second RC circuit, is in the conducting state when the first main input signal PWM_IN is in the conducting state. The IT current flowing through the main switch increases during the period when the main switch is in the conducting state, then drops to zero when the first main input signal PWM_IN, and therefore the first PWM_MAIN control signal, goes low.

[0144] The voltage IV, representing the current IT, decreases with the time constant RT*CT when the latter reaches zero, remaining above a value high enough to exceed the output voltage VREF of the voltage source M20. By design, the output signal of comparator COMP1 remains constantly high. Consequently, and also by design, the second control signal PWM_CLAMP will be identical to the first input signal PWM_B1 injected into the input of the third module MC. The first input signal PWM_B1 is, by design, the inverse of the first main input signal PWM_IN from the main control circuit Ul.

[0145] Figure 10 illustrates the signal set of the power supply device 100 incorporating the control circuit M2 described above for an operating point in discontinuous conduction mode. This is, for example, an operating point where the output power demand is low, or even the case where the power supply device 100 is at rest.

[0146] In [Fig. 10], the first PWM_MAIN control signal is, apart from the time constant introduced by the second RC circuit, in the conducting state when the first main input signal PWM_IN from the main control circuit Ul is in the conducting state. The IT current flowing through the main switch increases during the period when the main switch TMAIN is in the conducting state, then drops to zero when the first main input signal PWM_IN, and therefore the first PWM_MAIN control signal, goes low.

[0147] The voltage IV, representing the current IT, when the latter falls to zero, decreases with the time constant RT*CT, but this time, lies within ranges of values ​​more lows which can then be lower than the VREF voltage at the output of the voltage source M20. Thus, unlike the continuous conduction mode, in the discontinuous conduction mode, the second input signal PWM_A1 of the third module MC is not constantly in the high state, but switches between the low state and the high state depending on the voltage IV image of the IT current and the VREF voltage.

[0148] The first input signal PWM_B1 injected at the first input terminal B1 of the third MC module is, by construction, the inverse of the first main input signal PWM_IN from the main control circuit Ul. Consequently, the high-state duration of the second control signal PWM_TCLAMP is shorter than in the case of continuous conduction mode.

[0149] Advantageously, when the indirect transfer switching power supply device 100 operates in continuous conduction mode (CCM), the switching of the main switch TMAIN is carried out at zero voltage (ZVS), as illustrated in the [Fig.11] described below.

[0150] Figure 11 illustrates a plurality of signals from the power supply device 100 incorporating the previously described control circuit M2 for an operating point in continuous conduction mode. Figure 11 shows the complementary operation of the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN.

[0151] We can also observe the variation of the intensity of the current flowing in the primary winding, increasing when the main switch TMAIN is conducting, and decreasing when the main switch TMAIN is blocked (and therefore the clamp switch is conducting).

[0152] We also observe, during the periods when the main switch TMAIN is conducting, an increasing variation in the intensity of the main current IT flowing through it and a drop to zero of this intensity when the main switch TMAIN is blocked. It can be noted that this intensity is zero when the main switch TMAIN switches to the conducting state, in a configuration which is therefore a zero-current switching (ZCS).

[0153] By design, the current IC flowing through the clamp switch TCLAMP is zero when the main switch TMAIN is conducting, and switches to the conducting state in ZVS when the clamp switch goes high. When the clamp switch is conducting, the voltage limiting system allows energy transfer from the leakage inductance LL to the secondary circuit. The two switching (rising and falling) of the current ID flowing through the output diode DOUT can thus be observed in ZCS.

[0154] When the output power demand decreases, or the input voltage increases, the conduction mode of device 100 gradually shifts to boundary conduction mode (BCM) and then discontinuous conduction mode (DCM). According to the invention, the control circuit M2 decreases, during this decrease, the on-state activation time of the clamp switch TCLAMP. This decrease results in the loss of the zero-voltage switching configuration (ZVS).

[0155] However, in discontinuous conduction mode (DCM) or limiting conduction mode (BCM), the magnetizing current always drops to zero before the start of the next switching cycle. Thus, the switching for the main transistor TMAIN is naturally performed at zero current (ZCS).

[0156] Figure 12 illustrates a plurality of signals from the power supply device 100 incorporating the previously described control circuit M2 for an operating point in continuous conduction mode. In Figure 11, the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN are no longer complementary. In particular, there is a time period during the switching cycle of the main switch TMAIN during which both the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN are in the blocked state.

[0157] Thus, as can be seen in [Fig. 12], the ILP current through the primary winding LP evolves as follows during a switching cycle of the main switch TMAIN: when the main switch TMAIN is conducting, the ILP current increases; when the main switch TMAIN is blocked but the clamp switch TCLAMP is conducting, the ILP current decreases; then, the ILP current is zero during the period when the first control signal PWM_TCLAMP and the second control signal PWM_TMAIN are both in the blocked state.

[0158] The main IT current through the main switch TMAIN increases when the main switch TMAIN is in the conducting state, and cancels out when the latter is in the blocked state.

[0159] By design, the current IC flowing through the clamp switch TCLAMP is zero when the main switch TMAIN is conducting, and switches to the conducting state in ZVS when the clamp switch goes high. When the clamp switch TCLAMP is conducting, the voltage limiting system allows energy transfer from the leakage inductance LL to the secondary circuit. The two switching (rising and falling) of the current ID flowing through the output diode DOUT can thus be observed in ZCS.

[0160] Advantageously, the previously described indirect transfer switching power supply 100 can be used to power a loudspeaker enclosure of high power integrating, where appropriate, also an amplification module and a signal processing module.

[0161] Thus, another aspect of the invention relates to a loudspeaker 200 comprising an indirect transfer switching power supply 100 as described above. Figure 13 schematically illustrates such a loudspeaker 200 incorporating the indirect transfer switching power supply 100.

[0162] In another use, the previously described indirect transfer switching power supply 100 can be separated from the enclosure it powers and alternatively integrated into an external acoustic amplifier.

[0163] Thus, yet another aspect of the invention relates to an acoustic amplification device 300 comprising an indirect transfer switching power supply 100 as described above. Figure 14 schematically illustrates such an acoustic amplification device 300 incorporating the indirect transfer switching power supply 100.

[0164] According to one example, the amplification device is external and can power one or more loudspeakers.

[0165] Of course, the present invention is not limited to the embodiments described above by way of example; it extends to other variants. Other embodiments are possible.

[0166] Various aspects and features described above may be implemented together, separately, or substituted for one another, and all the different combinations and subcombinations of aspects and features form part of the scope of the invention. Furthermore, some systems and equipment described above may not incorporate all the modules and functions described for the preferred embodiments. Industrial application

[0167] The invention may find application particularly in the field of acoustics, but other fields of application are possible. For example, the control circuit according to the invention can be used to modernize an existing power supply device without significantly altering its initial operation and at a reasonable additional cost.

[0168] The invention is not limited to the examples of the control circuit M2, and in particular of the first module MA, the second module MB, and the third module MC described above, only by way of example, but it encompasses all the variants that a person skilled in the art may consider within the framework of the protection sought.

Claims

1. Demands Indirect transfer switching power supply device (100) configured to deliver electrical output power to a load (LOAD) from an electrical power source, comprising: - a transformer (TRMAIN) comprising a primary winding (LP) connected to a primary circuit supplied by the electrical power source and a secondary winding supplying a secondary circuit to which the load is connected (LOAD), the transformer having a leakage inductance (LL) viewed as an additional inductance in series with the primary winding, - a main switch (TMAIN) configured to, when conducting, close the primary circuit's power supply via the electrical power source and, when blocked, open said power supply circuit, - a voltage limiting system configured to transfer energy stored in the leakage inductance (LL) to the load (LOAD), the limiting system comprising a capacitor called a clamp capacitor (CCLAMP) and a switch (TCLAMP) called a clamp switch, the limiting system being configured so that the clamp capacitor (CCLAMP) is electrically connected in parallel with the primary winding (LP) when the clamp switch (TCLAMP) is in a conducting state, the indirect transfer switching power supply device (100) being characterized in that it further comprises a control circuit (M2) configured to generate a first binary control signal (PWM TCLAMP) on the basis of a first binary main input signal (PWM_IN) and at least one second main input signal (I_SENS+, I_SENS-), the main switch (TMAIN) being controlled from the first main input signal (PWM_IN), the at least one second main input signal being representative of a current, called main current (IT), flowing through the main switch (TMAIN) when the main switch (TMAIN) is conducting, the control circuit (M2) being configured to generate the first control signal (PWM TCLAMP) with an activation duration, during which the clamp switch (TCLAMP) is in the conducting state, defined between two successive switching to a high state of the first main input signal (PWM_IN), the activation time varying increasing with the electrical output power.

2. Power supply device (100) according to claim 1, wherein the time between two switching to a high state of the first main input signal (PWM_IN) defining a total period, the first main input signal (PWM_IN) taking a first high value for a first duration, the control circuit (M2) is further configured to: - convert the second main input signal into a binary signal named second input signal (PWM_A1), the second input signal taking a high value for a second duration, - have the activation duration which is a function, on the one hand, of a difference between the total period and the first duration and, on the other hand, of the second duration.

3. Power supply device (100) according to the preceding claim, characterized in that the activation time is a function of the overlap period between said difference and the second duration.

4. Power supply device (100) according to any one of the preceding claims, characterized in that the control circuit (M2) comprises a first module (MA), a second module (MB) and a third module (MC), the first module (MA) being configured to receive the first main input signal (PWM_IN), and provide as output, via a first branch, a first input signal (PWM_B1) to the third module (MC), the second module (MB) being configured to provide as output the second input signal (PWM_A1) to the third module (MC), the third module (MC) being configured to generate, on the basis of the first input signal (PWM_B1) and the second input signal (PWM_A1), the first control signal (PWM_TCLAMP).

5. Power supply device (100) according to the preceding claim, characterized in that the first branch of the first module (MA) comprises an inverter.

6. Power supply device (100) according to any one of the preceding claims and claim 4, characterized in that the second module (MB) comprises: - a parallel association of a capacitor of value CT and a resistor of value RT forming a time constant system RT*CT taking as input a voltage function of said at least a second main input signal and delivering an intermediate signal; - a comparator (COMP1) receiving as input, via a first input terminal, the intermediate signal, and via a second input terminal, a reference signal (VREF), the comparator delivering the second input signal (PWM_A1).

7. Power supply device (100) according to any one of the preceding claims and claim 4, characterized in that the third module (MC) comprises a logic gate configured to perform a logical AND function between, on the one hand, the first input signal (PWM_B1) and, on the other hand, the second input signal (PWM_A1).

8. Power supply device (100) according to any one of the preceding claims, characterized in that the control circuit (M2) is configured to apply a first dead time (TMORT1) between switching to the blocked state of the main switch (TMAIN) and switching to the on state of the clamp switch (TCLAMP), and to apply a second dead time (TMORT2) between switching to the blocked state of the clamp switch (TCLAMP) and switching to the on state of the main switch (TMAIN).

9. Power supply device (100) according to any one of the preceding claims and claims 4 and 8, characterized in that the first branch comprises a first RC circuit comprising a first series resistor and a first parallel capacitor, the first RC circuit being configured to determine the first dead time (TMORT1).

10. Power supply device (100) according to any one of the preceding claims and claims 4 and 8, characterized in that the second branch comprises a second RC circuit comprising a second series resistor and a second parallel capacitor, the second RC circuit being configured to determine the second dead time (TMORT2).

11. Power supply device according to any one of the preceding claims and claim 8, further comprising a modulation and control system for the first dead time and / or the second dead time.

12. Power supply device according to any one of the preceding claims, characterized in that the control circuit (M2) comprises a main current (IT) pickup block (M21), the pickup block (M21) being configured to deliver the second main input signal.

13. Power supply device (100) according to the preceding claim, wherein the pickup block (M21) is configured to apply a gain to the main current (IT), the pickup block (M21) further comprising a gain modulator comprising a first sub-module (M100) and a second sub-module (M10), the first sub-module being configured, from an input voltage from a source to which the power supply device (100) is connected, to generate a plurality of N binary signals encoding together a binary word, the second sub-module (M10) comprising N stages of which a set of stages is activated according to the value of the binary word, thus determining a gain modulation amplitude, so as to modulate, via a control signal as a function of the gain modulation amplitude, the applied gain.

14. Acoustic enclosure (200) comprising an indirect transfer switching power supply device (100) according to any one of claims 1 to 1 2

15. d 13. Acoustic amplification device (300) comprising an indirect transfer switching power supply device (100) according to any one of claims 1 to 13.

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