Output power control system for radio frequency power source in NNBI

Abstract

An output power control system for a RF power source in an NNBI is provided, including a dual-core control module, including an ARM microcontroller and a complex programmable logic device CPLD chip, w

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of power control, and in particular, to an output power control system for a radio frequency (RF) power source in a negative ion based neutral beam injection system (NNBI). BACKGROUND

[0002] The neutral beam injection heating system is an important component of nuclear fusion technology. With increasing improvement in the performances of fusion plasma, the existing neutral beam injection systems in China have been unable to meet requirements. Therefore, a novel negative ion source, i.e., a negative ion based neutral beam injection system (NNBI), will be adopted in the neutral beam injection heating system. NNBI system is a complex and huge megascience system engineering and involves multiple technical equipments. Radio frequency(RF) power source is the key technical equipment responsible for plasma excitation. RF power source is a high-frequency excitation source capable of producing sinusoidal wave of fixed frequency, having certain frequency, mainly composed of an RF signal source, a RF power amplifier and an impedance matcher, and is a plasma-matched excitation source. With the increasing requirements for NNBI equipment parameters, the matched RF power source also needs to be optimized, so as to improve the precision and stability of output power.

[0003] RF power source is a Large Time Delay System, and its output power has high dynamicity and hysteresis. At present, in the mainstream output power control device for RF power source in the market an open-loop control is formed mainly by a single chip microcomputer (SCM) core control panel, a power amplifier, a power synthesis-output device and other components. The device has the following shortcomings:

[0004] (1) in the prior art solution, a single-core control structure is used, in which a 51 SCM embedded chip is adopted as a master controller to run control system algorithm, and other peripheral devices in the control system is connected for communication and control. In such a control system, multiple control module algorithms are completed in an SCM chip. Even though program optimization may be used to perform time division multiplexing of the multiple algorithms, the processing speed will be still limited by SCM performance. Especially, when there are many peripheral devices controlled in the system, it wall take a lot of time for the SCM chip to be communicated with the peripheral device, thus resulting in reduced operating efficiency of the control algorithm.

[0005] (2) in the prior art solution, a power control method by analog signal is adopted, that is, magnitude change of the voltage signal is used to correspondingly control the change of driving voltage of the power amplifier, thereby controlling the output power level. For instance, in an RF power source having a rated output power of 50 kW, a controller controls a change of 0-50 kW in output power of a power amplifier correspondingly through calibration by outputting a change of 0-5V in an analog voltage, thus achieving power control of the output power of the RF power source by analog signal. There always exists a certain fluctuation in the amplitude of electrical level, and it is impossible to achieve modular transformation for a power amplifier. Therefore, this way by analog is poor in control accuracy and stability.

[0006] (3) in the prior art solution, an open-loop output power control method is adopted. That is, the control signal of a controller will not be corrected by acquisition of an actual output power, resulting in that the actual output power level will not be fed back to power input control. Therefore, when output power drops unexpectedly, power control circuit would not take compensation measures, resulting in actual output power being not up to standard. SUMMARY

[0007] Embodiments of the present disclose provides an output power control system for an RF power source in an NNBI, to solve the problems existing in the prior art, namely, insufficient performances in a single-core control structure, and low control precision and stability.

[0008] In an aspect, an embodiment of the present disclosure provides an output power control system for an RF power source in an NNBI, including:

[0009] a dual-core control module, including an ARM microcontroller and a complex programmable logic device (CPLD) chip, wherein the CPLD chip is configured to generate a corresponding power control command according to a set. output pow'er;

[0010] a power output control module, comprising a power amplifier and a power synthesizer, wherein the pow'er amplifier comprises a standard power amplifier and a fine-tuning power amplifier; a plurality of the standard pow'er amplifiers are configured to provide a plurality of same output voltages, and a plurality of the fine-tuning power amplifiers are configured to provide output voltages that are less than that of the standard powder amplifiers, and the plurality of the fine-tuning power amplifiers provide output voltages of different magnitudes, respectively; the pow'er synthesizer is configured to conduct, power synthesis on voltages output from the power amplifier and output; a number of the pow'er amplifiers connected in is controlled by the pow'er control command; and a power detection board, configured to detect art output power of the power output control module, wherein the ARM microcontroller is configured to compare an output power detected by the power detection board with a set output power, to determine a corresponding compensation amount, to adjust the output power of the power output control module according to the compensation amount,

[0011] The output power control system for an RF power source in an NNBI in the present disclosure has the following advantages:

[0012] 1. An ARM+CPLD dual-core control module is adopted; operations such as a digitized power control algorithm and a closed-loop power control algorithm as well as man-machine interaction communication are executed in an ARAI microcontroller in a way of software / hardware separation, and meanwhile, functions such as device status acquisition, device status control, digitized power amplifier control, and power detection board acquisition are executed in a CPLD chip. Such a configuration may improve the execution efficiency of control algorithms in the control system, and ensure the real-time capability of peripheral device communications, enhance the running stability of the output power control system for an RF pow'er source, and also leave space for upgrade and expansion of subsequent device hardware.

[0013] 2. A digitized power control method is adopted; that is, a 12-bit binary control word is utilized to control on and off of multi-channel power amplifiers, thus achieving control of the the output power level. By the digitized power output control method cooperated with modularized power amplifiers design, such a design mode brings significant advantages in control precision of output power over conventional powder control method by an analog level signal.

[0014] 3. A closed-loop control method for output power is adopted to solve the problem that output power of an RF power source reduces as load impedance changes, so as to satisfy the requirements of the NNBI system for stability of output power from RF power source. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] To describe the technical solutions in the embodiments of the present disclosure or in the prior art more clearly, the following briefly introduces the accompanying drawings required for describing the embodiments or the prior art. Apparently, the accompanying drawings in the following description show7 merely some embodiments of the present disclosure, and a person of ordinary skill in the art may still obtain other drawings from these accompanying drawings without creative efforts.

[0016] FIG. 1 is a schematic diagram showing a functional module of an output power control sy stem for an RF power source in an NNBI in an embodiment of the present disclosure;

[0017] FIG. 2 is a schematic diagram showing a power synthesizer circuit provided in an embodiment of the present disclosure;

[0018] FIG. 3 is a logic diagram showing power closed-loop control provided in an embodiment of the present disclosure;

[0019] FIG. 4 is a schematic diagram showing control strategies for the power closed-loop control provided in an embodiment of the present disclosure; and

[0020] FIG. 5 is a schematic diagram showing a pow'er detection circuit provided in an embodiment of the present disclosure. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0021] The technical solutions of the embodiments of the present disclosure are clearly and completely described below with reference to the drawings. Apparently, the described embodiments are merely a part rather than all of the embodiments of the present disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of the present disclosure without any creative effort shall fall within the protection scope of the present disclosure.

[0022] FIG. 1 is a schematic diagram showing a functional module of an output power control system for an RF power source in an NNBI in an embodiment of the present disclosure. The embodiment of the present disclosure provides an output powder control system for an RF power source in an NNBI, including a dual-core control module, a power output control module, and a powder detection board.

[0023] The dual-core control module includes an ARM microcontroller and a CPLD chip, where the CPLD chip is configured to generate a corresponding power control command according to a set output power.

[0024] The power output control module includes a power amplifier and a power synthesizer, where the power amplifier includes a standard power amplifier and a fine-tuning power amplifier. A plurality of the standard power amplifiers are configured to provide a plurality of the same output voltages, and a plurality of the fine-tuning pow'er amplifiers are configured to provide output voltages that are less than that, of standard power amplifiers; and the plurality of fine-tuning powder amplifiers provide output voltages of different magnitudes, respectively, the power synthesizer is configured to conduct power synthesis on voltages output from the power amplifier and output the voltage after power synthesis; the number of the power amplifiers connected in is controlled by the power control command.

[0025] The pow'er detection board is configured to detect an output power of the power output control module, where the ARM microcontroller is configured to compare the output power detected by the power detection board with the set output power, to determine a corresponding compensation amount, and thereafter adjust the output power of the power output control module according to the compensation amount.

[0026] Illustratively, the system of the present disclosure further includes a device status acquisition module and a device status control module. By the device status acquisition module, running status information of the device is acquired in real time. When the device status changes, for example a fault occurs, the device status control module executes corresponding control operations, i.e., power off

[0027] According to the present disclosure, an ARM+CPLD dual-core control module is adopted, and operations such as a digitized power control algorithm and a closed-loop power control algorithm as well as man-machine interaction communication are executed in an ARM microcontroller via software / hardware separation, and meanwhile, functions such as device status acquisition, device status control, digitized power amplifier control, and power detection board acquisition are executed in a CPLD chip. Such a configuration may improve the execution efficiency of control algorithms in the control system, and ensure the real-time capability of peripheral device communications, enhance the running stability of the output power control system for an RF power source, and also leave space for upgrade and expansion of subsequent device hardwares.

[0028] Specifically, STM32F103VET6 is selected as the ARM microcontroller in the dual-core control module; STM32F103VET6 is a kind of ARAI microcontroller based on Cortex-M3 core manufactured by STMicroelectronics N.V. The ARM microcontroller has a basic frequency of 72 MHz, a pin of 100 Pin, and integrates on-chip peripherals such as GPIO, USART, I1C and SPI. Its high efficiency and high stability may guarantee real-time and reliable operation of control system algorithms.

[0029] EPM570T144A5 is selected as the CPLD chip of the dual-core control module. Such kind of CPLD chip is a digital integrated circuit in essence and integrates a large number of logic gate units internally, and has good flexibility and reconfigurability. A logic circuit may be repeatedly designed and constructed inside the CPLD chip according to functional requirements. EPM570T144A5 is a MAX II series product introduced by Altera, and has outstanding features of low power consumption, low costs and simple peripheral configuration circuits. The chip has 570 logical cells and 440 macrocells, and its parallelized multi-channel data read-waite processing may satisfy real-time read-write and calculation requirements for multi-channel data in the system.

[0030] In embodiments of the present disclosure, the ARM microcontroller and the CPLD chip are communicated via a 8-bit GPIO port in the dual-core control module, which ensures the real-time capability and reliability of data exchange.

[0031] In a possible embodiment, the power amplifier includes 60 standard power amplifiers and 6 fine-tuning power amplifiers; and output voltages of the 6 fine-tuning power amplifiers from the first to the sixth one are 1 / 2, 1 / 4, 1 / 8, 1 / 16, 1 / 32 and 1 / 64 of the output voltage of the standard power amplifier, respectively.

[0032] Illustratively, to achieve stable and high-precision output power control, a digitized power control method is adopted in the system of the present disclosure, that is, a power control command in a form of a 12-bit binary number is utilized to control on and off of multi-channel power amplifiers, thus controlling the output power level. Take an RF power source with a rated output power of 50kW as an example, its logic is to install 66 power amplifiers which include 6 fine-tuning power amplifiers and 60 standard power amplifiers for the RF power source on a hardware. The so-called fine-tuning power amplifier means that the 6 power amplifiers each have different output powers, and the power of each power amplifier is 1 / 2 of that of the another one. If output power of the standard power amplifier is set as 1, output powers of the 6 fine-tuning power amplifiers are 1 / 2, 1 / 4, 1 / 8, 1 / 16, 1 / 32, and 1 / 64, respectively. Thus, as can be seen from this, the output power resolution of the RF power source is 1 / 64 of the powder of the standard power amplifier.

[0033] A 12-bit binary number is expressed as B1-B12, of which Bl denotes the most-significant bit and B12 denotes the least-significant bit. In the RF power source, the binary number is divided into two groups, where B7-B12 are used to control switches of the 6 fine-tuning power amplifiers, B1-B6 are used to control switches of the 60 standard power amplifiers. The correspondence between the 6-bit binary number and the 60 standard power amplifiers are shown in Table 1. The standard power amplifiers provide the same output voltage. When the number of the power amplifiers turned on is different, different output powers may be obtained.

[0034] Table 1 Correspondence between the binary' number B6-B1 and the standard power amplifier

[0035] Corresponding turned on Total number of turned on Bl -B2-B3-B4-B5-B6 power ampli fi er power ampl i ft ers None 6 0-0-0-0-0-1 1 1 0-0-0-0-1-0 1-2 2 0-0-0-0-1-1 1-3 3 1-1-1-1-0-0 1-60 60 1-1-1-1-0-1 1-60 60

[0036] The 6-bit binary number B7-B12 has a one-to-one correspondence with the 6 fine-tuning power amplifiers. That is, B7 corresponds to the first fine-tuning power amplifier, B8 corresponds to the second fine-tuning power amplifier, B9 corresponds to the third fine-tuning powder amplifier, BIO corresponds to the fourth fine-tuning powder amplifier, Bll corresponds to the fifth fine-tuning power amplifier, and B12 corresponds to the sixth fine-tuning power amplifier. If the digital bit is 1, the corresponding fine-tuning power amplifier is turned on, and if the digital bit is 0, the corresponding fine-tuning power amplifier is turned off.

[0037] As can be seen from Table 1, the correspondence between the 6-bit binary number and the standard power amplifiers is that the binary value is converted to the number of the power amplifiers corresponding to the binary value. If the 6-bit binary value is >60, the number of the turned on power amplifier is clamped at 60, and the clamped number depends on the maximum output power value of the RF pow'er source.

[0038] The RF power source control system controls on and off of the power amplifier via a 12-bit digitized control signal, thus controlling the working status of the power amplifier and the output power level. The RF power amplifier is used for powder amplification of an RF signal, its working status decided by a control signal of last stage, and for outputting the power signal to a power synthesizer to conduct the next-stage power synthesis.

[0039] In a possible embodiment, the power synthesizer includes a synthesizing coil configured to conduct power synthesis on output voltages of a plurality of the power amplifiers and to output to a load.

[0040] Illustratively, the power synthesizer conducts power synthesis on output voltages from multi-stage power amplifiers and outputs to a load. The power synthesis is mainly conducted through a synthesizing coil. The power synthesis principle is shown in FIG. 2. As can be seen from the schematic diagram, in the power synthesizer a power synthesis network is formed via high-frequency transformers. The transformers \ , ..., and in Fig.2 each have a same u u u rate of turn K. It is set that RF excitation voltages ’, '2, ..., and s is fed from both ends R R R of resistors ’, \ ..., and m at the primary level of the transformer, and:

[0041] um=u a)

[0042] R.~R,---~R ~R 12 m (2)

[0043] j I resulting in RF excitation currents l, 2 , ..., and ^m,and:

[0044] = I =u / R = I 1 z m (3)

[0045] P P P RF excitation powers P 2,..., and m , and:

[0046] P =R-.. = P = UxI = P L z m (4)

[0047] U U, up , u voltages nP «2, ..., and ™” may be obtained at. the secondary level of the transformers, and: H ... = H = UiK

[0048] 'nl ”2 ' ' (5) U

[0049] a synthesized voltage is , and: C' ~ i ~^U ., H— ' +IJ “ <1? X Ij / A z .... 100501 ” nl nl nm (b)

[0051] the power synthesizer is connected with an external load at the secondary level; if the external load resistance is set as ”, and:

[0052] z< /

[0053] resulting in a synthesized current ", and: ~KxU / R~KxI

[0054] " (7), (8),

[0055] a synthesized power « may be obtained, on the external load, and:

[0056] P = 1 xU =mxIxU=mxP n n n (9)

[0057] As can be seen, such a modularized power synthesis mode satisfies conditions for power addition.

[0058] Structure and principle of the power synthesizer corresponding to the fine-tuning power amplifier are basically the same as those of the power synthesizer corresponding to the standard power amplifier described above, with the difference lying in output powers of the 6 power amplifiers plugged, into the fine-tuning power synthesizer being different from one another, being 1 / 2, 1 / 4, 1 / 8, 1 / 16, 1 / 32, and 1 / 64 of the standard power amplifier, respectively. Thus, the output powder resolution of the RF power source is 1 / 64 of the power of the standard power amplifier. When 50 standard power amplifiers output a power of 50 kW, the output power resolution of the power source is

[0059] 50000(W) / 50 / 64 = 15.625(W) (1o)

[0060] in percentage calculated as:

[0061] 15 625(W) / 50000(W)« 0.0H%

[0062] As can be seen, by the digitized output power control method for an RF power source cooperating with modularized power amplifiers design, the control precision of output power has significant advantages over traditional power control methods by an analog level signal.

[0063] In a possible embodiment, an ARM microcontroller conducts closed-loop gain, extraction of square root, multiplication by a compensated power voltage and power increase and reduction control sequentially on the output power detected by the power detection board and a set output power, to obtain a compensation amount.

[0064] Illustratively, the closed-loop control logic diagram in the system herein is shown in FIG. 3. Data such as a set output power value and a minimum power resolution are output from the core controller (namely, an ARM microcontroller) in real time, and the data is subjected to closed-loop control algorithm processing in the power output control together with the output power data acquired by the power detection board, to determine a required compensation amount. A dynamic powder control signal is generated according to the compensation amount. And on and off of the 66-level power amplifiers is adjusted via the control signal of the power amplifier, so as to control the actual output power of the power synthesizer.

[0065] In the output power control, the set output power data and the output power data acquired by the power detection board are subjected to compensation algorithm operation, including closed-loop gain, extractor of square root, multiplier, power compensation and other steps, to determine the required compensation amount, thereby outputting the output power control signal after compensation. Peak overcurrent protection and average current overcurrent protection functions are further designed in the system. The power compensation function may achieve real-time compensation when the external power supply voltage changes, to stabilize the output power level. Moreover, the system may further conduct the increase and reduction of the output power in real time or one-click adjust the output power to a set output power level, via a control signal on a man-machine interaction interface. The closed-loop power control strategy is shown in FIG. 4.

[0066] The power detection board includes a voltage sampling circuit and a current sampling circuit for an output signal, configured to achieve real-time and accurate sampling of the level data of actual output power of the power output control module. The voltage signal sampling is conducted in a capacitive voltage division method, and the current signal sampling is conducted in a current transformer method. Incident voltage, incident current, monitoring and sampling, 9 network null voltage, reflected voltage, reflected current and other data are acquired and fed back to the output power control, to conduct the closed-loop output power control for the RF powder source. The circuit structure on the power detection board is shown in FIG. 5.

[0067] In a possible embodiment, the system further includes a human-machine interaction module, including a field control unit and a remote control unit. The field control unit is directly connected to the ARAI microcontroller, and the remote control unit is connected to the ARM microcontroller via a communication serial port.

[0068] Illustratively, in human-machine interaction function design of the RF power source, in consideration of two cases in actual usage scenarios where experiment personnel directly manipulates on the device and manipulates outside the safety distance of the device site, two sets of control units, namely, a field control unit and a remote control unit, are designed for the RF powder source in the research and development. The field control unit may adopt a touch screen embedded into the device, and in cooperation with a designed communication protocol may achieve data display and device control on the interface of the touch screen. The remote control unit is located outside the safety distance on site, and may adopt an upper computer, and needs to be connected to the ARM microcontroller via a communication serial port, so as to achieve remote data display and device control via software customized in the upper computer. RS232 may be used as the communication serial port. The serial port is expanded via the ARM microcontroller.

[0069] The remote control unit in the system sends a data frame to the ARM^ microcontroller via a communication serial port. The data frame includes a frame header, a length, a device number, a command, data, and a check code. The frame header is fixed and occupies a 2-byte length; the length refers to a data length and occupies 1-byte length; the device number refers to equipment number of the upper computer interacted with the power source and occupies 1-byte length; the command refers to a control command between the RF power source and the upper computer and occupies 1-byte length; the data refers to specific data content sent by the RF power source to the upper computer according to different commands, and occupies unfixed length of bytes; the check code refers to a frame check code generated by a CRC checking method. The output power control system for an RF power source may achieve device data display and control command deliver}' among the RF power source, the upper computer and the touch screen.

[0070] Although preferred examples of the present disclosure have been described, those skill ed in the art. can make additional alterations and modifications to these embodiments once they leam the basic inventive concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all alterations and modifications falling within the scope of the present disclosure. [0071 ] Apparently, those skilled in the art can make various modifications and variations to the present disclosure without departing from the spirit and scope of the present disclosure. The present disclosure is intended to cover these modifications and variations provided that they fall within the scope of protection defined by the following claims and their equivalent technologies.

Claims

23 12 241. An output power control system for a radio frequency (RF) power source in a negative ion based neutral beam injection system (NNBI), comprising:5 a dual-core control module, comprising an ARM microcontroller and a complex programmable logic device (CPLD) chip, wherein the CPLD chip is configured to generate a power control command corresponding to a predetermined output power;a power output control module, comprising a power amplifier and a power synthesizer, wherein the power amplifier comprises a plurality of standard power amplifiers and a plurality of10 fine-tuning power amplifiers, the plurality of the standard power amplifiers are configured to provide a plurality of same output voltages, and the plurality of the fine-tuning power amplifiers are configured to provide output voltages that are less than that of the standard power amplifiers, and the plurality of the fine-tuning power amplifiers provide output voltages of different magnitudes, respectively, the power synthesizer is configured to conduct power synthesis on15 voltages output from the power amplifier to obtain an output power; anda power detection board, configured to detect the output power of the power output control module, wherein the ARM microcontroller is configured to compare the output power detected by the power detection board with the predetermined output power, to determine a corresponding compensation amount, and thereafter adjust the output power of the power output control module20 according to the compensation amount;wherein the power amplifier comprises 60 standard power amplifiers and 6 fine-tuning power amplifiers; and output voltages of the 6 fine-tuning power amplifiers from a first to a sixth fine-tuning power amplifier are 1 / 2, 1 / 4, 1 / 8, 1 / 16, 1 / 32 and 1 / 64 of the output voltages of the standard power amplifiers, respectively;25 wherein the power control command is a 12-bit binary number B1-B12, wherein B1-B6 are used to control a switch of the 60 standard power amplifiers; and B7-B12 are used to control a switch of the 6 fine-tuning power amplifiers.

2. The output power control system for an RF power source in an NNBI according to claim30 1, wherein the ARM microcontroller is communicated with the CPLD chip via a general purposeinput / output (GPIO) port.

3. The output power control system for an RF power source in an NNBI according to claim 1, wherein the power synthesizer comprises a synthesizing coil configured to conduct powersynthesis on output voltages of a plurality of the power amplifiers and to output to a load.23 12 244. The output power control system for an RF power source in an NNBI according to claim1, wherein the ARM microcontroller is configured to conduct closed-loop gain, extraction of 5 square root, multiplication by a compensated power voltage and power increase and reduction control sequentially on the output power detected by the power detection board and the predetermined output power, to obtain the compensation amount.

5. The output power control system for an RF power source in an NNBI according to claim 10 1, further comprising:a human-machine interaction module, comprising a field control unit and a remote control unit, wherein the field control unit is directly connected to the ARM microcontroller, and the remote control unit is connected to the ARM microcontroller via a communication serial port.15 6. The output power control system for an RF power source in an NNBI according to claim5, wherein a data frame sent from the remote control unit to the ARM microcontroller via the communication serial port comprises a frame header, a length, a device number, a command, data and a check code.20 7. The output power control system for an RF power source in an NNBI according to claim5, wherein the field control unit is a touch screen.

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