Thin film transistor array substrate including oxide semiconductor pattern and display device including the same

Abstract

A display panel comprising: a substrate comprising an active area AA and a non-active area NA; a driving thin film transistor DT comprising: a first oxide semiconductor pattern 474; a first gate elect

Claims

1. A display panel comprising:a substrate comprising an active area in which a light emitting device is disposed and a non-active area disposed around the active area;a driving thin film transistor comprising:a first oxide semiconductor pattern disposed on the substrate in the active area;a first gate electrode disposed over and overlapped with the first oxide semiconductor pattern;a first source electrode and a first drain electrode electrically connected to the first oxide semiconductor pattern; anda first light shielding pattern comprising a metal pattern and disposed under and overlapped with the first oxide semiconductor pattern, anda switching thin film transistor comprising:a second oxide semiconductor pattern disposed on the substrate in the active area;a second gate electrode disposed over and overlapped with the second oxide semiconductor pattern;a second source electrode and a second drain electrode electrically connected to the second oxide semiconductor pattern; anda second light shielding pattern comprising a metal pattern and disposed under and overlapped with the second oxide semiconductor pattern,wherein a thickness of a first insulating laver at between the first oxide semiconductor pattern and the first light shielding pattern is less than a thickness of an insulating layer at between the second oxide semiconductor pattern and the second light shielding pattern.

2. The display panel according to claim 1, wherein the thickness of the first insulating layer is less than a thickness of a second insulating layer at between the first oxide semiconductor pattern and the second light shielding pattern.

3. The display panel according to claim 1, wherein the first source electrode is electrically connected to the metal pattern of the first light shielding pattern.

4. The display panel according to claim 1, wherein the second gate electrode of the switching thin film transistor is electrically connected to the metal pattern of the second light shielding pattern.

5. The display panel according to claim 1, further comprising:a storage capacitor comprising a first electrode and a second electrode andwherein the first electrode is disposed on the same layer as an insulating layer on which the metal pattern of the second light shielding pattern is disposed,the second electrode is electrically connected to the first source electrode of the driving thin film transistor.

6. The display panel according to claim 1, wherein the second oxide semiconductor pattern is disposed on the same layer as an insulating layer on which first oxide semiconductor pattern is disposed.

7. The display panel according to claim 1, further comprising:a thin film transistor non-active area comprises:a polycrystalline semiconductor pattern disposed on the substrate in the nonactive area; anda gate electrode disposed over and overlapped with the polycrystalline semiconductor pattern, anda source electrode and a drain electrode electrically connected to the polycrystalline semiconductor pattern.

8. The display panel according to claim 1, further comprising:an anode connection electrode electrically interconnecting a common voltage line and a cathode of the light emitting device in the non-active area.

9. The display panel according to claim 1, wherein an anode of the light emitting device is connected to the first drain electrode of the driving thin film transistor.

10. The display panel according to claim 1, wherein the first light shielding pattern further comprises a semiconductor material layer on the metal pattern of the first light shielding pattern.

11. The display panel according to claim 1, wherein the second light shielding pattern further comprises a semiconductor material layer on the metal pattern of the second light shielding pattern.amendments to the claims have been filed as follows:S3 60 60WHAT IS CLAIMED IS:

1. A display panel comprising:a substrate comprising an active area in which a light emitting device is disposed and a non-active area disposed around the active area;a driving thin film transistor comprising:a first oxide semiconductor pattern disposed on the substrate in the active area;a first gate electrode disposed over and overlapped with the first oxide semiconductor pattern;a first source electrode and a first drain electrode electrically connected to the first oxide semiconductor pattern; anda first light shielding pattern comprising a metal pattern and disposed under and overlapped with the first oxide semiconductor pattern, anda switching thin film transistor comprising:a second oxide semiconductor pattern disposed on the substrate in the active area;a second gate electrode disposed over and overlapped with the second oxide semiconductor pattern;a second source electrode and a second drain electrode electrically connected to the second oxide semiconductor pattern; anda second light shielding pattern comprising a metal pattern and disposed under and overlapped with the second oxide semiconductor pattern,wherein a thickness of a first insulating laver at between the first oxide semiconductor pattern and the first light shielding pattern is less than a thickness of an insulating layer at between the second oxide semiconductor pattern and the second light shielding pattern;wherein the first and second light shielding patterns comprise semiconductor material layers doped with P-type impurity ions.

2. The display panel according to claim 1, wherein the thickness of the first insulating layer is less than a thickness of a second insulating layer at between the first oxide semiconductor pattern and the second light shielding pattern.

3. The display panel according to claim 1, wherein the first source electrode is electrically connected to the metal pattern of the first light shielding pattern.S3 60 604. The display panel according to claim 1, wherein the second gate electrode of the switching thin film transistor is electrically connected to the metal pattern of the second light shielding pattern.

5. The display panel according to claim 1, further comprising:a storage capacitor comprising a first electrode and a second electrode andthe second electrode is electrically connected to the first source electrode of the driving thin film transistor.

6. The display panel according to claim 1, further comprising:a thin film transistor non-active area comprises:a polycrystalline semiconductor pattern disposed on the substrate in the nonactive area; anda gate electrode disposed over and overlapped with the polycrystalline semiconductor pattern, anda source electrode and a drain electrode electrically connected to the poh crystalline semiconductor pattern.

7. The display panel according to claim 1, further comprising:an anode connection electrode electrically interconnecting a common voltage line and a cathode of the light emitting device in the non-active area.

8. The display panel according to claim 1, wherein an anode of the light emitting device is connected to the first drain electrode of the driving thin film transistor.

9. The display panel according to claim 1, wherein the first light shielding pattern further comprises a semiconductor material layer on the metal pattern of the first light shielding pattern.

10. The display panel according to claim 1, wherein the second light shielding pattern further comprises a semiconductor material layer on the metal pattern of the second light shielding pattern.

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