Crystalline oxide film, laminate structure and semiconductor device

Abstract

To provide a crystalline oxide film that is industrially advantageous and excellent in semiconductor property.SOLUTION: A crystalline oxide film has a plane inclined from a c plane as a main plane and includes gallium and a group 9 metal in the periodic table, where an atomic ratio of the group 9 metal in the periodic table to the whole metal elements in the film is 23% or less.SELECTED DRAWING: None

Description

[Technical Field]

[0001] The present invention relates to a crystalline oxide film, a laminated structure, and a semiconductor device that are particularly useful for power semiconductors. [Background technology]

[0002] As a next-generation switching element that can achieve high breakdown voltage, low loss, and high heat resistance, semiconductor devices using gallium oxide (Ga2O3), which has a large band gap, are attracting attention, and are expected to be applied to power semiconductor devices such as inverters. Furthermore, due to its wide band gap, it is also expected to be applied to light-emitting and receiving devices such as LEDs and sensors. According to Non-Patent Document 1, the band gap of gallium oxide can be controlled by mixing indium and aluminum, either individually or in combination, and it constitutes an extremely attractive material family as an InAlGaO-based semiconductor. Here, InAlGaO-based semiconductors refer to In X Al Y Ga Z O3 (0≦X≦2, 0≦Y≦2, 0≦Z≦2, X+Y+Z=1.5 to 2.5), and can be viewed as part of the same material family that contains gallium oxide (Patent Document 1).

[0003] In recent years, gallium oxide-based p-type semiconductors have been investigated. For example, Patent Document 2 describes that a substrate exhibiting p-type conductivity can be obtained by forming β-Ga2O3-based crystals by the FZ method using MgO (a p-type dopant source). Patent Document 3 also describes that a substrate exhibiting p-type conductivity can be obtained by forming α-(Al x Ga 1-x It is described that a p-type semiconductor is formed by adding a p-type dopant to a gallium oxide single crystal film. However, it is difficult to realize a p-type semiconductor having semiconductor properties applicable to semiconductor devices using the methods described in Patent Documents 2 and 3. Therefore, a p-type semiconductor applicable to semiconductor devices using an n-type semiconductor layer containing gallium oxide with a large band gap has been desired. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2014 / 050793 [Patent Document 2] Japanese Patent Application Laid-Open No. 2005-340308 [Patent Document 3] Japanese Patent Application Laid-Open No. 2013-58637 Summary of the Invention [Problem to be solved by the invention]

[0005] An object of the present invention is to provide a crystalline oxide film with excellent semiconductor properties. [Means for solving the problem]

[0006] As a result of extensive research to achieve the above object, the present inventors have found that when a crystalline oxide film containing gallium and a Group 9 metal of the periodic table is formed using a specific buffer layer (e.g., an m-plane α-Ga2O3 layer), and the atomic ratio of the Group 9 metal among all metal elements in the film is within a specific range (23% or less), a crystalline oxide film (a mixed crystal film of an oxide of gallium and an oxide of the Group 9 metal of the periodic table) having good semiconductor properties can be obtained, and have also found that such a crystalline oxide film can solve the above-mentioned conventional problems.

[0007] Furthermore, after obtaining the above findings, the present inventors have conducted further studies and have completed the present invention. That is, the present invention relates to the following inventions. [1] A crystalline oxide film having a principal surface tilted from the c-plane, containing gallium and a metal of Group 9 of the periodic table, wherein the atomic ratio of the metal of Group 9 of the periodic table to all metal elements in the film is 23% or less. [2] The crystalline oxide film according to [1] above, which has a corundum structure. [3] The crystalline oxide film according to [1] or [2], wherein the main surface is a plane perpendicular to the c-plane. [4] The crystalline oxide film according to any one of [1] to [3], wherein the main surface is an m-plane. [5] The crystalline oxide film according to any one of [1] to [4] above, wherein the metal of Group 9 of the periodic table includes iridium. [6] The crystalline oxide film according to any one of [1] to [5], wherein the resistivity decreases with increasing temperature. [7] The crystalline oxide film according to any one of claims 1 to 6, wherein the atomic ratio of the metal of Group 9 of the periodic table in the crystalline oxide film is 10% or less. [8] The crystalline oxide film according to any one of [1] to [7] above, having a film thickness of 100 nm or more. [9] The crystalline oxide film according to any one of [1] to [8] above, which has a surface roughness of 10 nm or less.

[10] The crystalline oxide film according to any one of [1] to [9] above, which has p-type conductivity.

[11] The crystalline oxide film according to any one of [1] to

[10] above, which has a band gap of 5.0 eV or more.

[12] A laminated structure comprising at least a first crystalline oxide film whose main component is an oxide of one or more metals selected from aluminum, indium, and gallium, and a second crystalline oxide film formed on the first crystalline oxide film, wherein the main surface of the first crystalline oxide film is inclined from the c-plane, the second crystalline oxide film contains gallium and a metal of Group 9 of the periodic table, and the atomic ratio of the metal of Group 9 of the periodic table to all metal elements in the second crystalline oxide film is 23% or less.

[13] The laminated structure according to

[12] , wherein the first crystalline oxide film has a corundum structure.

[14] A semiconductor device comprising at least the crystalline oxide film according to any one of [1] to

[11] above or the stacked structure according to

[12] or

[13] above, and an electrode.

[15] The semiconductor device according to

[14] above, which is a power device.

[16] A semiconductor system including a semiconductor device, wherein the semiconductor device is the semiconductor device according to

[14] or

[15] . [Effects of the Invention]

[0008] The crystalline oxide film of the present invention has excellent semiconductor properties. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic diagram of a film forming apparatus (mist CVD apparatus) used in the examples. [Figure 2] FIG. 10 is a diagram showing the measurement results of the temperature dependence of resistivity in an example. [Figure 3] FIG. 10 is a diagram showing the measurement results of the temperature dependence of resistivity in an example. [Figure 4] FIG. 10 is a diagram showing measurement results of temperature dependence of resistivity in a comparative example. [Figure 5] 1 is a cross-sectional view schematically showing a preferred semiconductor device according to an embodiment of the present invention. [Figure 6] 1 is a cross-sectional view schematically showing a preferred semiconductor device according to an embodiment of the present invention. [Figure 7] 1 is a cross-sectional view schematically showing a preferred semiconductor device according to an embodiment of the present invention. [Figure 8] FIG. 1 is a diagram schematically illustrating a preferred example of a power card. [Figure 9] FIG. 1 is a diagram schematically illustrating a preferred example of a power supply system. [Figure 10] FIG. 1 is a diagram schematically illustrating a preferred example of a system device. [Figure 11] FIG. 1 is a diagram schematically illustrating a preferred example of a power supply circuit diagram of a power supply device. [Figure 12] FIG. 1 is a diagram showing the results of XRD measurements in Examples. [Figure 13] FIG. 1 is a diagram showing the relationship between the film depth and the value (%) of the Ir ratio (Ir / (Ga+Ir)) measured by Rutherford backscattering spectroscopy (RBS) in Examples. DETAILED DESCRIPTION OF THE INVENTION

[0010] Preferred embodiments of the present invention will now be described.

[0011] The crystalline oxide film of the present invention is a crystalline oxide film having a principal surface tilted from the c-plane and containing gallium and a metal of Group 9 of the periodic table, characterized in that the atomic ratio of the metal of Group 9 of the periodic table to all metal elements in the film is 23% or less.

[0012] In an embodiment of the present invention, the c-plane refers to the {0001} plane. Furthermore, planes inclined from the c-plane include, for example, the {11-20} plane (a-plane), {10-10} plane (m-plane), {-1012} plane (r-plane), {10-14} plane (R-plane), {11-23} plane (n-plane), and {10-11} plane (S-plane). In an embodiment of the present invention, the main surface of the crystalline oxide film is preferably a plane perpendicular to the c-plane, more preferably an m-plane or a-plane, and most preferably an m-plane. By using such a preferred main surface, a mixed crystal crystalline oxide film having p-type conductivity can be obtained even in cases where the band gap is larger (e.g., a band gap of 5.0 eV or more). The main surface of the crystalline oxide film also includes a plane that is off-angled from the above-mentioned plane. That is, for example, when the main surface is an a-plane, the main surface also includes a plane that is off-angled from the a-plane. The range of the off-angle is not particularly limited as long as it does not impede the object of the present invention, and is, for example, within a range of 0.2° to 12.0°.

[0013] The crystalline oxide film contains gallium and a Group 9 metal of the periodic table, and the atomic ratio of the Group 9 metal of the periodic table (hereinafter simply referred to as "Group 9 metal") to all metal elements in the film is 23% or less. Examples of Group 9 metals of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir). In an embodiment of the present invention, the Group 9 metal is preferably iridium. Note that the "periodic table" refers to the periodic table established by the International Union of Pure and Applied Chemistry (IUPAC). Furthermore, the content (atomic ratio) of the Group 9 metal in all metal elements in the crystalline oxide film is not particularly limited as long as it is 23% or less. In an embodiment of the present invention, the content of the Group 9 metal is preferably 10% or less. The lower limit of the content (atomic ratio) of the Group 9 metal in the crystalline oxide film is not particularly limited as long as it does not impede the object of the present invention. In an embodiment of the present invention, the content (atomic ratio) of the Group 9 metal in the crystalline oxide film is usually 1% or more, preferably 3% or more. The content (atomic ratio) of gallium in the crystalline oxide film is preferably 77% or more, more preferably 90% or more. The upper limit of the content (atomic ratio) of gallium in the crystalline oxide film is not particularly limited as long as it does not impede the object of the present invention. In an embodiment of the present invention, the atomic ratio of gallium in the crystalline oxide film is, for example, 95% or less. By combining the above-described preferred primary surface with the preferred range of the content ratio of gallium to a Group 9 metal (e.g., iridium), a mixed crystal film of gallium oxide and a Group 9 metal oxide having a larger band gap (e.g., 5.0 eV or more) and p-type conductivity can be obtained. The band gap of the crystalline oxide film is, for example, 4.7 eV or more, preferably 5.0 eV or more, and more preferably 5.1 eV or more.

[0014] The crystal structure of the crystalline oxide film is not particularly limited as long as it does not impede the objectives of the present invention. Examples of the crystal structure of the crystalline oxide film include a corundum structure, a β-gallium structure, a hexagonal crystal structure (e.g., an ε-type structure), an orthorhombic crystal structure (e.g., a κ-type structure), a cubic crystal structure, and a tetragonal crystal structure. In an embodiment of the present invention, the crystalline oxide film preferably has a corundum structure. The thickness of the crystalline oxide film is not particularly limited, but in an embodiment of the present invention, the thickness is preferably 100 nm or more. The surface roughness of the crystalline oxide film is also not particularly limited. In an embodiment of the present invention, the surface roughness (Ra) is preferably 10 nm or less, more preferably 5 nm or less. Here, the surface roughness (Ra) refers to a value calculated based on JIS B0601 using the surface profile measurement results of a 10 μm square area using an atomic force microscope (AFM). By achieving such a preferable thickness and surface roughness, even a mixed crystal film can be more effectively applied to semiconductor devices and the like.

[0015] The crystalline oxide film of the present invention is preferably obtained by the following method. In an embodiment of the present invention, the method for producing a crystalline oxide film is characterized by using, for example, a cold-wall mist CVD apparatus as shown in Figure 1 to atomize a raw material solution containing a metal of Group 9 of the periodic table (hereinafter simply referred to as "Group 9 metal") and gallium, suspending the droplets to generate atomized droplets (including mist) (atomization step), transporting the atomized droplets to the surface of a substrate by a carrier gas (transport step), and then thermally reacting the atomized droplets to form a mixed crystal of a metal oxide containing iridium and gallium on the surface of the substrate (film formation step).

[0016] (Atomization process) The atomization step atomizes a raw material solution containing at least two metals, a Group 9 metal and gallium. The raw material solution may further contain other metals, if desired. The atomization method is not particularly limited as long as it can atomize the raw material solution, and any known method may be used. However, in the present invention, an atomization method using ultrasonic waves is preferred. Atomized droplets obtained using ultrasonic waves are preferable because they have an initial velocity of zero and float in the air. For example, rather than being sprayed like a spray, the atomized droplets float in space and can be transported as a gas, which is highly suitable because they are not damaged by collision energy. The size of the atomized droplets is not particularly limited and may be on the order of several mm, but is preferably 50 μm or less, and more preferably 100 nm to 10 μm.

[0017] (Raw material solution) The raw material solution is not particularly limited as long as it contains a Group 9 metal and gallium, and may contain either an inorganic material or an organic material. The raw material solution may further contain other metals as desired. When the raw material solution contains a Group 9 metal, gallium, and other metals, the other metals are preferably Group 2 metals, Group 9 metals, and / or Group 13 metals other than gallium in the periodic table. The raw material solution may also contain a Group 9 metal and gallium. Alternatively, the raw material solution may be divided into a raw material solution containing a Group 9 metal and a raw material solution containing gallium, each of which is subjected to an atomization step. The atomized droplets containing the Group 9 metal and the atomized droplets containing gallium obtained from the respective raw material solutions may be merged in the transport step or film-forming step. In an embodiment of the present invention, the raw material solution may be a solution prepared by dissolving or dispersing a Group 9 metal and / or gallium in the form of a complex or salt in an organic solvent or water. Examples of the complex include an acetylacetonate complex, a carbonyl complex, an ammine complex, and a hydride complex. Examples of the salt form include organic metal salts (e.g., metal acetates, metal oxalates, metal citrates, etc.), metal sulfides, metal nitrates, metal phosphates, metal halides (e.g., metal chlorides, metal bromides, metal iodides, etc.), etc. According to the mist CVD method used in the embodiment of the present invention, a film can be suitably formed even if the raw material concentration is low.

[0018] The solvent for the raw material solution is not particularly limited and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solution of an inorganic solvent and an organic solvent. In the present invention, unlike other conventional film-forming methods, the solvent preferably contains water, and is also preferably a mixed solvent of water and an acid. More specific examples of the water include pure water, ultrapure water, tap water, well water, mineral water, hot spring water, spring water, fresh water, and seawater. In the present invention, ultrapure water is preferred. More specific examples of the acid include organic acids such as acetic acid, propionic acid, and butanoic acid; boron trifluoride, boron trifluoride etherate, boron trichloride, boron tribromide, trifluoroacetic acid, trifluoromethanesulfonic acid, and p-toluenesulfonic acid. In an embodiment of the present invention, acetic acid is preferred.

[0019] (Base) The substrate is not particularly limited as long as it can support the crystalline oxide film. The material of the substrate is also not particularly limited as long as it does not impede the object of the present invention. It may be a known substrate, an organic compound, or an inorganic compound. The substrate may have any shape, and any shape is effective. Examples include plate-like shapes such as flat plates and discs, fibrous shapes, rod-like shapes, cylindrical shapes, prismatic shapes, cylindrical shapes, spiral shapes, spherical shapes, and ring shapes. In the present invention, a substrate is preferred. The thickness of the substrate is not particularly limited. Furthermore, as described below, other layers such as a buffer layer may be laminated on the substrate. Semiconductor layers having different electrical conductivities may also be used as the substrate.

[0020] The substrate is not particularly limited as long as it is plate-shaped and serves as a support for the crystalline oxide film. It may be an insulating substrate, a semiconductor substrate, or a conductive substrate. However, the substrate is preferably an insulating substrate, and is also preferably a substrate having a metal film on its surface. Suitable examples of the substrate include substrates having a corundum structure. The substrate material is not particularly limited as long as it does not impede the objectives of the present invention, and may be a known material. Examples of the substrate having a corundum structure include base substrates whose main component is a substrate material having a corundum structure. More specifically, examples include sapphire substrates (preferably m-plane sapphire substrates) and α-type gallium oxide substrates. Here, the term "main component" means that the substrate material having the specific crystal structure preferably accounts for 50% or more, more preferably 70% or more, and even more preferably 90% or more of the total components of the substrate material, in atomic ratio, and may be 100%.

[0021] (Transportation process) In the transport step, the mist is transported to the substrate by the carrier gas. The type of carrier gas is not particularly limited as long as it does not impede the objectives of the present invention. Examples include oxygen, ozone, inert gases such as nitrogen and argon, and reducing gases such as hydrogen gas and forming gas. However, in the present invention, oxygen is preferably used as the carrier gas. Examples of carrier gases using oxygen include air, oxygen gas, and ozone gas, with oxygen gas and / or ozone gas being particularly preferred. The type of carrier gas may be one or more, and a dilution gas with a different carrier gas concentration (e.g., a 10-fold diluted gas) may also be used as a second carrier gas. The number of carrier gas supply points may be one or more. In the present invention, when an atomization chamber, a supply pipe, and a film formation chamber are used, it is preferable to provide a carrier gas supply point in each of the atomization chamber and the supply pipe. It is more preferable to provide a carrier gas supply point in the atomization chamber and a dilution gas supply point in the supply pipe. The flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 L / min, more preferably 1 to 10 L / min. In the case of a dilution gas, the flow rate of the dilution gas is preferably 0.001 to 5 L / min, more preferably 0.1 to 3 L / min.

[0022] (Film forming process) In the film-forming step, the mist is reacted near the substrate surface to form a film on part or all of the substrate surface. The thermal reaction is not particularly limited as long as it forms a film from the atomized droplets, and the mist is reacted with heat. The reaction conditions are also not particularly limited as long as they do not impede the objectives of the present invention. In this step, the thermal reaction is usually carried out at a temperature equal to or higher than the evaporation temperature of the solvent, but a temperature that is not too high is preferable. In the present invention, the thermal reaction is preferably carried out at 1200°C or below, more preferably at a temperature between 300°C and 700°C or between 750°C and 1200°C, and most preferably at a temperature between 350°C and 600°C or between 750°C and 1100°C. Furthermore, the thermal reaction may be carried out under any of the following atmospheres, as long as it does not impede the objectives of the present invention: vacuum, oxygen-free atmosphere, reducing gas atmosphere, and oxidizing atmosphere. It may also be carried out under atmospheric pressure, pressurized atmosphere, or reduced pressure. However, in the present invention, it is preferably carried out under an oxidizing atmosphere, and also preferably under atmospheric pressure, and more preferably under an oxidizing atmosphere and atmospheric pressure. The "oxidizing atmosphere" is not particularly limited as long as it is an atmosphere in which the crystalline oxide film can be formed by the thermal reaction. For example, an oxidizing atmosphere can be created by using a carrier gas containing oxygen or a mist of a raw material solution containing an oxidizing agent. The film thickness can be set by adjusting the film formation time. In the present invention, the film thickness is preferably 1 nm to 1 mm, more preferably 1 nm to 100 μm because it further improves semiconductor properties, and most preferably 1 nm to 10 μm.

[0023] In an embodiment of the present invention, the crystalline oxide film may be formed directly on the substrate. Alternatively, other layers, such as a semiconductor layer (e.g., an n-type semiconductor layer, an n+-type semiconductor layer, an n-type semiconductor layer, etc.) different from the crystalline oxide film, an insulator layer (including a semi-insulator layer), or a buffer layer, may be stacked on the substrate, and then the crystalline oxide film may be formed on the substrate via the other layers. Examples of the semiconductor layer and the insulator layer include a semiconductor layer or an insulator layer containing a Group 13 metal. Suitable examples of the buffer layer include a semiconductor layer, an insulator layer, or a conductor layer having a corundum structure. Examples of the semiconductor layer having a corundum structure include α-Fe2O3, α-Ga2O3, and α-Al2O3. The method for stacking the buffer layer is not particularly limited and may be the same as the method for forming the p-type oxide semiconductor.

[0024] In an embodiment of the present invention, it is preferable to form an n-type semiconductor layer before or after the formation of the crystalline oxide film. More specifically, the method for manufacturing a semiconductor device preferably includes a step of stacking at least the crystalline oxide film (p-type semiconductor layer) and an n-type semiconductor layer. The method for forming the n-type semiconductor layer is not particularly limited and may be a known method, but in the present invention, mist CVD is preferred. The n-type semiconductor layer preferably contains an oxide semiconductor as its main component, more preferably an oxide semiconductor containing a Group 13 metal of the periodic table (e.g., Al, Ga, In, Tl, etc.). The n-type semiconductor layer also preferably contains a crystalline oxide semiconductor as its main component, more preferably a crystalline oxide semiconductor containing Ga as its main component, and most preferably a crystalline oxide semiconductor having a corundum structure and containing Ga as its main component. The term "main component" means that the oxide semiconductor preferably accounts for 50% or more, more preferably 70% or more, and even more preferably 90% or more of the total components of the n-type semiconductor layer, in atomic ratio, and may be 100%.

[0025] Furthermore, according to the above-mentioned preferred manufacturing method, it is possible to preferably obtain a stacked structure comprising at least a first crystalline oxide film whose main component is an oxide of one or more metals selected from aluminum, indium, and gallium, and a second crystalline oxide film formed on the first crystalline oxide film, wherein the main surface of the first crystalline oxide film is inclined from the c-plane, the second crystalline oxide film contains gallium and a Group 9 metal of the periodic table, and the atomic ratio of the Group 9 metal of the periodic table to all metal elements in the second crystalline oxide film is 23% or less.

[0026] The crystalline oxide film having a specific composition obtained by the above-described preferred manufacturing method is industrially useful and has excellent semiconductor properties. According to the above-described preferred manufacturing method, a crystalline oxide film having a semiconducting temperature characteristic of resistivity can be obtained. More specifically, it has been found that the resistivity of the crystalline oxide film decreases with temperature. Furthermore, according to the above-described preferred manufacturing method, a crystalline oxide film having p-type conductivity in addition to the above-described semiconductor properties can be obtained. Here, "p-type" refers to a carrier type determined by Hall effect measurement, scanning capacitance microscopy (SCM), scanning nonlinear dielectric microscopy (SNDM), or the like. The lower limit of the carrier density of the crystalline oxide film (the carrier density in the semiconductor film obtained by Hall effect measurement) is not particularly limited, but is preferably about 1.0 × 10 15 / cm 3 More than 1.0×10 is preferable. 18 / cm 3 In an embodiment of the present invention, even when a metal of Group 9 of the periodic table is contained, the carrier density is preferably 5.0×10 19 / cm 3A crystalline oxide film having a carrier density of 2.0×10 or less and a p-type conductivity can be obtained. In particular, by setting the Ir ratio among the metal elements in the film to 10% or less, a crystalline oxide film having the above-mentioned preferable carrier density can be obtained. Furthermore, in an embodiment of the present invention, by setting the Ir ratio among the metal elements in the film to 9.5% or less, a crystalline oxide film having a carrier density of 2.0×10 or less can be obtained. 19 / cm 3 The following crystalline oxide film is obtained: The lower limit of the Ir ratio among the metal elements in the film is not particularly limited, but is, for example, 5% or more, and preferably 6.8% or more.

[0027] The fact that the temperature characteristics of the crystalline oxide film can be made to have semiconductor-like characteristics by setting the main surface and the content ratio of the Group 9 metal and gallium within the preferred ranges will be described below using examples.

[0028] In this example, an α-(Ir,Ga)2O3 film was formed on a sapphire substrate having an m-plane α-Ga2O3 film formed on its surface using the mist CVD shown in Figure 1 according to the above-mentioned manufacturing method. Film formation was performed by changing the iridium content in the film, and an α-(Ir,Ga)2O3 film with the properties shown in Table 1 was obtained. The results of X-ray diffraction measurement of the film of Example 2 are shown in Figure 12. The Ir ratio in the film was calculated using energy dispersive X-ray spectroscopy (EDS). The carrier type was confirmed by Hall effect measurement. The carrier density of the crystalline oxide film obtained in Example 2 was 1.0 x 10 17 / cm 3The surface roughness (Ra) was 1.2 nm. Cross-sectional TEM (transmission electron microscope) observation revealed that a good film-like α-(Ir,Ga)O film was obtained. The temperature characteristics were confirmed by measuring the temperature dependence of resistivity. The surface roughness (Ra) and other characteristics of Example 1 were comparable to those of Example 2. The temperature dependence of resistivity for Examples 1, 2, and Comparative Example 1 was measured in the range from room temperature to 250°C and shown in Figures 2, 3, and 4, respectively. Based on the results in Figures 2 to 4, the range of Ir ratios at which the temperature characteristics exhibited semiconducting behavior was calculated. It was found that the temperature characteristics exhibited semiconducting behavior when the Ir ratio was 23% or less, at which the slope changed from positive to negative. This boundary value was a new finding that was only discovered by actually fabricating an m-plane α-(Ir,Ga)O film. By achieving this preferred range, an m-plane α-(Ir,Ga)O film useful as a p-type semiconductor layer in a semiconductor device can be obtained. Further experiments were carried out to confirm reproducibility, and it was confirmed that when the Ir ratio among the metal elements in the film was 9.5%, 11.7%, and 14.3%, the carrier type, temperature characteristics of resistivity, and surface roughness (Ra) were similar to those in Examples 1 and 2. When the Ir ratio among the metal elements in the film was 9.5%, the carrier density was 1.98 × 10 19 / cm 3 It was.

[0029] [Table 1]

[0030] The results of Examples 1 and 2 show that by depositing an α-(Ir,Ga)O film with an Ir ratio of 10% or less as the first layer and an α-(Ir,Ga)O film with a higher Ir ratio than the first layer as the second layer, a second crystalline oxide film with better crystallinity and useful as a p-type semiconductor layer can be obtained. In an embodiment of the present invention, the first and second crystalline oxide films may be deposited so that the Ir ratio of the second layer is higher than that of the first layer. The relationship between film depth and the value (%) of the Ir ratio (Ir / (Ga+Ir)) in the film when films are deposited in this manner is shown in Figure 13 as Examples 3 and 4.

[0031] The crystalline oxide film obtained as described above can be used in semiconductor devices, for example, as a p-type semiconductor layer, and is particularly useful in power devices. By using the crystalline oxide film and / or stacked structure in semiconductor devices, roughness scattering can be suppressed, thereby improving the channel mobility of the semiconductor device. Semiconductor devices can be classified into horizontal elements (horizontal devices) in which an electrode is formed on one side of the semiconductor layer, and vertical elements (vertical devices) in which electrodes are formed on both the front and back sides of the semiconductor layer. In the present invention, both horizontal and vertical devices can be suitably used, but vertical devices are particularly preferred. Examples of such semiconductor devices include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), metal semiconductor field-effect transistors (MESFETs), high electron mobility transistors (HEMTs), metal oxide semiconductor field-effect transistors (MOSFETs), static induction transistors (SITs), junction field-effect transistors (JFETs), insulated gate bipolar transistors (IGBTs), and light-emitting diodes.

[0032] 5 to 7 show examples in which the crystalline oxide film is used as a p-type semiconductor layer. The n-type semiconductor layer may have the same main component as the crystalline oxide film and contain an n-type dopant, or may be an n-type semiconductor layer having a main component different from that of the crystalline oxide film. In an embodiment of the present invention, the n-type semiconductor layer preferably has a main component different from that of the crystalline oxide film. The n-type semiconductor can be used as an n-type semiconductor layer, an n+-type semiconductor layer, or the like, by adjusting the content of the n-type dopant, for example.

[0033] FIG. 5 shows an example of a preferred semiconductor device of the present invention. The semiconductor device of FIG. 5 is a metal-oxide-semiconductor field-effect transistor (MOSFET) that includes an n+ type semiconductor layer (drain layer) 1, an n- type semiconductor layer (drift layer) 2, a p+ type semiconductor layer (deep p layer) 6, a p- type semiconductor layer (channel layer) 7, an n+ type semiconductor layer (n+ source layer) 11, a gate insulating film 13, a gate electrode 3, a p+ type semiconductor layer 16, a source electrode 24, and a drain electrode 26. At least a portion of the p+ type semiconductor layer (deep p layer) 6 is buried in the n- type semiconductor layer 2 to a position deeper than the buried lower end 3a of the gate electrode 3. When the semiconductor device of FIG. 5 is in an on-state, applying a voltage between the source electrode 24 and the drain electrode 26 and applying a positive voltage to the gate electrode 3 with respect to the source electrode 24 forms a channel at the interface between the p- type semiconductor layer 7 and the gate insulating film 13, causing the device to turn on. In the off state, a channel is not formed by setting the voltage of the gate electrode 3 to 0 V, resulting in turn-off. In the semiconductor device of FIG. 5, the p+ type semiconductor layer 6 is buried deeper in the n- type semiconductor layer 2 than the gate electrode 3. This configuration can reduce the electric field near the bottom of the gate electrode, thereby improving the electric field distribution in the gate insulating film 13 and the n- type semiconductor layer 2. In the present invention, it is preferable to use the crystalline oxide film as the p+ type semiconductor layer (deep p layer) 6.

[0034] The materials for the gate electrode, source electrode, and drain electrode (hereinafter also simply referred to as "electrodes") are not particularly limited as long as they can be used as electrodes, and may be conductive inorganic materials or conductive organic materials. In the present invention, the material for the electrodes is preferably a metal, a metal compound, a metal oxide, or a metal nitride. Suitable examples of the metal include at least one metal selected from Groups 4 to 11 of the periodic table. Examples of metals in Group 4 of the periodic table include titanium (Ti), zirconium (Zr), and hafnium (Hf). Examples of metals in Group 5 of the periodic table include vanadium (V), niobium (Nb), and tantalum (Ta). Examples of metals in Group 6 of the periodic table include one or more metals selected from chromium (Cr), molybdenum (Mo), and tungsten (W). Examples of metals in Group 7 of the periodic table include manganese (Mn), technetium (Tc), and rhenium (Re). Examples of metals in Group 8 of the periodic table include iron (Fe), ruthenium (Ru), and osmium (Os). Examples of metals in Group 9 of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir). Examples of metals in Group 10 of the periodic table include nickel (Ni), palladium (Pd), and platinum (Pt). Examples of metals in Group 11 of the periodic table include copper (Cu), silver (Ag), and gold (Au).

[0035] The electrode may be formed by known methods, such as a dry method, a wet method, etc. Dry methods include known methods such as sputtering, vacuum deposition, and CVD. Wet methods include screen printing and die coating.

[0036] The material of the gate insulating film (interlayer insulating film) is not particularly limited and may be a known material. Examples of the material of the gate insulating film include SiO2 film, SiON film, AlON film, AlN film, Al2O3 film, HfO2 film, phosphorus-doped SiO2 film (PSG film), boron-doped SiO2 film, and phosphorus-boron-doped SiO2 film (BPSG film). Examples of the method for forming the gate insulating film include CVD, atmospheric pressure CVD, plasma CVD, ALD, and mist CVD. In an embodiment of the present invention, the method for forming the gate insulating film is preferably mist CVD or atmospheric pressure CVD. The material of the gate electrode is not particularly limited and may be a known electrode material. Examples of the material for the gate electrode include the above-mentioned materials for the source electrode. The method for forming the gate electrode is not particularly limited. Specific examples of the method for forming the gate electrode include dry methods and wet methods. Examples of dry methods include sputtering, vacuum deposition, and CVD. Examples of wet methods include screen printing and die coating. The materials of the n+ type semiconductor layer 1 and the n- type semiconductor layer 2 may be the same as the materials of the n-type semiconductor layer described above.

[0037] 5 may be formed by any known method as long as it does not impede the object of the present invention. For example, a film may be formed by vacuum deposition, CVD, sputtering, or various coating techniques, followed by patterning by photolithography, or by direct patterning using printing techniques. In the present invention, the mist CVD method is preferred.

[0038] FIG. 6 shows another example of a suitable semiconductor device of the present invention. The semiconductor device of FIG. 6 is a metal oxide semiconductor field effect transistor (MOSFET) and differs from the semiconductor device of FIG. 6 in that an i-type semiconductor layer 28 is provided between a p+-type semiconductor layer (deep p-layer) 6 and an n-type semiconductor layer (drift layer) 2. The i-type semiconductor layer 28 is not particularly limited as long as it has a lower carrier density than the n-type semiconductor layer 2. In an embodiment of the present invention, the crystalline oxide film is preferably used as the p+-type semiconductor layer 6. In an embodiment of the present invention, the main component of the i-type semiconductor layer 28 is preferably the same as the main component of the n-type semiconductor layer 2.

[0039] 7 shows another example of a suitable semiconductor device of the present invention. The semiconductor device of FIG. 7 is a metal oxide semiconductor field effect transistor (MOSFET) and differs from the semiconductor device of FIG. 6 in that it includes a p-type semiconductor layer 27 near the bottom of the gate. The p-type semiconductor layer 27 preferably contains, as its main component, a p-type oxide semiconductor different from the p-type oxide semiconductor that is the main component of the p-type semiconductor layer (channel layer) 7. In the present invention, the main component of the p-type semiconductor layer 27 may be the same as that of the p+-type semiconductor layer 6.

[0040] In addition to the above features, the semiconductor device of the present invention can be suitably used as a power module, inverter, or converter using a known method, and further suitably used in, for example, a semiconductor system using a power supply device. The power supply device can be fabricated using a known method, such as by connecting the semiconductor device to a wiring pattern. FIG. 9 shows an example of a power supply system. FIG. 9 shows a power supply system 170 configured using multiple power supply devices 171 and 172 and a control circuit 173. As shown in FIG. 10, the power supply system 170 can be combined with an electronic circuit 181 to form a system device 182. FIG. 11 shows an example of a power supply circuit diagram for a power supply device. FIG. 11 shows the power supply circuit of the power supply device, which is composed of a power circuit and a control circuit. DC voltage is switched at high frequency by an inverter 192 (comprising MOSFETs A to D) to convert it to AC, which is then insulated and transformed by a transformer 193. The rectifier MOSFET 194 rectifies the voltage, smooths it using a DCL 195 (smoothing coils L1 and L2) and a capacitor, and outputs a DC voltage. At this time, a voltage comparator 197 compares the output voltage with a reference voltage, and a PWM control circuit 196 controls the inverter 192 and rectifying MOSFET 194 so as to obtain a desired output voltage.

[0041] In the present invention, the semiconductor device is preferably a power card, including a cooler and an insulating member. More preferably, the coolers are provided on both sides of the semiconductor layer, with at least the insulating member interposed between them. Most preferably, heat dissipation layers are provided on both sides of the semiconductor layer, with the coolers provided on the outer sides of the heat dissipation layers, with at least the insulating member interposed between them. Figure 8 shows a power card according to a preferred embodiment of the present invention. The power card shown in Figure 8 is a double-sided cooled power card 201, and includes a refrigerant tube 202, a spacer 203, an insulating plate (insulating spacer) 208, a sealing resin portion 209, a semiconductor chip 301a, a metal heat transfer plate (protruding terminal portion) 302b, a heat sink and electrode 303, a metal heat transfer plate (protruding terminal portion) 303b, a solder layer 304, a control electrode terminal 305, and a bonding wire 308. The thickness-direction cross section of the refrigerant tube 202 has a number of flow paths 222 separated by a number of partition walls 221 extending in the flow path direction at predetermined intervals. Such a suitable power card can achieve higher heat dissipation and satisfy higher reliability.

[0042] Semiconductor chip 301a is bonded to the inner main surface of metal heat transfer plate (protruding terminal portion) 302b with solder layer 304, and metal heat transfer plate (protruding terminal portion) 303b is bonded to the remaining main surface of semiconductor chip 301a with solder layer 304, thereby connecting the anode and cathode electrode surfaces of flywheel diode 301b to the collector and emitter electrode surfaces of the IGBT in a so-called anti-parallel configuration. Examples of materials for metal heat transfer plates (protruding terminal portions) 302b and 303b include Mo and W. Metal heat transfer plates (protruding terminal portions) 302b and 303b have a thickness difference that compensates for the difference in thickness between semiconductor chips 301a and 301b, resulting in flat outer surfaces for metal heat transfer plates 302b and 303b.

[0043] Resin sealing portion 209 is made of, for example, epoxy resin and is molded to cover the side surfaces of metal heat transfer plates 302b and 303b, and semiconductor chip 301a and flywheel diode 301b are molded in resin sealing portion 209. However, the outer main surfaces, i.e., the contact heat-receiving surfaces, of metal heat transfer plates 302b and 303b are completely exposed. Metal heat transfer plates (protruding terminal portions) 302b and 303b protrude from resin sealing portion 209 to the right in FIG. 8, and control electrode terminal 305, which is a so-called lead frame terminal, connects the gate (control) electrode surface of semiconductor chip 301a on which, for example, an IGBT is formed, to control electrode terminal 305.

[0044] The insulating spacer, insulating plate 208, is made of, for example, aluminum nitride film, but may be made of other insulating films. Insulating plate 208 completely covers and adheres to metal heat transfer plates 302b and 303b. However, insulating plate 208 and metal heat transfer plates 302b and 303b may simply be in contact with each other, or may be coated with a good heat transfer material such as silicone grease, or may be joined by various methods. Alternatively, an insulating layer may be formed by ceramic spraying, or insulating plate 208 may be joined to the metal heat transfer plate, or may be joined or formed on the refrigerant tube.

[0045] The refrigerant tubes 202 are fabricated by cutting aluminum alloy plates formed by pultrusion or extrusion to the required length. The cross section of the refrigerant tubes 202 in the thickness direction has numerous flow paths 222 separated by numerous partition walls 221 extending in the flow path direction at predetermined intervals. The spacers 203 may be soft metal plates such as solder alloys, or may be films formed by coating or the like on the contact surfaces of the metal heat transfer plates 302b and 303b. The surface of this soft spacer 203 easily deforms to conform to the minute irregularities and warping of the resin sealing portion 209 and the refrigerant tubes 202, thereby reducing thermal resistance. The surfaces of the spacers 203 may be coated with a known high-thermal-conductivity grease, or the spacers 203 may be omitted. [Industrial Applicability]

[0046] The crystalline oxide film according to an embodiment of the present invention can be used in a wide range of fields, including semiconductors (e.g., compound semiconductor electronic devices), electronic and electrical components, optical and electrophotographic related devices, and industrial materials, but is particularly useful in semiconductor devices and the like due to its excellent p-type semiconductor properties. [Explanation of symbols]

[0047] 1 n+ type semiconductor layer 2 n-type semiconductor layer (drift layer) 3. Gate electrode 3a Buried lower end 6 p+ type semiconductor layer (deep p layer) 7 p-type semiconductor layer (channel layer) 11 n+ type semiconductor layer 13 Gate insulating film 16 p+ type semiconductor layer 24 Source electrode 25 Interlayer insulating film 26 Drain electrode 27 p-type semiconductor layer 28 i-type semiconductor layer 29 Mist CVD equipment 30 boards 32a Carrier gas supply device 32b Carrier gas (dilution) supply device 33a Flow control valve 33b Flow control valve 34 Mist source 34a Raw material solution 34b Mist 35 Container 35a water 36 Ultrasonic transducer 37 Supply pipe 38 Heater 40 Deposition chamber 170 Power System 171 Power supply 172 Power supply 173 Control Circuit 180 System Unit 181 Electronic circuit 182 Power System 192 inverter 193 Trans 194 Rectifier MOSFET 195 DCL 196 PWM control circuit 197 Voltage Comparator 201 Double-sided cooled power card 202 Refrigerant tube 203 Spacer 208 Insulating plate (insulating spacer) 209 Sealing resin part 221 Bulkhead 222 Channel 301a Semiconductor chip 301b Flywheel Diode 302b Metal heat transfer plate (protruding terminal part) 303 Heat sink and electrode 303b Metal heat transfer plate (protruding terminal part) 304 solder layer 305 Control electrode terminal 308 Bonding Wire

Claims

1. A crystalline oxide film having a plane inclined from the c-plane as its main surface, and containing gallium and a Group 9 metal of the periodic table, characterized in that the atomic ratio of the Group 9 metal of the periodic table to all metal elements in the film is 23% or less.

2. A crystalline oxide film according to claim 1, having a corundum structure.

3. The crystalline oxide film according to claim 2, wherein the main surface is a surface perpendicular to the c-plane.

4. The crystalline oxide film according to claim 2, wherein the main surface is the m-plane.

5. A crystalline oxide film according to any one of claims 1 to 4, wherein the Group 9 metal of the periodic table includes iridium.

6. A crystalline oxide film according to any one of claims 1 to 4, wherein the resistivity decreases with increasing temperature.

7. The crystalline oxide film according to any one of claims 1 to 4, wherein the atomic ratio of the Group 9 metal of the periodic table in the crystalline oxide film is 10% or less.

8. A crystalline oxide film according to any one of claims 1 to 4, wherein the film thickness is 100 nm or more.

9. A crystalline oxide film according to any one of claims 1 to 4, wherein the surface roughness (Ra) is 10 nm or less.

10. A crystalline oxide film according to any one of claims 1 to 4, having a p-type conductivity.

11. A crystalline oxide film according to any one of claims 1 to 4, wherein the band gap is 5.0 eV or greater.

12. A laminated structure comprising at least a first crystalline oxide film mainly composed of an oxide of one or more metals selected from aluminum, indium, and gallium, and a second crystalline oxide film formed on the first crystalline oxide film, wherein the main surface of the first crystalline oxide film is a surface inclined from the c-plane, and the second crystalline oxide film contains gallium and a Group 9 metal of the periodic table, and the atomic ratio of Group 9 metals of the periodic table among all metal elements in the second crystalline oxide film is 23% or less.

13. The laminated structure according to claim 12, wherein the first crystalline oxide film has a corundum structure.

14. A semiconductor device comprising at least a crystalline oxide film according to any one of claims 1 to 4 or a laminated structure according to claim 12 or 13, and an electrode.

15. A semiconductor device according to claim 14, which is a power device.

16. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device described in claim 14.

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