Electro-optical device and electronic device

Abstract

To prevent inspection terminals from being reflected onto a displayed image.SOLUTION: An electro-optical device is provided, comprising a substrate having a rectangular shape in plane view, a display unit 100 equipped with OLEDs 130 provided on the substrate, inspection terminals 151 provided between the display unit 100 and an upper side Ue of the substrate opposite a lower side De in plan view, and a light shield member 181 provided to cover inspection terminals 151 in plan view.SELECTED DRAWING: Figure 8

Description

Technical Field

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[0001] The present invention relates to an electro-optical device and an electronic device.

Background Art

[0002] An electro-optical device using, for example, an OLED (Organic Light Emitting Diode) as a light-emitting element is known. In the electro-optical device, sub-pixels or pixels are arranged in the display unit, and in the sub-pixels or pixels, in addition to a light-emitting element and a transistor for flowing a current through the light-emitting element, a peripheral circuit and peripheral wiring for driving the sub-pixel or pixel are provided outside the display unit. When light is incident from the observation side, it may be reflected by the peripheral wiring or the like and visually recognized by the observer as a reflection. For this reason, a technique for shielding the peripheral wiring is known (see, for example, the description of Patent Document 1).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

Means for Solving the Problems

[0005] An electro-optical device according to one aspect of the present disclosure includes a substrate having a rectangular shape in plan view, a display unit provided with a light-emitting element on the substrate, a plurality of first inspection terminals provided on the substrate between the display unit and a second side opposite to the first side of the rectangle in the plan view, and a light-shielding member provided so as to cover the plurality of first inspection terminals in the plan view. [Brief explanation of the drawing]

[0006] [Figure 1] This is a perspective view showing an electro-optical apparatus according to the first embodiment. [Figure 2] This block diagram shows the electrical configuration of an electro-optical device. [Figure 3] This is a block diagram showing the configuration of a pixel circuit in an electro-optical device. [Figure 4] This is a timing chart used to explain the operation of an electro-optical device. [Figure 5] This is a plan view showing the arrangement of inspection terminals and other components in an electro-optical device. [Figure 6] This figure shows an example of the electrical connection of inspection terminals in an electro-optical device. [Figure 7] This is a plan view showing the arrangement of light-shielding members in an electro-optical device. [Figure 8] Figure 7 shows a cross-sectional view of the electro-optic apparatus broken along the line A-A'. [Figure 9] This is a cross-sectional view of the main part of an electro-optical device, including the inspection terminals, after it has been broken. [Figure 10] This is a plan view showing the alignment marks of an electro-optical device. [Figure 11] This is a cross-sectional view of the main part of an electro-optical device, including the alignment marks, after it has been fractured. [Figure 12] This is a plan view showing the positional relationship between the inspection terminal and the light-shielding member. [Figure 13] This is a plan view showing the arrangement of each element in the electro-optical apparatus according to the second embodiment. [Figure 14] This is a perspective view showing a head-mounted display using an electro-optical device. [Figure 15] This figure shows the optical configuration of a head-mounted display. [Figure 16] This is a plan view showing the arrangement of light-shielding members in an electro-optical apparatus relating to a comparative example. [Modes for carrying out the invention]

[0007] Hereinafter, an electro-optical apparatus according to an embodiment of the present invention will be described with reference to the drawings. Note that the dimensions and scale of each part in each drawing have been appropriately changed from those of the actual parts. Furthermore, the embodiments described below are preferred examples and are subject to various technically preferred limitations, but the scope of the present invention is not limited to these forms unless otherwise stated in the following description.

[0008] Figure 1 is a perspective view showing the external appearance of the electro-optical device 10. The electro-optical device 10 is a micro-display panel that displays images, for example, in a head-mounted display. The electro-optical device 10 includes a plurality of subpixels and a drive circuit that drives the subpixels. The subpixels and the drive circuit are integrated on a semiconductor substrate. The semiconductor substrate is typically a silicon substrate, but other semiconductor substrates may also be used.

[0009] As shown in the figure, the electro-optical device 10 is housed in a frame-shaped case 192 having an opening 191. One end of an FPC (Flexible Printed Circuits) board 194 is connected to the electro-optical device 10. Multiple terminals 196 are provided on the other end of the FPC board 194. Multiple terminals 196 are connected to a higher-level device (not shown). The higher-level device supplies video data and various control signals to the electro-optical device 10 via the FPC board 194.

[0010] In the diagram, the X direction represents the horizontal direction of the displayed image in the electro-optical device 10, and the Y direction represents the vertical direction of the displayed image. The two-dimensional plane defined by the X and Y directions is the substrate surface of the semiconductor substrate. The Z direction is perpendicular to the X and Y directions and indicates the direction of light emission from the OLED, which will be described later.

[0011] Figure 2 shows the electrical configuration of the electro-optical device 10. The electro-optical device 10 is broadly composed of a control circuit 30, a data signal output circuit 50, a display unit 100, and a scan line drive circuit 120. In the display unit 100, m scanning lines 12 are provided along the X direction in the figure, and (3n) data lines 14 are provided along the Y direction and electrically insulated from each scanning line 12. Here, m and n are integers of 2 or more.

[0012] In order to distinguish the rows of the scanning lines 12, they may be referred to as the 1st, 2nd, …, (m - 1)th, and mth rows in order from the top in the figure. For the scanning lines 12, in order to explain generally without specifying the row, an integer i of 1 or more and m or less may be used, and it may be expressed as the ith row. Also, in order to distinguish the columns of the data lines 14, they may be referred to as the 1st, 2nd, 3rd, …, (3n - 2)th, (3n - 1)th, and (3n)th columns in order from the left in the figure. The data lines 14 are grouped every 3 columns. In order to explain the group generally, using an integer j of 1 or more and n or less, it means that the (3j - 2)th, (3j - 1)th, and (3j)th data lines 14 in total of 3 columns belong to the jth group counted from the left.

[0013] The sub-pixels 11R, 11G, and 11B are provided corresponding to the scanning lines 12 arranged in m rows and the data lines 14 arranged in (3n) columns. Specifically, the sub-pixel 11R is provided corresponding to the intersection of the scanning line 12 of the ith row and the data line 14 of the (3j - 2)th column. The sub-pixel 11G is provided corresponding to the intersection of the scanning line 12 of the ith row and the data line 14 of the (3j - 1)th column. The sub-pixel 11B is provided corresponding to the intersection of the scanning line 12 of the ith row and the data line 14 of the (3j)th column.

[0014] The sub-pixel 11R emits light of a red component, the sub-pixel 11G emits light of a green component, and the sub-pixel 11B emits light of a blue component. One color pixel is represented by additive color mixing of the light emitted from the sub-pixels 11R, 11B, and 11G. The electrical configurations of the sub-pixels 11R, 11G, and 11B are the same. Therefore, when there is no particular need to distinguish the sub-pixels, they are explained with the reference numeral 11.

[0015] The control circuit 30 controls each component based on video data Vid and synchronization signal Sync supplied from a higher-level device (not shown). Specifically, the control circuit 30 generates various control signals to control each component. The video data Vid specifies the grayscale level for each pixel to be displayed, for example, using 8 bits for red, green, and blue. The synchronization signal Sync includes a vertical synchronization signal that instructs the start of vertical scanning of the video data Vid, a horizontal synchronization signal that instructs the start of horizontal scanning, and a dot clock signal that indicates the timing of one pixel of the video data.

[0016] In this embodiment, there is a one-to-one correspondence between the pixel to be displayed and one color pixel represented by three subpixels in the display unit 100. Furthermore, the luminance characteristics at the gradation levels indicated by the video data Vid supplied from the host device do not necessarily match the luminance characteristics of the OLED contained in the subpixel 11. Therefore, the control circuit 30 upconverts the 8 bits of the video data Vid to, for example, 10 bits and outputs it as video data Vdata in order to make the OLED emit light at a luminance corresponding to the gradation level indicated by the video data Vid. As a result, the 10-bit video data Vdata becomes data corresponding to the gradation level specified by the video data Vid. For upconversion, a lookup table is used that pre-stores the correspondence between the 8 bits of the input video data (Vid) and the 10 bits of the output video data (Vdata).

[0017] The scan line driving circuit 120 is a circuit for driving the sub-pixels 11, which are arranged in m rows (3n columns), one row at a time, according to the control of the control circuit 30. For example, the scan line driving circuit 120 supplies scan signals / Gwr(1), / Gwr(2), ..., / Gwr(m), and / Gwr(m) to the scan lines 12 of the 1st, 2nd, 3rd, ..., (m-1), and mth rows, respectively. Generally, the scan signal supplied to the scan line 12 of the ith row is denoted as / Gwr(i).

[0018] The data signal output circuit 50 is a circuit that outputs data signals via data lines 14 to subpixels 11 located in rows selected by the scan line drive circuit 120, according to the control of the control circuit 30. The data signal is a voltage signal obtained by converting 10-bit video data Vdata into an analog. That is, the data signal output circuit 50 converts the video data Vdata for one row corresponding to subpixels 11 in columns 1 to (3n) of the selected row into an analog and outputs it in this order to the data lines 14 of columns 1 to (3n).

[0019] In the diagram, the data signals output to data line 14 in columns 1, 2, 3, ..., (3n-2), (3n-1), and (3n) are denoted as Vd(1), Vd(2), Vd(3), ..., Vd(3n-2), Vd(3n-1), and Vd(3n), respectively. Generally, the data signal supplied to data line 14 in column j is denoted as Vd(j).

[0020] Figure 3 is a circuit diagram showing the electrical configuration of the subpixel 11. As shown in the figure, the subpixel 11 electrically includes P-channel MOS type transistors 121 and 122, an OLED 130, and a capacitive element 140. In the description of subpixel 11, "electrically speaking" refers to the multiple elements that constitute the subpixel 11 and the connection relationships between those elements. This expression is used because, from a mechanical or physical perspective, the subpixel 11 includes elements that do not contribute to the electrical connection relationships.

[0021] OLED130 is an example of a light-emitting element, in which a light-emitting layer 132 is sandwiched between a pixel electrode 131 and a common electrode 133. The pixel electrode 131 functions as an anode, and the common electrode 133 functions as a cathode. In OLED130, when current flows from the anode to the cathode, holes injected from the anode and electrons injected from the cathode recombine in the light-emitting layer 132 to generate excitons, which produce white light. The generated white light resonates in an optical resonator, which is composed of a reflective electrode and a semi-reflective, semi-transparent layer (omitted in Figure 3), and is emitted at a resonant wavelength set to correspond to red light in the case of subpixel 11R. A colored layer (color filter) corresponding to the red light is provided on the light emission side from the optical resonator. Therefore, the light emitted from the OLED 130 passes through the optical resonator and the colored layer before being visible to the observer. Furthermore, if subpixel 11G is used, it emits light at a resonant wavelength set to correspond to green, passes through a colored layer corresponding to green, and is visible to the observer. If subpixel 11B is used, it emits light at a resonant wavelength set to correspond to blue, passes through a colored layer corresponding to blue, and is visible to the observer.

[0022] In the transistor 121 of the subpixel 11 in row i (3j-2), the gate node g is connected to the drain node of transistor 122, the source node is connected to the voltage Vel feed line 116, and the drain node is connected to the pixel electrode 131, which is the anode of the OLED 130. In the transistor 122 of the subpixel 11 in row i (3j-2) column, the gate node is connected to the scan line 12 of row i, and the source node is connected to the data line 14 of the corresponding (3j-2) column. The common electrode 133, which functions as the cathode of the OLED 130, is connected to the voltage Vct feed line 118. Furthermore, since the electro-optical device 10 is formed on a silicon substrate, the substrate potential of transistors 121 and 122 is set to a potential equivalent to, for example, the voltage Vel.

[0023] Figure 4 is a timing chart illustrating the operation of the electro-optical device 10. In the electro-optical device 10, the m-row scan lines 12 are scanned one line at a time in the order of the 1st, 2nd, 3rd, ..., mth line during the frame (V) period. More specifically, as shown in the figure, the scan signals / Gwr(1), / Gwr(2), ..., / Gwr(m-1), and / Gwr(m) are sequentially and exclusively set to L level by the scan line drive circuit 120 for each horizontal scanning period (H). In this embodiment, among the scan signals / Gwr(1) to / Gwr(m), the periods during which adjacent scan signals are at an L level are temporally separated. Specifically, after the scan signal / Gwr(i-1) changes from an L level to an H level, the next scan signal / Gwr(i) becomes L level after a period of time. This period corresponds to the horizontal retrace period.

[0024] In this explanation, the duration of one frame (V) refers to the period required to display one frame of the image specified by the video data Vid. The length of one frame (V) is 16.7 milliseconds, which corresponds to one cycle of the vertical synchronization signal if the vertical synchronization signal included in the synchronization signal Sync has a frequency of 60 Hz. The horizontal scanning period (H) is the time interval between the scan signals / Gwr(1) to / Gwr(m) becoming L levels in sequence. For convenience, in the diagram, the start timing of the horizontal scanning period (H) is set to approximately the center of the horizontal retrace period.

[0025] If one of the scan signals / Gwr(1) to / Gwr(m) is a scan signal, for example, the scan signal / Gwr(i) supplied to the i-th row scan line 12, becomes low level, then in the (3j-2)th column, the transistor 122 in the i-th row (3j-2) subpixel 11 becomes ON. As a result, the gate node g of the transistor 121 in the subpixel 11 becomes electrically connected to the (3j-2)th column data line 14.

[0026] In this explanation, the "on state" of a transistor or switch refers to a low-impedance state where the source node and drain node of the transistor, or both ends of a switch, are electrically closed. Conversely, the "off state" of a transistor or switch refers to a high-impedance state where the source node and drain node, or both ends of a switch, are electrically open. Furthermore, in this explanation, "electrically connected" or simply "connected" means a state in which two or more elements are directly or indirectly connected or coupled. "Electrically disconnected" or simply "disconnected" means a state in which two or more elements are not directly or indirectly connected or coupled.

[0027] During the horizontal scanning period (H) when the scanning signal / Gwr(i) is at the L level, the data signal output circuit 50 converts the gradation levels of the subpixels in row i, column 1 to row i, column (3n), indicated by the video data Vdata, into analog data signals Vd(1) to Vd(n) and outputs them to the data lines 14 in columns 1 to (3n). For column (3j-2), the data signal output circuit 50 converts the gradation level d(i,3j-2) of the pixel in row i, column (3j-2) into an analog data signal Vd(j) and outputs it to the data line 14 in column (3j-2). Furthermore, during the horizontal scanning period (H) when the scan signal / Gwr(i-1) one row prior to the scan signal / Gwr(i) is at a low level, the data signal output circuit 50 converts the gradation level d(i-1,3j-2) of the subpixel 11 in the (i-1) row and (3j-2) column into an analog data signal Vd(3j-2) and outputs it to the data line 14 in the (3j-2) column.

[0028] The data signal Vd(3j-2) is supplied to the gate node g of transistor 121 in subpixel 11 of row i (3j-2) via the data line 14 of column (3j-2), and is held by the capacitive element 140. As a result, transistor 121 supplies a current to the OLED 130 corresponding to the voltage between the gate node and source node. Even when the scanning signal Gwr(i) becomes high and transistor 122 turns off, the voltage of the data signal Vd(3j-2) is held at one end of the capacitive element 140, so current continues to flow through the OLED 130. Therefore, in the i-th row (3j-2) column subpixel 11, the OLED 130 continues to emit light at a brightness corresponding to the voltage held by the capacitive element 140, i.e., the grayscale level, until a frame (V) has elapsed, transistor 122 turns on again, and the voltage of the data signal is reapplied.

[0029] Although we have described the subpixel 11 in row i and column (3j-2) here, the OLED130s other than column (3j-2) in row i also emit light at the brightness indicated by the video data Vdata. Furthermore, each OLED 130 of the subpixel 11 in rows other than row i will emit light at the brightness indicated by the video data Vdata as the scanning signals / Gwr(1) to / Gwr(m) sequentially become L levels. Therefore, in the electro-optical device 10, during a frame (V) period, each OLED 130 in all subpixels 11 from row 1 to column m (3n) emits light with a brightness indicated by the video data Vdata, thereby displaying one frame of image.

[0030] Figure 5 is a plan view showing the arrangement of each element in the electro-optical device 10. The electro-optical device 10 has a rectangular shape. In the rectangular electro-optical device 10, for convenience, as shown in the figure, the symbol for the top side is denoted as Ue, the symbol for the bottom side as De, the symbol for the left side as Le, and the symbol for the right side as Re.

[0031] Between the lower edge De and the display unit 100, a circuit area 40 and multiple mounting terminals 20 are provided in that order, as viewed from the display unit 100. The multiple mounting terminals 20 are provided along the X direction on the lower edge De. The circuit region 40 is a region encompassing the control circuit 30 and the data signal output circuit 50 in Figure 2. The lower edge De corresponds to the "first edge" in the claims.

[0032] A scan line drive circuit 120 is provided between the left-hand side Le and the display unit 100. Similarly, a scan line drive circuit 120 is provided between the right-hand side Re and the display unit 100. In other words, a pair of scan line drive circuits 120 are positioned symmetrically with respect to the display unit 100, and are configured to drive the scan lines 12 from both the left and right sides. Thus, in a configuration where the scan line 12 is driven from both sides, the effects of signal delay and voltage drop due to wiring resistance are suppressed compared to a configuration where it is driven from only one side.

[0033] Furthermore, peripheral wiring, not shown in the diagram, is provided on the outside of the display unit 100. Peripheral wiring includes signal wiring and power wiring for supplying control signals to the display unit 100. Furthermore, alignment marks 171 are provided at each of the four corners of the electro-optical device 10 to determine its position during the manufacturing process.

[0034] Multiple inspection terminals 151 are provided along the X direction between the upper side Ue and the display unit 100. Similarly, multiple inspection terminals 152 are provided along the Y direction between the left side Le and the scan line drive circuit 120, and multiple inspection terminals 153 are provided along the Y direction between the right side Re and the scan line drive circuit 120. The upper side Ue corresponds to the "second side" in the claims, the left side Le corresponds to the "third side" in the claims, and the right side Re corresponds to the "fourth side" in the claims. The inspection terminal 151 is a terminal used in the manufacturing process of the electro-optical device 10 to check for, for example, open or short circuits in the data line 14. Specifically, as shown in Figure 6, the inspection terminal 151 is electrically connected to the data line 14 via an analog switch Sw.

[0035] After the common electrode 133 is installed, the test terminal 151 is covered with an insulating film, but before the test, the insulating film is opened to expose the test terminal 151. During the test, the analog switch Sw is turned ON and the test probe is brought into contact with the test terminal 151. In this state, when a data signal of a predetermined grayscale level is output to the test terminal 151 corresponding to the data line 14 of the (3j-2) column, if a data signal with a voltage corresponding to that grayscale level appears, the data line 14 of the (3j-2) column is determined to be normal; if it does not appear, the data line 14 is determined to be abnormal.

[0036] In this example, the test terminal 151 is used to determine whether the data line 14 is normal or abnormal, but it may also be used to test other elements, such as the latch circuit (not shown) in the data signal output circuit 50. Furthermore, the test terminals 152 and 153 are also provided with analog switches Sw, which are connected to the scan line 12 and the inside of the scan line drive circuit 120, and may be used for testing the scan line drive circuit 120 and the like. Furthermore, a single test terminal 151, 152, or 153 may not be provided in a one-to-one correspondence with a scan line 12 or data line 14, but rather may be provided for each of two or more elements of scan lines 12, data lines 14, control lines, or output lines.

[0037] Such inspection terminals 151 are provided by patterning the wiring layer, specifically a conductive layer such as aluminum, in the electro-optical device 10. When the required viewing angle for the electro-optical device 10 is large, even when housed in the case 192, the light emitted from the OLED 130 and the incident light from the observation side may be reflected by the inspection terminals 151, taken into the optical system, and visible to the observer. Therefore, in the first embodiment, the coloring layers used for the subpixels 11 in the display unit 100 are stacked in three colors to cover the inspection terminal 151 provided along the X direction, thereby making it difficult for the observer to see the reflected light from the inspection terminal 151.

[0038] Figure 7 is a plan view showing the arrangement of light-shielding members in the electro-optical device 10, and Figure 8 is a simplified cross-sectional view showing the electro-optical device 10 broken along the line A-A' in Figure 7. The electro-optical device 10 is composed of a substrate. The substrate constituting the electro-optical device 10 includes a semiconductor substrate 60, a display unit 100, a plurality of mounting terminals 20, inspection terminals 151, 152, 153, and colored layers Cf_r, Cf_g, and Cf_b. The light-shielding member 181 is provided in a plan view on the outside of the display unit 100, surrounding the display unit 100, and covering the inspection terminals 151 arranged along the X direction. In this embodiment, the light-shielding member 181 refers to a region in which the green colored layer Cf_g, the blue colored layer Cf_b, and the red colored layer Cf_r are laminated, and is distinguished from a region consisting of a single colored layer. The light-shielding member 181 becomes black through subtractive color mixing of green, blue, and red, and has the function of absorbing incident light and reducing the emitted light.

[0039] As shown in Figure 8, a drive circuit layer 61 is provided on the semiconductor substrate 60 of the substrate constituting the electro-optical device 10 by patterning, ion implantation, etc. The drive circuit layer 61 includes transistors 121 and 122 in the subpixel 11, a capacitive element 140, elements constituting the scan line drive circuit 120, elements constituting the data signal output circuit 50, and so on.

[0040] A peripheral wiring layer 62 is provided in the Z direction of the drive circuit layer 61. The peripheral wiring layer 62 is a layer of wiring that electrically connects various elements in the drive circuit layer 61. In reality, the peripheral wiring layer 62 is composed of multiple wiring layers separated by an insulating film. Furthermore, the inspection terminals 151, 152, 153 and the mounting terminal 20 are provided by the patterning of the wiring layers that make up the peripheral wiring layer 62.

[0041] Pixel electrodes 131 constituting subpixels 11 are provided in the Z direction of the peripheral wiring layer 62. As described above, the OLED 130 is constructed by sandwiching the light-emitting layer 132 between the pixel electrodes 131 and the common electrode 133. After the common electrode 133 is formed, the insulating film, which will be described later, is opened, and a probe is brought into contact with the inspection terminal 151 to check whether the data signal output circuit 50, the scan line drive circuit 120, the scan line 12, the data line 14, etc., are formed correctly. Since the test terminal 151 will not be used after the inspection, the sealing layer 71 is provided so as to cover the common electrode 133 and the test terminal 151. The mounting terminal 20 needs to be connected to the FPC substrate 194. For this reason, the sealing layer 71 is provided so as to avoid the mounting terminal 20. Also, the circuit region 40 is omitted in Figure 8.

[0042] As described above, the green colored layer Cf_g, the blue colored layer Cf_b, and the red colored layer Cf_r are provided in this order in the Z direction of the sealing layer 71. In particular, the colored layers Cf_g, Cf_b, and Cf_r are provided as a light-shielding member 181 so as to be outside the display unit 100 in a plan view, surrounding the display unit 100 and covering the inspection terminal 151.

[0043] In the display unit 100, a colored layer Cf_r is provided corresponding to subpixel 11R, a colored layer Cf_g is provided corresponding to subpixel 11G, and a colored layer Cf_b is provided corresponding to subpixel 11B. Note that Figure 8 shows Figure 7 broken along the line A-A' in the Y direction, so in the display unit 100, only a single colored layer Cf_r, in this example red, is provided. In the Z direction relative to the sealing layer 71 and the colored layers Cf_g, Cf_b, or Cf_r, a protective glass 91 is provided via an adhesive layer 81. An overcoat layer is provided to flatten the steps created by the colored layers Cf_g, Cf_b, or Cf_r, but this is omitted in Figure 8.

[0044] Figure 9 is a partial cross-sectional view showing a more detailed structure near the inspection terminal 151. In the semiconductor substrate 60 that constitutes the electro-optical device 10, the layers used as conductive layers are, in order in the Z direction, a semiconductor layer 620, a gate electrode layer 630, a first wiring layer 631, a second wiring layer 632, a third wiring layer 633, a fourth wiring layer 634, a reflective layer 635, a contact layer 636, a pixel electrode layer 637, and a cathode layer 638.

[0045] For the first wiring layer 631, second wiring layer 632, third wiring layer 633, fourth wiring layer 634, reflective layer 635, and contact layer 636, for example, aluminum or an aluminum-containing alloy is used. For the pixel electrode layer 637, a transparent and conductive material such as indium tin oxide is used. For the cathode layer 638, a transparent, reflective and conductive metal such as an alloy of Mg and Ag is used.

[0046] In the semiconductor layer 620, transistor regions (source region, drain region) are formed, for example, by implanting impurity ions into the p-well region. A gate insulating film 610 is provided between the semiconductor layer 620 and the gate electrode layer 630. The patterning of the gate electrode layer 630 provides the gate electrodes of various transistors, including transistors 121 and 122, as well as the gate electrodes of the transistors constituting the analog switch Sw. Note that in Figure 9, only one of the two complementary transistors constituting the analog switch Sw connected to the test terminal 151 is shown.

[0047] In the first wiring layer 631, the second wiring layer 632, the third wiring layer 633, and the fourth wiring layer 634, wiring, electrodes, etc., are provided by patterning of each layer. In addition, insulating films 611, 612, 613, and 614 are provided in order between the gate electrode layer 630 and the first wiring layer 631, between the first wiring layer 631 and the second wiring layer 632, between the second wiring layer 632 and the third wiring layer 633, and between the third wiring layer 633 and the fourth wiring layer 634. Different wiring layers are electrically connected through contact holes that open in the insulating films.

[0048] For example, the source region of the transistor is electrically connected via a contact hole to a patterned wiring 631a on the first wiring layer 631, and this wiring 631a is electrically connected via a contact hole to a patterned wiring 632a on the second wiring layer 632. Furthermore, this wiring 632a is electrically connected via a contact hole to a data line 14 on the third wiring layer 633. For example, the drain region of the transistor is electrically connected via a contact hole to a wiring 631b patterned on the first wiring layer 631, and this wiring 631b is electrically connected via a contact hole to a wiring 632b patterned on the second wiring layer 632. Furthermore, this wiring 632b is electrically connected via a contact hole to a wiring 633b patterned on the third wiring layer 633, and this wiring 633b is electrically connected via a contact hole to a test terminal 151 patterned on the fourth wiring layer 634. As a result, the test terminal 151 is connected to the data line 14 via the analog switch Sw.

[0049] Insulating films 615, 616, and 617 are provided in order between the fourth wiring layer 634 and the reflective layer 635, between the reflective layer 635 and the contact layer 636, and between the contact layer 636 and the pixel electrode layer 637, and insulating film 618 is provided in the Z direction of insulating film 617. In the display unit 100, the reflective layer 635 is used as a reflective electrode of the optical resonator. Outside the display unit 100 in a plan view, it is electrically connected to the common electrode 133 as wiring 635a by patterning, and functions as part of the parallel wiring for applying a voltage Vel to the common electrode 133. In the display unit 100, the reflective layer 635 is patterned to correspond to the shape of the pixel electrode 131. The contact layer 636 is a wiring layer for connecting the pixel electrode layer 637 to the reflective layer 635 or the fourth wiring layer 634. Outside the display unit 100, it is electrically connected to the wiring 635a as wiring 636a through a plurality of contact holes by patterning. In the display unit 100, the pixel electrode layer 637 is patterned as a pixel electrode 131 for each sub-pixel 11, but outside the display unit 100, it functions as part of the wiring for applying a voltage Vel to the common electrode 133.

[0050] In the display unit 100, a light-emitting layer 132 is provided between the pixel electrode 131 and the common electrode 133, which are made up of the pixel electrode layer 637. However, the light-emitting layer 132 is not provided near the inspection terminal 151. Therefore, the wiring 135 that patterns the pixel electrode layer 637 comes into direct contact with the common electrode 133.

[0051] An opening Ap is provided corresponding to the inspection terminal 151. The opening Ap opens the insulating films 615-618. During the inspection process, a probe makes contact through the opening Ap and is used for inspection. After the inspection, a sealing layer 71, which is provided to cover the common electrode 133, is filled into the opening Ap. As described above, the sealing layer 71 has a green colored layer Cf_g, a blue colored layer Cf_b, and a red colored layer Cf_r in that order in the Z direction, and a protective glass 91 is provided via an adhesive layer 81.

[0052] Alignment marks 171 are provided at four locations in the electro-optical device 10 in a plan view. The alignment marks 171 provided at the four locations have a common configuration. Next, we will explain the alignment mark 171, which is placed at any one location.

[0053] Figure 10 is a plan view specifically showing alignment mark 171, and Figure 11 is a cross-sectional view of the main part of the electro-optical device 10 broken along the line C-C' in Figure 10. As shown in Figure 10, the alignment marks 171 consist of a combination of patterns of the colored layers Cf_r, Cf_g, Cf_b or the overcoat layer Oc and patterns of the wiring layers. More specifically, one alignment mark 171 consists of a collection of five marks arranged at equal intervals in the X direction.

[0054] The first mark located on the far left is composed of mark Cf_r1, which is a square patterned colored layer Cf_r in a plan view, and mark 636b, which is a larger square in a plan view than mark Cf_r1, and is patterned contact layer 636 such that their centers coincide. In the figure, the second mark to the right of the first mark is composed of mark Cf_g1, which is a square patterned colored layer Cf_g in a plan view, and mark 636c, which is a larger square in a plan view than mark Cf_g1, and is patterned contact layer 636 so that their centers coincide. The third mark, located to the right of the second mark, is composed of a mark Cf_b1, which is a square patterned colored layer Cf_b in a plan view, and a mark 636d, which is a larger square in a plan view than the mark Cf_b1, and is patterned contact layer 636 such that their centers coincide. The fourth mark, located to the right of the third mark, is composed of mark Oc1, which is a square pattern formed by the overcoat layer Oc in a plan view, and mark 636e, which is a larger square in a plan view than mark Oc1, and is formed by the contact layer 636 being patterned so that their centers coincide. The fifth mark, located to the right of the fourth mark, is composed of mark Oc2, which is a square patterned overcoat layer Oc in a plan view, and mark 635b, which is a larger square in a plan view than mark Oc2, and is patterned with the reflective layer 635 so that their centers coincide.

[0055] Marks Cf_r1, Cf_g1, Cf_b1, Oc1, and Oc2 are patterned to have the same size, and marks 636b, 636c, 636d, 636e, and 635b are patterned to have the same size. When viewed from the Z direction, the first to third marks appear as a square reflective mark with a slightly smaller colored layer superimposed on it. Furthermore, since the overcoat layer Oc is colorless and transparent, only the square reflective marks are visible for the fourth and fifth marks. Note that because the reflectivity of the reflective layer 635 is higher than that of the contact layer 636, the fifth mark may be visible even if the fourth mark is not.

[0056] Figure 12 is a plan view showing the design rules for the light-shielding member 181 relative to the inspection terminals 151. More specifically, Figure 12 shows the positional relationship between the leftmost inspection terminal 151, which is arranged in the X direction between the display unit 100 and the upper edge Ue, and the colored layers Cf_r, Cf_g, and Cf_b that constitute the light-shielding member 181.

[0057] As shown in this figure, when the distance between the end of the inspection terminal 151 opposite to the Y direction and the end of the colored layer Cf_r is L1, the distance between the end of the colored layer Cf_r and the colored layer Cf_b is L2, and the distance between the end of the colored layer Cf_b and the colored layer Cf_g is L3, L1 > L2, and L1 > L3 The colored layers Cf_g, Cf_b, and Cf_r are superimposed in order to achieve this result. In other words, even if misalignment occurs during the formation of the colored layers Cf_g, Cf_b, and Cf_r, a margin is provided so that the light-shielding member 181, formed by the lamination of the three colors, reliably covers the inspection terminal 151.

[0058] Furthermore, if the alignment mark 171 and the light-shielding member 181 are in close proximity, the colored layer constituting the alignment mark 171 and the colored layer constituting the light-shielding member 181 may connect due to manufacturing tolerances. To prevent this connection, it is preferable to maintain a certain distance between the alignment mark 171 and the light-shielding member 181. Therefore, in the first embodiment, the two alignment marks 171 at the left and right ends of the upper edge Ue, which are close to the light-shielding member 181, are located in the corner region 183 where the light-shielding member 181 is not provided.

[0059] According to the first embodiment, the inspection terminal 151, which is provided along the X direction, is covered by the light-shielding member 181, so that the inspection terminal 151 does not appear in the display image on the display unit 100.

[0060] Since the display unit 100 is generally horizontally elongated, meaning that the X-direction is longer than the Y-direction, the reflection of the inspection terminals 151 arranged along the X-direction is noticeable. Conversely, even if the inspection terminals 152 arranged along the Y-direction between the display unit 100 and the left-hand side Le, and the inspection terminals 153 arranged along the Y-direction between the display unit 100 and the right-hand side Re, are not shielded from light, the reflection of the inspection terminals 152 and 153 is less noticeable compared to the reflection of the inspection terminals 151. Furthermore, depending on the optical system used to capture the display image, it may not be necessary to shield the inspection terminals 152 and 153, which are arranged along the Y direction. Therefore, in the first embodiment, only the inspection terminal 151 provided along the X direction is covered by the light-shielding member 181. To ensure complete safety, the following second embodiment is preferable.

[0061] Figure 13 is a plan view showing the arrangement of the light-shielding member 181 in the electro-optical device 10 according to the second embodiment. In the second embodiment, the inspection terminals 152 and 153, which are arranged along the Y direction, are also covered with the light-shielding member 181. Therefore, according to the second embodiment, not only the inspection terminal 151 provided along the X direction, but also the inspection terminals 152 and 153 provided along the Y direction are covered by the light-shielding member 181, so that the display image on the display unit 100 does not show not only the inspection terminal 151, but also the inspection terminals 152 and 153.

[0062] In the second embodiment as well, in order to prevent the colored layers from joining due to manufacturing errors, the two alignment marks 171 at the left and right ends of the upper edge Ue, which are close to the light-shielding member 181, are located in the corner region 183 where the light-shielding member 181 is not provided.

[0063] The first and second embodiments described above (hereinafter referred to as "embodiments, etc.") can be modified or applied in various ways as follows. In this embodiment, the colored layers Cf_g, Cf_b, and Cf_r were laminated to the sealing layer 71 in this order, but the order of lamination is not limited to this. Furthermore, although the light-shielding member 181 is composed of three colored layers Cf_g, Cf_b, and Cf_r, if additional processes are permitted, a light-shielding material such as a black matrix may also be used.

[0064] In the embodiments, OLED130 was used as an example of a light-emitting element, but other light-emitting elements may be used. For example, LEDs, mini-LEDs, micro-LEDs, etc., may be used as light-emitting elements. Alternatively, a liquid crystal element may be used as a display element instead of a light-emitting element.

[0065] Furthermore, although the sub-pixel 11 had a configuration including transistors 121 and 122, a configuration may be provided in which a transistor for diode connection of transistor 121 to compensate for the threshold voltage of transistor 121 is provided separately, as well as a transistor for blocking the current flowing to the OLED 130.

[0066] Next, we will describe electronic devices to which the electro-optical device 10 according to the embodiment is applied. The electro-optical device 10 is suitable for applications requiring small-sized pixels and high-definition display. Therefore, we will explain using a head-mounted display as an example of an electronic device.

[0067] Figure 14 shows the external appearance of the head-mounted display, and Figure 15 shows its optical configuration. As shown in Figure 14, the head-mounted display 300 has, externally, the same features as ordinary eyeglasses, including temples 310, a bridge 320, and lenses 301L and 301R. Furthermore, as shown in Figure 15, the head-mounted display 300 is equipped with an electro-optical device 10L for the left eye and an electro-optical device 10R for the right eye near the bridge 320, behind (below in the figure) the lenses 301L and 301R. The image display surface of the electro-optical device 10L is positioned to the left in Figure 15. As a result, the image displayed by the electro-optical device 10L is emitted in the 9 o'clock direction in the figure via the optical lens 302L, which is the acquisition optical system. The half mirror 303L reflects the image displayed by the electro-optical device 10L in the 6 o'clock direction while transmitting light incident from the 12 o'clock direction. The image display surface of the electro-optical device 10R is positioned to the right, opposite to the electro-optical device 10L. As a result, the image displayed by the electro-optical device 10R is emitted in the 3 o'clock direction in the figure via the optical lens 302R, which is the acquisition optical system. The half mirror 303R reflects the image displayed by the electro-optical device 10R in the 6 o'clock direction while transmitting light incident from the 12 o'clock direction.

[0068] In this configuration, the wearer of the head-mounted display 300 can observe the images displayed by the electro-optical devices 10L and 10R in a see-through state, superimposed on the outside environment. Furthermore, in this head-mounted display 300, if the left-eye image is displayed by the electro-optical device 10L and the right-eye image is displayed by the electro-optical device 10R, the wearer can perceive the displayed images as if they had depth and three-dimensionality.

[0069] Furthermore, the electronic device including the electro-optical device 10 can be applied not only to the head-mounted display 300, but also to electronic viewfinders in video cameras and interchangeable-lens digital cameras, personal digital assistants, watch displays, and light bulbs in projection projectors.

[0070] From the above description, preferred embodiments of this disclosure can be understood, for example, as follows. For the sake of ease of understanding each embodiment, the reference numerals in the drawings are conveniently included in parentheses below, but this does not mean that the present invention is limited to the illustrated embodiments.

[0071] An electro-optical device (10) according to one embodiment 1 includes a substrate having a rectangular shape in plan view, a display unit (100) on the substrate on which a light-emitting element (130) is provided, a plurality of first inspection terminals (151) on the substrate provided between the display unit (100) and the second side (Ue) opposite to the first side (De) of the rectangle in plan view, and a light-shielding member (181) provided to cover the plurality of first inspection terminals (151) in plan view. According to Embodiment 1, the first inspection terminal (151) is covered by the light-shielding member (181), so that the first inspection terminal (151) does not appear in the display image on the display unit (100).

[0072] In the electro-optical device (10) according to specific embodiment 2 of embodiment 1, the light-shielding member (181) is provided so as to surround the display unit (100) in a plan view. According to embodiment 2, reflections of surrounding wiring surrounding the display unit (100) are also suppressed.

[0073] In the electro-optical device (10) according to specific embodiment 3 of embodiment 2, the light-shielding member (181) has a first coloring layer (Cf_g) that colors the light emitted from the light-emitting element (130) with a first color, a second coloring layer (Cf_b) that colors it with a second color, and a third coloring layer (Cf_r) that colors it with a third color, which are stacked in this order. According to embodiment 3, the first colored layer (Cf_g), the second colored layer (Cf_b), and the third colored layer (Cf_r) used in the display unit (100) are also used as light-shielding members that cover the first inspection terminal (151).

[0074] In the electro-optical apparatus (10) according to a specific embodiment 4 of embodiment 3, in a plan view, the end of the first colored layer (Cf_g) constituting the light-shielding member is located outside the end of the second colored layer (Cf_b) constituting the light-shielding member and the end of the third colored layer (Cf_r) constituting the light-shielding member, the end of the second colored layer (Cf_b) constituting the light-shielding member (181) is located outside the end of the third colored layer (Cf_r) constituting the light-shielding member (181), and the end of the third colored layer (Cf_r) constituting the light-shielding member (181) is located outside the plurality of first inspection terminals (151). According to embodiment 4, even if misalignment of the colored layers (Cf_g, Cf_b, Cf_r) occurs during the manufacturing process, a margin is provided so that the light-shielding member 181, formed by lamination of the three colors, can reliably cover the inspection terminal 151.

[0075] In the electro-optical device (10) according to specific embodiment 5 of embodiment 4, in a plan view, the first distance (L1) between the end of the third colored layer (Cf_r) constituting the light-shielding member (181) and one of the plurality of first inspection terminals (151) is longer than the second distance (L2) between the end of the first colored layer (Cf_r) constituting the light-shielding member (151) and the end of the second colored layer (Cf_b), and the third distance (L3) between the end of the second colored layer (Cf_b) constituting the light-shielding member (151) and the end of the third colored layer (Cf_r).

[0076] In an electro-optical apparatus (10) according to another specific embodiment 6 of embodiment 1, the light-shielding member (181) is not provided in a corner region (183) corresponding to the angle between the second side (Ue) and the third side (Le) connecting to the first side (De) of the rectangle, outside the position where a plurality of first inspection terminals (151) are provided in a plan view, and has an alignment mark (171) in the corner region (183). According to embodiment 6, the bonding of colored layers due to manufacturing errors is prevented.

[0077] In an electro-optical device (10) according to another specific embodiment 7 of embodiment 1, the substrate includes a plurality of second inspection terminals (152) provided on the outside of the display unit (100) in a plan view, between the display unit (100) and the third side (Le) connecting to the first side (De) of the rectangle, and a plurality of third inspection terminals (153) provided on the outside of the display unit (100) in a plan view, between the display unit (100) and the fourth side (Re) opposite to the third side (Le) of the rectangle, and the light-shielding member (181) is provided so as to cover the plurality of second inspection terminals (152) and the plurality of third inspection terminals (153). According to embodiment 7, reflections of not only the inspection terminal 151 but also the inspection terminals 152 and 153 are suppressed.

[0078] The electronic device (300) according to Embodiment 8 includes an electro-optical device (10) according to any of Embodiments 1 to 8. According to Embodiment 8, high-quality display is possible with suppressed reflection of the first inspection terminal (151). [Explanation of symbols]

[0079] 10... Electro-optical device, 11... Subpixel, 60... Semiconductor substrate, 100... Display unit, 151, 152, 153... Inspection terminals, 171... Alignment mark, 181... Light-shielding material, 183... Corner region, 300... Head-mounted display, Cf_r, Cf_g, Cf_b... Colored layer.

Claims

1. A substrate having a rectangular shape in a plan view; a display section on the substrate, the display section having light-emitting elements; a plurality of first test terminals provided on the substrate between the display unit and a second side opposite to the first side of the rectangle in the plan view; a light blocking member provided to cover the first test terminals in the plan view; Includes Electro-optical device.

2. The light blocking member is The display unit is provided so as to surround the display unit in the plan view.

2. The electro-optical device according to claim 1.

3. In the light blocking member, A first colored layer for coloring the light emitted from the light emitting element in a first color, a second colored layer for coloring the light emitted from the light emitting element in a second color, and a third colored layer for coloring the light emitted from the light emitting element in a third color are laminated in this order.

3. The electro-optical device according to claim 2.

4. In the plan view, The end of the first colored layer constituting the light blocking member is the second colored layer constituting the light-shielding member and the third colored layer constituting the light-shielding member are positioned outside the end of the second colored layer and the end of the third colored layer constituting the light-shielding member, The end of the second colored layer constituting the light blocking member is a third colored layer constituting the light-shielding member, An end portion of the third colored layer constituting the light blocking member is located outside the first test terminals.

4. The electro-optical device according to claim 3.

5. In the plan view, a first distance between an end of a third colored layer constituting the light-shielding member and one of the first inspection terminals, the first inspection terminal being a second distance between an end of the first colored layer and an end of the second colored layer constituting the light-shielding member, and a third distance between an end of the second colored layer and an end of a third colored layer constituting the light-shielding member; Longer than 5. The electro-optical device according to claim 4.

6. The light blocking member is Outside the position where the plurality of first test terminals are provided, The corner region is not provided in a corner area corresponding to an included angle between the second side and a third side connected to the first side of the rectangle, The corner region has an alignment mark.

2. The electro-optical device according to claim 1.

7. The substrate is a plurality of second test terminals provided outside the display unit in the plan view and between the display unit and a third side connected to the first side of the rectangle; a plurality of third test terminals provided outside the display unit in the plan view and between the display unit and a fourth side of the rectangle opposite to the third side; Including, The light blocking member is provided to cover the second test terminals and the third test terminals.

2. The electro-optical device according to claim 1.

8. 8. An electronic device comprising the electro-optical device according to claim 1.

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