Laminated structure and semiconductor device

Abstract

To provide a laminated structure industrially useful and excellent in semiconductor properties.SOLUTION: A laminated structure includes at least: a first crystalline oxide film using one kind or two or more kinds of metal oxides selected from aluminum, indium and gallium as a main component; and a second crystalline oxide film formed on the first crystalline oxide film. The main surface of the first crystalline oxide film is a surface inclined from a c plane; and the second crystalline oxide film including at least group 9 metals in the periodic table as first metal and group 13 metals in the periodic table as second metal is a concentration inclination film having the concentration of the first metal varied in the film thickness direction.SELECTED DRAWING: None

Description

[Technical Field]

[0001] The present invention relates to a multilayer structure and a semiconductor device, particularly useful for power semiconductors. [Background technology]

[0002] Semiconductor devices using gallium oxide (Ga2O3), which has a large bandgap, are attracting attention as next-generation switching elements that can achieve high voltage resistance, low loss, and high heat resistance, and are expected to be applied to power semiconductor devices such as inverters. Moreover, due to its wide bandgap, it is also expected to be applied to light-emitting and light-receiving devices such as LEDs and sensors. According to Non-Patent Literature 1, the bandgap of gallium oxide can be controlled by mixing it with indium or aluminum, either individually or in combination, and it constitutes an extremely attractive material system as an InAlGaO-based semiconductor. Here, an InAlGaO-based semiconductor is In X Al Y Ga Z It exhibits the O3 property (0≦X≦2, 0≦Y≦2, 0≦Z≦2, X+Y+Z=1.5~2.5) and can be viewed as part of the same material system containing gallium oxide (Patent Document 1).

[0003] In recent years, gallium oxide-based p-type semiconductors have been investigated. For example, Patent Document 2 describes that a substrate exhibiting p-type conductivity can be obtained by forming a β-Ga2O3-based crystal using the FZ method with MgO (p-type dopant source). Patent Document 3 describes α-(Al) formed by the MBE method. x Ga 1-x It has been described that a p-type semiconductor is formed by adding a p-type dopant to a 2O3 single crystal film. However, it has been difficult to realize a p-type semiconductor with semiconductor properties applicable to semiconductor devices using the methods described in Patent Documents 2 and 3. For this reason, there has been a great demand for a p-type semiconductor applicable to semiconductor devices using an n-type semiconductor layer containing gallium oxide with a large band gap. [Prior art documents] [Patent Documents]

[0004] [Patent Document 1] International Publication No. 2014 / 050793 [Patent Document 2] Japanese Patent Publication No. 2005-340308 [Patent Document 3] Japanese Patent Publication No. 2013-58637 [Overview of the Initiative] [Problems that the invention aims to solve]

[0005] One of the objectives of this invention is to provide a multilayer structure with excellent semiconductor properties. [Means for solving the problem]

[0006] As a result of diligent research to achieve the above objective, the present inventors have found that a laminated structure comprising at least a first crystalline oxide film mainly composed of an oxide of one or more metals selected from aluminum, indium, and gallium, and a second oxide semiconductor film formed on the first crystalline oxide film, wherein the main surface of the first crystalline oxide film is a surface inclined from the c-plane, and the second crystalline oxide film contains at least a Group 9 metal of the periodic table as the first metal and a Group 13 metal of the periodic table as the second metal, and is a concentration gradient film in which the concentration of the first metal changes with the film thickness, results in particularly better film properties of the second crystalline oxide film, and has found that such a laminated structure can solve the above-mentioned conventional problems.

[0007] Furthermore, after obtaining the above findings, the inventors conducted further studies and completed the present invention. That is, the present invention relates to the following invention. [1] A laminated structure comprising at least a first crystalline oxide film mainly composed of an oxide of one or more metals selected from aluminum, indium, and gallium, and a second oxide semiconductor film formed on the first crystalline oxide film, A laminated structure characterized in that the main surface of the first crystalline oxide film is a surface inclined from the c-plane, and the second crystalline oxide film contains at least a Group 9 metal of the periodic table as the first metal and gallium as the second metal, and is a concentration gradient film in which the concentration of the first metal changes with the film thickness. [2] The laminated structure according to [1], wherein the main surface of the first crystalline oxide film is a plane perpendicular to the c-plane. [3] The laminated structure according to [1] or [2], wherein the main surface of the first crystalline oxide film is the m-plane. [4] The laminated structure according to any one of [1] to [3], wherein the first crystalline oxide film comprises at least gallium. [5] The laminated structure according to any one of [1] to [4], wherein the first metal contains iridium. [6] The laminated structure according to any one of [1] to [5], wherein the second metal contains gallium. [7] The laminated structure according to any one of [1] to [6], wherein the concentration of the first metal in the second crystalline oxide film increases from the surface of the first crystalline oxide film in the direction of the film thickness of the second crystalline oxide film. [8] The laminated structure according to any one of [1] to [7], wherein the second crystalline oxide film comprises a first layer and a second layer having a higher concentration of the first metal than the first layer, and the first layer is located on the first crystalline oxide film side in the film thickness direction than the second layer. [9] The laminated structure according to [8], wherein the concentration of the first metal in all metal elements in the first layer is 10% or less.

[10] The laminated structure according to [8] or [9], wherein the concentration of the first metal in all the metal elements contained in the second layer is 10% or more.

[11] A semiconductor device comprising at least a laminated structure according to any of [1] to

[10] above and an electrode.

[12] The semiconductor device described in

[11] , which is a power device.

[13] A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device described in

[11] or

[12] .

Advantages of the Invention

[0008] The laminated structure of the present invention has excellent semiconductor characteristics.

Brief Description of the Drawings

[0009] [Figure 1] It is a schematic configuration diagram of a film forming apparatus (mist CVD apparatus) used in the examples. <oo00093> [Figure 2] It is a diagram showing the measurement results of the temperature dependence of resistivity in the examples. [Figure 3] It is a diagram showing the measurement results of the temperature dependence of resistivity in the examples. [Figure 4] It is a diagram showing the measurement results of the temperature dependence of resistivity in the comparative examples. [Figure 5] It is a cross-sectional view schematically showing a preferred semiconductor device in an embodiment of the present invention. [Figure 6] It is a cross-sectional view schematically showing a preferred semiconductor device in an embodiment of the present invention. [Figure 7] It is a cross-sectional view schematically showing a preferred semiconductor device in an embodiment of the present invention. [Figure 8] It is a diagram schematically showing a preferred example of a power card. [Figure 9] It is a diagram schematically showing a preferred example of a power supply system. [Figure 10] It is a diagram schematically showing a preferred example of a system device. [Figure 11] It is a diagram schematically showing a preferred example of a power supply circuit diagram of a power supply device. [Figure 12] It is a cross-sectional view schematically showing an example of a laminated structure in an embodiment of the present invention. [Figure 13] It is a schematic diagram for explaining the configuration of a concentration gradient film in an embodiment of the present invention. [Figure 14]This is a schematic cross-sectional view showing an example of a laminated structure in an embodiment of the present invention. [Figure 15] This figure shows the XRD measurement results in the example. [Figure 16] This figure shows the relationship between film depth and the Ir ratio (Ir / (Ga+Ir)) value (%) measured by Rutherford backscatter spectroscopy (RBS) in a reference example. [Modes for carrying out the invention]

[0010] Preferred embodiments of the present invention will be described below.

[0011] The laminated structure of the present invention comprises at least a first crystalline oxide film mainly composed of an oxide of one or more metals selected from aluminum, indium, and gallium, and a second crystalline oxide film formed on the first crystalline oxide film, wherein the main surface of the first oxide semiconductor film is a surface inclined from the c-plane, and the second crystalline oxide film contains at least a Group 9 metal of the periodic table as the first metal and gallium as the second metal, and is a concentration gradient film in which the concentration of the first metal changes with the film thickness. A preferred embodiment of the laminated structure of the present invention is shown in Figure 12. The laminated structure of Figure 12 comprises a first crystalline oxide film 51 and a second crystalline oxide film 52 formed on the first crystalline oxide film 51. The second crystalline oxide film 52 is a concentration gradient film and includes, at least a part thereof, a concentration gradient region in which the concentration of the first metal changes with the film thickness in the film thickness direction. The concentration of the first metal can be measured, for example, using TEM-EDX (energy-dispersive X-ray spectroscopy) or SIMS (secondary ion mass spectrometry).

[0012] In embodiments of the present invention, the c-plane refers to the {0001} plane. Furthermore, planes inclined from the c-plane include, for example, the {11-20} plane (a-plane), the {10-10} plane (m-plane), the {-1012} plane (r-plane), the {10-14} plane (R-plane), the {11-23} plane (n-plane), the {10-11} plane (S-plane), and so on. In embodiments of the present invention, the main surface of the first crystalline oxide film is preferably a plane orthogonal to the c-plane, more preferably the m-plane or a-plane, and most preferably the m-plane. According to embodiments of the present invention, even when the first crystalline oxide film has the above-described main surface, the crystallinity and semiconductor properties of the second crystalline oxide film formed on the first crystalline oxide film can be improved. Here, the main surface of the first crystalline oxide film refers to the surface on which the second crystalline oxide film is formed. Furthermore, the main surface of the crystalline oxide film includes surfaces that have an off-angle from the aforementioned surface. That is, for example, if the main surface is surface a, then the main surface includes surfaces that have an off-angle from surface a. The range of the off-angle is not particularly limited as long as it does not hinder the objective of the present invention. The range of the off-angle is, for example, within the range of 0.2° to 12.0°.

[0013] The first crystalline oxide film is not particularly limited as long as its main component is an oxide of one or more metals selected from aluminum, indium, and gallium, and its main surface is a surface inclined from the c-plane. In embodiments of the present invention, it is preferable that the first crystalline oxide film contains at least gallium. The crystal structure of the first crystalline oxide film is also not particularly limited as long as it does not hinder the objectives of the present invention. Examples of crystal structures of the first crystalline oxide film include a corundum structure, a β-gallia structure, a hexagonal structure (e.g., an ε-type structure), an orthorhombic structure (e.g., a κ-type structure), a cubic structure, or a tetragonal structure. In embodiments of the present invention, it is preferable that the first crystalline oxide film has a corundum structure. Furthermore, the thickness of the first crystalline oxide film is not particularly limited. The thickness of the first crystalline oxide film is, for example, 1 μm or more, and preferably 3 μm or more. Here, "main component" means, for example, that when the first crystalline oxide film contains α-Ga2O3 as the main component, gallium is present in the first crystalline oxide film at a ratio of 0.5 or more relative to all the metal elements contained in the first crystalline oxide film. In the embodiments of the present invention, it is preferable that the atomic ratio of gallium to all the metal elements contained in the first crystalline oxide film is 0.7 or more, and more preferably 0.9 or more.

[0014] The first crystalline oxide film may contain a dopant. Examples of the dopant include an n-type dopant or a p-type dopant. Examples of the n-type dopant include tin, germanium, silicon, titanium, zirconium, vanadium, or niobium. Examples of the p-type dopant include magnesium, hydrogen, lithium, sodium, potassium, rubidium, cesium, francium, beryllium, calcium, strontium, barium, radium, manganese, iron, cobalt, nickel, palladium, copper, silver, gold, zinc, cadmium, mercury, titanium, lead, nitrogen, and phosphorus. The concentration of the dopant in the first crystalline oxide is not particularly limited. The concentration of the dopant in the first crystalline oxide film is usually 1 × 10⁻⁶. 16 / cm3 ~1×10 22 / cm 3 is within the range. In an embodiment of the present invention, the concentration of the dopant in the first crystalline oxide film is 1×10 16 / cm 3 ~1×10 18 / cm 3 and it may be used as an n-type semiconductor layer or a p-type semiconductor layer. Also, the concentration of the dopant in the second crystalline oxide film is 1×10 18 / cm 3 or more, and it may be used as an n+-type semiconductor layer or a p+-type semiconductor layer.

[0015] The second crystalline oxide film contains a Group 9 metal of the periodic table as the first metal and a Group 13 metal of the periodic table as the second metal, and is not particularly limited as long as it is a concentration gradient film in which the concentration of the first metal changes with the film thickness. The "concentration gradient film" refers to a film that includes regions (hereinafter, also referred to as "concentration gradient regions") where the concentration of the first metal is continuously or discontinuously different in the film thickness direction. In an embodiment of the present invention, it is preferable that the concentration gradient region in which the concentration of the first metal in the second crystalline oxide film increases in the film thickness direction (towards the surface of the second crystalline oxide film) from the surface of the first crystalline oxide film is included. The film thickness direction refers to the Y direction in FIG. 12. The thickness of the concentration gradient region in the film thickness direction is not particularly limited. In an embodiment of the present invention, the thickness of the concentration gradient region in the film thickness direction is preferably 5 μm or less, and more preferably 3 μm or less. FIG. 13 shows a preferred embodiment of the concentration gradient region. FIGS. 13(a) to (d) show the relationship between the distance (horizontal axis) from the interface between the second crystalline oxide film and the first crystalline oxide film (the interface between 52 and 51 in FIG. 12) and the concentration of the first metal in the second crystalline oxide film (vertical axis). In an embodiment of the present invention, the concentration gradient region may be such that the concentration of the first metal changes linearly as shown in FIG. 13(a), or the concentration of the first metal may change stepwise as shown in FIG. 13(b). Also, as shown in FIG. 13(c) or FIG. 13(d), the concentration of the first metal may change quadratically or exponentially. The value of t1 in FIGS. 13(a), 13(c), and 13(d) is not particularly limited, but preferably satisfies, for example, 0 < t1 ≦ 2 μm. Also, the value of t2 in FIGS. 13(a), 13(c), and 13(d) is not particularly limited, but preferably satisfies, for example, t1 < t2 ≦ 3 μm. Also, the values of t1, t2, t3, and t4 in FIG. 13(b) are not particularly limited. In an embodiment of the present invention, preferably, for example, the values satisfy 0 < t1 ≦ 0.5 μm, t1 < t2 ≦ 1 μm, t2 < t3 ≦ 2 μm, and t3 < t4 ≦ 3 μm.Also, the values of x1, x2, x3, and x4 in FIG. 13(b) in this case preferably satisfy, for example, 0 < x1 < 0.25, x1 < x2 < 0.5, x2 < x3 < 0.75, and x3 < x4 ≦ 1.

[0016] In embodiments of the present invention, it is preferable that the second crystalline oxide film includes a first layer and a second layer having a higher concentration of the first metal than the first layer, and that the first layer is located on the first crystalline oxide film side in the film thickness direction compared to the second layer. An example of a laminated structure with such a preferred configuration is shown in Figure 14. In the laminated structure of Figure 14, a first layer 52a and a second layer 52b are formed in this order as a second crystalline oxide film 52 on the first crystalline oxide film 51. Here, the concentration of the first metal in the second layer 52b is greater than the concentration of the first metal in the first layer 52a. In this case, the concentration of the first metal relative to all metal elements in the first layer is not particularly limited as long as it does not hinder the objective of the present invention. In embodiments of the present invention, it is preferable that the concentration of the first metal relative to all metal elements in the first layer is 20% or less, and more preferably 10% or less. The lower limit of the concentration of the first metal relative to all metal elements in the first layer is not particularly limited, as long as it does not hinder the objective of the present invention. The lower limit of the concentration of the first metal is usually 1% or more, preferably 5% or more. Including such a preferred first layer can improve the crystallinity and semiconductor properties of the second layer. Furthermore, the concentration of the first metal relative to all metal elements contained in the second layer is preferably 10% or more, and also preferably 20% or more. Furthermore, the upper limit of the concentration of the first metal relative to all metal elements contained in the second layer is not particularly limited, as long as it does not hinder the objective of the present invention. The upper limit of the concentration of the first metal is usually 50% or less, preferably 30% or less. By having the second layer in such a preferred configuration, a second crystalline oxide film with a larger band gap (e.g., 5.0 eV or more) can be obtained. The concentration of the first metal can be measured, for example, using TEM-EDX (energy-dispersive X-ray spectroscopy) or SIMS (secondary ion mass spectrometry).

[0017] The atomic ratio of the Group 9 metal of the periodic table (hereinafter also simply referred to as "Group 9 metal") among all metal elements in the second crystalline oxide film is not particularly limited, as long as it does not hinder the objectives of the present invention. In embodiments of the present invention, the atomic ratio of the Group 9 metal is preferably 30% or less. Examples of Group 9 metals of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir). In embodiments of the present invention, it is preferable that the Group 9 metal is iridium. The term "periodic table" refers to the periodic table defined by the International Union of Pure and Applied Chemistry (IUPAC). The lower limit of the content (atomic ratio) of the Group 9 metal in the crystalline oxide film is not particularly limited, as long as it does not hinder the objectives of the present invention. In embodiments of the present invention, the content (atomic ratio) of the Group 9 metal in the second crystalline oxide film is usually 1% or more, and preferably 3% or more. Furthermore, the content (atomic ratio) of a Group 13 metal of the periodic table (hereinafter also simply referred to as "Group 13 metal") in the second crystalline oxide film is preferably 77% or more, and more preferably 90% or more. Examples of the Group 13 metal include aluminum (Al), gallium (Ga), and indium (In). In embodiments of the present invention, it is preferable that the Group 13 metal is gallium. The upper limit of the content (atomic ratio) of the second metal in the second crystalline oxide film is not particularly limited as long as it does not hinder the objective of the present invention. In embodiments of the present invention, the atomic ratio of the second metal in the second crystalline oxide film is, for example, 95% or less. By combining the above-mentioned preferred main surface with a preferred range of content ratios of such a second metal (e.g., gallium) and a Group 9 metal of the periodic table (e.g., iridium), a mixed crystal film of gallium oxide and a Group 9 metal oxide having a larger band gap (e.g., 5.0 eV or more) and a p-type conductivity can be obtained. The band gap of the crystalline oxide film is, for example, 4.7 eV or more, preferably 5.0 eV or more, and more preferably 5.1 eV or more.

[0018] The crystal structure of the second crystalline oxide film is not particularly limited, as long as it does not hinder the objectives of the present invention. Examples of crystal structures of the second crystalline oxide film include a corundum structure, a β-gallia structure, a hexagonal structure (e.g., ε-type structure), an orthorhombic structure (e.g., κ-type structure), a cubic structure, or a tetragonal structure. In the embodiments of the present invention, it is preferable that the second crystalline oxide film has a corundum structure. The film thickness of the second crystalline oxide film is not particularly limited, but in the embodiments of the present invention, it is preferable that the film thickness is 100 nm or more. The surface roughness of the second crystalline oxide film is also not particularly limited. In the embodiments of the present invention, it is preferable that the surface roughness (Ra) is 10 nm or less, and more preferably 5 nm or less. Here, the surface roughness (Ra) refers to a value obtained by calculating based on JIS B0601 using the surface shape measurement results for a 10 μm square region by atomic force microscopy (AFM). By achieving such desirable film thickness and surface roughness, even mixed crystal films can be more effectively applied to semiconductor devices and the like.

[0019] The first crystalline oxide film and / or the second crystalline oxide film of the present invention (hereinafter also simply referred to as "crystalline oxide film") is preferably obtained by the following method. The following description will be based on the case of forming the second crystalline oxide film, but the method can also be suitably used for forming the first crystalline oxide film. In an embodiment of the present invention, the method for producing a crystalline oxide film is characterized by using a cold-wall type mist CVD apparatus as shown in Figure 1, for example, to atomize a raw material solution containing a Group 9 metal of the periodic table (hereinafter also simply referred to as "Group 9 metal") and gallium, to suspend droplets and generate atomized droplets (including mist) (atomization step), transporting the atomized droplets to the surface of a substrate with a carrier gas (transportation step), and then forming a mixed crystal of a Group 9 metal oxide and gallium oxide on the surface of the substrate by thermal reaction of the atomized droplets (film formation step).

[0020] (Atomization process) The atomization step atomizes a raw material solution containing at least two metals, a Group 9 metal and gallium. The raw material solution may optionally contain other metals. The atomization method is not particularly limited as long as it can atomize the raw material solution, and any known method may be used, but in the present invention, an atomization method using ultrasound is preferred. The atomized droplets obtained using ultrasound are preferred because they have zero initial velocity and float in the air. For example, they are atomized droplets that can be transported as a gas while floating in space, rather than being sprayed, so there is no damage due to collision energy, making them very suitable. The size of the atomized droplets is not particularly limited and may be around a few millimeters, but is preferably 50 μm or less, and more preferably 100 nm to 10 μm.

[0021] (Raw material solution) The raw material solution is not particularly limited as long as it contains a Group 9 metal and gallium, and may contain inorganic materials or organic materials. Furthermore, the raw material solution may optionally contain other metals. If the raw material solution contains a Group 9 metal, gallium, and other metals, it is preferable that the other metals are Group 2 metals, Group 9 metals, and / or Group 13 metals other than gallium in the periodic table. Alternatively, the raw material solution may contain a Group 9 metal and gallium, or it may be divided into a raw material solution containing a Group 9 metal and a raw material solution containing gallium, each subjected to an atomization process, and then combined in a transport or film formation process to form atomized droplets containing a Group 9 metal and atomized droplets containing gallium obtained from each raw material solution. In embodiments of the present invention, a raw material solution can preferably be obtained by dissolving or dispersing a Group 9 metal and / or gallium in the form of a complex or salt in an organic solvent or water. Examples of complex forms include acetylacetonate complexes, carbonyl complexes, ammine complexes, and hydride complexes. Examples of salt forms include organometallic salts (e.g., metal acetates, metal oxalates, metal citrates, etc.), metal sulfide salts, metal nitrate salts, metal phosphorylate salts, and metal halide salts (e.g., metal chloride salts, metal bromide salts, metal iodide salts, etc.). Furthermore, the mist CVD method used in the embodiments of the present invention allows for suitable film formation even at low raw material concentrations.

[0022] The solvent of the raw material solution is not particularly limited and may be an inorganic solvent such as water, an organic solvent such as alcohol, or a mixed solution of an inorganic solvent and an organic solvent. In the present invention, unlike other conventional film-forming methods, it is preferable that the solvent contains water, and it is also preferable that it is a mixed solvent of water and acid. More specifically, the water may include, for example, pure water, ultrapure water, tap water, well water, mineral water, mineral water, hot spring water, spring water, fresh water, and seawater, but in the present invention, ultrapure water is preferred. More specifically, the acid may include, for example, organic acids such as acetic acid, propionic acid, and butanoic acid; boron trifluoride, boron trifluoride etherate, boron trichloride, boron tribromide, trifluoroacetic acid, trifluoromethanesulfonic acid, and p-toluenesulfonic acid, but in the embodiments of the present invention, acetic acid is preferred.

[0023] (Base) The substrate is not particularly limited as long as it can support the crystalline oxide film. The material of the substrate is also not particularly limited as long as it does not hinder the objective of the present invention, and may be a known substrate, an organic compound or an inorganic compound. The shape of the substrate may be any shape and is effective for all shapes, such as plates such as flat plates and discs, fibers, rods, cylinders, prismatics, tubes, spirals, spheres, and rings, but in the present invention, a substrate is preferred. The thickness of the substrate is not particularly limited in the present invention. Furthermore, as described later, other layers such as buffer layers may be laminated on the substrate. Semiconductor layers with different electrical conductivity may also be included as the substrate.

[0024] The substrate is plate-shaped and is not particularly limited as long as it serves as a support for the crystalline oxide film. It may be an insulating substrate, a semiconductor substrate, or a conductive substrate, but it is preferable that the substrate is an insulating substrate, and it is also preferable that the substrate has a metal film on its surface. Preferably, the substrate is a substrate having a corundum structure. The substrate material is not particularly limited as long as it does not hinder the objective of the present invention, and may be a known material. Examples of substrates having a corundum structure include a base substrate mainly composed of a substrate material having a corundum structure, and more specifically, examples include a sapphire substrate (preferably an m-plane sapphire substrate) and an α-type gallium oxide substrate. Here, "main component" means that the substrate material having the specific crystalline structure is preferably contained in an atomic ratio of 50% or more, more preferably 70% or more, and even more preferably 90% or more of the total components of the substrate material, and may be 100%.

[0025] (Conveying process) In the transport process, the mist is transported to the substrate by the carrier gas. The type of carrier gas is not particularly limited as long as it does not hinder the objective of the present invention. Examples include oxygen, ozone, inert gases such as nitrogen and argon, or reducing gases such as hydrogen gas and foaming gas. However, in the present invention, it is preferable to use oxygen as the carrier gas. Examples of carrier gases using oxygen include air, oxygen gas, and ozone gas, but oxygen gas and / or ozone gas are particularly preferred. In addition, there may be one type of carrier gas, or there may be two or more types. Dilution gases with varying carrier gas concentrations (e.g., 10-fold dilution gases) may also be used as a second carrier gas. Furthermore, there may be not just one but two or more locations for supplying the carrier gas. In the present invention, when using an atomization chamber, a supply pipe, and a film formation chamber, it is preferable to provide a carrier gas supply location in the atomization chamber and the supply pipe, respectively. It is more preferable to provide a carrier gas supply location in the atomization chamber and a dilution gas supply location in the supply pipe. Furthermore, the flow rate of the carrier gas is not particularly limited, but is preferably 0.01 to 20 L / min, and more preferably 1 to 10 L / min. In the case of a diluent gas, the flow rate of the diluent gas is preferably 0.001 to 5 L / min, and more preferably 0.1 to 3 L / min.

[0026] (Film forming process) In the film formation step, the mist is reacted near the substrate surface to form a film on part or all of the substrate surface. The thermal reaction is not particularly limited as long as it is a thermal reaction in which a film is formed from the atomized droplets; it is sufficient if the mist reacts with heat, and the reaction conditions are not particularly limited as long as they do not hinder the objective of the present invention. In this step, the thermal reaction is usually carried out at a temperature above the evaporation temperature of the solvent, but it is preferable that the temperature is not too high. In the present invention, it is preferable that the thermal reaction be carried out at 1200°C or lower, more preferably at a temperature of 300°C to 700°C or 750°C to 1200°C, and most preferably at 350°C to 600°C or 750°C to 1100°C. Furthermore, the thermal reaction may be carried out under any atmosphere, such as vacuum, non-oxygen atmosphere, reducing gas atmosphere, or oxidizing atmosphere, as long as it does not hinder the objective of the present invention, and may also be carried out under any conditions, such as atmospheric pressure, pressurized pressure, or reduced pressure. However, in the present invention, it is preferable to carry out the reaction under an oxidizing atmosphere, also preferable to carry out the reaction under atmospheric pressure, and more preferable to carry out the reaction under both an oxidizing atmosphere and atmospheric pressure. Note that the "oxidizing atmosphere" is not particularly limited as long as it is an atmosphere in which the crystalline oxide film can be formed by the thermal reaction. For example, an oxidizing atmosphere can be created by using a carrier gas containing oxygen or by using a mist consisting of a raw material solution containing an oxidizing agent. The film thickness can be set by adjusting the film formation time, and in the present invention, the film thickness is preferably 1 nm to 1 mm, more preferably 1 nm to 100 μm because it further improves semiconductor properties, and most preferably 1 nm to 10 μm.

[0027] In embodiments of the present invention, the film may be formed directly on the substrate, or other layers such as a semiconductor layer (e.g., an n-type semiconductor layer, an n+-type semiconductor layer, an n--type semiconductor layer, etc.), an insulating layer (including a semi-insulating layer), or a buffer layer may be laminated on the substrate before the film is formed on the substrate via the other layers. Examples of semiconductor layers and insulating layers include semiconductor layers and insulating layers containing the group 13 metal. Suitable examples of buffer layers include semiconductor layers, insulating layers, or conductive layers containing a corundum structure. Examples of semiconductor layers containing a corundum structure include α-Fe2O3, α-Ga2O3, and α-Al2O3. The method for laminating the buffer layer is not particularly limited and may be the same as the method for forming the p-type oxide semiconductor.

[0028] In this embodiment of the present invention, it is preferable to form the first crystalline oxide film as an n-type semiconductor layer before or after the formation of the second crystalline oxide film. More specifically, it is preferable that the method for manufacturing the semiconductor device includes a step of stacking at least the first crystalline oxide film (p-type semiconductor layer) and the n-type semiconductor layer (first crystalline oxide film). The method for forming the n-type semiconductor layer is not particularly limited and may be a known method, but in this invention, the mist CVD method described above is preferred.

[0029] The specific laminated structure obtained by the above-described preferred manufacturing method is industrially useful, and the second crystalline oxide film exhibits excellent semiconductor properties. According to the above-described preferred manufacturing method, a laminated structure comprising the second crystalline oxide film having a p-type conductivity and the first crystalline oxide film can be obtained, where "p-type" refers to the carrier type determined by Hall effect measurement, scanning capacitance microscopy (SCM), scanning nonlinear dielectric microscopy (SNDM), etc. The lower limit of the carrier density of the second crystalline oxide film (carrier density in the semiconductor film obtained by Hall effect measurement) is not particularly limited, but is approximately 1.0 × 10⁻⁶.15 / cm 3 The above is preferable, approximately 1.0 × 10 18 / cm 3 The above is more preferable. In the embodiment of the present invention, even when a Group 9 metal of the periodic table is included, the carrier density is 5.0 × 10 19 / cm 3 A second crystalline oxide film having the following characteristics and a p-type conductivity can be obtained. In particular, by setting the Ir ratio in the metal elements of the film to 10% or less, a crystalline oxide film with the above-mentioned desirable carrier density can be obtained. Furthermore, in this embodiment of the present invention, by setting the Ir ratio in the metal elements of the film to 9.5% or less, the carrier density is 2.0 × 10⁻⁶. 19 / cm 3 The following crystalline oxide film is obtained. The lower limit of the Ir ratio in the metal elements in the film is not particularly limited, but for example, it is 5% or more, and preferably 6.8% or more.

[0030] Below, as a reference example, we will describe an example in which the first layer of the laminated structure shown in Figure 14 is formed on a first crystalline oxide film.

[0031] In this reference example, following the manufacturing method described above, an α-(Ir,Ga)2O3 film was deposited on a sapphire substrate on which an m-plane α-Ga2O3 film, as a first crystalline oxide film, had been formed on the surface using mist CVD as shown in Figure 1. An α-(Ir,Ga)2O3 film was then deposited as the first layer of a second crystalline oxide film. The iridium content ratio in the film was varied during deposition to obtain α-(Ir,Ga)2O3 films with the properties shown in Table 1. The results of X-ray diffraction measurements for the film of Reference Example 2 are shown in Figure 15. The Ir ratio in the film was calculated using energy-dispersive X-ray spectroscopy (EDS). The carrier type was confirmed by Hall effect measurement. The carrier density of the crystalline oxide film obtained in Reference Example 2 was 1.0 × 10⁻⁶. 17 / cm 3The surface roughness (Ra) was 1.2 nm. Cross-sectional TEM (transmission electron microscope) observation revealed that a good film-like α-(Ir,Ga)2O3 was obtained. The temperature characteristics were confirmed by measuring the temperature dependence of the resistivity. In Reference Example 1, the results for surface roughness (Ra), etc., were the same as those for Reference Example 2. The temperature dependence of the resistivity for Reference Examples 1 to 3, measured in the range from room temperature to 250°C, is shown in Figures 2, 3, and 4, respectively. From these results for Reference Examples 1 to 4, it can be seen that by depositing an α-(Ir,Ga)2O3 film with an Ir ratio of 10% or less as the first layer, and an α-(Ir,Ga)2O3 film with a higher Ir ratio than the first layer as the second layer, a second crystalline oxide film with better crystallinity and usefulness as a p-type semiconductor layer can be obtained. This phenomenon is unique to planes inclined from the c-plane (such as the m-plane), and it is a new finding that was only revealed after actually fabricating an α-(Ir,Ga)2O3 film on an α-Ga2O3 film on the m-plane. Furthermore, in order to confirm reproducibility, further experiments were conducted, and it was confirmed that the same carrier type, temperature characteristics of resistivity, and surface roughness (Ra) as in Reference Examples 1 and 2 were obtained when the Ir ratio in the metal elements of the film was 9.5%, 11.7%, and 14.3%. Note that when the Ir ratio in the metal elements of the film was 9.5%, the carrier density was 1.98 × 10⁻⁶. 19 / cm 3 That was the case.

[0032] [Table 1]

[0033] In embodiments of the present invention, the first crystalline oxide film and the second crystalline oxide film may be formed such that the Ir ratio of the second layer is greater than that of the first layer. The relationship between the film depth and the Ir ratio (Ir / (Ga+Ir)) in the film (%) when the films are formed in this manner is shown in Figure 16 as Reference Examples 5 and 6.

[0034] The second crystalline oxide film of the multilayer structure obtained as described above can be used in semiconductor devices, for example, as a p-type semiconductor layer, and is particularly useful in power devices. By using the crystalline oxide film and / or multilayer structure in a semiconductor device, roughness scattering can be suppressed, and the channel mobility of the semiconductor device can be improved. Semiconductor devices can be classified into lateral devices, in which electrodes are formed on one side of the semiconductor layer, and vertical devices, in which electrodes are formed on both the front and back sides of the semiconductor layer. In the present invention, it can be suitably used in both lateral and vertical devices, but it is especially preferable to use it in vertical devices. Examples of the semiconductor device include Schottky barrier diodes (SBDs), junction barrier Schottky diodes (JBSs), metal-semiconductor field-effect transistors (MESFETs), high electron-mobility transistors (HEMTs), metal-oxide-semiconductor field-effect transistors (MOSFETs), electrostatic induction transistors (SITs), junction field-effect transistors (JFETs), insulated-gate bipolar transistors (IGBTs), and light-emitting diodes.

[0035] Figures 5 to 7 show an example in which the second crystalline oxide film of the stacked structure is used as a p-type semiconductor layer. The n-type semiconductor layer may have the same main components as the second crystalline oxide film and contain an n-type dopant, or it may be an n-type semiconductor layer with different main components from the crystalline oxide film. In this embodiment of the present invention, it is preferable that the n-type semiconductor layer has different main components from the crystalline oxide film. The first crystalline oxide film may be used as the n-type semiconductor layer. Furthermore, the n-type semiconductor can be used as an n-type semiconductor layer, an n+-type semiconductor layer, etc., by adjusting the content of the n-type dopant, for example.

[0036] Figure 5 shows an example of a preferred semiconductor device of the present invention. The semiconductor device in Figure 5 is a metal-oxide-semiconductor field-effect transistor (MOSFET) and comprises an n+ type semiconductor layer (drain layer) 1, an n- type semiconductor layer (drift layer) 2, a p+ type semiconductor layer (deep p layer) 6, a p- type semiconductor layer (channel layer) 7, an n+ type semiconductor layer (n+ source layer) 11, a gate insulating film 13, a gate electrode 3, a p+ type semiconductor layer 16, a source electrode 24, and a drain electrode 26. At least a portion of the p+ type semiconductor layer (deep p layer) 6 is embedded in the n- type semiconductor layer 2 to a position deeper than the lower embedded end 3a of the gate electrode 3. In the ON state of the semiconductor device in Figure 5, when a voltage is applied between the source electrode 24 and the drain electrode 26, and a positive voltage is applied to the gate electrode 3 relative to the source electrode 24, a channel is formed at the interface between the p- type semiconductor layer 7 and the gate insulating film 13, and the device turns on. The off state is achieved by setting the voltage of the gate electrode 3 to 0V, which prevents the channel from forming and turns off the device. In addition, in the semiconductor device shown in Figure 5, the p+ type semiconductor layer 6 is embedded deeper in the n- type semiconductor layer 2 than the gate electrode 3. This configuration allows for the mitigation of the electric field near the bottom of the gate electrode, resulting in a better electric field distribution in the gate insulating film 13 and the n- type semiconductor layer 2. In this invention, it is preferable to use the crystalline oxide film as the p+ type semiconductor layer (deep p layer) 6.

[0037] The materials of the gate electrode, source electrode, and drain electrode (hereinafter also simply referred to as "electrodes") are not particularly limited as long as they can be used as electrodes, and may be conductive inorganic materials or conductive organic materials. In the present invention, it is preferable that the material of the electrodes is a metal, a metal compound, a metal oxide, or a metal nitride. Suitable metals include, for example, at least one metal selected from groups 4 to 11 of the periodic table. Examples of metals from group 4 of the periodic table include titanium (Ti), zirconium (Zr), and hafnium (Hf). Examples of metals from group 5 of the periodic table include vanadium (V), niobium (Nb), and tantalum (Ta). Examples of metals from group 6 of the periodic table include one or more metals selected from chromium (Cr), molybdenum (Mo), and tungsten (W). Examples of metals in Group 7 of the periodic table include manganese (Mn), technetium (Tc), and rhenium (Re). Examples of metals in Group 8 of the periodic table include iron (Fe), ruthenium (Ru), and osmium (Os). Examples of metals in Group 9 of the periodic table include cobalt (Co), rhodium (Rh), and iridium (Ir). Examples of metals in Group 10 of the periodic table include nickel (Ni), palladium (Pd), and platinum (Pt). Examples of metals in Group 11 of the periodic table include copper (Cu), silver (Ag), and gold (Au).

[0038] Examples of means for forming the electrodes include known methods, and more specifically, dry methods and wet methods. Examples of dry methods include known methods such as sputtering, vacuum deposition, and CVD. Examples of wet methods include screen printing and die coating.

[0039] The constituent material of the gate insulating film (interlayer insulating film) is not particularly limited and may be a known material. Examples of materials for the gate insulating film include SiO2 film, SiON film, AlON film, AlN film, Al2O3 film, HfO2 film, phosphorus-doped SiO2 film (PSG film), boron-doped SiO2 film, phosphorus-boron-doped SiO2 film (BPSG film), etc. Examples of methods for forming the gate insulating film include CVD method, atmospheric pressure CVD method, plasma CVD method, ALD method, mist CVD method, etc. In this embodiment of the present invention, it is preferable that the method for forming the gate insulating film is mist CVD method or atmospheric pressure CVD method. Furthermore, the constituent material of the gate electrode is not particularly limited and may be a known electrode material. Examples of constituent materials for the gate electrode include the constituent materials of the source electrode described above. The method for forming the gate electrode is not particularly limited. Specific examples of methods for forming the gate electrode include dry methods and wet methods. Examples of dry methods include sputtering, vacuum deposition, and CVD. Examples of wet methods include screen printing and die coating. The materials of the n+-type semiconductor layer 1 and the n--type semiconductor layer 2 may be the same as the materials of the n-type semiconductor layer described above.

[0040] The means for forming each layer of the semiconductor device shown in Figure 5 are not particularly limited as long as they do not hinder the objective of the present invention, and may be known means. For example, means of forming a film by vacuum deposition, CVD, sputtering, various coating techniques, etc., followed by patterning by photolithography, or means of directly patterning using printing technology, etc., but in the present invention, mist CVD is preferred.

[0041] Figure 6 shows another example of a preferred semiconductor device of the present invention. The semiconductor device in Figure 6 is a metal-oxide-semiconductor field-effect transistor (MOSFET), and differs from the semiconductor device in Figure 6 in that an i-type semiconductor layer 28 is provided between a p+-type semiconductor layer (deep p-layer) 6 and an n-type semiconductor layer (drift layer) 2. The i-type semiconductor layer 28 is not particularly limited as long as it has a carrier density lower than that of the n-type semiconductor layer 2. In this embodiment of the present invention, it is preferable to use the crystalline oxide film as the p+-type semiconductor layer 6. In this embodiment of the present invention, it is preferable that the main component of the i-type semiconductor layer 28 is the same as the main component of the n-type semiconductor layer 2.

[0042] Figure 7 shows another example of a preferred semiconductor device of the present invention. The semiconductor device in Figure 7 is a metal-oxide-semiconductor field-effect transistor (MOSFET) and differs from the semiconductor device in Figure 6 in that it has a p-type semiconductor layer 27 near the gate bottom. Preferably, the p-type semiconductor layer 27 mainly contains a p-type oxide semiconductor that is different from the p-type oxide semiconductor that is the main component of the p-type semiconductor layer (channel layer) 7. In the present invention, the main component of the p-type semiconductor layer 27 may be the same as that of the p+-type semiconductor layer 6.

[0043] In addition to the matters described above, the semiconductor device of the present invention can be suitably used as a power module, inverter, or converter by known methods, and can also be suitably used in semiconductor systems, for example, using a power supply device. The power supply device can be manufactured by connecting the semiconductor device to a wiring pattern, etc., using known methods. Figure 9 shows an example of a power supply system. Figure 9 shows a power supply system 170 configured using a plurality of the power supply devices 171, 172 and a control circuit 173. The power supply system 170 can be used in a system device 182 in combination with an electronic circuit 181, as shown in Figure 10. An example of a power supply circuit diagram for a power supply device is shown in Figure 11. Figure 11 shows a power supply circuit for a power supply device consisting of a power circuit and a control circuit. The inverter 192 (composed of MOSFETs A to D) switches the DC voltage at high frequency and converts it to AC, then the transformer 193 performs isolation and voltage transformation, the rectifier MOSFET 194 rectifies the voltage, and then the DC voltage is output by DCL 195 (smoothing coils L1, L2) and a capacitor. At this time, the voltage comparator 197 compares the output voltage with a reference voltage, and the PWM control circuit 196 controls the inverter 192 and rectifier MOSFET 194 to obtain the desired output voltage.

[0044] In the present invention, the semiconductor device is preferably a power card, and includes a cooler and an insulating member. It is more preferable that the cooler is provided on both sides of the semiconductor layer, at least via the insulating member. It is most preferable that a heat dissipation layer is provided on both sides of the semiconductor layer, and the cooler is provided on the outside of the heat dissipation layer, at least via the insulating member. Figure 8 shows a power card, which is one of the preferred embodiments of the present invention. The power card in Figure 8 is a double-sided cooling type power card 201, and comprises a coolant tube 202, a spacer 203, an insulating plate (insulating spacer) 208, a sealing resin part 209, a semiconductor chip 301a, a metal heat transfer plate (protruding terminal part) 302b, a heat sink and electrode 303, a metal heat transfer plate (protruding terminal part) 303b, a solder layer 304, a control electrode terminal 305, and a bonding wire 308. The thickness-direction cross-section of the coolant tube 202 has a large number of flow paths 222 partitioned by a large number of partition walls 221 that extend in the flow direction at predetermined intervals from each other. Such a suitable power card allows for better heat dissipation and thus higher reliability.

[0045] The semiconductor chip 301a is joined to the inner main surface of the metal heat transfer plate (protruding terminal portion) 302b by a solder layer 304, and the remaining main surface of the semiconductor chip 301a is joined to the metal heat transfer plate (protruding terminal portion) 303b by a solder layer 304, thereby connecting the collector electrode surface and emitter electrode surface of the IGBT to the anode electrode surface and cathode electrode surface of the flywheel diode 301b in so-called antiparallel connection. Examples of materials for the metal heat transfer plates (protruding terminal portions) 302b and 303b include Mo or W. The metal heat transfer plates (protruding terminal portions) 302b and 303b have a thickness difference that absorbs the thickness difference between the semiconductor chips 301a and 301b, so that the outer surfaces of the metal heat transfer plates 302b and 303b are flat.

[0046] The resin encapsulation portion 209 is made of, for example, epoxy resin and is molded to cover the sides of the metal heat transfer plates 302b and 303b, and the semiconductor chip 301a and flywheel diode 301b are molded in the resin encapsulation portion 209. However, the outer main surface, i.e., the contact heat receiving surface, of the metal heat transfer plates 302b and 303b is completely exposed. The metal heat transfer plates (protruding terminal portions) 302b and 303b protrude to the right in Figure 8 from the resin encapsulation portion 209, and the control electrode terminal 305, which is a so-called lead frame terminal, connects the gate (control) electrode surface of the semiconductor chip 301a on which the IGBT is formed, for example, to the control electrode terminal 305.

[0047] The insulating spacer, the insulating plate 208, is made of, for example, an aluminum nitride film, but other insulating films may be used. The insulating plate 208 completely covers and tightly adheres to the metal heat transfer plates 302b and 303b, but the insulating plate 208 and the metal heat transfer plates 302b and 303b may simply be in contact, or a good heat transfer material such as silicone grease may be applied, or they may be joined by various methods. Alternatively, an insulating layer may be formed by ceramic spraying or the like, the insulating plate 208 may be joined to the metal heat transfer plates, or it may be joined or formed on the refrigerant tubes.

[0048] The refrigerant tube 202 is manufactured by cutting a sheet material formed from an aluminum alloy by drawing or extrusion molding to the required length. The cross-section in the thickness direction of the refrigerant tube 202 has many flow channels 222 partitioned by a number of partition walls 221 that extend in the flow direction at predetermined intervals from each other. The spacer 203 may be a soft metal plate such as a solder alloy, but it may also be a film (membrane) formed by coating or the like on the contact surface of the metal heat transfer plates 302b and 303b. The surface of this soft spacer 203 deforms easily and conforms to minute irregularities and warping of the resin sealing portion 209 and minute irregularities and warping of the refrigerant tube 202, thereby reducing thermal resistance. Note that a known good thermal conductivity grease may be applied to the surface of the spacer 203, and the spacer 203 may be omitted. [Industrial applicability]

[0049] The crystalline oxide film in the embodiment of the present invention can be used in a wide range of fields, including semiconductors (e.g., compound semiconductor electronic devices), electronic components, electrical equipment components, optical and electrophotographic equipment, and industrial materials. However, because it exhibits excellent p-type semiconductor properties, it is particularly useful for semiconductor devices. [Explanation of Symbols]

[0050] 1 n+ type semiconductor layer 2 n-type semiconductor layer (drift layer) 3. Foodstuffs 3a Buried lower end 6. p+ type semiconductor layer (deep p layer) 7 p-type semiconductor layer (channel layer) 11 n+ type semiconductor layer 13 Gate insulating film 16 p+ type semiconductor layer 24 Source electrodes 26 Drain electrode 27 p-type semiconductor layer 28 i-type semiconductor layer 29. Mist CVD apparatus 30 circuit boards 32a Carrier gas supply device 32b Carrier gas (dilution) supply device 33a Flow control valve 33b Flow control valve 34. Mist Source 34a Raw material solution 34b Mist 35 Container 35a water 36. Ultrasonic transducer 37 Supply pipe 38 Heater 40 Deposition chamber 51 First crystalline oxide film 52 Second crystalline oxide film 52a First layer 52b Second layer 170 Power Systems 171 Power supply 172 Power supply 173 Control circuits 180 System Devices 181 Electronic circuit 182 Power Systems 192 Inverter 193 Transformer 194 Rectifier MOSFET 195 DCL 196 PWM control circuit 197 Voltage comparator 201 Double-sided cooling power card 202 Refrigerant Tube 203 Spacer 208 Insulating plate (insulating spacer) 209 Sealing resin part 221 Bulkhead 222 Channel 301a Semiconductor Chip 301b flywheel diode 302b Metal heat transfer plate (protruding terminal portion) 303 Heat sink and electrodes 303b Metal heat transfer plate (protruding terminal portion) 304 solder layer 305 Control electrode terminal 308 Bonding Wire

Claims

1. A laminated structure comprising at least a first crystalline oxide film mainly composed of an oxide of one or more metals selected from aluminum, indium, and gallium, and a second crystalline oxide film formed on the first crystalline oxide film, wherein the main surface of the first crystalline oxide film is a surface inclined from the c-plane, and the second crystalline oxide film contains at least a Group 9 metal of the periodic table as the first metal and a Group 13 metal of the periodic table as the second metal, and is a concentration gradient film in which the concentration of the first metal changes in the direction of film thickness.

2. The laminated structure according to claim 1, wherein the main surface of the first crystalline oxide film is a surface perpendicular to the c-plane.

3. The laminated structure according to claim 1, wherein the main surface of the first crystalline oxide film is the m-plane.

4. The laminated structure according to any one of claims 1 to 3, wherein the first crystalline oxide film comprises at least gallium.

5. The laminated structure according to any one of claims 1 to 3, wherein the first metal includes iridium.

6. The laminated structure according to any one of claims 1 to 3, wherein the second metal includes gallium.

7. The laminated structure according to any one of claims 1 to 3, wherein the concentration of the first metal in the second crystalline oxide film increases from the surface of the first crystalline oxide film in the direction of the film thickness of the second crystalline oxide film.

8. The laminated structure according to any one of claims 1 to 3, wherein the second crystalline oxide film includes a first layer and a second layer having a higher concentration of the first metal than the first layer, and the first layer is located on the first crystalline oxide film side in the film thickness direction than the second layer.

9. The laminated structure according to claim 8, wherein the concentration of the first metal in all metal elements in the first layer is 10% or less.

10. The laminated structure according to claim 8, wherein the concentration of the first metal among all the metal elements contained in the second layer is 10% or more.

11. A semiconductor device comprising at least a laminated structure according to any one of claims 1 to 3 and an electrode.

12. A semiconductor device according to claim 11, which is a power device.

13. A semiconductor system comprising a semiconductor device, wherein the semiconductor device is the semiconductor device described in claim 11.

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