Device, program and method for designing filter suppressing higher harmonic waves

Abstract

To improve the quality of a filter which suppresses higher harmonic waves.SOLUTION: A processing unit 100 of a device 1 determines a circuit constant of a filter by optimizing an index value relating to the quality. The processing unit 100 calculates a first higher harmonic wave distortion of a circuit including a power converter and a filter having a first circuit constant and, with respect to the first circuit constant in a case where a first condition indicating that the first higher harmonic wave distortion is smaller than a limit value determined in a predetermined reference is established, determines whether or not there is a second higher harmonic wave distortion larger than the limit value in at least one second higher harmonic wave distortion corresponding to at least one second circuit constant within a reference range including the first circuit constant.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present disclosure relates to an apparatus, program, and method for designing filters that suppress harmonics. [Background technology]

[0002] Conventionally, configurations for designing filters that suppress harmonics (harmonic suppression filters) are known. For example, Japanese Patent No. 6272396 (Patent Document 1) discloses a design method for a double-tuned filter for a high-voltage DC transmission system. According to the design method of Patent Document 1, it is possible to realize a double-tuned filter for a high-voltage DC transmission system having an optimal R, L, and C combination that satisfies the harmonic voltage regulation value and the harmonic current allowable level, taking into consideration efficiency and reduction of harmonics. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6272396 Summary of the Invention [Problem to be solved by the invention]

[0004] A harmonic suppression filter can be optimized by selecting the circuit constants of the harmonic suppression filter so that index values ​​related to the quality of the harmonic suppression filter (for example, voltage distortion, current distortion, manufacturing cost, circuit constant values, or power loss) become desired values. However, even if a harmonic suppression filter is manufactured based on the optimization of the harmonic suppression filter, the optimal circuit constants may not be realized in the actual harmonic suppression filter due to various factors (for example, manufacturing errors (manufacturing variations) or deterioration over time). In such cases, the actually manufactured harmonic suppression filter may not have the quality expected from the optimal circuit constants, and may not satisfy predetermined standards related to harmonics (for example, "Harmonic Suppression Guidelines for Consumers Receiving Electricity at High Voltage or Extra High Voltage").

[0005] Patent Document 1 discloses optimizing an L,C combination case to reduce harmonics, but does not take into consideration the fact that optimal circuit constants are not realized in an actually manufactured harmonic suppression filter based on the optimization of the harmonic suppression filter.

[0006] The present disclosure has been made to solve the above-mentioned problems, and has an object to improve the quality of filters that suppress harmonics. [Means for solving the problem]

[0007] An apparatus according to one aspect of the present disclosure is an apparatus for designing a filter that suppresses harmonics generated from a power converter. The apparatus includes a processing unit and a storage unit. The processing unit determines a circuit constant of the filter by optimizing an index value related to the quality of the filter. The storage unit stores a first processing result of the optimization. The processing unit calculates a first harmonic distortion of a circuit including a power converter and a filter having a first circuit constant, and performs a specific process for determining whether or not there is a second harmonic distortion greater than a limit value among at least one second harmonic distortion corresponding to at least one second circuit constant within a reference range including the first circuit constant, for the first circuit constant when a first condition indicating that the first harmonic distortion is smaller than a limit value set in a predetermined criterion is satisfied, and adds the first circuit constant to the first processing result when a second condition indicating that there is no second harmonic distortion greater than the limit value among the at least one second harmonic distortion is satisfied.

[0008] A program according to another aspect of the present disclosure is a program for designing a filter that suppresses harmonics generated from a power converter. When executed by a processing circuit, the program causes the processing circuit to determine a circuit constant of the filter by optimizing an index value related to the quality of the filter, to calculate a first harmonic distortion of a circuit including the power converter and a filter having a first circuit constant, to perform a specification process for determining whether or not there is a second harmonic distortion greater than a limit value among at least one second harmonic distortion corresponding to at least one second circuit constant in a reference range including the first circuit constant when a first condition indicating that the first harmonic distortion is smaller than a limit value set in a predetermined criterion is satisfied, and to add the first circuit constant to a result of the optimization process when a second condition indicating that there is no second harmonic distortion greater than the limit value among the at least one second harmonic distortion is satisfied.

[0009] A method according to another aspect of the present disclosure is a method for designing a filter that suppresses harmonics generated from a power converter, the method including: determining a circuit constant of the filter by optimizing an index value related to the quality of the filter; calculating a first harmonic distortion of a circuit including the power converter and a filter having a first circuit constant; performing a specification process for determining whether or not at least one second harmonic distortion corresponding to at least one second circuit constant in a reference range including the first circuit constant has a second harmonic distortion greater than a limit value when a first condition indicating that the first harmonic distortion is smaller than a limit value set in a predetermined criterion is satisfied; and adding the first circuit constant to a result of the optimization process when a second condition indicating that there is no second harmonic distortion greater than the limit value among the at least one second harmonic distortion is satisfied. Effect of the Invention

[0010] According to the device, program, and method disclosed herein, for a first circuit constant when a first condition is satisfied indicating that the first harmonic distortion is smaller than a limit value set in a predetermined criterion, it is possible to improve the quality of a filter that suppresses harmonics by determining whether or not there is a second harmonic distortion greater than a limit value among at least one second harmonic distortion corresponding to at least one second circuit constant within a reference range that includes the first circuit constant. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram illustrating an example of a configuration in which a filter device serving as a harmonic suppression filter is arranged. [Diagram 2] FIG. 2 is a block diagram of an equivalent circuit of the arrangement of FIG. 1 for simulating voltage and current distortion at the interconnection point of FIG. 1. [Diagram 3] 2 is a diagram illustrating an example of a circuit configuration of the filter device of FIG. 1. [Figure 4] 1. FIG. 4 is a diagram showing another example of the circuit configuration of the filter device of FIG. [Diagram 5] 1. FIG. 4 is a diagram showing another example of the circuit configuration of the filter device of FIG. [Figure 6] 2 is a block diagram showing a configuration of an information processing device 1 according to a first embodiment, for designing a filter device 140 in FIG. [Figure 7] FIG. 7 illustrates an example of a hardware configuration of the information processing device 1 in FIG. [Figure 8] 8 is a flowchart showing an example of the flow of an optimization calculation process performed by a processing circuit 11 that executes the filter design program Pg of FIG. 7. [Figure 9] 9 is a flowchart showing an example of a specific process flow of the likelihood evaluation process S12 in FIG. 8. [Figure 10] 13 is a block diagram showing a configuration of an information processing device 2 according to a second embodiment, for designing a filter device 140 in FIG. [Figure 11] 11 is a diagram illustrating an example of a hardware configuration of the information processing device 2 in FIG. [Figure 12] 12 is a flowchart showing an example of the flow of an optimization calculation process performed by a processing circuit 11 that executes the filter design program Pg1 of FIG. [Figure 13] 12 is a flowchart showing an example of the flow of likelihood evaluation processing performed by the processing circuit 11 that executes the likelihood evaluation program Pg2 of FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference characters, and their description will not be repeated in principle.

[0013] FIG. 1 is a diagram showing an example of a configuration in which a filter device 140 serving as a harmonic suppression filter is arranged. As shown in FIG. 1, the configuration includes an upper system 110, a power converter 120, a transformer 130, a filter device 140, and a load 900. The upper system 110 is an AC power system and is connected to an interconnection point Pic. The transformer 130 is connected between the interconnection point Pic and the power converter 120. The load 900 is connected to the interconnection point Pic. The filter device 140 includes a harmonic suppression filter and is connected to a connection line 150 that connects the power converter 120 and the transformer 130. The power converter 120 is, for example, an AC / DC converter.

[0014] Filter device 140 reduces the voltage distortion and current distortion of harmonics from power converter 120 so that the voltage distortion (total voltage distortion rate) and current distortion (total current distortion rate) at interconnection point Pic fall within the range of guideline values ​​(limit values) defined in a predetermined standard for harmonics (for example, "Harmonic Suppression Guidelines for Consumers Receiving High Voltage or Extra High Voltage Power"). As the range of the limit values, for example, a range of 5% or less for voltage distortion and a range of 5% or less for current distortion are used.

[0015] 2 is a block diagram of an equivalent circuit 200 of the configuration of FIG. 1 for simulating voltage distortion and current distortion at the interconnection point Pic of FIG. 1. In FIG. n is the frequency ν n represents the n-th order angular velocity corresponding to the harmonic with (ω n =2πν n ). Frequency ν n is a frequency that is n times (n is a natural number) the fundamental frequency ν1 (for example, 50 Hz or 60 Hz).

[0016] 1 and 2, the equivalent circuit 200 includes a system characteristic circuit 210, a converter characteristic circuit 220, a transformer characteristic circuit 230, a filter characteristic circuit 240, and a voltage characteristic circuit 250. The system characteristic circuit 210, the converter characteristic circuit 220, the transformer characteristic circuit 230, and the filter characteristic circuit 240 correspond to the upper system 110, the power converter 120, the transformer 130, and the filter device 140 in FIG. 1, respectively.

[0017] The grid characteristic circuit 210 and the voltage characteristic circuit 250 are connected to a ground point. The transformer characteristic circuit 230 and the converter characteristic circuit 220 are connected in series between the grid characteristic circuit 210 and the voltage characteristic circuit 250 in this order. The filter characteristic circuit 240 is connected to a connection line connecting the transformer characteristic circuit 230 and the converter characteristic circuit 220. A connection node Nic between the grid characteristic circuit 210 and the transformer characteristic circuit 230 corresponds to the interconnection point Pic in FIG. 1.

[0018] Since the power converter 120 is a source of harmonics, the output voltage characteristics of the power converter 120 are simulated and used as the voltage source of the equivalent circuit 200. That is, in the equivalent circuit 200, a voltage characteristic circuit 250 simulates the voltage characteristics Vc(ω n ) is output. Voltage characteristic Vc(ω n ) is the angular velocity ω n Depending on the input voltage, a voltage of different magnitude is output.

[0019] The grid characteristic circuit 210, the converter characteristic circuit 220, the transformer characteristic circuit 230, and the filter characteristic circuit 240 are configured to calculate the angular velocity ω n The impedance f1(ω n ),f2(ω n ),f3(ω n ),f4(ω n ) respectively.

[0020] Since the voltage is different between the side (high voltage side) of the transformer characteristic circuit 230 connected to the grid characteristic circuit 210 and the side (low voltage side) of the transformer characteristic circuit 230 connected to the converter characteristic circuit 220, the impedance is generally expressed in units. n ) is a composite value of the impedances of a plurality of circuit elements included in the filter device 140. The impedance f1(ω n ) is a value obtained by combining the rear impedance, the power transmission impedance, etc. The side (power supply side) of the system characteristic circuit 210 connected to the ground point corresponds to, for example, the power supply of a power company that supplies power to the upper system 110 in FIG. 1. The voltage distortion THD (Total Harmonic Distortion)_V and the current distortion THD_I at the connection node Nic are calculated using the following equations (1) and (2), respectively.

[0021]

number

[0022] In equation (1), V1 is the effective value of the fundamental voltage at the connection node Nic. n is the effective value of the n-th harmonic voltage at the connection node Nic. In equation (2), I1 is the effective value (rms current value) of the fundamental current at the connection node Nic. I n is the effective value of the nth harmonic current at the connection node Nic.

[0023] 3, 4, and 5 are diagrams illustrating an example of a circuit configuration of the filter device 140 of FIG. 1. As illustrated in FIG. 3, the filter device 140A includes a resistor R, an inductor L, and a capacitor C1. The resistor R and the inductor L are connected in parallel between one electrode of the capacitor C1 and a ground point. The other electrode of the capacitor C1 is connected to a connection line 150. The circuit constants of the filter device 140A include the resistance value of the resistor R, the inductance of the inductor L, and the capacitance of the capacitor C1. The filter characteristics (impedance f4(ω n )) is determined.

[0024] The filter device 140B shown in FIG. 4 has a configuration in which a capacitor C2 is added to the filter device 140A of FIG. 3. The capacitor C2 is connected between the inductor L and the ground point. The circuit constants of the filter device 140B include the resistance value of the resistor R, the inductance of the inductor L, and the capacitances of the capacitors C1 and C2. The filter characteristics (impedance f4(ω n )) is determined.

[0025] The filter device 140C shown in FIG. 5 has a configuration in which a capacitor C3 is added to the filter device 140A of FIG. 3. The capacitor C3 is connected between the capacitor C1 and the resistor R. The circuit constants of the filter device 140C include the resistance value of the resistor R, the inductance of the inductor L, and the capacitances of the capacitors C1 and C3. The filter characteristics (impedance f4(ω n )) is determined.

[0026] The harmonic suppression filter can be optimized by selecting the circuit constants of the filter device 140 so that an index value (quality index value) related to the quality of the filter device 140 becomes a desired value. However, even if the filter device 140 is manufactured based on the optimization of the filter device 140, the optimal circuit constants may not be realized in the actual filter device 140 due to various factors (e.g., manufacturing errors (manufacturing variations) or aging deterioration). In such a case, the actually manufactured filter device 140 may not have the quality expected from the optimal circuit constants and may not satisfy the predetermined standard regarding harmonics.

[0027] For example, when improvement of the quality index value is prioritized, the circuit constants may be selected so that at least one of the voltage distortion and the current distortion (harmonic distortion) of the filter device 140 is smaller than the limit value (reference limit value) of a predetermined standard for harmonics, but is approximately equal to the reference limit value. In such a case, the harmonic distortion of the actual filter device 140 may exceed the reference limit value due to the influence of manufacturing errors. On the other hand, when satisfaction of the predetermined standard for harmonics is prioritized, a value (95% of the reference limit value) that is smaller by a certain margin (for example, 5%) than the reference limit value may be used as the limit value (design limit value) in the design of the filter device 140 so that the harmonic distortion of the actual filter device 140 does not exceed the reference limit value due to manufacturing errors. In such a case, even if a circuit constant realizes a harmonic distortion below the reference limit value and an improvement of the quality index value, the circuit constant is not selected if the harmonic distortion (for example, 98% of the reference limit value) exceeds the design limit value under the circuit constant.

[0028] Therefore, in the present disclosure, a circuit constant selected so that the index value related to the quality of filter device 140 becomes a desired value is varied within a reference range assumed in the actually manufactured filter device 140, and a determination is made as to whether or not the circuit constant does not deviate from a predetermined standard related to harmonics (likelihood evaluation). According to the present disclosure, it is possible to improve the quality of filter device 140 in that it is possible to ensure that the actually manufactured filter device 140, in which the variation in the circuit constant is assumed, does not deviate from the predetermined standard under the circuit constant that makes the index value related to the quality of filter device 140 a desired value.

[0029] In the following, in the first embodiment, a configuration will be described in which a likelihood evaluation (identification process) is performed on a circuit constant every time the circuit constant is selected by optimization for setting the index value related to the quality of the filter device 140 to a desired value. In the second embodiment, a configuration will be described in which, every time a circuit constant is selected by the optimization, the circuit constant is stored in a storage unit, and a likelihood evaluation is performed on each of at least one circuit constant stored in the storage unit.

[0030] Embodiment 1 Fig. 6 is a block diagram showing a configuration of an information processing device 1 according to the first embodiment for designing the filter device 140 in Fig. 1. As shown in Fig. 6, the information processing device 1 includes a processing unit 100 and a storage unit 50. The processing unit 100 includes a condition extraction unit 20, an optimization calculation unit 30, and a likelihood evaluation unit 40.

[0031] The storage unit 50 stores an input data file 51 and an evaluation result data file 52 (first processing result). The input data file 51 includes a plurality of data sets related to preconditions and initial settings for optimization of the filter device 140. Each of the plurality of data sets includes, for example, a combination (system case) of impedances f1 to f3 and voltage characteristics Vc that determine the configuration of the equivalent circuit 200, an initial circuit constant of the filter device 140, a search range and threshold value of the circuit constant of the filter device 140 required for optimization calculation, the number of iterations for the circuit constant in the optimization calculation, and the number of iterations for the system case. The evaluation result data file 52 includes the calculation result of the optimization calculation unit 30.

[0032] The condition extraction unit 20 extracts data necessary for the processing performed by the optimization calculation unit 30 from the input data file 51 .

[0033] The optimization calculation unit 30 includes a circuit constant selection unit 31, a circuit calculation unit 32, and an objective function extraction unit 33. In the following, the objective function is a function or data that specifies the correspondence between the circuit constants of the filter device 140 and index values ​​related to the quality of the filter device 140. The index values ​​include, for example, voltage distortion, current distortion, the manufacturing cost of the filter device 140, the resistance of the filter device 140, the capacitance of the filter device 140, the inductance of the filter device 140, and the power loss (power cost) of the filter device 140. The power loss of the filter device 140 is the total value of the power losses of the equivalent circuit 200 for the first to nth harmonics. Moreover, the value of the objective function represents the index value output from the objective function when the circuit constants are used as arguments.

[0034] The circuit constant selection unit 31 evaluates an objective function using an optimization method (optimization calculation, optimization process, or optimization algorithm), and selects circuit constants of the filter device 140 from a predetermined search range so that the objective function is minimized by iterative processing by the optimization calculation unit 30. In the initial selection of circuit constants, an initial value given by the condition extraction unit 20 is selected. The optimization method includes, for example, single-objective optimization for evaluating one objective function, and multi-objective optimization for evaluating multiple objective functions. Single-objective optimization includes, for example, a single-objective genetic algorithm. Multi-objective optimization includes, for example, an evolutionary multi-objective optimization algorithm. When single-objective optimization is performed for multiple objective functions, the sum of multiple objective functions multiplied by multiple weighting coefficients (for example, values ​​determined empirically) is treated as equivalent to one objective function.

[0035] The circuit calculation unit 32 calculates, for each of the multiple system cases, the circuit constants selected by the circuit constant selection unit 31 and the voltage effective values ​​V1 to V2 at the connection nodes Nic of the equivalent circuit 200 under the system case. n and current effective values ​​I1 to I n The circuit calculation unit 32 calculates the voltage distortion THD_V and the current distortion THD_I based on the formulas (1) and (2). When the voltage distortion THD_V or the current distortion THD_I exceeds a preset threshold value that is smaller than the limit value, the circuit calculation unit 32 transmits the circuit constants to the likelihood evaluation unit 40. When the voltage distortion THD_V or the current distortion THD_I is equal to or smaller than the threshold value, the circuit calculation unit 32 transmits the circuit constants to the objective function extraction unit 33. Note that an objective function may be added in which the maximum value of each order current distortion rate in each system case is used as an index value. By using the threshold value, it is possible to limit the target of the likelihood evaluation by the likelihood evaluation unit 40 to the circuit constants in the case where the harmonic distortion of the actual filter device 140 is lower than the reference limit value but is relatively likely to exceed the reference limit value. As a result, it is possible to speed up the optimization process of the filter device 140 by the processing unit 100.

[0036] The likelihood evaluation unit 40 varies the resistance, inductance, and capacitance values ​​included in the circuit constants received from the circuit calculation unit 32 within a reference range (for example, a range of ±5% of the initial value) in which the values ​​are included, and determines whether the voltage distortion or current distortion under the varied circuit constants (variable circuit constants) exceeds a limit value. Specifically, the likelihood evaluation unit 40 sets each of the voltage distortion and current distortion as a new objective function, and determines whether the objective function for the variable circuit constants exceeds a limit value. If the objective function exceeds the limit value, the likelihood evaluation unit 40 returns control of the optimization calculation to the circuit constant selection unit 31. The circuit constant selection unit 31 selects a circuit constant different from the current circuit constant, and re-executes the optimization calculation. If the objective function is equal to or less than the limit value, the likelihood evaluation unit 40 passes control of the optimization calculation to the objective function extraction unit 33. Note that when the control of the optimization calculation is returned to the circuit constant selection unit 31, the objective function may be corrected so that the current circuit constant does not become a solution of the optimization calculation.

[0037] The objective function extraction unit 33 extracts the maximum value of the objective function in a plurality of system cases. When a plurality of objective functions are used, a maximum value in a plurality of system cases is extracted for each of the plurality of objective functions. The objective function extraction unit 33 associates the circuit constant selected by the circuit constant selection unit 31 with the maximum value and records the association in the evaluation result data file 52. The user can design the filter device 140 by using the circuit constant corresponding to the objective function related to the index value with high priority.

[0038] After the process by the optimization calculation unit 30 is completed, circuit constants for designing the filter device 140 are selected from the plurality of circuit constants recorded in the evaluation result data file 52. For example, the circuit constants may be selected from a plurality of Pareto solutions, which are solutions of multi-objective optimization for a plurality of objective functions.

[0039] Fig. 7 is a diagram showing an example of a hardware configuration of the information processing device 1 in Fig. 6. As shown in Fig. 7, the information processing device 1 includes a processing circuit 11 (processing unit), a memory 12 (storage unit), an input unit 13, an output unit 14, and a bus 15. The processing circuit 11, the memory 12, the input unit 13, and the output unit 14 are connected to each other via the bus 15 so as to be able to communicate with each other. The information processing device 1 includes, for example, a PC (Personal Computer) or a workstation.

[0040] The processing circuit 11 includes at least one CPU (Central Processing Unit) that executes a program stored in the memory 12. The processing circuit 11 may include at least one GPU (Graphics Processing Unit). The functions of the information processing device 1 are realized by software, firmware, or a combination of software and firmware. The software or firmware is written as a program and stored in the memory 12. The processing circuit 11 reads out and executes the program stored in the memory 12. The CPU is also called a central processing unit, processing unit, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor).

[0041] The memory 12 includes a non-volatile or volatile semiconductor memory (e.g., a random access memory (RAM), a read only memory (ROM), a flash memory, an erasable programmable read only memory (EPROM), or an electrically erasable programmable read only memory (EEPROM)), as well as a magnetic disk, a flexible disk, an optical disk, a compact disk, a mini disk, or a digital versatile disk (DVD). A filter design program Pg, an input data file 51, and an evaluation result data file 52 are stored in the memory 12. The processing circuit 11 that executes the filter design program Pg corresponds to the processing unit 100 in FIG. 6. Although not shown in FIG. 1, an operating system (OS) may be stored in the memory 12.

[0042] The input unit 13 receives operations from a user. The input unit 13 includes a mouse, a keyboard, a microphone, and a touch panel. The output unit 14 outputs the processing result of the processing circuit 11 to the user. The output unit 14 includes, for example, a touch panel, a display, and a speaker.

[0043] Fig. 8 is a flowchart showing an example of the flow of the optimization calculation process performed by the processing circuit 11 that executes the filter design program Pg of Fig. 7. The flowchart shown in Fig. 8 is called by a main routine (not shown) that controls the information processing device 1 in an integrated manner. In the following, a step is simply written as S. In addition, harmonic distortion is used as a term including at least one of voltage distortion and current distortion.

[0044] 8, in S101, the processing circuit 11 determines unverified circuit constants (current circuit constants) from the search range of the circuit constants of the filter device 140 so that the objective function is minimized, and proceeds to processing in S102. In S102, the processing circuit 11 determines an unverified system case (current system case) from among a plurality of system cases, and proceeds to processing in S103. In S103, the processing circuit 11 calculates harmonic distortion in the equivalent circuit 200 under the current circuit constants and the current system case, and proceeds to processing in S104.

[0045] In S104, the processing circuit 11 determines whether the harmonic distortion exceeds a limit value (for example, 5%). If the harmonic distortion exceeds the limit value (YES in S104), the processing circuit 11 resets all system cases verified in the optimization calculation up to this time to unverified, and returns the process to S101. If the harmonic distortion is equal to or less than the limit value (NO in S104), the processing circuit 11 advances the process to S105.

[0046] In S105, the processing circuit 11 determines whether the harmonic distortion exceeds a threshold value. If the harmonic distortion is equal to or less than the threshold value (NO in S105), the processing circuit 11 advances the process to S106. If the harmonic distortion exceeds the threshold value (YES in S105), the processing circuit 11 advances the process to S12. Note that the threshold value is set to be smaller than the limit value, for example, 95% of the limit value.

[0047] In S12, the processing circuit 11 performs a likelihood evaluation for the current circuit constants and proceeds to S111. In S111, the processing circuit 11 determines whether the result of the likelihood evaluation is successful or not. If the likelihood evaluation is unsuccessful (NO in S111), the processing circuit 11 determines that the current circuit constants have been verified and that all system cases that have been verified have not been verified, and returns the processing to S101. If the likelihood evaluation is successful (YES in S111), the processing circuit 11 proceeds to S106.

[0048] In S106, the processing circuit 11 calculates the value of the objective function under the current circuit constants and the current system case, and proceeds to S107. In S107, the processing circuit 11 determines that the current system case has been verified, and determines whether the number of system cases verified up to this time (the number of system case verifications) has reached the number of iterations for the system case (the end condition of the iterative processing for the system case). If the number of system case verifications is less than the number of iterations (NO in S107), the processing circuit 11 returns the processing to S102. If the number of system case verifications has reached the number of iterations (YES in S107), the processing circuit 11 ends the iterative processing for the system case under the current circuit constants, and proceeds to S108.

[0049] In S108, the processing circuit 11 sets the maximum value of the objective function values ​​calculated under all system cases as the objective function value corresponding to the current circuit constant, and proceeds to processing in S109. In S109, the processing circuit 11 saves the objective function in the evaluation result data file 52, and proceeds to processing in S110. In S110, the processing circuit 11 determines that the current circuit constant has been verified, that the verified all system cases have not been verified, and determines whether or not the number of circuit constants verified up to this time (the number of verifications of the circuit constants) has reached the number of iterations for the circuit constants (termination condition for the iterative processing for the circuit constants). If the number of verifications of the circuit constants is less than the number of iterations (NO in S110), the processing circuit 11 returns the processing to S101. If the number of verifications of the circuit constants has reached the number of iterations (YES in S110), the processing circuit 11 ends the iterative processing for the circuit constants, and returns the processing to the main routine.

[0050] Fig. 9 is a flowchart showing an example of a specific process flow of the likelihood evaluation process S12 in Fig. 8. S122, S123, S124, S126, S127, S128, and S130 in Fig. 9 correspond to S102, S103, S104, S106, S107, S108, and S110 in Fig. 8, respectively. In the flowchart shown in Fig. 9, each of the voltage distortion and the current distortion is set as an objective function. In the following, Fig. 9 will be mainly referred to, and Fig. 8 will be referred to as necessary.

[0051] 9, in S120, the processing circuit 11 obtains the current circuit constants from the optimization calculation process in FIG. 8, and proceeds to S121. In S121, the processing circuit 11 determines unverified circuit constants (currently varied circuit constants) among the circuit constants obtained by varying the current circuit constants within a reference range so as to maximize the objective function, and proceeds to S122. In S21, for example, an evolutionary multi-objective optimization algorithm capable of handling a plurality of objective functions is used.

[0052] In S122, the processing circuit 11 determines the current system case in the same manner as in S102 of Fig. 8, and proceeds to the process in S123. In S123, the processing circuit 11 calculates the current variable circuit constants and the harmonic distortion in the equivalent circuit 200 under the current system case, and proceeds to the process in S124.

[0053] In S124, the processing circuit 11 determines whether the harmonic distortion exceeds the limit value. If the harmonic distortion exceeds the limit value (YES in S124), the processing circuit 11 returns a failure determination to the main routine. If the harmonic distortion is equal to or less than the limit value (NO in S124), the processing circuit 11 advances the process to S126.

[0054] In S126, the processing circuit 11 calculates values ​​of the objective functions (current distortion and voltage distortion) under the current variable circuit constants and the current system case, and proceeds to S127. In S127, the processing circuit 11 determines the end condition of the iterative process for the system case, similar to S107 in Fig. 8. If the number of verifications of the system case is less than the number of iterations (NO in S127), the processing circuit 11 returns the process to S122. If the number of verifications of the system case has reached the number of iterations (YES in S127), the processing circuit 11 ends the iterative process for the system case under the current variable circuit constants, and proceeds to S128.

[0055] In S128, the processing circuit 11 sets the maximum value of the objective function values ​​calculated under all system cases as the value of the objective function corresponding to the current variable circuit constant, and proceeds to processing at S130. In S130, the processing circuit 11 determines whether the current variable circuit constant has been verified, the verified all system cases have been unverified, and determines whether the number of variable circuit constants verified up to this time (the number of verifications of the variable circuit constant) has reached the number of iterations for the variable circuit constant. If the number of verifications of the variable circuit constant is less than the number of iterations (NO in S130), the processing circuit 11 returns the processing to S121. If the number of verifications of the variable circuit constant has reached the number of iterations (YES in S130), the processing circuit 11 ends the iterative processing for the variable circuit constant, and returns a pass judgment to the main routine.

[0056] As described above, according to the device, program, and method of the first embodiment, it is possible to improve the quality of the filter that suppresses harmonics.

[0057] Embodiment 2 Fig. 10 is a block diagram showing a configuration of an information processing device 2 according to a second embodiment for designing the filter device 140 in Fig. 1. The configuration of the information processing device 2 is such that the condition extraction unit 20, the circuit calculation unit 32, the likelihood evaluation unit 40, and the input data file 51 in Fig. 6 are replaced with the condition extraction unit 20A, the circuit calculation unit 32A, the likelihood evaluation unit 40A, and the input data file 51A, respectively, and a threshold exceeding data file 53 (second processing result) is added to the storage unit 50. The configuration of the information processing device 2 other than these is the same as that of the information processing device 1, so the description of the similar configuration will not be repeated. Below, Fig. 10 will be mainly referred to, and Fig. 6 will also be referred to as necessary.

[0058] In the input data file 51A, a flag indicating optimization calculation or likelihood evaluation is attached to each of the multiple data sets included in the input data file 51 in Fig. 6. The condition extraction unit 20A has a function of acquiring flags attached to the multiple data sets included in the input data file 51A, in addition to the function of the condition extraction unit 20 in Fig. 6. If the flag attached to a data set indicates optimization calculation, the condition extraction unit 20A outputs the data set to the optimization calculation unit 30, and if the flag indicates likelihood evaluation, the condition extraction unit 20A outputs the data set to the likelihood evaluation unit 40A.

[0059] When the harmonic distortion under the current circuit constant exceeds the threshold, the circuit calculation unit 32A records the current circuit constant in the threshold exceeding data file 53 without outputting it to the likelihood evaluation unit 40A. The likelihood evaluation unit 40A sequentially reads the multiple circuit constants recorded in the threshold exceeding data file 53 and performs likelihood evaluation for the circuit constants in the same manner as the likelihood evaluation unit 40 in FIG. 6. The processing of the likelihood evaluation unit 40A may be performed in parallel with the processing of the optimization calculation unit 30, or may be performed after the processing of the optimization calculation unit 30. By transmitting the processing result of the optimization calculation unit 30 to the likelihood evaluation unit 40A via the threshold exceeding data file 53, each of the processing of the optimization calculation unit 30 and the processing of the likelihood evaluation unit 40A can be executed and maintained as needed and in a timely manner.

[0060] Fig. 11 is a diagram showing an example of a hardware configuration of the information processing device 2 in Fig. 10. The hardware configuration of the information processing device 2 is a configuration in which the filter design program Pg in the memory 12 of the information processing device 2 in Fig. 7 is replaced with Pg1, and a likelihood evaluation program Pg2 and a threshold exceeding data file 53 are added. Other than this, the configuration of the information processing device 2 is similar to that of the information processing device 1, and therefore description of the similar configuration will not be repeated.

[0061] Fig. 12 is a flowchart showing an example of the flow of the optimization calculation process performed by the processing circuit 11 that executes the filter design program Pg1 of Fig. 11. The flowchart shown in Fig. 12 is a flowchart in which S12 and S111 of Fig. 8 are replaced with S211. Other than this, the process of Fig. 12 is similar to the process of Fig. 8, and therefore description of the similar processes will not be repeated.

[0062] 12, the processing circuit 11 executes S101 to S105 in the same manner as in embodiment 1. If the answer is YES in S105, the processing circuit 11 determines in S211 that the current circuit constants have been verified, that all system cases that have been verified have not been verified, records the current circuit constants in the threshold exceedance data file 53, and returns the process to S101. If the answer is NO in S105, the processing circuit 11 executes S106 to S110 in the same manner as in embodiment 1, and returns the process to the main routine.

[0063] Fig. 13 is a flowchart showing an example of the flow of the likelihood evaluation process performed by the processing circuit 11 that executes the likelihood evaluation program Pg2 of Fig. 11. The flowchart shown in Fig. 13 is a flowchart in which S120 in Fig. 9 is replaced with S220, and S229 and S231 are added. The other processes in Fig. 13 are similar to those in Fig. 9, and therefore description of the similar processes will not be repeated.

[0064] 13, in S220, the processing circuit 11 acquires the current circuit constant from the threshold exceedance data file 53, and proceeds to processing S121. After executing S121 to S124 and S126 to S128 as in the first embodiment, the processing circuit 11 stores the objective function in the evaluation result data file 52 in S229, and proceeds to processing S130. After executing S130 as in the first embodiment, the processing circuit 11 proceeds to processing S231. In S231, the processing circuit 11 determines whether or not all circuit constants recorded in the threshold exceedance data file 53 have been verified, regarding the current circuit constant as verified. If all circuit constants recorded in the threshold exceedance data file 53 have not been verified (NO in S231), the processing circuit 11 returns the processing to S220. If all circuit constants recorded in the threshold exceedance data file 53 have been verified (YES in S231), the processing circuit 11 ends the iterative processing for the circuit constants recorded in the threshold exceedance data file 53 and returns the processing to the main routine.

[0065] As described above, according to the device, program, and method of the second embodiment, it is possible to improve the quality of the filter that suppresses harmonics.

[0066] The embodiments disclosed herein are also intended to be combined appropriately within a range that is not inconsistent. The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The scope of the present disclosure is indicated by the claims, not the above description, and is intended to include all modifications within the meaning and scope of the claims. [Explanation of symbols]

[0067] 1,2 Information processing device, 11 Processing circuit, 12 Memory, 13 Input unit, 14 Output unit, 15 Bus, 20,20A Condition extraction unit, 30 Optimization calculation unit, 31 Circuit constant selection unit, 32,32A Circuit calculation unit, 33 Objective function extraction unit, 40,40A Likelihood evaluation unit, 50 Memory unit, 51,51A Input data file, 52 Evaluation result data file, 53 Threshold exceedance data file, 100 Processing unit, 110 Upper system, 120 Power converter, 130 Transformer, 140,140A to 140C Filter device, 150 Connection line, 200 Equivalent circuit, 210 System characteristic circuit, 220 Converter characteristic circuit, 230 Transformer characteristic circuit, 240 Filter characteristic circuit, 250 Voltage characteristic circuit, 900 Load, C1 to C3 Capacitor, I1 to I n Current effective value, L inductor, Nic connection node, Pg, Pg1 filter design program, Pg2 likelihood evaluation program, Pic interconnection point, R resistance, V1~V n Voltage effective value, Vc voltage characteristic.

Claims

1. An apparatus for designing a filter for suppressing harmonics generated by a power converter, comprising: a processing unit that determines a circuit constant of the filter by optimizing an index value related to a quality of the filter; a storage unit in which the first optimization process result is stored; The processing unit includes: Calculating a first harmonic distortion of a circuit including the power converter and the filter having a first circuit constant; performing a determination process for determining whether or not there is a second harmonic distortion larger than the limit value among at least one second harmonic distortion corresponding to at least one second circuit constant within a reference range that includes the first circuit constant, for the first circuit constant when a first condition is satisfied indicating that the first harmonic distortion is smaller than a limit value defined in a predetermined criterion; The apparatus adds the first circuit constant to the first processing result if a second condition is met indicating that no second harmonic distortion among the at least one second harmonic distortion is greater than the limit value.

2. The apparatus of claim 1 , wherein the first condition further indicates that the first harmonic distortion is greater than a threshold value that is less than the limit value.

3. The device according to claim 2 , wherein the processing unit uses the first circuit constant at the timing when the first condition is satisfied in the specific process.

4. a second processing result including a circuit constant of the filter when the first condition is satisfied is stored in the storage unit; The device according to claim 2 , wherein the processing unit obtains the first circuit constant required for the specific processing from the second processing result when the first condition is satisfied.

5. The device according to any one of claims 1 to 4, wherein, when the first condition is satisfied, the processing unit changes the first circuit constant by the optimization, recalculates the first harmonic distortion, re-executes the specific processing, and further adds the first circuit constant when the second condition is satisfied to the first processing result.

6. A program for designing a filter for suppressing harmonics generated from a power converter, the program being executed by a processing circuit to cause the processing circuit to: determining a circuit constant of the filter by optimizing an index value related to the quality of the filter; Calculating a first harmonic distortion of a circuit including the power converter and the filter having a first circuit constant; performing a determination process for determining whether or not there is a second harmonic distortion larger than the limit value among at least one second harmonic distortion corresponding to at least one second circuit constant within a reference range that includes the first circuit constant, for the first circuit constant when a first condition indicating that the first harmonic distortion is smaller than a limit value determined in a predetermined criterion is satisfied; a program that adds the first circuit constant to a result of the optimization process when a second condition is satisfied indicating that no second harmonic distortion among the at least one second harmonic distortion is greater than the limit value;

7. 1. A method for designing a filter to suppress harmonics generated by a power converter, comprising the steps of: determining a circuit constant of the filter by optimizing with respect to an index value related to the quality of the filter; calculating a first harmonic distortion of a circuit including the power converter and the filter having a first circuit constant; performing a determination process for determining whether or not there is a second harmonic distortion larger than the limit value among at least one second harmonic distortion corresponding to at least one second circuit constant within a reference range that includes the first circuit constant, for the first circuit constant when a first condition is satisfied indicating that the first harmonic distortion is smaller than a limit value determined in a predetermined criterion; and adding the first circuit constant to a result of the optimization process if a second condition is met indicating that no second harmonic distortion among the at least one second harmonic distortion is greater than the limit value.

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