Transparent display device

Abstract

To provide a transparent display device that maintains the light transmissivity of a display panel and has a cooling performance.SOLUTION: A transparent display device 1 includes: an array substrate 2 which has light transmissivity, includes a first main surface and a second main surface on the opposite side of the first main surface and has a display part; a transparent substrate 5 which has light transmissivity, and includes a third main surface and a fourth main surface on the opposite side of the third main surface; multiple sealing materials 4 which connect the second main surface to the third main surface in a planar view; an opening 8 which defines an inlet 9a of a cooling medium having light transmissivity; an opening 8 which defines an outlet 9b of the cooling medium; and a flow path which is surrounded by the array substrate 2, transparent substrate 5, and multiple sealing materials 4. The cooling medium flows from the one opening 8 to the other opening 8.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a transparent display device equipped with a cooling mechanism. [Background technology]

[0002] There is a transparent display device that is configured by arranging multiple fine light-emitting elements (e.g., light-emitting diodes) on a circuit board with high transmittance. Such a transparent display device does not use reflection or diffusion, so there is little light loss and it can achieve high brightness.

[0003] Patent Document 1 (JP Patent Publication No. 2003-124671) describes a method in which a heat dissipation pipe is disposed behind a display inside a display case of a notebook personal computer, and the display is cooled by cooling water flowing inside the heat dissipation pipe.

[0004] Patent Document 2 (JP 2016-119362 A) describes forming thin metal wires in a lattice pattern on the back surface of a transparent organic EL panel and covering the thin metal wires with a transparent heat dissipation sheet. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2003-124671 A [Patent Document 2] JP 2016-119362 A Summary of the Invention [Problem to be solved by the invention]

[0006] When performing high-brightness display in a transparent display device in which self-luminous elements are arranged on a substrate, heat generation from the elements themselves and the substrate circuitry can become a problem. That is, a decrease in luminous efficiency due to an increase in element temperature, or damage to the elements or circuitry due to high temperatures, can occur.

[0007] As a measure to prevent the temperature from rising, there is a method of cooling the heat generating part using a heat sink or the like. However, in the case of the transparent display device, the heat generating part is the display part of the transparent display device. Therefore, it is not possible to adopt a non-transparent heat dissipation mechanism such as a heat sink used for cooling a CPU (Central Processing Unit).

[0008] It is an object of the present invention to improve the performance of transparent display devices.

[0009] Other objects and novel features will become apparent from the description of this specification and the accompanying drawings. [Means for solving the problem]

[0010] A brief outline of a representative embodiment of the present invention will be described below.

[0011] A transparent display device in one embodiment includes an array substrate having a light-transmitting property and a first main surface and a second main surface opposite the first main surface, and having a display portion; a transparent substrate having a light-transmitting property and a third main surface and a fourth main surface opposite the third main surface; a plurality of sealants connecting the second main surface and the third main surface in a planar view; a first opening defining an inlet for a cooling medium having light-transmitting property, a second opening defining an outlet for the cooling medium; and a flow path surrounded by the array substrate, the transparent substrate and the plurality of sealants, wherein the cooling medium flows through the flow path from the first opening toward the second opening. [Brief description of the drawings]

[0012] [Figure 1] FIG. 1 is a schematic perspective view showing a transparent display device according to a first embodiment. [Diagram 2] 1 is a plan view showing an array substrate of a transparent display device according to a first embodiment. [Diagram 3] 1 is a plan view showing one pixel of the transparent display device according to the first embodiment. [Figure 4]1 is a circuit diagram showing a pixel circuit of a transparent display device according to a first embodiment. [Diagram 5] 1 is a plan view illustrating a schematic diagram of a plurality of pixels of the transparent display device according to the first embodiment. [Figure 6] FIG. 11 is a plan view showing a transparent display device according to the second embodiment. [Figure 7] FIG. 7 is a cross-sectional view taken along line AA in FIG. 6. [Figure 8] 5A to 5C are cross-sectional views showing a method for manufacturing a transparent display device according to the second embodiment. [Figure 9] 9 is a cross-sectional view showing the method for manufacturing the transparent display device subsequent to FIG. 8. [Figure 10] 10 is a cross-sectional view showing the method for manufacturing the transparent display device subsequent to FIG. [Figure 11] 10A to 10C are cross-sectional views illustrating a method for manufacturing a transparent display device according to a first modification of the second embodiment. [Figure 12] 12 is a cross-sectional view showing the method for manufacturing the transparent display device subsequent to FIG. 11. [Figure 13] 13 is a plan view illustrating a method for manufacturing a transparent display device according to Modification 2 of Embodiment 2. FIG. [Figure 14] 14 is a plan view showing the method for manufacturing the transparent display device subsequent to FIG. 13. [Figure 15] 11A to 11C are plan views showing a method for manufacturing a transparent display device according to a comparative example. [Figure 16] 16 is a plan view showing the method for manufacturing the transparent display device continued from FIG. 15. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that the disclosure is merely an example, and those who are skilled in the art can easily come up with appropriate modifications while maintaining the gist of the invention, which are naturally included in the scope of the present invention. In addition, in order to make the explanation clearer, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each figure, elements similar to those described above with respect to the previous figures may be given the same or related symbols, and detailed explanations may be omitted as appropriate.

[0014] The planar shape in this application refers to the shape of an object when viewed from a plane. The planar view here refers to the positional relationship when the object is viewed from a direction perpendicular to a principal surface, which is a particularly large surface of the object.

[0015] Furthermore, when it is necessary to explain an element by distinguishing between the colors RGB (red, green, blue), the symbol indicating the element is followed by the symbol R, G, or B. However, when it is not necessary to explain an element by distinguishing between the colors RGB, the element is explained using only the symbol indicating the element.

[0016] (Embodiment 1) <Configuration of transparent display device> A transparent display device 1 according to the present embodiment will be described with reference to Fig. 1. Fig. 1 is a schematic perspective view showing a transparent display device according to the present embodiment.

[0017] As shown in FIG. 1, a transparent display device 1 includes an array substrate 2, a transparent substrate 5, and a sealing material 4 that connects the array substrate 2 and the transparent substrate 5 to each other.

[0018] The array substrate 2 has a first main surface and a second main surface opposite to the first main surface. The array substrate 2 also has a support substrate, and on the main surface of the support substrate, transistors, a wiring layer including wiring and an insulating film, and light-emitting elements 3 thereon are provided.

[0019] The light-emitting elements 3 are divided into, for example, a light-emitting element 3R that emits red light, a light-emitting element 3G that emits green light, and a light-emitting element 3B that emits blue light. The three light-emitting elements 3R, 3G, and 3B are arranged together to form one pixel Pix. In other words, one pixel Pix is ​​composed of the three light-emitting elements 3R, 3G, and 3B. On the main surface of the support substrate, such pixels Pix are arranged in a matrix in the X direction and the Y direction. That is, the light-emitting elements 3 are arranged along the first main surface and the second main surface of the array substrate 2, respectively. The array substrate 2 includes a support substrate, the transistors, the wiring layer, and the light-emitting elements 3 described above. The main surfaces referred to in this application are all along the XY plane, and the direction perpendicular to the main surface (normal direction) is the Z direction.

[0020] The X direction and the Y direction are mutually orthogonal directions. However, the X direction may intersect the Y direction without being orthogonal. The transparent substrate 5 has a third main surface and a fourth main surface opposite to the third main surface. In the Z direction, which is a direction perpendicular to each of the X direction and the Y direction, the second main surface of the array substrate 2 and the third main surface of the transparent substrate 5 face each other. That is, the array substrate 2 and the transparent substrate 5 overlap each other in a direction (Z direction) perpendicular to each of the first main surface, the second main surface, the third main surface, and the fourth main surface. Between the opposing array substrate 2 and the transparent substrate 5, there is a space (flow path) in which no solid matter is formed, and two sealing materials 4 are formed so as to sandwich the space in the X direction. One of the two sealing materials 4 connects one end of the array substrate 2 and the transparent substrate 5 in the X direction. The other of the two sealing materials 4 connects the other end of the array substrate 2 and the transparent substrate 5 in the X direction.

[0021] Here, the array substrate 2, the sealing material 4, and the transparent substrate 5 each extend in the Y direction. In a plan view, the array substrate 2 and the transparent substrate 5 are rectangular in shape. However, the array substrate 2 and the transparent substrate 5 may extend in the X direction. Furthermore, the planar shapes of the array substrate 2 and the transparent substrate 5 are not limited to being rectangular, and may be, for example, a square.

[0022] When the transparent display device 1 is viewed from the Y direction, the space is surrounded by the array substrate 2, the sealing material 4, the transparent substrate 5, and the sealing material 4, which are connected in sequence to form a ring. In a plan view, the space extends in the Y direction. That is, the shape of the transparent display device 1, which is made up of the array substrate 2, the two sealing materials 4, and the transparent substrate 5, is a square tube shape having a cavity in the center. The cavity (space) is a flow path through which a cooling medium (liquid or gas) for mainly cooling the array substrate 2 passes. The transparent display device 1 has openings 8 at both ends (side surfaces on both sides) in the Y direction. These two openings 8 are connected to each other by a flow path. That is, one opening 8 in the Y direction defines an inlet 9a of the flow path, and the other opening 8 in the Y direction defines an outlet 9b of the flow path. The periphery of each opening 8 is configured by the array substrate 2, the sealing material 4, the transparent substrate 5, and the sealing material 4, which are connected in sequence to form a ring.

[0023] The support substrate and the transparent substrate 5 are glass substrates or flexible resin substrates, both of which are translucent. The transparent substrate 5 can be made of transparent materials such as glass, acrylic, or sapphire. The transistors are, for example, TFTs (Thin Film Transistors). The array substrate 2 may also be called a TFT substrate, a wiring substrate, or a backplane substrate. Of the components constituting the array substrate 2, the wiring and the light-emitting elements 3 may not be translucent, but the insulating film is translucent. In a plan view, the areas of the wiring and the light-emitting elements 3 relative to the first main surface of the array substrate 2 are small, so that the array substrate 2 as a whole is translucent.

[0024] The cooling medium flowing through the flow path may be gas or liquid as long as it is transparent. Dry air or hydrogen gas, for example, may be used as the gas cooling medium. Water, for example, may be used as the liquid cooling medium. The light-emitting element 3 is a light-emitting diode (LED: Light Emitting Diode) having an anode terminal and a cathode terminal. The light-emitting element 3 may be, for example, an organic light-emitting diode (OLED: Organic Light Emitting Diode).

[0025] Therefore, the transparent display device 1 containing the cooling medium in the flow path has translucency in a plan view. Therefore, for example, it is visible to an observer on the first main surface side of the array substrate 2. The observer can recognize the emitted light and the background light in combination. In this way, an observer using the transparent display panel can also see the background located on the other side of the transparent display device 1. In addition, an image can be displayed on the surface (display panel) of the transparent display device 1 by, for example, selectively emitting light from a plurality of pixels Pix arranged on the first main surface side. At this time, the observer can see the displayed image and the background superimposed. Note that, in order to make the figure easier to understand, the outline of a part of the array substrate 2 hidden by the array substrate 2 and the outlines of the sealing material 4 and the transparent substrate 5 are shown by dashed lines in FIG. 1, but the outline of a part of the transparent substrate 5 by dashed lines is omitted.

[0026] The sealing material 4 is formed on the outer periphery of the transparent display device 1, and is desirably made of a transparent material in order to increase the overall light transmittance of the transparent display device 1. The sealing material 4 is made of a material that is impermeable to gas or liquid, which is a cooling medium.

[0027] Although not shown in FIG. 1, each of the openings 8 of the transparent display device 1 is connected to a circulation flow path (e.g., a pipe) for connecting the transparent display device 1 to the outside so that the cooling medium does not leak. The outlet 9b of the flow path of the transparent display device 1 is connected to the pump 6 via a circulation flow path (external flow path). The pump 6 is connected to the cooling unit (cooling mechanism) 7 via a circulation flow path such as a pipe. The cooling unit 7 is connected to the inlet 9a of the flow path of the transparent display device 1 via a circulation flow path. The pump 6 is a fluid machine that circulates (pumps) the cooling medium through the circulation flow path in the order of the cooling unit 7, the transparent display device 1, and the pump 6. The cooling unit 7 is, for example, a heat sink in which a plurality of metal plates are arranged, or includes a fan that blows air to the heat sink, and cools the cooling medium by the heat sink. The cooling unit 7 may also be a cooler that cools the cooling medium using a catalyst. In this way, the circulation flow path is provided with the pump 6 and the cooling unit 7. The circulation flow path circulates the cooling medium from the outlet 9b through the outside of the transparent display device 1 to the inlet 9a.

[0028] Here, a configuration has been described in which the pump 6 is connected between the outlet 9b of the transparent display device 1 and the cooling section 7, but the pump 6 may also be connected between the inlet 9a of the transparent display device 1 and the cooling section 7.

[0029] Since the light-emitting elements and substrate circuits (such as the transistors and wiring) constituting the transparent display device 1 generate heat, the transparent display device 1 can be cooled by the cooling medium flowing in contact with the second main surface of the array substrate 2. The cooling medium (e.g., air or water) that has absorbed the heat from the transparent display device 1 is pumped out by the pump 6, cooled by the cooling unit 7, and used again to cool the transparent display device 1. In other words, the cooling medium is cooled by the cooling unit 7 while circulating from the outlet 9b through the outside of the transparent display device 1 to the inlet 9a. Since the cooling unit 7 dissipates heat from the cooling medium, it is possible to prevent the temperature of the cooling medium from continuing to rise and the temperature of the transparent display device 1 from rising excessively accordingly.

[0030] Next, a specific structure of the array substrate 2 will be described with reference to Figs. 2 to 5. Fig. 2 is a plan view showing an array substrate of a transparent display device according to the present embodiment. Fig. 3 is a plan view showing one pixel of the transparent display device according to the present embodiment. Fig. 4 is a circuit diagram showing a pixel circuit of the transparent display device according to the present embodiment. Fig. 5 is a plan view diagrammatically showing a plurality of pixels of the transparent display device according to the present embodiment.

[0031] As shown in Fig. 2, the transparent display device 1 includes an array substrate 2, pixels Pix, a driving circuit 15, a driving IC (Integrated Circuit) 210, and a cathode wiring 60. The array substrate 2 is a driving circuit substrate for driving each pixel Pix, and is also called a backplane or an active matrix substrate. The array substrate 2 includes a support substrate 21, a plurality of transistors, a plurality of capacitors, various wirings, and the like. Although not particularly shown, a flexible printed circuit board (FPC) for inputting control signals and power for driving the driving circuit 15 and the driving IC 210 may be connected to the array substrate 2.

[0032] 2, the transparent display device 1 has a display area AA and a peripheral area GA. The display area AA is an area that is arranged to overlap with a plurality of pixels Pix and displays an image. The peripheral area GA is an area that does not overlap with the plurality of pixels Pix and is arranged outside the display area AA.

[0033] A plurality of pixels Pix are arranged in the X direction and the Y direction in the display area AA of the support substrate 21. The X direction and the Y direction are parallel to the main surface of the support substrate 21.

[0034] The drive circuit 15 is a circuit that drives multiple gate lines GL (see FIG. 4) based on various control signals from the drive IC 210 or from outside. The drive circuit 15 selects multiple gate lines GL sequentially or simultaneously, and supplies a gate drive signal to the selected gate lines GL. In this way, the drive circuit 15 selects multiple pixels Pix connected to the gate lines.

[0035] The driving IC 210 is a circuit that controls the display of the transparent display device 1. The driving IC 210 is mounted as a COG (Chip On Glass) in the peripheral area GA of the support substrate 21. Without being limited thereto, the driving IC 210 may be mounted on a flexible printed circuit board or a rigid board connected to the peripheral area GA of the support substrate 21.

[0036] The cathode wiring 60 is provided in the peripheral area GA of the support substrate 21. The cathode wiring 60 is provided to surround the pixels Pix in the display area AA and the drive circuit 15 in the peripheral area GA. The cathodes of the light-emitting elements 3 are electrically connected to a common cathode wiring 60, and a reference potential (e.g., ground potential) is supplied to the cathode wiring 60. More specifically, the cathode terminals (not shown) of the light-emitting elements 3 are connected to the cathode wiring 60 via a cathode electrode (not shown) and a cathode power supply line LVSS.

[0037] As shown in FIG. 3, one pixel Pix includes a plurality of subpixels 49. For example, the pixel Pix has a first subpixel 49R, a second subpixel 49G, and a third subpixel 49B. The first subpixel 49R displays a primary color red as a first color. The second subpixel 49G displays a primary color green as a second color. The third subpixel 49B displays a primary color blue as a third color. As shown in FIG. 3, in one pixel Pix, the first subpixel 49R, the second subpixel 49G, and the third subpixel 49B are arranged in the X direction. In FIG. 1, the light-emitting elements 3 constituting one pixel Pix are arranged in an L-shape, but as shown in FIG. 2, the first subpixel 49R, the second subpixel 49G, and the third subpixel 49B may be arranged in a straight line. Note that the first color, the second color, and the third color are not limited to red, green, and blue, respectively, and any color such as a complementary color can be selected. In the following description, the first subpixel 49R, the second subpixel 49G, and the third subpixel 49B will be referred to as subpixel 49 when there is no need to distinguish between them.

[0038] The first subpixel 49R, the second subpixel 49G, and the third subpixel 49B each have a light-emitting element 3R, a light-emitting element 3G, and a light-emitting element 3B, and an anode electrode 23. The transparent display device 1 displays an image by having the light-emitting elements 3R, 3G, and 3B emit different light in the first subpixel 49R, the second subpixel 49G, and the third subpixel 49B. The light-emitting element 3R emits red light. The light-emitting element 3G emits green light. The light-emitting element 3B emits blue light.

[0039] The light-emitting element 3 is provided in each of the multiple sub-pixels 49. The light-emitting element 3 is an LED chip having a size of about 3 μm or more and 300 μm or less in a planar view. Although it is not a strict definition, a chip size of less than 100 μm is called a micro LED. A transparent display device 1 having a micro LED in each pixel is also called a micro LED display device. Note that the "micro" in micro LED does not limit the size of the light-emitting element 3.

[0040] The light-emitting elements 3 may emit four or more different colors of light. The arrangement of the sub-pixels 49 is not limited to the configuration shown in FIG. 2. For example, the first sub-pixel 49R may be adjacent to the second sub-pixel 49G in the X direction. The first sub-pixel 49R, the second sub-pixel 49G, and the third sub-pixel 49B may be arranged in a triangular lattice pattern. The arrangement order of the first sub-pixel 49R, the second sub-pixel 49G, and the third sub-pixel 49B in the X direction may also be different.

[0041] FIG. 4 is a circuit diagram showing a pixel circuit. The pixel circuit shown in FIG. 4 is a circuit provided on a support substrate 21 and supplies a drive signal (current) to each light-emitting element 3. As shown in FIG. 4, a plurality of gate lines GL extend in the X direction and are connected to a plurality of first sub-pixels 49R, second sub-pixels 49G, and third sub-pixels 49B. A plurality of first signal lines SL-1, second signal lines SL-2, and third signal lines SL-3 extend in the Y direction. The first signal line SL-1 is connected to a plurality of first sub-pixels 49R arranged in the Y direction. The second signal line SL-2 is connected to a plurality of second sub-pixels 49G arranged in the Y direction. The third signal line SL-3 is connected to a plurality of third sub-pixels 49B arranged in the Y direction. In the following description, when it is not necessary to distinguish between the first signal line SL-1, the second signal line SL-2, and the third signal line SL-3, they are simply referred to as signal lines SL.

[0042] Each subpixel 49 includes two transistors and one capacitor. Specifically, each subpixel 49 includes a drive transistor DRT, a write transistor SST, and a capacitor Cs.

[0043] Each of the plurality of transistors in each subpixel 49 is formed of an n-type TFT, but is not limited to this, and each of the transistors may be formed of a p-type TFT.

[0044] The gate of the driving transistor DRT is connected to the drain of the writing transistor SST. The source of the driving transistor DRT is connected to the anode power line LVDD. The drain of the driving transistor DRT is connected to the anode of the light-emitting element 3. The cathode of the light-emitting element 3 is connected to the cathode power line LVSS and is supplied with a reference potential.

[0045] The gate of the write transistor SST is connected to the gate line GL. The source of the write transistor SST is connected to the signal line SL. The drain of the write transistor SST is connected to the gate of the drive transistor DRT.

[0046] One end of the capacitance Cs is connected to the gate of the drive transistor DRT and the drain of the write transistor SST, and the other end is connected to a common line LCs. The common line LCs is electrically connected to the cathode power line LVSS and is supplied with a reference potential. The capacitance Cs is added to the pixel circuit to suppress fluctuations in the gate voltage due to the parasitic capacitance and leakage current of the drive transistor DRT.

[0047] The write transistor SST functions as a switching element that selects conduction or non-conduction between two nodes. The drive transistor DRT functions as a current control element that controls the current flowing through the light emitting element 3 in accordance with the voltage between its gate and drain.

[0048] Specifically, the drive circuit 15 selects a plurality of gate lines GL and supplies a gate drive signal to the selected gate line GL. When the potential of the gate line GL becomes H (high) level by the gate drive signal, the write transistor SST is turned on. This causes charge to be accumulated in the capacitance Cs based on the video signal supplied from the signal line SL. The voltage between the gate and drain of the drive transistor DRT is determined according to the amount of charge in the capacitance Cs.

[0049] A current flows through the driving transistor DRT based on the anode power supply potential PVDD supplied from the anode power supply line LVDD. The driving transistor DRT supplies a current according to the voltage between the gate and drain to the light-emitting element 3. The light-emitting element 3 emits light with a luminance according to this current. Even after the writing transistor SST is turned off, a current is still supplied to the light-emitting element 3 from the anode power supply line LVDD via the driving transistor DRT.

[0050] Next, a specific configuration example of the pixel Pix in plan view will be described. FIG. 5 is a plan view that shows a plurality of pixels. FIG. 5 shows an enlarged view of eight pixels Pix arranged in two rows and four columns among the pixels Pix arranged in the display area AA. Specifically, as shown in FIG. 5, pixels Pix(1,1), Pix(2,1), Pix(3,1), and Pix(4,1) are arranged in the X direction. Furthermore, pixels Pix(1,1) and Pix(1,2) are arranged in the Y direction. Pixels Pix(2,1) and Pix(2,2) are arranged in the Y direction. Pixels Pix(3,1) and Pix(3,2) are arranged in the Y direction. Pixels Pix(4,1) and Pix(4,2) are arranged in the Y direction. In addition, when there is no need to distinguish between pixels Pix(1,1), Pix(2,1), Pix(3,1), Pix(4,1), Pix(1,2), Pix(2,2), Pix(3,2), and Pix(4,2), they will simply be referred to as pixel Pix.

[0051] Each of the pixels Pix has a light-emitting element 3R (first sub-pixel 49R), a light-emitting element 3G (second sub-pixel 49G), a light-emitting element 3B (third sub-pixel 49B), a first signal line SL-1, a second signal line SL-2, a third signal line SL-3, and a gate line GL. The light-emitting element 3R is electrically connected to the first signal line SL-1. The light-emitting element 3G is electrically connected to the second signal line SL-2. The light-emitting element 3B is electrically connected to the third signal line SL-3.

[0052] In this embodiment, in two pixels Pix adjacent to each other in the X direction, a plurality of light-emitting elements 3 and a plurality of signal lines SL (signal line group SLG) are arranged in close proximity to each other as a group. One adjacent pixel Pix and the other adjacent pixel Pix are arranged in a positional relationship in which they are inverted with respect to a virtual line parallel to the Y direction as an axis of symmetry.

[0053] Two pixels Pix adjacent in the X direction (for example, pixels Pix(2, 2) and Pix(3, 2)) are in a region surrounded by two signal line groups SLG adjacent in the X direction and two gate lines GL adjacent in the Y direction.

[0054] Each of the pixels Pix has a light-transmitting area CA and a non-light-transmitting area NCA. The light-transmitting area CA is an area in which the aperture ratio is 80% or more in a predetermined area. That is, the light-transmitting area CA is an area in which the ratio of an area that does not overlap with various wirings such as the signal lines SL and the gate lines GL, or the anode electrodes 23 connected to the light-emitting elements 3, to the area of ​​the predetermined area is 80% or more. The non-light-transmitting area NCA is an area in which the aperture ratio is less than 80% in a predetermined area. That is, the non-light-transmitting area NCA is an area in which the ratio of an area that does not overlap with various wirings such as the signal lines SL and the gate lines GL, or the anode electrodes 23 connected to the light-emitting elements 3, to the area of ​​the predetermined area is less than 80%.

[0055] In the transparent display device 1, the area of ​​the light-transmitting area CA is set larger than the area of ​​the non-light-transmitting area NCA. Therefore, in the pixel Pix in which the light-emitting element 3 does not emit light, the background on the second main surface side of the array substrate 2 is visible from the first main surface side through the light-transmitting area CA, and the background on the first main surface side of the array substrate 2 is visible from the second main surface side. In the transparent display device 1 of this embodiment, when a video signal is input from the driving IC 210, the light-emitting element 3 of the pixel Pix emits light in response to the video signal. The image displayed in the pixel Pix is ​​visible together with the background. In other words, the transparent display device 1 is a so-called transparent display used in a manner in which the other side of the display area AA can be seen through.

[0056] Next, a specific example of the configuration of each pixel Pix will be described, focusing on pixels Pix(1,1) and Pix(2,1) adjacent to each other in the X direction. Here, one side of the X direction (the right direction in FIG. 5) may be expressed as the +X direction, and the other side of the X direction (the left direction in FIG. 5) may be expressed as the -X direction. Similarly, one side of the Y direction (the upper direction in FIG. 5) may be expressed as the +Y direction, and the other side of the Y direction (the lower direction in FIG. 5) may be expressed as the -Y direction.

[0057] The signal line group SLG includes a plurality of signal lines SL adjacent to each other in the X direction. Specifically, three signal lines SL connected to the pixel Pix(1,1) (first pixel) on the left side of FIG. 5 and three signal lines SL connected to the pixel Pix(2,1) (second pixel) on the right side of the pixel Pix(1,1) are arranged adjacent to each other in the X direction to form a single signal line group SLG. That is, the signal line group SLG includes a pair of first signal lines SL-1, a pair of second signal lines SL-2, and a pair of third signal lines SL-3. The signal line group SLG is arranged in the order of the third signal line SL-3, the second signal line SL-2, the first signal line SL-1, the third signal line SL-3, the second signal line SL-2, and the first signal line SL-1 in the X direction. The three signal lines SL connected to the pixel Pix(1,1) on the left side and the three signal lines SL connected to the pixel Pix(2,1) on the right side are arranged in the X direction in the same arrangement relationship. However, the arrangement is not limited to this, and the arrangement of the signal line groups SLG may be changed as appropriate. In one signal line group SLG, a plurality of signal lines SL are arranged at intervals in the X direction.

[0058] In each of the multiple pixels Pix, the light-emitting elements 3R, 3G, and 3B are arranged adjacent to each other in the X direction and are provided near the intersection of the signal line group SLG and the gate line GL. Specifically, in the X direction, the signal line group SLG is provided between the multiple light-emitting elements 3 that constitute the pixel Pix(1,1) and the multiple light-emitting elements 3 that constitute the pixel Pix(2,1). In addition, in the Y direction, the gate line GL that intersects with the signal line group SLG is provided between the multiple light-emitting elements 3 that constitute the pixel Pix(1,1) and the multiple light-emitting elements 3 that constitute the pixel Pix(2,1).

[0059] The light emitting elements 3R, 3G, and 3B constituting the pixel Pix(1,1) are arranged in order in the X direction. The light emitting elements 3R, 3G, and 3B are arranged adjacent to the signal line group SLG in the X direction (-X direction). The light emitting elements 3R, 3G, and 3B constituting the pixel Pix(1,1) are arranged adjacent to the gate line GL that intersects with the signal line group SLG in the -Y direction.

[0060] The light-emitting elements 3R, 3G, and 3B constituting the pixel Pix(2,1) are arranged in order in the X direction, and are disposed adjacent to the signal line group SLG in the X direction (+X direction). The light-emitting elements 3R, 3G, and 3B constituting the pixel Pix(2,1) are disposed adjacent to each other in the +Y direction of the gate line GL. The multiple light-emitting elements 3 of the pixel Pix(1,1) and the multiple light-emitting elements 3 of the pixel Pix(2,1) are arranged in the same positional relationship in the X direction. However, the order of arrangement of the multiple light-emitting elements 3 may be different for each pixel Pix.

[0061] The light emitting elements 3 are connected to the signal lines SL via the semiconductor layer 71 of the write transistors SST. The light emitting elements 3 are electrically connected to the anode power lines LVDD via conductive connectors in contact holes penetrating the insulating layer. The anode power lines LVDD and the cathode power lines LVSS are provided so as to overlap the gate lines GL and extend in the X direction. In FIG. 5, the anode power lines LVDD and the cathode power lines LVSS are represented by two-dot chain lines to make the drawing easier to understand. The gate lines GL are formed on the support substrate 21, the anode power lines LVDD are formed on the gate lines GL, and the cathode power lines LVSS are formed on the anode power lines LVDD.

[0062] The configurations of pixels Pix(3,1) and Pix(4,1) are similar to those of pixels Pix(1,1) and Pix(2,1). That is, for every two pixels Pix adjacent in the X direction, a plurality of signal lines SL are bundled and arranged to form a signal line group SLG. Then, a plurality of light-emitting elements 3 constituting each of the two pixels Pix adjacent in the X direction are arranged close to the respective signal line groups SLG. Also, the plurality of light-emitting elements 3 of pixel Pix(2,1) and the plurality of light-emitting elements 3 of pixel Pix(3,1) are arranged between the signal line groups SLG adjacent in the X direction.

[0063] As described above, the array substrate 2 has a non-light-transmitting area NCA, and various wirings such as the signal lines SL and gate lines GL, and the light-emitting elements 3 are non-light-transmitting portions.

[0064] <Effects of this embodiment> In transparent display devices, heat generation from the light-emitting elements themselves and the substrate circuitry can be a problem. In particular, in transparent display devices in which self-emitting elements are arranged in each pixel, the self-emitting elements generate heat over the entire array substrate, which can easily cause a decrease in light-emitting efficiency due to a rise in the temperature of the light-emitting elements, or damage to elements (such as light-emitting elements or transistors) or circuits due to high temperatures. To prevent such problems due to temperature rise, there is a method of cooling the heat-generating parts using a heat sink or the like.

[0065] However, because metal heat sinks are opaque, they cannot be used in transparent display devices that require transparency. For example, there is a method of cooling a display panel by running a cooling medium such as water through an opaque metal pipe, but as with the above, cooling a display panel using an opaque part impairs the light transmittance of the transparent display device and therefore cannot be used.

[0066] If a heat sink is not provided, measures to suppress heat generation may be taken such as reducing the brightness of the light-emitting element or reducing the density of the light-emitting element, which is a heat source. However, in such cases, the performance such as visibility and resolution of the image displayed on the transparent display device is reduced.

[0067] Therefore, in this embodiment, as shown in FIG. 1, a flow path is formed on the second main surface side (back side) of the array substrate 2, surrounded by the transparent substrate 5, the sealing material 4, and the array substrate 2. By flowing a cooling medium such as water through the flow path, the transparent display device 1 (mainly the array substrate 2) can be cooled. Furthermore, the array substrate 2 and the transparent substrate 5, which overlap each other in a plan view, are both translucent, and the cooling medium flowing through the flow path is also transparent. Therefore, the transparent display device 1 can be cooled without impairing the translucency of the transparent display device 1. Therefore, it is possible to prevent a decrease in the light-emitting efficiency of the light-emitting element due to a rise in temperature, and damage to the element or circuit due to high temperature. Since it is possible to suppress the rise in temperature, it is also possible to further increase the brightness of the light-emitting element. As a result, the performance of the transparent display device can be improved.

[0068] (Embodiment 2) In the above embodiment 1, the structure in which the cooling medium flows linearly from the inlet on the right side to the outlet on the left side of the transparent display device has been described, but the inlet and outlet of the cooling medium do not need to be formed on each of a pair of parallel side surfaces. For example, the inlet and outlet may be formed on the same side surface, or may be formed on two side surfaces perpendicular to each other.

[0069] Moreover, the flow path in the transparent display device does not need to be a straight line. Below, a structure in which a meandering flow path is formed by forming a wall made of a transparent material between the array substrate and the transparent substrate will be described with reference to Figs. 6 and 7. Fig. 6 is a plan view showing a transparent display device according to this embodiment. Fig. 7 is a cross-sectional view taken along line AA in Fig. 6. In Figs. 6 and 14 and 16 used in the following description, the sealant 4 is hatched to make the drawings easier to understand.

[0070] 6 and 7, in addition to the sealing material 4, there are a plurality of connecting parts (plate material, wall material, flow path forming parts) 10 made of a transparent material between the array substrate 2 and the transparent substrate 5. The array substrate 2 and the transparent substrate 5 are connected by the connecting parts 10. That is, the connecting parts 10 and the sealing material 4 are in contact with the second main surface 12 of the array substrate 2 and the third main surface 13 of the transparent substrate 5. In other words, the connecting parts 10 and the sealing material 4 are formed across the array substrate 2 and the transparent substrate 5. The connecting parts 10 are made of a material having light transmissibility, and for example, PDMS (dimethylpolysiloxane), a type of silicone, can be used as the material.

[0071] The connection portion 10 has a plate-like shape and is provided as a wall separating one flow path from another. The shape (layout) of the connection portion 10 in plan view can be selected from various shapes, such as a straight shape, an L-shape having a 90-degree bend, or a curved shape. In FIG. 6, both the L-shaped connection portion 10 and the straight connection portion 10 have one end (part) in plan view in contact with the sealing material 4 on the outer periphery of the transparent display device 1a. This is to prevent the connection portion 10 being separated from the sealing material 4 from generating an area in which almost no cooling medium flows in the space between the array substrate 2 and the transparent substrate 5, causing variations in temperature of the transparent display device 1a.

[0072] As shown in FIG. 7, the connection portion 10 is pressed against the second main surface 12 of the array substrate 2, so that the end portion on the array substrate 2 side in the Z direction is deformed so as to expand in the horizontal direction along the XY plane. The connection portions 10 are spaced apart from each other, and a flow path is formed between them. The sealing material 4 covers not only a part of the second main surface 12 of the array substrate 2 and a part of the third main surface 13 of the transparent substrate 5, but also the side surfaces of the array substrate 2 and the transparent substrate 5 in the direction along the XY plane. However, the sealing material 4 does not have to cover the side surfaces. Also, a part of the sealing material 4 may cover the outer periphery of the first main surface 11 of the array substrate 2 or the outer periphery of the fourth main surface 14 of the transparent substrate 5.

[0073] Since the connection portion 10 is formed between the array substrate 2 and the transparent substrate 5, the flow path is bent once or multiple times between the inlet 9a and the outlet 9b, and the cooling medium flows along the flow path. In FIG. 6, the inlet 9a and the outlet 9b are formed on one side surface in the X direction of the transparent display device 1a. As shown by the arrows in FIG. 6, the cooling medium that enters the transparent display device 1a from the inlet 9a flows in the -Y direction, +X direction, +Y direction, +X direction, -Y direction, and -X direction in this order, and exits the transparent display device 1a from the outlet 9b. Here, the transparent display device 1a has a flow path that flows in a first direction and a flow path that flows in a direction different from the first direction, and these flow paths are separated from each other by the transparent connection portion 10. In other words, the connection portion 10 defines the flow path.

[0074] Although the connection portion 10 is made of a transparent material, if it is visible to an observer, it may impair the translucency of the transparent display device 1a. Therefore, in a plan view, the connection portion 10 may be arranged to overlap a non-translucent portion (e.g., various wirings such as the signal line SL and the gate line GL) shown in Fig. 5, and the connection portion 10 and the non-translucent portion may extend in the same direction in the overlapping region. This makes it possible to suppress a decrease in the translucency of the transparent display device 1a due to the provision of the connection portion 10.

[0075] Next, a method for manufacturing the transparent display device of the present embodiment will be described with reference to the cross-sectional views of FIGS.

[0076] First, as shown in FIG. 8, an array substrate 2 and a transparent substrate 5 are prepared. The array substrate 2 has pixel circuits and light-emitting elements on a support substrate. The transparent substrate 5 has a plurality of connection parts 10 connected on the third main surface 13. The connection parts 10 can be formed, for example, by pouring liquid PDMS into the cavities of a mold in a state where the mold is placed in close contact with the third main surface 13 of the transparent substrate 5. The connection parts 10 may be formed on the second main surface 12 of the array substrate 2 instead of on the transparent substrate 5. The cross-sectional shape of the connection parts 10 is rectangular (for example, oblong).

[0077] Next, as shown in FIG. 9, the array substrate 2 and the transparent substrate 5 are pressed against each other with the second main surface 12 of the array substrate 2 and the third main surface 13 of the transparent substrate 5 facing each other. By pressing the array substrate 2 and the transparent substrate 5 against each other, the connection portion 10 between the array substrate 2 and the transparent substrate 5 is in close contact with both the array substrate 2 and the transparent substrate 5. At this time, the connection portion 10 has flexibility and is deformed by being pressed against the array substrate 2. As a result, the width of the end portion on the array substrate 2 side becomes wider than the width of the end portion on the transparent substrate 5 side in the direction along the XY plane. The fact that the connection portion 10 is deformed and its cross-sectional shape is no longer rectangular means that the connection portion 10 is in close contact with the array substrate 2 and the transparent substrate 5.

[0078] Next, as shown in Fig. 10, with the connection portion 10 in contact with both the array substrate 2 and the transparent substrate 5, a sealant 4 is formed in contact with each end of the array substrate 2 and the transparent substrate 5 in the direction along the XY plane. The sealant 4 is formed near the outer periphery of each of the array substrate 2 and the transparent substrate 5 in a plan view. However, by providing a portion in the outer periphery of each of the array substrate 2 and the transparent substrate 5 where the sealant 4 is not formed, two openings 8, which are the entrance 9a and the exit 9b described with reference to Fig. 6, are formed. By forming the sealant 4, the array substrate 2 and the transparent substrate 5 are fixed to each other, and the transparent display device 1a is approximately completed.

[0079] The sealing material 4 can be formed, for example, by hardening a liquid sealing material 4. The sealing material 4 is formed, for example, while the array substrate 2 and the transparent substrate 5 are pressed against each other, and the sealing material 4 is hardened in this state. This allows the connection portion 10 to maintain a state in which it is in close contact with both the array substrate 2 and the transparent substrate 5. By bringing the connection portion 10 into close contact with the array substrate 2 and the transparent substrate 5, it is possible to prevent the cooling medium from leaking from a gap between the connection portion 10 and the array substrate 2 or the transparent substrate 5.

[0080] Here, the sealing material 4 covers not only a part of the second main surface 12 of the array substrate 2 and a part of the third main surface 13 of the transparent substrate 5, but also the side surfaces of the array substrate 2 and the transparent substrate 5 in the direction along the XY plane. However, the sealing material 4 does not have to cover the side surfaces. In addition, a part of the sealing material 4 may cover the outer periphery of the first main surface 11 of the array substrate 2 or the outer periphery of the fourth main surface 14 of the array substrate 2.

[0081] <Effects of this embodiment> In this embodiment, the connection portion 10 is provided to form the flow path in a complex bent pattern in a plan view. This allows the cooling medium to flow evenly over the entire second main surface 12 of the array substrate 2. In other words, it is possible to prevent unintended differences in the flow of the cooling medium between a predetermined area and other areas of the second main surface 12, thereby preventing variations in the cooling effect. In other words, it is possible to improve the cooling efficiency.

[0082] In addition, the position of the cooling medium inlet 9a and outlet 9b can be determined with a high degree of freedom, making the design easier. It is considered that the aesthetic appearance of the transparent display device is impaired if an opaque portion (frame) is provided on the side of the display panel. Therefore, it may be preferable to aggregate the cooling medium inlet 9a and outlet 9b on one side of the transparent display device 1a in a plan view.

[0083] In addition, some flow paths have a narrow width in the direction perpendicular to the direction in which the cooling medium flows, while others have a wide width. In this case, the cooling medium flows faster in the narrow flow paths than in the wide flow paths. This makes it possible to strongly cool areas that are particularly prone to high temperatures, and intentionally weaken the cooling effect in areas where the temperature is difficult to increase. This makes it possible to prevent localized temperature increases and keep the overall temperature of the transparent display device 1 constant. In other words, it is possible to prevent temperature variations in the transparent display device 1.

[0084] <Variation 1> A first modified example of the present embodiment will be described with reference to FIGS.

[0085] In Figures 8 to 10, the sealing material 4 is formed in a state in which the connection portion 10 is in contact with both the array substrate 2 and the transparent substrate 5. However, even if the connection portion 10 is not in contact with one of the substrates, the connection portion 10 may be adhered to the one of the substrates by utilizing the shrinkage that occurs when the sealing material hardens.

[0086] In this modification, first, as described with reference to FIG. 8, the array substrate 2, the transparent substrate 5, and the connection portion 10 in contact with one of them are prepared.

[0087] 11, a sealant 4a is formed in contact with the respective ends of the array substrate 2 and the transparent substrate 5 in the direction along the XY plane. At this time, the connection portion 10 may be in contact with one of the array substrate 2 and the transparent substrate 5, or may be separated from the one of the substrates. A material that has a high shrinkage rate when hardened from a liquid state to a solid state is used for the sealant 4a.

[0088] Next, as shown in Fig. 12, the sealing material 4a is cured to form the transparent display device 1b of this modification. At this time, the sealing material 4a contracts as it cures, shortening its length in the Z direction. This causes a force to act on the array substrate 2 and the transparent substrate 5 to approach each other, so that the connection portion 10 adheres closely to both the array substrate 2 and the transparent substrate 5. By adhering the connection portion 10 to the array substrate 2 and the transparent substrate 5, it is possible to prevent the cooling medium from leaking from the gap between the connection portion 10 and the array substrate 2 or the transparent substrate 5.

[0089] By forming the transparent display device 1b in this manner by utilizing the shrinkage of the sealing material 4a, the process of pressing the array substrate 2 and the transparent substrate 5 against each other and the device therefor are not required as described with reference to Fig. 9, and the manufacturing process of the transparent display device 1b is simplified, thereby reducing the manufacturing cost of the transparent display device 1b.

[0090] <Variation 2> Hereinafter, a case where a connection portion is also formed on the outer periphery of the display panel will be described with reference to FIGS.

[0091] Here, as a comparative example, a case will be described in which a sealing material is formed after a connecting portion is formed between an array substrate and a transparent substrate, and a flow path having the sealing material and the connecting portion as walls is formed.

[0092] In the comparative example, first, as shown in Fig. 15, a connection part 10 is formed on the third main surface of a transparent substrate 5. The one or more connection parts 10 formed here do not include any part that constitutes the outermost wall of a flow channel in a transparent display device that is completed later.

[0093] 16, the array substrate 2 (not shown) and the transparent substrate 5 are opposed to each other and pressed against each other to bring the connecting portions 10 into close contact with the array substrate 2, and in this state, the sealing material 4 is formed. In this way, the transparent display device 1x is formed.

[0094] At this time, as shown by defect X1, there is a risk that the sealant 4 constituting the wall of the flow path and the connection portion 10 will unintentionally separate. Such defect X1 occurs when there is not enough sealant 4, when the viscosity of the sealant 4 is insufficient, or when the viscosity of the sealant 4 is too high and the sealant 4 flows away, causing a gap in a place that should be sealed. When such a gap occurs, an unintended flow path is formed, making it difficult for the cooling medium to flow through the intended flow path, and sufficient cooling effect cannot be obtained.

[0095] Furthermore, as shown by defect X2, there is a risk that the sealant 4 may get into a location where it is not required. Such defect X2 occurs when the amount of sealant 4 is large or when the viscosity of the sealant 4 is low. If the sealant 4 gets into the flow path excessively, problems such as the flow path narrowing and obstructing the flow of the cooling medium, a part of the array substrate 2 being unable to be cooled, or the flow path being blocked may occur.

[0096] Furthermore, as shown by defect X3, there is a risk that an opening in the sealant 4 will be formed in a location other than the inlet 9a or outlet 9b. Such a defect X3 can occur for the same reason as defect X1. If an opening such as defect X3 exists, the flow path will not be sealed and an open portion will exist, causing the cooling medium to leak out and preventing a sufficient cooling effect.

[0097] Therefore, in this modification, first, as shown in FIG. 13, a connection portion 10 is formed on the third main surface of the transparent substrate 5. The one or more connection portions 10 formed here include a portion that constitutes the outermost wall of the flow path in the transparent display device that will be completed later. That is, in a plan view, the connection portion 10 has a portion that is formed along the outer periphery of the transparent substrate 5 or the array substrate 2 and has at least two openings 8a, 8b that will later correspond to the inlet 9a and the outlet 9b, respectively. In addition, the connection portion 10 also includes a portion located inside surrounded by the portion formed along the outer periphery of the transparent substrate 5 or the array substrate 2 in a plan view, and these portions are in contact with each other.

[0098] 14, the array substrate 2 (not shown) and the transparent substrate 5 are pressed against each other while facing each other to bring the connecting portion 10 into close contact with the array substrate 2, and the sealing material 4 is formed in this state. In this manner, the transparent display device 1c is formed. Note that the connecting portion 10 may be brought into close contact with the array substrate 2 and the transparent substrate 5 by utilizing the shrinkage of the sealing material 4 when it hardens, as in the first modification. In this manner, the transparent display device 1c of this modification is formed.

[0099] Here, the sealing material 4 is formed outside the connection portion 10, which is a portion formed along the outer periphery of the transparent substrate 5 or the array substrate 2 in a plan view. In other words, the sealing material 4 is formed on the side of each end of the transparent substrate 5 or the array substrate 2, rather than the connection portion 10, which is a portion formed along the outer periphery of the transparent substrate 5 or the array substrate 2 in a plan view. In other words, all of the walls constituting the flow path of the transparent display device 1c are constituted by the connection portion 10. In this case, the sealing material 4 is used to fix the array substrate 2 and the transparent substrate 5 to each other, and is not used to form the flow path. Therefore, the sealing material 4 does not come into contact with the cooling medium.

[0100] In a plan view, the sealing material 4 is in continuous contact with the connection portion 10 along the outer periphery of the transparent substrate 5 or the array substrate 2. The connection portion 10 is a portion formed along the outer periphery of the transparent substrate 5 or the array substrate 2, and has openings 8a, 8b corresponding to the inlet 9a and the outlet 9b.

[0101] As a result, defect X1 does not occur, in which a gap occurs in the flow path due to insufficient sealant 4 or the like. Also, defect X2 does not occur, in which sealant 4 gets into the flow path due to an excess of sealant 4 or the like. Also, defect X3 does not occur, in which an opening occurs in the flow path due to an insufficient sealant 4 or the like. Therefore, this modified example can prevent a decrease in the cooling effect.

[0102] Although the embodiment and representative modified examples have been described above, the above-mentioned technology can be applied to various modified examples other than the exemplified modified examples. For example, in the above-mentioned embodiments 1 and 2, the light emitting element 3 is an LED or an OLED, but the display panel of the present embodiment may be a liquid crystal panel having a liquid crystal layer on an array substrate. In that case, for example, a light source is installed on the side side (outside in the X direction or Y direction) of the display panel, and the light source irradiates light onto the liquid crystal layer. At this time, the cooling medium cools the transparent display device by removing heat conducted from the light source to the display panel or heat generated from the pixel circuit.

[0103] Within the scope of the concept of the present invention, a person skilled in the art may come up with various modifications and alterations, and it is understood that these modifications and alterations also fall within the scope of the present invention. For example, those in which a person skilled in the art appropriately adds, deletes, or modifies the design of the above-mentioned embodiments, or adds, omits, or modifies the conditions of steps, are also included in the scope of the present invention as long as they include the gist of the present invention. [Industrial Applicability]

[0104] The present invention can be used in the manufacture of light emitting devices. [Explanation of symbols]

[0105] 1, 1a, 1b, 1c, 1x transparent display device 2 Array Board 3, 3B, 3G, 3R Light-emitting elements 4, 4a Encapsulating material 5 Transparent substrate 6. Pump 7 Cooling section 8, 8a, 8b opening 9a entrance 9b exit 10 Connection Pix X1, X2, X3 Defects

Claims

1. an array substrate having a light-transmitting property, the array substrate including a first main surface and a second main surface opposite to the first main surface, the array substrate including a display unit; a transparent substrate having light transmitting properties and including a third main surface and a fourth main surface opposite to the third main surface; a plurality of sealing materials connecting the second main surface and the third main surface in a direction perpendicular to the first main surface; A first opening which is an inlet for a cooling medium; A second opening which is an outlet for the cooling medium; a flow path surrounded by the array substrate, the transparent substrate, and the plurality of sealing materials; having The cooling medium is translucent, The flow path connects the first opening and the second opening.

2. 2. The transparent display device according to claim 1, The cooling medium flows in contact with the second main surface of the array substrate.

3. 2. The transparent display device according to claim 1, a connecting portion having a light-transmitting property and connecting the second main surface and the third main surface to each other; The connection portion defines the flow path.

4. 2. The transparent display device according to claim 1, A transparent display device, wherein the display portion of the array substrate is composed of a support substrate and a plurality of light-emitting elements formed on the support substrate and aligned along the first main surface of the array substrate.

5. 5. The transparent display device according to claim 4, A transparent display device, wherein each of the plurality of light-emitting elements is a light-emitting diode or an organic light-emitting diode.

6. 4. The transparent display device according to claim 3, the array substrate includes a support substrate, a plurality of wirings formed on the support substrate, and a plurality of light-emitting elements arranged along the first main surface of the array substrate; A transparent display device, wherein, in a plan view, a portion of the plurality of wirings and the connection portion extend in the same direction in an overlapping region.

7. 2. The transparent display device according to claim 1, a circulation flow path that circulates the cooling medium from the second opening through an outside of the transparent display device to the first opening; A cooling unit provided in the circulation flow path; The transparent display device further comprises:

Images