Cyclic Plasma Etching Process
Patent Information
- Application Number
- JP2023545907
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-01-29
- Filing Date
- 2022-01-25
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2042-01-25
AI Technical Summary
The challenge in semiconductor manufacturing is to accurately pattern features at atomic scale dimensions with uniformity and reproducibility, especially with the use of less common materials like organics and chalcogenides, while minimizing material loss and deformation in plasma etching processes.
A periodic plasma etching process is employed, comprising multiple cycles with three distinct components: plasma chemical dry etching using non-polymerizable fluorine compounds, a passive cool-down and clean-up phase, and a plasma surface modification with hydrogen radicals to selectively remove silicon-based materials without deforming organic layers.
This method effectively removes silicon-based materials with high selectivity to organics, reducing material loss, deformation, and deposition of etch byproducts, thereby maintaining pattern quality and integrity in semiconductor devices.
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
[Technical field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS This disclosure claims the benefit of U.S. Non-Provisional Patent Application No. 17 / 162,623, entitled “CYCLIC PLASMA ETCH PROCESS,” filed on January 29, 2021, the entire contents of which are incorporated by reference herein.
[0002] The present invention relates generally to methods for processing semiconductor devices, and in particular embodiments to systems and methods for cyclic plasma etching. [Background technology]
[0003] Typically, semiconductor devices, such as integrated circuits (ICs), are fabricated by sequentially depositing and patterning layers of dielectric, conductive, and semiconducting materials on a substrate to form a network of monolithically integrated electronic components and interconnect elements (e.g., transistors, resistors, capacitors, metal lines, contacts, and vias). Many of the processing steps used to form the constituent structures of semiconductor devices are performed using plasma processes. Plasma processing techniques include chemical dry etching (CDE) (e.g., plasma ashing), physical or sputter etching, reactive ion etching (RIE), plasma enhanced chemical vapor deposition (PECVD), plasma enhanced atomic layer etching (PEALE), and atomic layer deposition (PEALD).
[0004] The voracious demand for low-cost electronic devices with advanced functionality has led to a reduction in minimum feature size to reduce price by approximately doubling the packing density of components with each successive technology node. Innovations in patterning, such as immersion photolithography, multiple patterning, and 13.5 nm wavelength extreme ultraviolet (EUV) optical systems, have reduced the limiting feature size to near 10 nanometers. At the same time, uncommon materials such as organics, ferroelectrics, and chalcogenides are increasingly being used in products. This scenario poses a challenge for plasma technologies to provide processes that pattern features with accuracy, precision, and profile control, sometimes at atomic-scale dimensions. Meeting this challenge with the uniformity and repeatability required for high-volume IC manufacturing requires further innovation. Summary of the Invention [Means for solving the problem]
[0005] In one embodiment, a method for treating a substrate includes performing a cyclic plasma etching process including a plurality of cycles, each cycle including exposing a surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed with a first gaseous mixture including a non-polymerized fluorine compound to cause a chemical reaction with the surface of the substrate. The method includes flowing a second gaseous mixture over the substrate while inhibiting a chemical reaction with the surface of the substrate. The method includes exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed with a third gaseous mixture including a nitrogen and hydrogen containing gas.
[0006] In one embodiment, a method for processing a substrate includes performing a cyclical plasma etching process including a plurality of cycles, each cycle including performing a plasma etching process on a surface of a substrate including a silicon-based material to partially remove the silicon-based material, cooling the substrate while simultaneously removing residual gaseous by-products, and performing a plasma surface modification process on the substrate.
[0007] In one embodiment, a method of fabricating a semiconductor device includes forming a patterned layer stack adjacent to an underlying layer on a substrate, the patterned layer stack including an organic layer adjacent to the underlying layer and a hard mask layer comprising a silicon-based material on the organic layer, and loading the substrate into a plasma processing chamber. The method includes performing a cyclical plasma etching process in situ in the plasma processing chamber, the cyclical plasma etching process selectively removing the hard mask layer comprising the silicon-based material relative to the organic layer.
[0008] For a more complete understanding of the present invention, and the advantages thereof, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which: [Brief description of the drawings]
[0009] [Figure 1A-1C] 1A-1C show cross-sectional views of a substrate at various intermediate stages of manufacture in a manufacturing process flow undergoing a cyclic plasma etch process according to various embodiments, with FIG. 1A showing the incoming substrate, FIG. 1B showing after the pattern transfer etch, and FIG. 1C showing after the completion of the cyclic plasma etch process. [Figure 1D] 1 illustrates a flow diagram of a cyclic plasma etch process in accordance with various embodiments. [Figure 1E] FIG. 1E is a detailed flow diagram of the cyclic plasma etching process shown in the flow diagram of FIG. 1D. [Diagram 2] 1D shows a cross-sectional view of a plasma system implementing a time-multiplexed implementation of the cyclical plasma etch process shown in the flow diagram of FIG. [Diagram 3] 1D depicts a cross-sectional view of a plasma system performing a spatially separated implementation of the cyclical plasma etch process shown in the flow diagram of FIG. [Figure 4A-4F]4A shows a substrate at various intermediate stages of manufacture in a manufacturing process flow including a cyclic plasma etching process as shown in the flow diagram of FIG. 1D, where FIG. 4A shows the substrate after forming a patterned sacrificial mask layer, FIG. 4B shows the substrate after patterning the silicon-based layer, FIG. 4C shows the substrate after transferring the pattern to the organic layer, FIG. 4D shows the substrate after a plasma-enhanced dry etching (CDE) process, FIG. 4E shows the substrate after a cool down and clean up process, and FIG. 4F shows a plasma surface modification process. [Figure 4G] 4A-4F show cross-sectional views of a substrate after completing the cyclic plasma etching process shown in FIG. [Diagram 5] 1D illustrates a timing diagram of one cycle of a time-multiplexed implementation of the cyclic plasma etching process shown in the flow diagram of FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] This disclosure describes embodiments of a cyclic plasma etching method for removing silicon-based materials with selectivity to organics. The embodiments described herein provide the advantages of efficiently removing silicon-based materials while reducing material loss from the underlying organic layer, reducing deformation of sidewalls of features in a patterned organic layer that may be exposed to etchants, and reducing defects caused by deposition of etch by-products. The innovative method achieves these advantages by using a cyclic etching technique that allows the etching process to be divided into three separate components, as further described below.
[0011] A general embodiment for implementing the cyclic plasma process is described using the cross-sectional views of Figures 1A-1C and the flow chart of Figures 1D-1E. Further details and embodiments of the method are described using Figures 4A-4F and 5. A system for implementing the method is described using Figures 2 and 3.
[0012] With reference to FIG. 1A, a cyclic plasma etching technique may be performed on a stack of layers in a substrate layer 111. In FIG. 1A, the top layer is a silicon-based layer 141, which is the target layer of the removal process. Processing, described in detail below, removes silicon-based material selectively to an organic layer 131 disposed below the silicon-based layer 141. Below the organic layer 131 is an underlayer 121 formed on a stack of layers collectively shown as the substrate layer 111. In some embodiments of a process flow including cyclic plasma etching, the incoming substrate for the cyclic plasma etching may be the stack of layers in the first intermediate structure 101. In some other embodiments, the incoming substrate for the cyclic plasma etching may be the stack of layers in the second intermediate structure 103 shown in FIG. 1B. The second intermediate structure 103 may be formed by patterning the silicon-based layer 141 and the organic layer 131 of the first intermediate structure 101.
[0013] In various embodiments, silicon-based layer 141 may include materials used as silicon antireflective coatings (SiARCs), such as silicon oxide, silicon nitride, silicon oxynitride, or silicon-rich silicon oxide. Organic layer 131 may include an organic dielectric layer (ODL), an organic planarization layer (OPL), a spin-on carbon (SOC), or an amorphous carbon layer (ACL). Underlayer 121 may include, for example, titanium nitride, aluminum oxide, titanium oxide, or aluminum nitride.
[0014] 1B shows the patterned second intermediate structure 103 after a pattern transfer etch is performed using the patterned silicon-based layer 141 as an etch mask and the underlayer 121 as an etch stop layer to pattern the organic layer 131. The silicon-based layer 141 may have been patterned using suitable photolithography and plasma etching techniques. As described in more detail below with reference to FIGS. 4A-4C, the process steps used to pattern the silicon-based layer 141 and the organic layer 131 may be the same as the process steps used to pattern the silicon-based layer 141 and the organic layer 131.
[0015] In various applications, a cyclic plasma etch may be used to strip the patterned silicon-based layer 141 shown in Figure 1B. The cyclic plasma etch process is designed to remove the silicon-based layer 141 from the second intermediate structure 103 with selectivity to the exposed organic layer 131 and exposed underlayer 121 while simultaneously preserving the integrity of the patterned features, such as the cavity 133 in Figure 1B.
[0016] The third intermediate structure 105 shown in FIG. 1C shows the structure after the plasma cyclic etching is completed. As mentioned above and shown in FIG. 1B and FIG. 1C, one advantage of using a plasma cyclic etching process to remove the silicon-based layer 141 is that the original dimensions and shape of the cavity 133 are largely preserved in the cavity 135 (of FIG. 1C) after the silicon-based layer 141 is removed. The process of removing the silicon-based layer 141 did not significantly deform the patterned features in the organic layer 131. The deformation of the features may include rounding of edges along the surface of the cavity 135, undercutting and gouging at the bottom of the cavity 135, changes in the sidewall profile, and increased surface roughness. Some of the metrics monitored during fabrication are affected by deformation of the patterned features. These include the critical dimensions (CD), e.g., the width of the cavity 135, and the sidewall angle of the sidewalls of the cavity 135. In various embodiments, a plasma cyclic etch may be used to remove silicon-based layer 141, which may result in an upper limit for the change in CD from its target value ranging from about 1 nm to about 1.8 nm and an upper limit for the change in sidewall angle ranging from 0.4° to 0.5°, with the respective target values for CD ranging from about 10 nm to about 18 nm and sidewall angle ranging from about 85° to about 90°.
[0017] The three separate components of the cyclic plasma etch are explained in the flow diagram shown in Figure ID. A more detailed flow diagram in Figure IE explains the function of each component.
[0018] FIG. 1D shows a flow diagram of a cyclic plasma etching process 100 that can be used to remove exposed silicon-based materials from a substrate. As shown in FIG. 1D, each cycle includes three separate components that are subsequently performed on a substrate. First, a plasma-chemical dry etching (CDE) process 110 is performed to remove the silicon-based materials by exposing the surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed with a first gaseous mixture containing a non-polymerizing fluorine compound. The etching chemistry used for CDE selectively removes the silicon-based materials with respect to organic materials and underlying materials that are below the organic layer. In one embodiment, the CDE process removes the silicon-based materials isotropically. This is followed by a passive cool-down and clean-up process 130, during which chemical reactions are suppressed, for example by powering down the plasma. Flowing the second gaseous mixture, which does not induce chemical reactions, can meet two objectives: cooling the substrate and cleaning up the surface by removing residual gaseous by-products. After the cool-down and clean-up processes are completed, a plasma surface modification process 150 is performed by exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed using a third gaseous mixture including a gas containing nitrogen and hydrogen atoms.
[0019] Referring now to FIG. 1E, in one or more embodiments, a plasma-chemical dry etching (CDE) process 110 includes forming a first gas discharge plasma to generate fluorine radicals (box 112) and exposing a surface of a substrate to a flux of fluorine radicals to remove silicon-based material (box 114). As shown in box 112, a first gaseous mixture used in forming the plasma includes a non-polymerized fluorine compound. In various embodiments, the first gaseous mixture may include nitrogen trifluoride (NF3), sulfur hexafluoride (SF6), or carbon tetrafluoride (CF4). The first gaseous mixture may include an inert gas, such as argon and helium, as a diluent. A small amount of oxygen (O2) may be added with the SF6. Similarly, a small amount of O2 may be added when CF4 is used instead of SF6. The O2 content may be, for example, 2% to 10% of the total amount of process gas used for the first gaseous mixture. Adding a small amount of O2 can effectively suppress the deposition of solid sulfur or carbon compounds. Oxygen cannot be added to NF3 because no solid deposits containing nitrogen will form.
[0020] For the etching chemistry used to remove the silicon-based layer 141 (shown in FIG. 1B), solid by-products are undesirable because they may randomly deposit on the surface and cause defects by blocking the chemical reactions used to remove the silicon-based material. Reactive gases that may cause polymers to form and deposit, often unevenly, on the exposed surfaces of the organic layer 131 in FIG. 1B and FIG. 1C are avoided. For example, when hydrofluorocarbons (CHF3, CH3F, and CH2F2) or perfluorocarbons with relatively high carbon content (e.g., C2F6 and C3F8) are used as sources of fluorine radicals, polymerization reactions may occur. The polymers may deposit along the sidewalls of the cavity 135 in FIG. 1C, changing the CD (width of the opening) and the sidewall angle of the cavity 135. In the embodiment of the plasma CDE process 110 described in this disclosure, the fluorine etching chemistry is selected to suppress the deposition of solid by-products. Hydrofluorocarbons (CHF3, CH3F, and CH2F2) are excluded as sources of fluorine radicals used for the cyclic plasma etching process 100. The presence of hydrogen in hydrofluorocarbons can induce the formation of solid by-products due to polymerization. Perfluorocarbons such as C2F6 and C3F8 are also excluded because polymerization can occur in etch chemistries that use perfluorocarbons with a relatively high carbon content. The higher the carbon to fluorine ratio, the more likely the chemical reaction used to remove silicon-based materials is to cause polymerization and the more likely solid deposits to form on the surface of the organic layer 131.
[0021] As mentioned above, etch chemistries using NF3 are non-polymerizing and do not produce solid deposits during the etching process. The non-polymerizing properties of CF4 and SF6 can be attributed to the low ratio of carbon to fluorine atoms in CF4 (C:F=1:4 in CF4) and the low ratio of sulfur to fluorine atoms in SF6 (S:F=1:6 in SF6). Non-polymerizing etch chemistries with negligible solid by-products are often referred to as lean etch chemistries. Because the source of fluorine in various embodiments of the cyclic plasma etch process 100 is either NF3, CF4, or SF6, the etch chemistries used to etch silicon-based materials in exemplary embodiments of the present disclosure may be referred to as lean chemistries or non-polymerizing fluorine-based chemistries, as shown in box 114 of FIG. 1E.
[0022] The flux of fluorine radicals chemically removes silicon-based materials by reacting with silicon to form the volatile gaseous by-product silicon tetrafluoride (SiF4). Other volatile gaseous by-products may include oxides of nitrogen (e.g., nitric oxide (NO), nitrogen dioxide (NO2), and nitrous oxide (NO)) in embodiments using NF3, oxides of sulfur and oxyfluorides (e.g., SO2 and SOF2) in embodiments using SF6, and oxides of carbon (e.g., CO and CO2) in embodiments using CF4. Exposed surfaces of organic materials and underlying layers may be fluorinated by adsorption of fluorine radicals on the exposed organic materials.
[0023] As shown in FIG. 1D and FIG. 1E, a passive cool-down and clean-up process 130 is performed after the plasma-enhanced dry etching (CDE) process 110. The chemical reactions used to remove silicon-based materials are exothermic. If the temperature rises to a temperature close to the glass transition temperature of the organic material, the substrate temperature may rise rapidly, which may result in thermal deformation of features in the organic layer. During the cool-down and clean-up process 130, a second gaseous mixture with a sufficiently high flow rate is used to cool the substrate and remove residual gaseous by-products. As shown in boxes 132 and 134, the cool-down and clean-up process 130 is performed without forming a plasma to ensure that the second gaseous mixture does not induce chemical reactions as it flows over the substrate. Plasma formation during cool-down can be prevented by shutting off the radio frequency (RF) power to the plasma system, in which case a cyclic plasma process is realized by using time multiplexing to separate the three components of each cycle in time. In a spatially separated implementation, the substrate is moved to a portion of the plasma system that is not coupled to the RF power source. A relatively high pressure may be selected to achieve an increased gas flow rate for more efficient cooling and cleanup, as shown in box 134. The composition of the second gaseous mixture is selected such that the gas does not chemically modify the surface of the substrate at the prevailing temperature in the absence of plasma. In one embodiment, the gas used in the second gaseous mixture is selected to be the same as the process gas used in the next component of the cycle.
[0024] As can be seen from the flow diagram of the cyclic plasma etching process 100 shown in Figures 1D and 1E, the next component is the third and last component of the cycle during which the plasma surface modification process 150 is performed. As shown in box 152 of Figure 1E, a second gas discharge plasma is formed using a third gaseous mixture for the plasma surface modification process 150. The composition of the third gaseous mixture includes hydrogen and a small amount of a fluorine source (e.g., NF3, CF4, or SF6). In one embodiment, the third gaseous mixture includes NF3 and H2. In other embodiments, the third gaseous mixture includes CF4 and H2, or SF6 and H2. A small amount of oxygen may optionally be included in the third gaseous mixture.
[0025] The plasma surface modification process 150 includes exposing the surface of the substrate to hydrogen radicals extracted from the second gas discharge plasma. As shown in FIG. 1B, after patterning the organic layer 131 using the silicon-based layer 141 as an etch mask and the underlayer 121 as an etch stop layer, the surface of the second intermediate structure 103 may have a first portion (e.g., a top flat surface) that includes a silicon-based material, a second portion (e.g., sidewalls of the feature) that includes an organic material, and a third portion (e.g., a bottom wall) that includes the underlayer 121 below the organic layer 131. Exposure to hydrogen radicals modifies the first portion of the surface differently compared to other portions of the surface.
[0026] The surface of the silicon-based layer 141 is activated in the surface modification process, during which hydrogen adheres to the surface (first portion) of the silicon-based layer 141, thereby facilitating the removal of the Si-based material in the next cycle. Without the surface modification, the etch rate would be lower. The interaction of hydrogen with the second and third portions of the surface is a surface reset that chemically removes the adsorbed fluorine. During the surface modification process, the exposed surfaces of the organic layer 131 and the underlayer 121 (second and third portions) are defluorinated by chemically reacting with hydrogen to form HF vapor, which is pumped out of the process chamber.
[0027] As discussed above, the plasma surface modification process 150 (in FIGS. 1D and 1E) uses a hydrogen plasma for surface activation of the silicon-based layer 141 and surface reset of the organic layer 131. Additionally, the inclusion of a small amount of a fluorine source (e.g., NF3, CF4, or SF6) in the third gaseous mixture allows the silicon-based layer 141 to continue to be etched, albeit at a much lower removal rate than during the plasma CDE process 110.
[0028] In some embodiments, a cyclic plasma process may be realized by separating the three components of each cycle in time using time multiplexing. A substrate may be loaded into a plasma chamber, and the three components of each cycle of the cyclic plasma process may be performed in situ in three consecutive non-overlapping time intervals in the plasma processing chamber. In some other embodiments, the three components of the cyclic plasma process may be separated by moving the substrate through three spatially separated sections of the plasma chamber, as described in more detail below with reference to FIG. 3.
[0029] In one embodiment of a time-multiplexed cyclic plasma process, as described above, plasma CDE for removing silicon-based material may be performed using a first gaseous mixture during a first time interval.
[0030] During the second time interval, the substrate may be cooled and residual gaseous by-products may be removed in parallel by forming a gas flow using the second gaseous mixture as described above. To suppress chemical reactions, the plasma may be extinguished, for example, by decoupling the plasma from the RF power or by turning off the RF power. The pressure in the plasma chamber may be increased to increase the flow rate and provide efficient cooling and cleanup.
[0031] In a third time interval following the second time interval, the pressure in the plasma process chamber may be reduced again and a second gas discharge plasma may be ignited using a third gaseous mixture including hydrogen for a plasma surface modification process. As described above, the plasma surface modification process activates the surface of silicon-based materials and resets the surface of organic materials by defluorinating them with hydrogen radicals.
[0032] Figures 2 and 3 show examples of plasma systems using which the method is implemented to perform a cyclic plasma etching process on an incoming substrate comprising a silicon-based layer on an organic layer: Figure 2 shows a plasma system for a time-multiplexed implementation of the cyclic plasma etching process, and Figure 3 shows a plasma system for a spatially separated implementation of the cyclic plasma etching process.
[0033] A time-multiplexed embodiment of the cyclic plasma etch process 100, in which the three components of each cycle are performed in three time intervals, can be realized in a plasma system 200 shown in FIG. 2. The plasma system 200 of FIG. 2 includes a plasma process chamber 250 configured to maintain a plasma directly above a substrate 202 loaded on a substrate holder 210. A gaseous mixture may be introduced into the plasma process chamber 250 through a gas inlet 222, and gases may be pumped out of the plasma process chamber 250 through a gas outlet 224. Gas flow rates and chamber pressure are controlled by a gas flow system 220 coupled to the gas inlet 222 and the gas outlet 224. As known to those skilled in the art, the gas flow system may include various components such as a high-pressure gas canister, valves (e.g., throttle valves), pressure sensors, gas flow sensors, vacuum pumps, piping, and an electronically programmable controller. An RF bias power supply 234 and an RF source power supply 230 may be coupled to respective electrodes of the plasma process chamber 250. In the plasma processing chamber 250, the substrate holder 210 is also an electrode coupled to an RF bias power supply 234. The RF source power supply 230 is seen to be coupled to a spiral electrode 232 wrapped around the dielectric sidewall 216. In Figure 2, the gas inlet 222 is an opening in the top plate 212 and the gas outlet 224 is an opening in the bottom plate 214. The top plate 212 and the bottom plate 214 may be conductive and may be electrically connected to a system ground (reference potential).
[0034] Plasma system 200 is merely an example. In various alternative embodiments, plasma system 200 may be configured to sustain an inductively coupled plasma (ICP) having an RF source power coupled to a planar coil on a top dielectric cover, or a capacitively coupled plasma (CCP) maintained using a disk-shaped top electrode within plasma process chamber 250. Gas inlets and gas outlets may be coupled to the sidewalls of the plasma chamber, and in some embodiments, pulsed RF and pulsed DC power sources may also be used.
[0035] FIG. 3 illustrates an exemplary plasma system 300 including a plasma process chamber with several spatially separated compartments, which may be separated by a flow of inert gas, referred to as an inert curtain. A plasma process chamber with spatially separated compartments is referred to herein as a spatial plasma process chamber. The spatial plasma process chamber 340 of the plasma system 300 is suitable for performing a spatially separated realization of the cyclic plasma etch process 100. In the plasma system 300, the three components of each cycle may be performed in the three spatially separated compartments of the spatial plasma process chamber 340. As shown in FIG. 3, the three components of each cycle of the cyclic plasma etch process 100 may be performed by moving the substrate through the three spatially separated compartments of the spatial plasma process chamber 340, for example, using a rotatable stage 310. In the exemplary embodiment of FIG. 3, the rotatable stage 310 is electrically coupled to ground.
[0036] In the cross-sectional view shown in FIG. 3, two of the three cross sections are visible. The first compartment 350 may be used to perform the first component of each cycle, for example, the plasma CDE process 110 described above with reference to FIG. 1D and FIG. 1E. In the exemplary spatial plasma processing chamber 340, the first compartment 350 is configured to sustain a capacitively coupled plasma (CCP) using a top electrode 312 coupled to an RF power source 314. In the illustrated configuration, the grounded rotatable stage 310 may function as a bottom electrode. A first gas discharge plasma may be formed in the first compartment 350 using a first gaseous mixture introduced into the first compartment 350 through a first gas inlet 322. As indicated by the arrow near the first gas outlet 324, the first gas outlet 324 of the first compartment 350 may be connected to and controlled by a vacuum pump of a gas flow system to maintain a desired pressure and gas flow. As shown in FIG. 3, a first semiconductor wafer 302 loaded on a rotatable stage 310 in a first compartment 350 may undergo a first component of one of a plurality of cycles of the cyclic plasma etching process 100. Subsequently, the first semiconductor wafer 302 may be moved to a second compartment 360 of the spatial plasma processing chamber 340 to undergo a second component of the cycle. An inert curtain 330, shown generally by a dashed line in FIG. 3, may suitably isolate the first compartment 350 from the second compartment 360. The inert curtain 330 may be a flow of inert gas (e.g., argon or helium) introduced through the inert gas inlet 320 and pumped out through the inert gas outlet 326, as shown by the arrows near the inert gas inlet 320 and the inert gas outlet 326.
[0037] As shown in FIG. 3, the second compartment 360 does not have an upper electrode since it is designated to perform the second component of the cool-down and clean-up process 130 of each cycle. As previously described with reference to FIG. 1D and FIG. 1E, in the cool-down and clean-up process 130, the second gaseous mixture may be flowed over the substrate in the absence of plasma to inhibit chemical reactions. A second semiconductor wafer 304 loaded on a rotatable stage 310 in the second compartment 360 may undergo the second component of one of the multiple cycles of the cyclic plasma etching process 100. As shown in FIG. 3, the second gaseous mixture may be introduced through a second gas inlet 323 and exited through a second gas outlet 325 coupled to a separately controlled vacuum pump to maintain a desired pressure and flow rate in the second compartment 360. In the exemplary plasma system 300, the spatial plasma chamber 340 has three compartments, each of which may have a semiconductor wafer loaded on a rotatable stage 310. One rotation of the rotatable stage 310 is then equivalent to performing one cycle of the cyclic plasma etching process 100 .
[0038] It should be noted that in the description of one cycle of multiple cycles of the cyclical plasma etch process 100, the plasma CDE process 110 is shown as the first component to be performed, but it is understood that either of the other two components (the passive cool-down and clean-up process 130 and the plasma surface modification process 150) can be selected to be performed first, so long as the order in which the three components are performed remains unchanged. For example, the cyclical plasma etch process 100 may be performed in a first cycle beginning with the plasma surface modification process 150, followed by the plasma CDE process 110, followed by the passive cool-down and clean-up process 130, and then this sequence of the three components repeated multiple times, as defined in the process flow recipe used to process the corresponding substrate.
[0039] An exemplary manufacturing process flow incorporating one embodiment of the cyclic plasma etching technique is described with reference to Figures 4A-4G. In Figures 4A-4F, the cyclic plasma etching process is illustrated with cross-sectional views of a substrate at various intermediate stages of the manufacturing process flow. The process illustrates the treatment used to fabricate an incoming substrate, which has been processed through one of multiple cycles of cyclic plasma etching. Figure 4G illustrates a cross-sectional view of the substrate after completing the cyclic plasma etching process.
[0040] The cross-sectional views of the substrate in Figures 4A-4F show one embodiment of a process flow including the cyclic plasma etching process 100 shown in the flow diagram of Figure 1D, and Figure 4G shows a cross-sectional view of the substrate after completing the cyclic plasma etching process 100.
[0041] 4A-4C are cross-sectional views of a substrate comprising a silicon-based layer 440 and an organic layer 430 disposed beneath the silicon-based layer 440 that has been patterned using a sacrificial mask layer 450. Beneath the organic layer 430 is an underlayer 420 formed on a stack of layers collectively shown as a substrate layer 410. In various embodiments, the silicon-based layer 440, the organic layer 430, and the underlayer 420 can comprise various materials, as described above with reference to FIGS. 1D and 1E. In the exemplary embodiment shown in FIG. 4A, for illustrative purposes, the silicon-based layer 440 comprises SiARC, the organic layer 430 comprises SOC, and the underlayer 420 comprises titanium nitride. The sacrificial mask layer 450 comprises photoresist, and the material of the adjacent substrate layer 410 beneath the underlayer 420 comprises a low-k silicon oxide used as an interlayer dielectric (ILD).
[0042] The patterned sacrificial mask layer 450 shown in FIG. 4A may have been patterned using a suitable photolithography system, such as extreme ultraviolet (EUV) photolithography. During patterning of the photoresist with a pattern of actinic radiation, reflections from the underlying interfaces may create interference patterns in the photoresist, thereby degrading the pattern quality of the photoresist relief pattern. One purpose of the silicon-based layer 440 (SiARC layer) is to suppress reflections by destructive interference of radiation reflected from the top and bottom surfaces of the SiARC. A second purpose of the silicon-based layer 440 is to act as a hard mask during an etching process used to transfer the pattern to the organic layer 430 after it has been patterned.
[0043] In FIG. 4B, a sacrificial mask layer 450 comprising photoresist was used to pattern the silicon-based layer 440. An anisotropic plasma etch process may be used to transfer the photoresist pattern to the silicon-based layer 440. The pattern transfer etch may remove the SiARC using a plasma maintained with, for example, a gaseous mixture comprising perfluorocarbon and hydrofluorocarbon gases, such as a mixture comprising tetrafluoromethane (CF4) and trifluoromethane (CHF3). This exemplary etch chemistry removes the SiARC selectively with respect to SOC and photoresist. The RF source power may be at a frequency of about 40 MHz to about 60 MHz, and the RF bias power may be at a frequency of about 10 MHz to about 15 MHz, such as 13.56 MHz. In one embodiment, the gas flow may be about 50 sccm to about 300 sccm at a chamber pressure of about 20 mTorr to about 100 mTorr.
[0044] By using a hydrofluorocarbon (e.g., CHF3) in the gaseous mixture, the photoresist may be coated with a thin layer of polymer that is deposited while the silicon-based layer 440 is being etched. The polymer coating provides the benefit of protecting the sacrificial mask layer 450 from ion sputtering losses during the anisotropic etching process. A controlled overetch time may be used to ensure that the etching stops on the organic layer 430. Any polymer residue that may remain on the surface of the organic layer 430 can be removed by ion sputtering during the subsequent anisotropic plasma etching of the organic layer 430. As shown in FIG. 1C, the subsequent anisotropic plasma etching of the organic layer 430 also removes any photoresist remaining on the silicon-based layer 440.
[0045] FIG. 4C shows the substrate after the patterned silicon-based layer 440 is used as a hard mask layer to transfer the pattern to the organic layer 430, exposing the top surface of the underlayer 420. The pattern transfer to the organic layer 430 can be performed by an anisotropic plasma etching process that selectively removes SOC with respect to titanium nitride, for example, using a plasma formed from a mixture containing nitrogen and hydrogen gases, or a mixture containing carbon monoxide and carbon dioxide gases, or a mixture containing oxygen gas. The chamber pressure may be selected in the range of 10 mTorr to 100 mTorr. The resulting structure shown in FIG. 4C can be an incoming substrate 400 that has been treated by a cyclic plasma etching process 100 to selectively remove the remaining silicon-based layer 440, including SiARC, with respect to the exposed SOC organic layer 430 and the exposed underlayer 420 (e.g., titanium nitride layer). As described above, the cyclic plasma etch process 100 provides the advantages of efficiently removing SiARC with high selectivity to preserve the shape (e.g., sidewall profile) of the patterned features in the organic layer 430 and low defect count by using lean etch chemistries.
[0046] An incoming substrate 400 may be processed through multiple cycles of the cyclic plasma etch process 100. In each cycle, the substrate undergoes three successive component processes shown successively in Figures 4D, 4E, and 4F.
[0047] FIG. 4D illustrates a plasma CDE process 110. In the exemplary embodiments illustrated in FIGS. 4D-4F, a first gas discharge plasma from which fluorine radicals are extracted may be formed using a first gaseous mixture including 100% NF3 or NF3 with the addition of Ar up to 50% of the total gas flow. Low pressures in the range of 50 mTorr to 200 mTorr may be used to obtain the desired radical-rich plasma. In various embodiments, the gas flow rate of NF3 may be 10 sccm to 500 sccm.
[0048] The RF source power may be about 100 W to about 800 W at frequencies between 40 MHz and 60 MHz. A low RF bias power may be advantageous in confining chemical reactions near the surface by confining ions to a low energy range. In configurations where a plasma containing ions in a desired energy range (e.g., about 2 eV to about 20 eV) can be provided using appropriate RF source power and frequency, no RF bias may be used in addition to the RF source power. For example, in one embodiment, a CCP configuration may be used to maintain a plasma powered by about 500 W of RF source power at a frequency of about 40 MHz without any RF bias. In some other embodiments, the plasma may be maintained by an RF bias power of about 10 W to about 50 W at a frequency of about 10 MHz to about 15 MHz (e.g., 13.56 MHz) in addition to an RF source power of 100 W<800 W in the frequency range of 40 MHz to 60 MHz.
[0049] As described above with reference to FIG. 1E, removal of silicon-based materials (e.g., SiARC) using lean chemistry (e.g., plasma CDE process 110 using NF3) can be achieved without the complications associated with the production of solid deposits. The reaction by-products are volatile gases that can be removed from the process chamber by a vacuum pump. For example, the NF3 chemistry used in the plasma CDE process 110 shown in FIG. 4D produces non-volatile gases including SiF4442 and nitrogen oxides such as NO2444 and NO446. The non-volatile gases are shown diagrammatically in FIG. 4D, using open circles for fluorine and filled circles for silicon, with circles with diagonal hatching representing oxygen and circles filled with dots as symbols for nitrogen.
[0050] FIG. 4E illustrates a cool-down and clean-up process 130 in which the second gaseous mixture is flowed over the substrate in the absence of plasma. The cool-down and clean-up process 130 may be described as a purge step since there are no chemical reactions during this component of the cycle. The pressure during the cool-down and clean-up process 130 may be increased to about 100 Torr to 500 Torr to flow the second gaseous mixture at a rate of 100 sccm to 500 sccm. In the exemplary embodiment illustrated in FIG. 4E, the second gaseous mixture may include NF3 and H2 in a volume ratio of NF3:H2 of about 1:9 to about 2:3. In some other embodiments, the second gaseous mixture may also include an inert gas (e.g., argon or helium).
[0051] As shown in Figure 4E, the plasma CDE process 110 of this exemplary embodiment has isotropically removed a portion of the silicon-based layer 440. Also, note that the surfaces including the organic layer 430 and the underlayer 420 have been fluorinated by the fluorine radicals 432 present during the plasma CDE process 110 shown in Figure 4D.
[0052] FIG. 4F illustrates the third component of the cycle. In this component of the cycle, a plasma surface modification process 150 may be performed, during which the surface of the substrate as shown in FIG. 4E is modified to the surface of the substrate as shown in FIG. 4F. As shown in FIG. 4F, the adsorbed fluorine radicals 432 of the fluorinated surface of FIG. 4E are removed, and the surface of the silicon-based layer 440 is activated with hydrogen radicals 448, as shown by the diagonally hatched circle in FIG. 4F. In addition, in this embodiment, since the gas used for the plasma surface modification process 150 includes NF3, some material can be removed from the silicon-based layer 440. However, the removal rate is generally lower compared to the removal rate during the plasma CDE process 110 shown in FIG. 4D. For example, the removal rate during the plasma surface modification process 150 may be about 10% to about 50% of the removal rate during the plasma CDE process 110.
[0053] The hydrogen radicals involved in the defluorination reaction forming the volatile HF gas, as well as the hydrogen radicals adsorbed on the surface of the silicon-based layer 440, are extracted from the second gas discharge plasma maintained using the third gaseous mixture. During the plasma surface modification process 150, the pressure may be reduced again to a range of 50 mTorr to 200 mTorr. In the exemplary embodiment shown in FIG. 4F, the third gaseous mixture may include NF3 and H2 with a volume ratio of NF3:H2 of about 1:9 to about 2:3. In various embodiments, the flow rate of the total gaseous mixture may be about 10 sccm to about 200 sccm.
[0054] The RF source and RF bias during the plasma surface modification process 150 are similar to the RF source and RF bias during the plasma CDE process 110. The RF source power may be about 100 W to about 800 W at a frequency of 40 MHz to 60 MHz. A low RF bias power may be advantageous in confining the chemical reaction near the surface by confining the ions to a low energy range. In configurations where a plasma containing ions in a desired energy range (e.g., about 2 eV to about 20 eV) can be provided using appropriate RF source power and frequency, an RF bias may not be used in addition to the RF source power. For example, in one embodiment, a CCP configuration may be used to maintain a plasma powered by about 500 W of RF source power at a frequency of about 40 MHz without any RF bias. In some other embodiments, the plasma may be sustained by an RF source power of 100 W<800 W in the frequency range of 40 MHz to 60 MHz, plus an RF bias power of about 10 W to about 50 W at a frequency of about 10 MHz to about 15 MHz (e.g., 13.56 MHz).
[0055] The three-component cycle illustrated in the cross-sectional views of Figures 4D-4F can be performed multiple times to complete the cyclic plasma etch process 100, thereby removing the patterned silicon-based layer 440, SiARC hardmask, from the incoming substrate 400 (see Figure 4C). The cross-sectional view of the post-etch substrate 460 shown in Figure 4G illustrates the resulting structure after completing the cyclic plasma etch process 100.
[0056] Figure 5 illustrates a timing diagram for one cycle of a time-multiplexed implementation of the exemplary cyclic plasma etch process 100 described with reference to Figures 4A-4F. As shown in Figure 5, the differences in the processing environments of each of the three separate portions of the cyclic plasma etch process are illustrated using a timing diagram for one cycle of the time-multiplexed implementation of the cyclic plasma etch process.
[0057] The four horizontal axes in FIG. 5 represent the progression of time. The three time intervals T1, T2, and T3 of the three component processes of one cycle of the cyclic plasma etch process 100 are shown generally by three double arrows adjacent to a time axis. Three vertical dotted lines intersecting the time axis define the boundaries of the non-overlapping time intervals T1, T2, and T3. In an exemplary embodiment, T1 may be about 5 s to about 10 s, T2 may be about 5 s to about 10 s, and T3 may be about 5 s to about 10 s. In various embodiments, the ranges of T1, T2, and T3 may be 2 s to 20 s, 2 s to 20 s, and 2 s to 20 s, respectively. The periods T1, T2, and T3 may not be equal depending on the respective process recipes.
[0058] As labeled in Figure 5, the plasma CDE process 110, the cool down and clean up process 130, and the plasma surface modification process 150 are performed successively during T1, T2, and T3, respectively. Four time axes are used to generally illustrate plots of four process parameters versus time for one of the multiple cycles of the cyclic plasma etch process 100. The four process parameters plotted in Figure 5 are RF power coupled to the electrodes of the plasma chamber, chamber pressure, the flow rate of hydrogen gas (H2), and the flow rate of nitrogen trifluoride gas (NF3).
[0059] 5, RF power is supplied during time interval T1 to maintain the first gas discharge plasma used for the plasma CDE process 110, and again during T3 to maintain the second gas discharge plasma used for the plasma surface modification process 150. However, after the plasma CDE process 110 is completed, the RF power is reduced to zero to extinguish the first gas discharge plasma and inhibit chemical reactions during time interval T2 while the cool down and clean up process 130 is in progress.
[0060] The low pressure is maintained when the first and second gas discharge plasmas are ignited and maintained during T1 and T3, respectively. However, as described above with reference to Figures 4A-4F, in an exemplary embodiment for efficient cool-down and clean-up, the chamber pressure and total gas flow rate for the cool-down and clean-up process 130 are increased during a second time interval (T2).
[0061] The first gaseous mixture includes NF3 as a source of fluorine radicals. Reducing agents such as hydrogen radicals are undesirable during T1 when the plasma CDE process 110 is performed to efficiently convert silicon to SiF4 gas for removing silicon-based materials. Thus, during T1, the flow rate of NF3 is high and the flow rate of H2 is zero. The second gaseous mixture flowing through the chamber during T2 is for the cool-down and clean-up process 130. In a time-multiplexed implementation of the cyclic plasma etch process 100, in order to reduce the gas exchange time required to stabilize the environment in the plasma process chamber, the second gaseous mixture may include the same gases as those used for the third gaseous mixture flowed during the subsequent time interval T3. Thus, both NF3 and H2 are present in the chamber during T2 and T3, as shown in the respective plots of FIG. 5.
[0062] It should be noted that the plots in Figure 5 are for illustrative purposes only: for example, while the plots show the process parameters changing as a step function, it is understood that instantaneous changes in RF power, gas pressure, and flow rate are not achievable, and that finite response times should be considered before the physical parameters stabilize.
[0063] In the present disclosure, an embodiment of a cyclic plasma etching process 100 has been described that can be used to remove a patterned silicon-based layer used as a hard mask for an anisotropic plasma etching process that transfers the pattern to an adjacent organic layer below the silicon-based layer. Silicon-based materials are often used as inorganic anti-reflective coatings (ARCs) to suppress the formation of undesired interference patterns in a photoresist layer caused by reflections from the underlying interface when the photoresist is exposed to a pattern of actinic radiation in a photolithography process. In an exemplary application described in the present disclosure, it is seen that a SiARC layer, which is patterned with a photoresist mask and subsequently used as a hard mask to pattern a SOC layer, is removed using an embodiment of the cyclic plasma etching process 100 to demonstrate the advantages provided by the process of the present invention. As described above, by using an appropriate embodiment of the cyclic plasma etching process 100 described in the present disclosure, silicon-based materials can be efficiently removed selectively relative to organic materials. Furthermore, by using lean fluorine etch chemistries (e.g., non-polymerizing etchants such as CF4, NF3, and SF6) and by inserting a cool-down and clean-up process 130 after the plasma CDE process 110 in each cycle of the cyclic plasma etch process 100, chemical and thermal deformations are reduced, so that pattern quality of features in the patterned organic layer can be maintained. By performing a plasma surface modification process 150 in each cycle before proceeding to the next cycle of the plasma CDE process 110, the removal efficiency of silicon-based materials and selectivity to organics are promoted. As described in this disclosure, hydrogen radicals are used to assist the removal reaction by activating the surface containing silicon-based materials, and to protect exposed areas by a defluorination reaction forming volatile hydrogen fluoride. By removing adsorbed fluorine radicals from the sidewalls containing organic materials and the bottom wall containing the underlying material, the etch selectivity is improved and pattern deformation is retarded.
[0064] It has been described that the separation of a process into multiple cycles and each cycle into three component processes can be realized in two classes of plasma systems. A time-multiplexed implementation may include performing the component processes in situ within the plasma processing chamber. A spatially separated implementation can be realized by loading the substrate onto a movable stage and moving the substrate through spatially separated sections of a spatial plasma chamber.
[0065] The separation of the process into three component processes facilitates realizing the advantages noted herein by allowing independent selection of process parameters as illustrated in this disclosure by illustrating timing diagrams for a time-multiplexed implementation of one exemplary embodiment.In various applications, since an organic layer is used as a hard mask layer for patterning an underlying layer, it is advantageous to preserve the fidelity of the pattern transferred to the organic layer.
[0066] Example 1. A method for treating a substrate includes performing a cyclic plasma etching process including a plurality of cycles, each cycle of the plurality of cycles including exposing a surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed with a first gaseous mixture including a non-polymerized fluorine compound to cause a chemical reaction with the surface of the substrate. The method includes flowing a second gaseous mixture over the substrate while simultaneously inhibiting the chemical reaction with the surface of the substrate. The method includes exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed with a third gaseous mixture including a gas including nitrogen and hydrogen.
[0067] Example 2. The method of example 1, wherein the surface of the substrate comprises a first portion comprising a silicon-based material and a second portion comprising an organic material.
[0068] Example 3. The method of example 1 or 2, wherein silicon-based materials are removed selectively relative to organic materials by exposing the surface of the substrate to fluorine radicals.
[0069] Example 4. The method according to any one of Examples 1-3, wherein exposing the surface of the substrate to hydrogen radicals chemically modifies the surface of the substrate, and chemically modifying the surface comprises forming an adsorption layer of hydrogen and nitrogen on the first portion comprising a silicon-based material, and defluorinating a second portion comprising an organic material.
[0070] Example 5. The method of any one of Examples 1-4, wherein the first gaseous mixture comprises nitrogen trifluoride or sulfur hexafluoride.
[0071] Example 6. The method according to any one of Examples 1 to 5, wherein the substrate is cooled and residual gaseous by-products are removed by flowing the second gaseous mixture.
[0072] Example 7. The method of any one of Examples 1-6, wherein inhibiting chemical reaction with the surface of the substrate includes preventing the second gaseous mixture from forming a gas discharge plasma.
[0073] Example 8. The method of any one of Examples 1-7, wherein exposing the surface of the substrate to fluorine radicals, flowing the second gaseous mixture over the substrate, and exposing the surface of the substrate to hydrogen radicals are performed in three spatially non-overlapping regions, a curtain of inert gas is disposed between adjacent regions of the three spatially non-overlapping regions, and performing one cycle of the cyclical etching process includes moving the substrate successively through the three spatially non-overlapping regions.
[0074] Example 9. A method for processing a substrate includes performing a cyclical plasma etching process including a plurality of cycles, each cycle of the plurality of cycles including performing a plasma etching process on a surface of a substrate including a silicon-based material to partially remove the silicon-based material, cooling the substrate while concurrently removing residual gaseous by-products, and performing a plasma surface modification process on the substrate.
[0075] Example 10. The method of example 9, further comprising performing the multiple cycles in situ in a plasma processing chamber.
[0076] Example 11. The method of example 9 or 10, wherein the plasma etching process is performed in a first time interval, the cooling and concurrently removing residual gaseous by-products is performed in a second time interval, and the plasma surface modification process is performed in a third time interval, wherein the first time interval, the second time interval, and the third time interval are non-overlapping time intervals.
[0077] Example 12. The method of any one of Examples 9-11, further comprising increasing the pressure in the plasma process chamber after a first time interval during which the multiple cycles are performed, maintaining the increased pressure in the plasma process chamber during a second time interval, and decreasing the pressure in the plasma process chamber after the second time interval.
[0078] Example 13. The method of any one of Examples 9-12, wherein performing the plasma etching process includes forming a gas discharge plasma, the plasma comprising fluorine radicals, and forming the gas discharge plasma includes coupling radio frequency (RF) power to a gaseous mixture comprising a non-polymerizing fluorine compound, and removing silicon-based materials using a non-polymerizing fluorine-based chemical.
[0079] Example 14. The method of any one of Examples 9-13, wherein cooling the substrate and concurrently removing residual gaseous by-products includes extinguishing the gas discharge plasma by decoupling radio frequency (RF) power from the plasma processing chamber, and increasing the gas flow rate of the gaseous mixture through the plasma processing chamber.
[0080] Example 15. The method of any one of Examples 9 to 14, wherein performing the plasma surface modification process includes forming a gas discharge plasma using a gaseous mixture including a gas including nitrogen and hydrogen, the plasma including hydrogen radicals, and chemically reacting a surface of the substrate with the hydrogen radicals, wherein reacting the surface includes forming an adsorption layer of hydrogen and nitrogen on a portion of the surface of the substrate including a silicon-based material, and removing fluorine radicals adsorbed on a remaining portion of the surface of the substrate by forming gaseous hydrogen fluoride.
[0081] Example 16. A method of fabricating a semiconductor device includes forming a patterned layer stack adjacent to an underlayer on a substrate, the patterned layer stack including an organic layer adjacent to the underlayer and a hard mask layer comprising a silicon-based material on the organic layer, and loading the substrate into a plasma processing chamber. The method includes performing a cyclical plasma etching process in situ in the plasma processing chamber, the cyclical plasma etching process selectively removing the hard mask layer comprising a silicon-based material relative to the organic layer.
[0082] Example 17. The method of Example 16, wherein the cyclic plasma etching process includes a plurality of cycles, each cycle of the plurality of cycles including: performing a chemical dry etching (CDE) process including exposing the substrate to fluorine radicals extracted from a first gas discharge plasma formed in a plasma processing chamber using a first gaseous mixture including nitrogen trifluoride or sulfur hexafluoride; after completing the CDE process, cooling the substrate by extinguishing the first gas discharge plasma, increasing the pressure in the plasma processing chamber and flowing a second gaseous mixture over the substrate; and after cooling of the substrate is completed, performing a plasma surface modification process including exposing a surface of the substrate to hydrogen radicals, which activate a surface including silicon-based materials by chemisorption and defluorinate a surface including organic materials by a chemical reaction forming volatile hydrogen fluoride.
[0083] Example 18. The method of example 16 or 17, wherein the silicon-based material comprises a silicon-rich antireflective coating (SiARC), a silicon oxide, a silicon nitride, or a silicon oxynitride.
[0084] Example 19. The method of any one of Examples 16-18, wherein the organic layer comprises an organic dielectric layer (ODL), an organic planarization layer (OPL), a spin-on carbon (SOC) layer, or an amorphous carbon layer (ACL), and the underlayer comprises titanium nitride, aluminum oxide, titanium oxide, or aluminum nitride.
[0085] Example 20. The method of any one of Examples 16-19, wherein after performing the cyclic plasma etching process, the change in sidewall angle of the organic layer is 0.5° or less.
[0086] Although the present invention has been described with reference to exemplary embodiments, this specification is not intended to be construed in a limiting sense. Various modifications and combinations of those exemplary embodiments, as well as other embodiments of the present invention, will become apparent to those skilled in the art upon reference to this specification. Therefore, the appended claims are intended to cover any such modifications or embodiments.
Claims
1. 1. A method of processing a substrate, the method comprising: performing a cyclic plasma etch process comprising a plurality of cycles; Each cycle of the plurality of cycles comprises: exposing a surface of the substrate to fluorine radicals extracted from a first gas discharge plasma formed with a first gas mixture containing a non-polymerized fluorine compound, thereby causing a chemical reaction with the surface of the substrate; flowing a second gas mixture across the substrate while inhibiting the chemical reaction with the surface of the substrate, the second gas mixture being different from the first gas mixture and including hydrogen; and exposing the surface of the substrate to hydrogen radicals extracted from a second gas discharge plasma formed with a third gas mixture comprising a nitrogen and hydrogen containing gas; The method comprising:
2. The method of claim 1, wherein the first gas mixture comprises nitrogen trifluoride or sulfur hexafluoride.
3. The method of claim 1, wherein the step of flowing the second gas mixture cools the substrate and removes residual gaseous by-products.
4. The method of claim 1, wherein the step of suppressing chemical reaction with the surface of the substrate comprises a step of preventing the second gas mixture from forming a gas discharge plasma.
5. The method of claim 1, wherein the steps of exposing the surface of the substrate to fluorine radicals, flowing the second gas mixture across the substrate, and exposing the surface of the substrate to hydrogen radicals are performed in three spatially non-overlapping regions; a curtain of inert gas is disposed between adjacent ones of the three spatially non-overlapping regions; The method of claim 1 , wherein performing one cycle of the cyclical etching process comprises moving the substrate sequentially through the three spatially non-overlapping regions.
6. The method of claim 1, wherein the first gas mixture comprises carbon tetrafluoride and oxygen.
7. The surface of the substrate is a first portion including a silicon-based material; a second portion comprising an organic material; The method of claim 1 , comprising:
8. 8. The method of claim 7, wherein exposing the surface of the substrate to fluorine radicals removes the silicon-based material selectively to the organic material.
9. exposing the surface of the substrate to hydrogen radicals chemically modifies the surface of the substrate; The step of chemically modifying the surface comprises: forming an adsorption layer of hydrogen and nitrogen on the first portion including a silicon-based material; defluorinating the second portion comprising an organic material; 8. The method of claim 7, comprising:
10. 1. A method of processing a substrate, the method comprising: The method includes: performing, in a plasma processing chamber, a cyclic plasma etch process comprising a plurality of cycles, each cycle of the plurality of cycles comprising: performing a plasma etching process on a surface of the substrate comprising a silicon-based material to partially remove the silicon-based material; increasing the pressure in the plasma processing chamber after the plasma etching process and performing the multiple cycles; cooling the substrate while maintaining the elevated pressure in the plasma processing chamber and simultaneously removing any remaining gaseous by-products; reducing the pressure in the plasma processing chamber after cooling the substrate and concurrently removing residual gaseous by-products; and subjecting the substrate to a plasma surface modification process; The method comprising:
11. the plasma etching process is performed for a first time interval, the cooling and concurrent removal of residual gaseous by-products is performed for a second time interval, and the plasma surface modification process is performed for a third time interval; The method of claim 10 , wherein the first time interval, the second time interval, and the third time interval are non-overlapping time intervals.
12. The step of performing the plasma surface modification process, forming a gas discharge plasma using a gas mixture including a nitrogen and hydrogen containing gas, said plasma including hydrogen radicals; Chemically reacting the surface of the substrate with hydrogen radicals, the step of reacting the surface comprising: forming an adsorption layer of hydrogen and nitrogen on a portion of the surface of the substrate comprising a silicon-based material; and removing fluorine radicals adsorbed on remaining portions of the surface of the substrate that do not contain the silicon-based material by forming gaseous hydrogen fluoride. and 11. The method of claim 10, comprising:
13. The step of performing the plasma etching process includes: forming a gas discharge plasma, the plasma comprising fluorine radicals; forming the gas discharge plasma includes coupling radio frequency (RF) power to a gas mixture including a non-polymerized fluorine compound; removing silicon-based materials using a non-polymerizing fluorine-based chemistry; 11. The method of claim 10, comprising:
14. The step of cooling the substrate and simultaneously removing residual gaseous by-products comprises: extinguishing the gas discharge plasma by decoupling radio frequency (RF) power from the plasma processing chamber; increasing a gas flow rate of the gas mixture through the plasma processing chamber; 14. The method of claim 13, comprising:
15. A method for forming a semiconductor device on a substrate, the method comprising a cyclic plasma etching process, the substrate comprising a silicon-based material and an organic layer; The cyclical plasma etch process includes a plurality of cycles, each cycle of the plurality of cycles comprising: performing a chemical dry etching (CDE) process, the CDE process comprising exposing the substrate to fluorine radicals extracted from a first gas discharge plasma formed in the plasma processing chamber using a first gas mixture comprising nitrogen trifluoride or sulfur hexafluoride; after completing the CDE process, extinguishing the first gas discharge plasma and cooling the substrate by increasing the pressure in the plasma processing chamber and flowing a second gas mixture over the substrate; performing a plasma surface modification process after the cooling of the substrate is completed, the process comprising exposing the surface of the substrate to hydrogen radicals which activate the surface comprising the silicon-based material by chemisorption and defluorinate the surface comprising the organic layer by a chemical reaction forming volatile hydrogen fluoride; The method comprising:
16. 16. The method of claim 15, wherein the silicon-based material comprises a silicon-rich anti-reflective coating (SiARC), silicon oxide, silicon nitride, or silicon oxynitride.
17. the organic layer comprises an organic dielectric layer (ODL), an organic planarization layer (OPL), a spin-on carbon (SOC) layer, or an amorphous carbon layer (ACL); The method of claim 15 , wherein the underlayer comprises titanium nitride, aluminum oxide, titanium oxide, or aluminum nitride.
18. 16. The method of claim 15, wherein the change in sidewall angle of the organic layer after performing the cyclic plasma etching process is less than or equal to 0.5[deg.].
19. The method further comprises: Prior to the cyclic plasma etching process, forming a stack of patterned layers adjacent to an underlying layer on the substrate, the stack of patterned layers comprising: the organic layer adjacent the underlayer, and a hard mask layer comprising the silicon-based material on top of the organic layer; and loading the substrate into a plasma processing chamber for the cyclic plasma etch process; 16. The method of claim 15, having the following structure:
20. The method of claim 20, further comprising the step of: patterning the organic layer using the hard mask layer as an etch mask.
20. The method of claim 19, having the following structure: