Plasma-enhanced atomic layer deposition of silicon-containing films

Abstract

The method includes providing a substrate in a processing station including a substrate support and a showerhead, the substrate including a gap to be filled, and depositing a silicon-containing film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process including multiple cycles of operations (a)-(d): (a) a dosing operation including flowing a silicon-containing precursor into the processing station through the showerhead and allowing the silicon-containing precursor to adsorb on the substrate; (b) after (a), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species to react with the adsorbed silicon-containing precursor; and (d) after (c), flowing the purge gas into the processing station, wherein the silicon-containing precursor continues to flow into the processing station during at least (b).

Description

[Technical field]

[0001] [Incorporated by reference] A PCT application is being filed contemporaneously herewith as a part of this application, and each application identified in that contemporaneously filed PCT application to which this application claims benefit or priority is hereby incorporated by reference in its entirety for all purposes. [Background technology]

[0002] Many semiconductor device fabrication processes involve the formation of films, including silicon-containing films such as silicon nitride and silicon oxide. Plasma-enhanced atomic layer deposition (ALD) can be used to deposit silicon-containing films.

[0003] The background description provided herein is intended to provide a general overview of the contents of the present disclosure. Work by the currently named inventors within the scope of what is described in this Background section, as well as aspects of the description that may not otherwise be regarded as prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0004] One aspect of the present disclosure is Providing a substrate in a processing station including a substrate support and a showerhead, the substrate including a gap to be filled; Operation (a)~(d): (a) a dosing operation including flowing a silicon-containing precursor into a processing station through a showerhead and allowing the silicon-containing precursor to adsorb onto a substrate; (b) after (a), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species to react with the adsorbed silicon-containing precursor; and (d) After (c), the purge gas is introduced into the processing station. depositing a silicon-containing film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process including multiple cycles of Including, The silicon-containing precursor continues to flow into the processing station for at least (b); It concerns the method.

[0005] In some embodiments, the silicon-containing precursor continues to flow into the processing station during at least a portion of (c). In some embodiments, the silicon-containing precursor continues to flow into the processing station during at least a portion of (c) and (d). In some embodiments, after (a), the flow of the silicon-containing precursor continues to flow into the processing station at a reduced rate.

[0006] In some embodiments, (a) comprises flowing an inert gas and vaporized silicon-containing precursor from a silicon-containing precursor source fluidly connected to a gas delivery line through an outlet valve, the gas delivery line being fluidly connected to a showerhead, and closing the outlet valve at the end of (a). In some such embodiments, the silicon-containing precursor in the gas delivery line continues to flow into the processing station after the outlet valve is closed.

[0007] In some embodiments, the method further includes diverting the silicon-containing precursor from the processing station during one or more of (c) and (d).

[0008] In some embodiments, the plasma in (c) is a dual frequency RF plasma generated using high frequency (HF) and low frequency (LF) RF power, in some such embodiments, the HF power is at least 4 kW and the LF power is between 500 W and 5 kW.

[0009] In some embodiments, the method further comprises increasing a flow of inert gas into the processing station during (c), In some embodiments, the method further comprises sputtering and redepositing a silicon-containing film into the gap during deposition of the silicon-containing film into the gap.

[0010] In some embodiments, the plasma species is generated from oxygen (O2). In some embodiments, the plasma species is generated from nitrous oxide (NO). In some embodiments, the plasma species is generated from nitrogen (N2). In some embodiments, (b) is 50-500 milliseconds in duration. In some embodiments, the gaps being filled are gaps between memory stacks in a 3D NAND structure. In some embodiments, the gaps have an aspect ratio of at least 20:1.

[0011] In some embodiments, the method further comprises exposing the deposited film to an inhibiting plasma prior to at least one of the multiple cycles. Providing a substrate in a processing station comprising a substrate support and a showerhead, the substrate comprising a gap to be filled; Operation (a)~(d): (a) a dosing operation including flowing a silicon-containing precursor into a processing station through a showerhead and allowing the silicon-containing precursor to adsorb onto a substrate; (b) after (a), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species generated from the reactant gas to react with the adsorbed silicon-containing precursor; and (d) After (c), the purge gas is introduced into the processing station. depositing a silicon-containing film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process including multiple cycles of Including, The reactant gas and / or plasma species continue to flow into the processing station for at least (a); Regarding.

[0012] Another aspect of the present disclosure is a method for fabricating a semiconductor device comprising the steps of: providing a substrate having a structure including a gap to be filled; (a) a dosing operation including flowing a silicon-containing precursor into a processing station through a showerhead and allowing the silicon-containing precursor to adsorb onto a substrate; (b) after (a), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species to react with the adsorbed silicon-containing precursor, the plasma of (c) being a dual frequency RF plasma generated using high frequency (HF) and low frequency (LF) RF power; and (d) After (c), the purge gas is introduced into the processing station. and selectively depositing a silicon-containing protective film on the upper portion of the structure so as to extend only partially into the gap by a plasma-enhanced atomic layer deposition (PEALD) process comprising:

[0013] In some embodiments, the method comprises: exposing the substrate including the protective film to a suppressing plasma including a halogen species to suppress deposition on a portion of the gap; and depositing a dielectric material in the gap after exposing the substrate to the suppression. The method further comprises performing one or more cycles of:

[0014] In some embodiments, the silicon-containing precursor continues to flow into the processing station during at least (b). In some embodiments, the protective film is etched during exposure to the inhibiting plasma. In some embodiments, the plasma during (a) is generated from nitrogen trifluoride (NF3) and the protective liner is a silicon nitride film.

[0015] In some embodiments, the protective liner has a thickness of 10 to 999 angstroms. In some embodiments, depositing the protective liner and performing the one or more cycles are performed in the same chamber.

[0016] In some embodiments, the structure is a 3D NAND structure, where the gap is formed by two stacks each including multiple pairs of oxide and nitride layers, capped by a polysilicon layer, and a protective film protects the polysilicon layer.

[0017] Another aspect of the present disclosure is a method for producing a method for manufacturing a semiconductor device comprising the steps of: Providing a substrate in a processing station including a substrate support and a showerhead; Operation (a)~(d): (a) a dosing operation including flowing a silicon-containing precursor into a processing station through a showerhead and allowing the silicon-containing precursor to adsorb onto a substrate; (b) after (b), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species to react with the adsorbed silicon-containing precursor; and (d) After (c), the purge gas is introduced into the processing station. depositing a silicon-containing film on a substrate by a plasma-enhanced atomic layer deposition (PEALD) process including multiple cycles of Including, The silicon-containing precursor continues to flow into the processing station for at least (b); It concerns the method.

[0018] In some embodiments, the silicon-containing film fills the gap on the substrate.In some embodiments, the silicon-containing film is non-conformally deposited on a structure having two stacks separated by a gap, whereby the film is deposited on the top of the stack that extends only partially into the gap.In some embodiments, the plasma in (c) is a dual-frequency RF plasma that is generated using high frequency (HF) and low frequency (LF) RF power.

[0019] Another aspect of the present disclosure is a method for producing a method for manufacturing a semiconductor device comprising the steps of: Providing a substrate in a processing station including a substrate support and a showerhead; Operation (a)~(d): (a) a dosing operation including flowing a silicon-containing precursor into a processing station through a showerhead and allowing the silicon-containing precursor to adsorb onto a substrate; (b) after (b), flowing a purge gas into the processing station; (c) after (b), exposing the substrate to plasma species to react with the adsorbed silicon-containing precursor; and (d) After (c), the purge gas is introduced into the processing station. depositing a silicon-containing film on a substrate by a plasma-enhanced atomic layer deposition (PEALD) process including multiple cycles of Including, (c) the plasma is a dual frequency RF plasma generated using high frequency (HF) and low frequency (LF) RF power; It concerns the method.

[0020] In some embodiments, the silicon-containing film fills the gap on the substrate. In some embodiments, the silicon-containing film is non-conformally deposited on a structure having two stacks separated by a gap, whereby the film is deposited on the top of the stack that extends only partially into the gap.

[0021] Yet another aspect of the present disclosure provides a method for preparing a substrate for use in a processing station, comprising: (a) stabilizing process conditions in a processing station for silicon oxide deposition; (b) performing x plasma-enhanced atomic layer deposition (PEALD) cycles using an oxygen-based plasma, where x is an integer greater than 0; (c) stabilizing process conditions in a processing station for silicon nitride deposition; (d) performing y plasma-enhanced atomic layer deposition (PEALD) cycles using a nitrogen-based plasma, where y is an integer greater than 0; and (e) Repeating (a) through (d) one or more times and depositing a silicon oxynitride (SiON) film on a substrate by

[0022] In some embodiments, x+y is 20, 15, or 10 or less.

[0023] In some embodiments, the oxygen-based plasma of each cycle of (b) has a first duration and the nitrogen-based plasma of each cycle of (d) has a second duration, the second duration being at least twice the first duration. In some embodiments, the SiON film is conformally deposited on the patterned layer.

[0024] These and other aspects are further described below with reference to the drawings. [Brief description of the drawings]

[0025] [Figure 1] FIG. 1 is a schematic diagram of a gas delivery system for delivering reactants to a single station of a multi-station reaction chamber (not shown) that can be used to perform one or more ALD cycles.

[0026] [Diagram 2] FIG. 2 is an exemplary timing diagram for plasma-enhanced atomic layer deposition (PEALD) of silicon oxide in a four-station chamber including split flow of silicon-containing precursors. [Diagram 3] FIG. 3 is an exemplary timing diagram for plasma-enhanced atomic layer deposition (PEALD) of silicon oxide in a four-station chamber including split flow of silicon-containing precursors.

[0027] [Figure 4]FIG. 4 is a simplified schematic diagram of a portion of a gas delivery system for delivering a silicon-containing precursor.

[0028] [Diagram 5] FIG. 5 shows an example timing sequence for PEALD deposition of silicon oxide containing a CVD-type component. [Figure 6] FIG. 6 shows an example timing sequence for PEALD deposition of silicon oxide containing a CVD-type component. [Figure 7] FIG. 7 shows an example timing sequence for PEALD deposition of silicon oxide containing a CVD-type component. [Figure 8] FIG. 8 shows an example timing sequence for PEALD deposition of silicon oxide containing a CVD-type component. [Figure 9] FIG. 9 shows an example timing sequence for PEALD deposition of silicon oxide containing a CVD-type component.

[0029] [Figure 10] FIG. 10 shows an example of deposition rate as a function of RF purge time, with all other process parameters held constant.

[0030] [Figure 11a] FIG. 11a shows an example of a structure containing unfilled gaps that may be filled using the methods described herein.

[0031] [Figure 11b] FIG. 11b illustrates an example of a structure containing an unfilled gap between two memory stacks that may be filled using the methods described herein.

[0032] [Figure 11c] FIG. 11c illustrates an example of a structure including an air gap that may be formed using the methods described herein.

[0033] [Figure 12a] FIG. 12a illustrates an example of a process sequence that may be used in accordance with disclosed embodiments, including deposition of a protective film.

[0034] [Figure 12b] FIG. 12b shows an example of the structure before and after deposition of a protective film.

[0035] [Figure 13] FIG. 13 shows thickness non-uniformity (NU) and refractive index (RI) for films deposited using PEALD with high frequency RF power only, and with high frequency RF power and low frequency RF power.

[0036] [Figure 14] FIG. 14 is a process flow diagram for a single PEALD cycle that may be performed as part of the deposition of a protective liner, or for any of the other ALD operations shown in FIG.

[0037] [Figure 15] FIG. 15 shows a process flow diagram for a method of forming a silicon oxynitride layer.

[0038] [Figure 16A] FIG. 16A shows the refractive index (RI) and density for films deposited using various numbers of SiN cycles in the method according to FIG.

[0039] [Figure 16B] FIG. 16B shows FTIR spectra for four 3 kÅ thick films deposited using the methods described herein.

[0040] [Figure 16C] FIG. 16C shows a schematic example of a SiON film with tailored composition and dry etch rate conformally deposited on a patterned layer.

[0041] [Figure 17] FIG. 17 is a schematic diagram of one embodiment of a plasma-enhanced atomic layer deposition (PEALD) process station that can be used to perform the methods described herein.

[0042] [Figure 18] FIG. 18 is a schematic diagram of an exemplary substrate processing apparatus that may be used to perform the methods described herein. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0043] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that the specific embodiments are not intended to limit the disclosed embodiments.

[0044] Semiconductor manufacturing processes often involve the deposition of dielectric materials, including silicon-containing films. Such films can be used for gap filling in structures including 3D NAND structures, DRAM structures, and shallow trench isolation (STI) structures, or on patterned substrates to form conformal films for a variety of applications, such as barrier layers for contacts. Silicon nitride and silicon carbide layers can be used as sealing, spacer, and barrier films in advanced devices for logic and memory structures, such as FinFET, MRAM, 3DXPoint, ReRAM, and PCRAM.

[0045] The embodiments described herein involve deposition by ALD. ALD is a technique that uses sequential self-limiting reactions to deposit thin layers of materials. Typically, an ALD cycle includes operations of delivering at least one reactant to a substrate surface for adsorption, and then reacting the adsorbed reactant with one or more reactants to form at least a partial layer of a film. As an example, a silicon oxide deposition cycle can include the following operations: (i) delivery / adsorption of a silicon-containing precursor, (ii) purging of the silicon-containing precursor from the chamber, (iii) delivery of an oxygen-containing reactant with an optional plasma, and (iv) purging of the oxygen-containing reactant and / or plasma from the chamber. When a plasma is used during delivery of the second reactant, in some embodiments, this is referred to as plasma-enhanced atomic layer deposition (PEALD). Delivery or adsorption of the silicon-containing precursor may be referred to as a "dosing" operation, and delivery of the second reactant to react with the adsorbed precursor may be referred to as a "conversion" operation.

[0046] Unlike chemical vapor deposition (CVD) techniques, ALD processes use surface-mediated deposition reactions to deposit films layer by layer. In one example of an ALD process, a substrate surface containing a population of surface active sites is exposed to a gas-phase distribution of a dose of a first precursor (such as a silicon-containing precursor) provided to a chamber housing the substrate. Molecules of this first precursor, including chemisorbed species and / or physisorbed molecules of the first precursor, are adsorbed on the substrate surface. It should be understood that when a compound is adsorbed on the substrate surface as described herein, the adsorbed layer may include the compound as well as derivatives of the compound. For example, an adsorbed layer of a silicon-containing precursor may include the silicon-containing precursor as well as derivatives of the silicon-containing precursor. After the dose of the first precursor, the chamber is evacuated to remove most or all of the first precursor remaining in the gas phase, leaving most or only the adsorbed species. In some embodiments, the chamber may not be completely evacuated. For example, the chamber may be evacuated such that the partial pressure of the first precursor in the gas phase is low enough to mitigate reaction. A second reactant, such as an oxygen-containing reactant, is introduced into the chamber, where some of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after an activation source is momentarily applied. In some embodiments, a plasma is ignited during the administration of the second reactant. The chamber can then be evacuated again to remove unbound second reactant molecules. In some embodiments, the chamber may not be fully evacuated. Additional ALD cycles can also be used to build up the film thickness. Examples of silicon-containing first reactants (also referred to as silicon-containing precursors) and second reactants (also referred to as co-reactants) are provided below.

[0047] In FIG. 1, a gas delivery system 100 is shown diagrammatically for delivering reactants to a single station of a multi-station reaction chamber (not shown) that may be used to perform one or more ALD cycles. The figure shows an arrangement of gas flow lines, manifolds, valves, regulators, filters, showerheads, etc., for delivering the ALD reactants. By way of example, gas lines are shown diagrammatically as thin solid lines with arrows indicating the direction of gas flow, valves are shown in the figure as cross lines in a circle, regulators are shown as arrows in a circle, manifolds are shown as solid boxes labeled "MANIFOLD," and filters are shown as curved lines on either side of the gas lines. Most of the gas flow lines deliver gases to a "showerhead" 110, which is a device that delivers the ALD reactants to a reaction chamber (not shown) as shown in this schematic.

[0048] Thus, with reference to the particular embodiment of gas delivery system 100 shown in FIG. 1, delivery of a film precursor (e.g., a silicon-containing film precursor) to a reaction chamber (associated with the ALD dosing and adsorption step (see operation (i) above)) may involve introducing the precursor from a liquid delivery system (labeled "LPDS") 120 into a heated injection manifold 125 (labeled "HIM"), where the precursor is mixed with a preheated (see "preheater" 124) inert carrier gas originating from a gas source 130 ("manifold A"). The carrier gas then carries the precursor to an array of four valves 169, 164, 165, 166, which, due to their close proximity (in terms of gas flow distance) to the reaction chamber, can be referred to as a point-of-use valve manifold (PVM) assembly 160. In particular, from the PVM 160, with valve 165 open and valve 166 closed, precursor and carrier gases flow directly to the showerhead 110 and then into the reaction chamber.

[0049] Similarly, delivery system 100 in FIG. 1 also illustrates the delivery of an oxidizing agent to a reaction chamber for use in ALD (associated with the generation of an oxidizing plasma and reaction with an adsorbed silicon-containing precursor (see step (iii) above)). Specifically, gas source 140 ("Manifold C") is shown as a source of O2 and / or NO gas flowed through valve 169 of the PVM 160 shown in the figure to the showerhead 110. The presence of manifold C 140 and "Manifold D" 170 should also be noted in the context of this configuration, as they may be used to deliver inert gas for post-dosing purge (step (ii) above) and post-RF purge (step (iv) above). With respect to manifold D 170, gas delivery system 100 is configured such that purge gas provided from manifold D flows in two paths through "preheater" 171 and then toward the showerhead. The purge gas flowing through both paths passes through a regulator (172 or 173) and then through a filter (173B or 175B) with valves (173A and 173C or 175A and 175C) located upstream and downstream. One path goes directly to the showerhead 110, while the other path first connects to the POS 160 to purge any remaining reactant gas remaining in the POS device after the dosing step. It should also be noted that in some embodiments, precursors can be removed from the volume surrounding the processing station in the reaction chamber by applying a vacuum to the reaction chamber (e.g., through the operation of a valve-actuated vacuum source) without the use of an inert purge gas.

[0050] 1 also illustrates a remote plasma source 195 that uses an NF3-based plasma (as shown), whose fluid coupling to the reaction chamber and process station is regulated by valve 116. Finally, it is noted that in some embodiments, manifold B 150 (regulated by valve 144) can serve as a source of a co-reactant gas, e.g., a nitrogen-containing co-reactant such as nitrogen (N2), that is flowed through valve 165 of POS 160 to the showerhead 110.

[0051] Conformal films can be deposited via PEALD by performing multiple PEALD cycles in succession. Each layer deposited by PEALD is very thin, typically formed from a single monolayer of silicon-containing precursor, and depositing a film of substantial thickness may involve many cycles and therefore may be relatively time-consuming. In many cases, the PEALD cycle time is comparable to the operation time of the valves and flow control devices, meaning that the time it takes for such flow control devices to provide a steady-state flow of silicon-containing precursors and / or other reactants becomes the limiting factor preventing desired further reductions in cycle time. The steady-state flow of reactants can be established by leaving the flow control devices in an open position and diverting the flow of reactants to or from the reaction chamber as required by the timing requirements of the PEALD cycle.

[0052] 2 and 3 show exemplary timing diagrams for PEALD deposition of silicon oxide in a four-station chamber, including split flow of silicon-containing precursors. FIG. 2 corresponds to simultaneous dispensing at four stations, and FIG. 3 corresponds to simultaneous dispensing at stations 1 and 2, followed by simultaneous dispensing at stations 3 and 4. It should be noted that FIG. 2 and FIG. 3 are provided as examples. The methods described herein can be performed in any number of stations, including single station chambers. In the case of a multi-station chamber, dispensing of silicon-containing precursors may be performed in parallel and / or sequentially across all or a subset of the stations.

[0053] Additionally, deposition of other materials including silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon oxycarbonitride, etc. may be performed by selection of appropriate reactants. For example, the RF oxidizer operation in the timing diagrams can be replaced by RF nitridation.

[0054] In FIG. 2, from top to bottom in the timing diagram, a schematic diagram of silicon-containing precursor delivery to each of four processing stations (labeled "Station 1" through "Station 4") is displayed, as shown by four traces 211, 212, 213, 214, which show precursor flow directed / diverted to each of the four processing stations. Precursor flow diverted to a diverting flow path (i.e., not to a processing station) is shown diagrammatically by a fifth trace 215. These five traces (211, 212, 213, 214, and 215) represent a breakdown of the total precursor flow shown diagrammatically by trace 210 at the top of FIG. 2. The diagram also shows diagrammatically the timing of post-dosage and post-RF purge gas flow (shown by traces 220 / 221 labeled "purge gas"), as well as the timing of the generation of an oxidizing plasma and reaction with the adsorbed precursor (shown by trace 230 labeled "oxidant / RF"). In the example of Figure 2, a single gas delivery system, such as that shown in Figure 1, can be used to flow precursors to each processing station, for example, in a four processing station configuration (optionally all contained within the same reaction chamber). In other embodiments, a dedicated gas delivery system can be used for each processing station.

[0055] In the timing diagram of FIG. 2, the precursor dosing steps of the four ALD cycles are timed to coincide with each other. Thus, in step (i) (far left), substrates positioned at the four stations are simultaneously dosed with a silicon-containing precursor that can be adsorbed onto the surface of each of the four wafers. Note that in this scenario, this may correspond to the opening of valve 164 in FIG. 1, while the other valves at the POS remain closed. After dosing step (i) is completed, the entire precursor flow is diverted, as shown by the "Diversion" trace 215 in the diagram. Complete diversion of the silicon-containing precursor occurs during the post-dosing purge step (ii) (shown by the "Purge Gas" trace 220 in FIG. 2), during the reaction of the adsorbed precursor via activation with an RF-generated oxidizing plasma in step (iii) (shown by the "Oxidant / RF" trace 230 in FIG. 2), and during the post-RF purge (also shown by the "Purge Gas" trace 220 in FIG. 2).

[0056] Note that in this scenario, the transition between the "Dose" and "Shunt" traces may correspond to the closing of valve 164 and the opening of valve 166 at the POS, as indicated by the "Shunt to Vacuum" label in Figure 1. Similarly, with valves 164 and 166 in these positions (164 closed, 166 open), purge steps (ii) and (iv) indicated by the "Purge Gas" trace 220 in Figure 1 may of course be accomplished by opening valves 165, 169, which remain closed (and in some embodiments also involving the opening of valves 162A and 162B to provide additional purging near the showerhead). The reaction through oxidizing plasma step (iii), indicated by the "Oxidant / RF" trace 230 in Figure 2, may correspond to valve 165 (which was left open for the purge step) being closed and valve 169 at the POS being opened while 164 and 166 remain in their shunt positions. It should be noted that the description of valve operation with reference to FIG. 1 is by way of example only.

[0057] FIG. 3 shows a timing diagram similar to FIG. 2 , but with the parallel execution of a series of four ALD cycles in which a flow of silicon-containing precursor from a common source is first administered to wafers at processing stations 1 and 2, and then redirected to be administered to wafers at stations 3 and 4.

[0058] One aspect of the present disclosure relates to a method for depositing materials at increased growth rates by PEALD. The method can be used for gap filling, including deep features, allowing for rapid closure of voids in features. Exemplary applications include gap filling of slits in 3D NAND structures that isolate memory stacks, other 3D NAND structures, DRAM structures, and shallow trench isolation (STI) structures. In some embodiments, the gaps can be high aspect ratio (HAR) gaps. Examples include gaps with aspect ratios up to 35:1.

[0059] In some embodiments, the method includes controlling the flow rate during dosing of the silicon-containing precursor. In some embodiments, the method includes allowing the silicon-containing precursor to flow into the station during at least a portion of the cycle after dosing. In some embodiments, the method includes controlling a timing sequence of dosing, purging, and RF operation. In some embodiments, the method involves including a low frequency RF (LFRF) component during the RF operation. According to various embodiments, any one or more of the above methods are used to enhance the growth rate. The method can enhance the growth rate by adding a CVD-type component to the ALD deposition.

[0060] Controlling the flow rate during silicon-containing precursor dosing may involve reducing the total flow rate of silicon-containing precursor and carrier gas by decreasing the carrier gas. This increases the concentration of silicon-containing precursor during dosing. As an example, the total flow rate per station may be 2000-4000 standard cubic centimeters per minute (sccm) of silicon-containing precursor and argon or another carrier gas. The volumetric flow ratio of silicon-containing precursor:carrier gas during dosing may be, for example, 1:4-3:1 or 3:5-5:2. This may be compared to a ratio of 1:6-1:5 for a process without an increase in growth rate.

[0061] Allowing silicon-containing precursor to flow into the chamber during purging can be implemented in various ways. For example, the valve to the showerhead can be left open without diverting silicon-containing precursor gas during at least a portion of the time between the dose and RF operation. This allows silicon-containing precursor to continue to flow into the station.

[0062] In some embodiments, the flow into the chamber can be entirely controlled by the silicon-containing precursor gas source. FIG. 4 shows a simplified schematic of a portion of a gas delivery system for delivering a silicon-containing precursor. The silicon-containing precursor gas source 402 can include, for example, a vapor suction ampoule, a silicon-containing precursor source, and an inert gas source. The ampoule can be configured to receive the silicon-containing precursor and the inert gas and vaporize the silicon-containing precursor. A push gas source 404 can provide a push gas to push the silicon-containing precursor / inert gas mixture to the showerhead as shown. Three valves are shown in the simplified schematic of FIG. 4. An outlet valve 412 controls the flow in the silicon-containing gas source. An inlet valve 416 to the showerhead controls the flow through the showerhead and into the station. Also shown is a diversion line including a diversion valve 414. The gas distribution system shown in FIG. 4 can be part of a gas distribution system as described above with respect to FIG. 1, for example.

[0063] In certain embodiments, during at least a portion of the post-dosage purge of an ALD cycle, inlet valve 416 is open and diversion valve 414 is closed, allowing the flow of silicon-containing precursor gas to be controlled by outlet valve 412. Even after outlet valve 412 is closed, some amount of silicon-containing precursor gas may be in the line and entering the station.

[0064] Figures 5-8 provide examples of timing sequences for PEALD deposition of silicon oxide including CVD-type components. As discussed above with respect to Figures 2 and 3, these sequences are not limited to silicon oxide deposition or RF oxidation processes. Deposition of other materials including silicon nitride, silicon oxynitride, silicon carbide, silicon oxycarbide, silicon oxycarbonitride, etc. may be performed by appropriate reactant selection. For example, the RF oxidizer operation in the timing diagrams could be replaced by RF nitridation.

[0065] First, referring to FIG. 5, an exemplary timing sequence for silicon oxide deposition is shown. Five stages are shown in FIG. 5: two doses (D1 and D2), post-dose purge (PDP), RF / oxidation, and post-RF purge. The top trace shows the flow of Si-containing precursor and inert gas from the Si-containing precursor source outlet valve. An example is outlet valve 412 in FIG. 4. The second trace from the top is the flow of Si-containing precursor and inert gas into the station. In the example of FIG. 4, the inert gas can come from silicon-containing precursor gas source 402 and push gas source 404 in FIG. 4. Diversion gas, purge gas, and RF / oxidizer are also shown.

[0066] During dose D1, the outlet valve from the Si-containing precursor gas source is open. This is similar to the dosing steps of Figures 2 and 3. When the outlet valve is closed, the flow of Si-containing precursor and inert gas from the Si-containing precursor gas source stops. A certain amount of Si-containing precursor remains in the line and the showerhead. During dose D2, this Si-containing precursor and inert gas continues to flow into the station. This is shown by the second trace from the top. Note that while there is no continued supply of Si-containing precursor from the silicon-containing precursor gas source during D2, in some embodiments inert gas may be supplied from the inert gas source. For example, in Figure 4, inert gas can continue to flow from the push gas source 404.

[0067] The sequence of FIG. 5 differs from that of FIG. 2 in that the latter sequence diverts the flow of any Si-containing precursor after dosing. In the example of FIG. 5, any precursor remaining in the line is allowed to continue to flow into the station without diversion throughout the entire cycle. This includes during the post-dosing purge, when the purge gas is flowed, during the RF / oxidation stage, and during the post-RF purge. The Si-containing precursor and inert gas continue to flow into the station during D2, but the total flow rate and amount of Si-containing precursor in the flow is reduced because no new Si-containing precursor is provided from the source. In some embodiments, they may be continuously reduced throughout the process.

[0068] In some embodiments, diversion may occur during a portion of the cycle. FIG. 6 shows another example of a timing sequence including a D2 dosage stage, similar to FIG. 5. In the example of FIG. 6, the precursor flow is diverted to the RF / oxidation stage and the post-RF purge stage. In alternative embodiments, diversion may begin at the beginning of the PDP stage or at any time during the PDP or RF / oxidation stages. In the examples of FIGS. 5 and 6, the flow to the station includes a silicon-containing precursor and an inert gas, which may be in the showerhead or in the line downstream of the diversion valve 414.

[0069] Allowing precursors to flow into the station after the D1 stage can facilitate the provision of CVD-type components to the deposition process. Non-adsorbed precursors present in the station during the RF / oxidation stage react in a CVD-type reaction. The amount of film deposited by the CVD-type components of the deposition process can be controlled by several parameters, including the presence and timing of a D2 stage and shunting. More precursors will be present during the RF / oxidation stage when using the timing diagram of FIG. 5 than when using the timing diagram of FIG. 6. The presence, purge amount, and timing of a PDP stage can also be used to control the CVD-type components. To increase the CVD-type components, the amount of purge gas flowed during the PDP stage and / or the duration of the PDP stage can be reduced. In some embodiments, the post-dosing purge may be omitted as shown in FIG. 7. In some embodiments, the D2 stage may be omitted and the PDP stage begins at the end of the D1 stage. The silicon-containing precursor can still flow into the station without shunting as shown in the timing diagram of FIG. 8.

[0070] Another parameter that controls the CVD-type component of the deposition is the time between the end of the D1 stage (or dose as referenced in Figures 2 and 3) and the start of the RF / oxidation, which includes the D2 and / or PDP stages. Exemplary times range from 5 ms to 500 ms. At the low end of this range, the deposition will have more CVD-type components. At the high end of the range, the deposition may be mostly ALD.

[0071] In some embodiments, during oxidation or nitridation, the RF is provided with a low frequency (LF) component as well as a high frequency (HF) component. In such embodiments, some of the deposited dielectric is sputtered from the top of the feature and further redeposited within the feature. In some embodiments, the HF component is relatively high to obtain good conversion to oxide, nitride, or other desired film. For example, the HF component may be 4 kW to 10 kW (split into four stations), i.e., 1 kW to 2.5 kW per station. The amount of sputtering and redeposition can be regulated by controlling the LF power. In some embodiments, the LF power may be the same as or lower than the RF power. For example, the LF component may be 500 W to 10 kW (split into four stations), i.e., 125 W to 2.5 kW per station. In some embodiments, the LF power is 500 W to 5 kW (split into four stations), i.e., 125 W to 1250 W per station. The power per station may be used for chambers having any number of stations. HF frequencies are around 13.56 or 27 MHz, and LF frequencies are around 300-400 kHz.

[0072] Sputtering and redeposition can also be controlled by the flow rate of an inert gas, such as argon (Ar). In some embodiments, a high argon Ar gas flow is used during the RF stage to increase sputtering and redeposition. For example, the Ar flow rate is up to about 50 standard liters per minute (slm) for four stations, i.e., up to 12.5 slm per station. At the lower end, an Ar flow rate of about 3.5 to 10 slm, i.e., 875 sccm to 2.5 slm per station, may be used during the RF stage. In some embodiments, the Ar flow rate to the stations may be increased only for the RF stage.

[0073] In some embodiments, the CVD-type components are controlled using RF purge (RFP). The oxidizer or other co-reactant is not completely purged and is allowed to remain in the chamber to react with the precursor in the next dose stage. This may be done in addition to or instead of the dose and / or PDP control described above. An exemplary timing diagram is shown in FIG.

[0074] FIG. 9 shows four stages in a cycle: dose, PDP, RF / oxidation, and RFP. In the example shown, the Si precursor and inert gas are at the station during dose. In some embodiments, a flow diverter (not shown) can be used to direct the precursor away from the station during dose. In alternative embodiments, the precursor may be allowed to continue flowing into the chamber after dose. In FIG. 9, the oxidizer is turned off and / or diverted as soon as the plasma is extinguished. In alternative embodiments, the oxidizer may be allowed to continue flowing into the chamber after the RF is turned off.

[0075] By appropriately controlling the timing of the RFP, CVD-type components can be introduced during subsequent doses. The purge flow and the amount and concentration of oxidizer (or other co-reactant) can also be controlled to affect the CVD-type components. By shortening the RFP time and / or increasing the amount and / or concentration of oxidizer, oxidizer species are allowed to be present during the next dose step to react with the precursor. The oxidizer species may be molecules and / or radicals, or other afterglow plasma species. RF power (HF and / or LF) can also be increased to increase the reactivity of the remaining species. Example RFP times range from 0.5 seconds to 5 seconds. Example purge flows range from 5 lpm to 45 lpm (but this depends on the particular reactor geometry and size).

[0076] In some embodiments, the RFP time is less than 1 second. RFP times of 1 second or more are more likely to result in pure ALD. In contrast, a 0.1 second RFP with low purge flow results in high CVD-type components. In some embodiments, the RFP time is less than 0.9 seconds, 0.8 seconds, 0.7 seconds, 0.6 seconds, 0.5 seconds, 0.4 seconds, 0.3 seconds, or 0.2 seconds.

[0077] FIG. 10 shows an example of deposition rate as a function of RFP time, with all other process parameters held constant. An RF power of 5000 W was used. In the exemplary process, the deposition rate is higher for RFP times of about 0.3 seconds or less, and then decreases as the RFP time increases. At 0.5 seconds, the process is or is close to being pure ALD. RFP times that result in a strong or weak CVD-type component or pure ALD depend on the purge flow, amount of oxidizer, concentration of oxidizer, RF power, etc.

[0078] As discussed above, the method may be implemented for a variety of applications, including memory and logic applications. In some embodiments, the method may be used for gap filling. FIG. 11a shows an example of a feature 1101 that includes an unfilled gap 1103 between sidewalls 1115. In the figure, a width "a" and a height "b" are shown. The width may be a diameter. The aspect ratio (A / R) is given by b / a as shown. The sidewalls 1115 are generally vertical. However, there may be some reentrancy. The reentrancy narrows from the bottom of the feature upwards. Inset 1110 shows the reentrancy of thickness "y" at a depth "x" within the feature. The sidewall surfaces may include one or more dielectric, conductive, or semiconductive materials. In some embodiments, the gap may be lined with a liner film.

[0079] In some embodiments, the method is performed to fill gaps during the fabrication of 3D NAND structures. For example, it is possible to etch slits in alternating silicon oxide / silicon nitride (ONON) layers and then deposit a dielectric in the slits. FIG. 11b shows an example of a structure including a gap 1103 between two memory stacks 1105. Each stack can include 2 to 256 or more pairs of alternating oxide / nitride layers. According to various embodiments, the stacks may be lined with a layer, for example, a polysilicon layer. During the filling of the gap 1103, an LF component may be added to the RF oxidation operation. Adding the LF component mitigates the formation of cracks in the ONON stacks. In some embodiments, this is due to bridging and / or stress in the sputtered and redeposited films.

[0080] The methods may be used for dielectric gapfill of any suitable structures, including DRAM structures for logic device fabrication, as well as shallow trench isolation (STI) and deep trench isolation (DTI) structures. In some embodiments, during gapfill, the methods may include inhibit and / or etch operations. For example, the PEALD timing sequence described above may be used for the deposition operation in a deposition-etch-deposition (DED) process to fill the gap.

[0081] In some embodiments, the methods described herein are used to form closed voids in hole and trench structures. Figure 11c shows an example of a void 1120 formed between two features. Dielectric material 1122 is deposited in the gap between the features with a sufficient amount of CVD type composition such that the void 1122 forms as more dielectric material is deposited on top of the features. Using the techniques described above, it is possible to control the CVD type composition to form the void.

[0082] Forming voids (also called air gaps) can reduce the level content in semiconductor devices. The method can also be used to form air gaps in any suitable context, including forming air gaps in MEMS devices. Examples of semiconductor structures include interconnects, conductive lines, or other conductive features. The method can also be implemented in any context where an air gap capped by a dielectric film between features is useful. Examples of structures include 3D NAND structures such as holes and slits, DRAM structures such as bit line structures, back-end-of-line (BEOL) metal lines, logic gates, and the like. The structures are characterized by having two or more adjacent features with an unfilled gap between the features. In many implementations, the features are conductive features, and the air gaps formed provide a very low k dielectric constant and reduce parasitic capacitance. However, the sidewall surfaces of the features can be any material, including conductive, dielectric, or semiconducting surfaces, or combinations thereof. For example, the structures can be copper (Cu) lines coated with a silicon carbide (SiC) film. The dimensions of the structures also depend on the particular application. For example, incoming DRAM structures may have gaps 25-50 nm wide and 300-800 nm deep, and incoming 3D NAND structures may be 50-350 nm wide and 5-8 microns deep. However, the method is not limited to any particular structure dimensions, feature configurations, or sidewall surfaces. In some embodiments, the method can be implemented in applications where other techniques for forming air gaps (such as deposition and removal of sacrificial materials) are difficult to implement.

[0083] The void formed can be characterized by the placement and shape of the top of the void, shown at 1126. The location of the void can be adjusted by the amount of RF time and / or the amount of sputtering. The top of the void is generally some distance below the top of the feature to ensure that the void remains closed during further processing. In some embodiments, the top of the void is rounded, as shown in FIG. 11c. The rounded top helps prevent cracking.

[0084] The void-containing features may be further characterized by a depression 1128 that forms as a result of the deposition. The sputtering described above widens the depression angle 1130. In some embodiments, the depression angle is greater than 50°, greater than 55°, greater than 60°, greater than 65°, greater than 70°, greater than 75°, greater than 80°, or greater than 85°.

[0085] In some embodiments, the process can include periodic exposure to an inhibiting plasma. The inhibiting plasma forms a passivated surface and increases the nucleation barrier of the film. When the inhibiting plasma interacts with the material in the feature, the material at the bottom of the feature receives less plasma treatment than the material located near the top portion of the feature or within the field due to geometric shadowing effects. Deposition at the top of the feature is selectively inhibited, while deposition at the lower portion of the feature proceeds with less inhibition or no inhibition. This results in enhanced bottom-up filling, forming a more favorable gradient profile that reduces the effect of seams and prevents the formation of voids. Halogen-containing plasmas can be effective inhibiting plasmas. For example, in some applications, plasmas generated from nitrogen trifluoride (NF3) can provide an inhibiting effect in a significantly reduced time compared to plasmas generated from molecular nitrogen (N2). However, halogen-containing plasmas can also act as etchants. For example, while performing inhibition, atoms that impact the surface with low energy can act as an inhibiting agent, while high energy atoms can remove material. Because the plasma has an energy distribution, some components of the plasma may impinge and etch near the top of the feature. The etched dielectric is replaced during deposition. If the underlying material (e.g., polysilicon (poly-Si), metal oxide, etc.) is removed, the etched dielectric is not replaced, which may affect device performance.

[0086] In some embodiments, the method is performed to form a protective film on top of the gap. This film may be referred to as a "helmet" on top of the gap and may protect against damage from the inhibiting plasma. FIG. 12a shows an example of a process sequence that may be used in accordance with disclosed embodiments. In the example of FIG. 12a, multiple ALD operations are shown. Any one or more of these operations may include CVD-type components using one or more of the techniques described above.

[0087] The process sequence of FIG. 12a includes deposition of a protective film prior to exposure to the suppression plasma. Other operations (e.g., soak, passivation) may be omitted in certain embodiments, and operations may be added in certain embodiments. In the exemplary process sequence of FIG. 12a, one or more wafers undergo gap filling. The process can begin with a soak after being provided to the deposition chamber. This may be useful, for example, for particle removal or another pretreatment. Subsequently, n1 cycles of ALD deposition of a protective film are performed. Further details of protective liner ALD are described below. After the protective film is deposited, n suppression blocks are performed, with one suppression block operation shown. The first operation of the suppression block is a suppression plasma, which is a surface treatment. As described above, the plasma is a halogen species, including anions, and F. - , Cl - , I - , Br - , fluorine radicals, and other radical species. Other suppressive plasmas may be used that have a protective coating to protect against plasma that may damage the structure. For example, plasmas generated from molecular nitrogen (N2), molecular hydrogen (H2), ammonia (NH3), amines, diols, diamines, aminoalcohols, thiols, or combinations thereof may be used as suppressive plasmas. A protective coating may be used when conditions such as temperature, RF power, and sensitivity of the underlying material are such that plasma damage may occur. In some embodiments, a halogen-containing gas (e.g., NF3) is used. The halogen-containing gas may be significantly diluted with another gas, such as oxygen (O2), to control the suppression and prevent etching. For example, in some embodiments, the volumetric flow ratio of oxidizer:halogen may be at least 5:1 or at least 10:1.

[0088] When the suppression plasma interacts with material in the feature, the material at the bottom of the feature receives less plasma treatment than the material located near the top portion of the feature or within the field due to geometric shadowing effects. As a result, deposition at the top of the feature is selectively suppressed, while deposition at the lower portion of the feature proceeds with less suppression or no suppression. In FIG. 12a, the next operation in the suppression block is n2 cycles of ALD fill. Dielectric material is selectively deposited at the bottom of the feature. The n2 cycles of suppression plasma and ALD fill together form a growth cycle. The growth cycle can be repeated n3 times to continue filling the feature with intermittent suppression operations as the suppression effect decreases. The number of growth cycles in the suppression block may depend on the reentrancy of the feature. Features that exhibit more reentrancy can use longer suppression times or multiple suppression blocks. In the example of FIG. 12a, the suppression block ends with a passivation operation. This is a surface treatment that can remove residual inhibitors and also densify the deposited film. In some embodiments, an oxygen plasma is used. In some embodiments, the passivation cycle may be omitted.

[0089] One or more additional suppression blocks including growth cycles and passivation may be performed for a total of n suppression blocks. The number of suppression blocks depends on how much material is used to fill the feature. The suppression plasma, ALD, and passivation conditions can be changed for each suppression block to fill the feature. For example, the suppression plasma duration may be 20 seconds until the bottom quarter of the feature is filled (suppression block 1), then changed to 5 seconds for the middle 50% of the structure (suppression block 2), etc.

[0090] Once the feature is nearly filled, inhibition is no longer necessary and the fill can be completed with n4 cycles of ALD fill. In some embodiments, a dielectric cap or overburden layer can then be deposited. For high rate deposition, plasma enhanced chemical vapor deposition (PECVD) may be used at this stage.

[0091] In some embodiments, the protective film is deposited using CVD-type chemistry as described above. FIG. 12b shows an example of a 3D NAND structure 1250 with poly-Si 1218 on top of the ONON stack. At 1251, the poly-Si 218 becomes weak when exposed to the suppressing plasma used to fill the gap 206. At 1253, the protective film 1260 is shown. In a particular embodiment, the inlet valve controlling the silicon-containing precursor to the showerhead is open and the diverter valve is not closed. This allows the flow of the silicon-containing precursor gas to be controlled by the outlet valve of the silicon-containing precursor source. As described above with respect to FIG. 4, after the outlet valve is closed, some amount of silicon-containing precursor gas is in the line and can enter the station. In the same or other embodiments, LF power is used during the formation of the protective film.

[0092] By allowing silicon-containing precursors to flow into the station during deposition of the protective liner, it is possible to deposit protective films much more quickly than ALD processes without CVD-type components. Providing an LF component can also improve deposition, providing films with greater uniformity and higher refractive index (RI) than HF-only deposited films. Referring to FIG. 13, thickness non-uniformity (NU) and refractive index (RI) are shown for films deposited using a silicon-containing precursor / purge / N2 plasma / purge sequence at 10 Torr with 1000W HF+1500W LF (triangles) and PEALD with 1000W HF only. For the HF+LF deposited films, NU is significantly lower and RI is higher. RI is inversely correlated with etch rate. Thus, the HF+LF deposited films are more etch resistant. Deposition rates are also shown at multiple pressures, with higher rates for the HF+LF deposited films.

[0093] The protective film may be formed from a material that is relatively etch-resistant to the suppressor plasma. Examples of protective liners include silicon nitride, silicon carbide, and silicon oxide (including silicon oxynitride, silicon oxycarbide, silicon carbonitride, etc.). Any material that is compatible with the suppressor gas and has a high selectivity (low etch rate) for the suppressor compared to the underlying film may be used.

[0094] Silicon oxide has a lower resistance to fluorine-based or similar plasmas than silicon nitride or silicon carbide and may only be used in certain circumstances, which may include one or more of the following: the suppression plasma is relatively weak, the suppression plasma is applied for only a short period of time, and the feature dimensions allow for a fairly large amount of protective film to be deposited without pinching off the feature during fill.

[0095] Silicon nitride (SiN) may be deposited using N2 plasma or other nitrogen-containing plasma. In some embodiments, no oxidizer is used during the deposition of SiN. However, ambient conditions may result in the formation of silicon oxide rather than silicon nitride under certain process conditions. The use of LF during deposition of the SiN protective film results in the formation of nitride rather than oxide. For example, with reference to FIG. 13, the HF-only deposition has an RI indicating that a significant portion of the film is oxide rather than nitride. The HF / LF deposited film has an RI that matches that of the nitride. The LF RF power may be limited to avoid excessive sputtering. In some embodiments, the amount of LF power is 1-2 kW for four stations (i.e., 250W-500W per station). It is also possible to deposit SiN films by using very low pressures with little oxygen present and / or by using longer RF times. Silicon carbide may be deposited using a carbon-containing co-reactant (e.g., reaction of silane with methane).

[0096] In many embodiments, the material is sacrificial and is removed during inhibition, so is not particularly limited. The depth of the protective film can be determined by determining the depth at which the inhibition plasma would damage the underlayer in the absence of a protective liner. This can be done experimentally, by modeling, or a combination of both. The protective film can be deposited to a thickness such that it protects the underlayer through the inhibition plasma, but is removed by the end of the last inhibition plasma. This can be determined experimentally and / or from known etch rates. Exemplary thicknesses can range from tens to hundreds of angstroms. In some embodiments, some amount of protective film may remain after gap filling. In such cases, a separate removal process can be performed before filling the portion of the gap where the protective liner remains. In some embodiments, the remaining protective film may be left in the device. In some embodiments, the deposition of the protective film may be performed multiple times, for example, every m inhibition blocks.

[0097] The CVD-type components in the PEALD process can facilitate depositing the protective liner preferentially on top of the structure rather than conformally. As mentioned above, in some embodiments, the silicon-containing precursor can be flowed throughout the process or as described with respect to Figures 5-8. In some embodiments, an LF RF plasma is used. Additionally, the pressure can be kept relatively low (e.g., less than 20 Torr, or less than 15 Torr) to further facilitate non-conformal deposition of the protective liner.

[0098] Deposition of the protective liner by the methods described herein can result in a gradual taper in thickness from the top of the gap to its deepest point, with the etch rate decreasing with increasing depth, thereby allowing the tapered protective liner to be removed without etching the underlying layers.

[0099] FIG. 14 presents a process flow diagram for a single PEALD cycle that may be performed as part of the deposition of a protective liner, or for any of the other ALD operations shown in FIG. 12a. In operation 1402, a substrate is exposed to a silicon-containing precursor, causing the precursor to adsorb onto the surface of the feature. This operation may be self-limiting. In some embodiments, the precursor adsorbs to fewer than all active sites on the surface of the feature. In operation 1404, the process chamber is optionally purged to remove unadsorbed silicon-containing precursor. As described above, in some embodiments, the substrate continues to be exposed to a flow containing the silicon-containing precursor during the purge.

[0100] In operation 1406, the substrate is exposed to a plasma generated from the co-reactant. Examples include O2 and / or N2O to form a silicon oxide or silicon oxynitride layer, nitrogen (N2) or ammonia (NH3) to form a silicon nitride layer, methane (CH4) to produce a silicon carbide layer, etc. As noted above, in some embodiments, the substrate continues to be exposed to a flow containing the silicon-containing precursor during this operation. Also, as noted above, in the same or other embodiments, the plasma is an RF-generated plasma generated using LF and HF voltages.

[0101] In operation 1408, the process chamber is optionally purged to remove by-products from the reaction between the silicon-containing precursor and the co-reactant. As described above, in some embodiments, the substrate continues to be exposed to a flow containing the silicon-containing precursor during this operation. Operations 1402-1408 are repeated for multiple cycles to deposit a silicon-containing layer to a desired thickness in the feature.

[0102] It should be noted that the process described herein is not limited to a particular reaction mechanism. Thus, the process described with respect to Fig. 14 includes all deposition processes using a silicon-containing precursor and continuous exposure to a conversion plasma, including those that are not strictly self-limiting. The process includes a sequence in which one or more gases used to generate the plasma are continuously flowed throughout the process with intermittent plasma ignition.

[0103] Another aspect of the present disclosure relates to a method of forming a silicon oxynitride layer by PEALD. As used herein, silicon oxynitride (SiON) refers to SiO x N ywhere x and y are numbers greater than 0. FIG. 15 is a process flow diagram for a method of forming a silicon oxynitride layer. First, in operation 1502, process conditions for SiO deposition are stabilized. This involves modifying gas flows and stabilizing flow rates into the chamber or stations of the chamber, as described above. In some embodiments, this may involve stabilizing the chamber pressure. As described further below, the substrate temperature and / or chamber pressure may be the same as the previous operation and may not need to be stabilized.

[0104] Next, x PEALD cycles using a silicon-containing precursor and an oxygen-containing (O-containing) co-reactant are performed in operation 1504. As described further below, the number of cycles x can be determined by the amount of oxygen incorporated into the deposited film and whether the deposited film is a homogenous SiON film or a layered SiO / SiN film. In some embodiments, x is an integer from 1 to 15, or 1 or 10, or 1 to 7, inclusive.

[0105] Once the x number of cycles have been performed, the process conditions in the chamber are stabilized for SiN deposition in operation 1506. Operation 1506 includes altering and stabilizing gas flows and may further include altering the chamber pressure. As described further below, the substrate temperature and / or chamber pressure may be the same as in the previous operation and may not need to be stabilized.

[0106] Next, y PEALD cycles using a silicon-containing precursor and a nitrogen-containing (N-containing) co-reactant are performed in operation 1508. The N-containing reactant typically does not contain oxygen, and no O-containing reactant is used during operation 1508. As described further below, the number of cycles y can be determined by the amount of nitrogen incorporated into the deposited film and whether the deposited film is a homogenous SiON film or a layered SiO / SiN film. In some embodiments, y is an integer from 1 to 15, or 1 or 10, or 1 to 7, inclusive.

[0107] In operation 1501, operations 1502-1508 are repeated one or more times to accumulate a film thickness. According to various embodiments, the entire process shown in FIG. 15 is performed in the same chamber, and in some embodiments, in the same station of a multi-station chamber. In some embodiments, different stations may be used for different process operations.

[0108] Fine control of nitrogen incorporation into the SiON film can be used to control the dry etch rate of the film, with more nitrogen generally resulting in a more etch-resistant film. The ratio of x:y can be used to adjust the relative amounts of O and N in the film. In some embodiments, the number of cycles x and y each before repeated deposition of SiO and SiN, as well as the total number of cycles x+y, are kept low enough so that the deposited film is a homogenous SiON film. In embodiments where SiO and SiN are separate alternating layers, the number of cycles can be increased. According to various embodiments, the ratio x:y can range from 1:10 to 10:1. Other ratios may be used.

[0109] In some embodiments, the chamber pressure is changed in operations 1502 and 1506. In other embodiments, the same chamber pressure is used. The plasma duration during the PEALD cycle in operation 1508 (using a nitrogen-based plasma) is much longer than the plasma duration in operation 1504 (using an oxygen-based plasma). For example, it is at least twice as long, at least three times as long, at least five times as long, or at least seven times as long. According to various embodiments, the silicon-containing precursor used in operation 1504 may be the same or different from that used in operation 1508.

[0110] According to various embodiments, operation 1502 may involve stopping the flow of nitrogen (N2) or other non-oxygen-containing nitrogen-containing reactant into the processing station. This may involve, for example, stopping or diverting the flow from the manifold. This operation may further involve starting the flow of an oxidizer (e.g., O2 and / or N2O) from the manifold with diverting. This operation may further involve starting the flow of a silicon-containing precursor into the processing station. This may involve opening a valve from a silicon-containing precursor gas source without diverting, for example, valve 412 of FIG. 4. In some embodiments, the valve may be opened or remain open during the RF purge operation of operation 1508.

[0111] According to various embodiments, operation 1506 may involve stopping the flow of oxygen (O2) or other oxygen reactant into the processing station. This may involve, for example, stopping or diverting the flow from the manifold. This operation may further involve starting the flow of a non-oxygen-containing nitrogen-containing reactant (e.g., N2) from the manifold with diverting. This operation may further involve starting the flow of a silicon-containing precursor into the processing station. This may involve opening a valve from a silicon-containing precursor gas source without diverting, for example, valve 412 of FIG. 4. In some embodiments, the valve may be opened or remain open during the RF purge operation of operation 1504.

[0112] Figure 16A shows the refractive index (RI) and density inversely correlated with etch rate for films deposited using various numbers of SiN cycles in a method according to Figure 15. As can be seen from Figure 16A, the RI and density (and therefore the dry etch rate) can be adjusted over a fairly wide range by increasing or decreasing the number of SiN cycles relative to the total SiN and SiO cycles.

[0113] FIG. 16B shows FTIR spectra for four 3 kÅ thick films: one SiO2 film, one SiN film, one SiON film, and one SiON film deposited using the method as shown in FIG. 15 with 3 oxidant cycles to 7 nitridant cycles for each iteration, and a SiON film deposited using the method as shown in FIG. 15 with 7 oxidant cycles to 3 nitridant cycles for each iteration. For the films deposited using both O2 / Ar and N2 / Ar plasma operation, the peaks are between the SiO2 and SiN peaks, indicating that the films are mixed SiON films and not layered SiO2 / SiN films.

[0114] The SiON films described herein can be used in a variety of applications, including as spacers in patterning schemes. For example, the SiON film can be deposited on a patterned core material that overlies a target layer to be etched. In some embodiments, the patterned core material can be a carbon-based structure, such as an amorphous carbon structure. A SiON film can be deposited to conformally coat the patterned core material. FIG. 16C shows an example of a SiON film 1620 with a tuned composition and dry etch rate conformally deposited on a patterned layer 1613. Examples of materials for the patterned layer 1613 include amorphous carbon, amorphous silicon, and photoresist. The conformal film 1620 is directionally etched to form spacers 1621 adjacent to the patterned first layer 1613. The patterned first layer 1613 is selectively removed, leaving free-standing spacers 1621. The spacers 221 can provide a mask with a smaller CD to form features at smaller pitches in the underlying layer 1605. Because the SiON film 1620 can be subjected to several precise etch operations in a pattern transfer scheme, it is advantageous to be able to adjust the dry etch rate as described above.

[0115] One or more silicon-containing precursors can be used to deposit a silicon-containing film as described above with reference to FIGS. 1-16C. The silicon-containing reactant can react with a co-reactant to form a silicon-containing film (e.g., SiO2, SiN, SiON, SiC, SiOC, etc.). Silicon-containing precursors suitable for use in accordance with the disclosed embodiments include polysilanes (H3Si-(SiH2) n —SiH3), where n>0. Examples of silanes are silane (SiH4), disilane (Si2H6), and organosilanes such as methylsilane, ethylsilane, isopropylsilane, t-butylsilane, dimethylsilane, diethylsilane, di-t-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, and the like.

[0116] Halosilanes contain at least one halogen group and may or may not contain hydrogen and / or carbon groups. Examples of halosilanes are iodosilane, bromosilane, chlorosilane, and fluorosilane. Specific chlorosilanes are tetrachlorosilane, trichlorosilane, dichlorosilane, monochlorosilane, chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like.

[0117] Aminosilanes contain at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogen, oxygen, halogens, and carbon. Examples of aminosilanes are mono-, di-, tri-, and tetraaminosilanes (HSi(NH), HSi(NH), HSi(NH), and Si(NH), respectively), as well as substituted mono-, di-, tri-, and tetraaminosilanes, such as t-butylaminosilane, methylaminosilane, tert-butylsilane amine, bis(tert-butylamino)silane (SiH(NHC(CH))(BTBAS), tert-butylsilylcarbamate, SiH(CH)-(N(CH), SiHCl-(N(CH), (Si(CH)NH), and the like. A further example of an aminosilane is trisilylamine (N(SiH). In some embodiments, aminosilanes with two or more amine groups attached to a central Si atom may be used. These may be less damaging than aminosilanes with only a single amine group attached.

[0118] Further examples of silicon-containing precursors include trimethylsilane (3MS), ethylsilane, butasilane, pentasilane, octasilane, heptasilane, hexasilane, cyclobutasilane, cycloheptasilane, cyclohexasilane, cyclooctasilane, cyclopentasilane, 1,4-dioxa-2,3,5,6-tetrasilacyclohexane, diethoxymethylsilane (DEMS), diethoxysilane (DES), dimethoxymethylsilane, dimethoxysilane. Examples of suitable silanes include diphenyl ether (DMOS), methyldiethoxysilane (MDES), methyldimethoxysilane (MDMS), octamethoxydodecasiloxane (OMODDS), tert-butoxydisilane, tetramethylcyclotetrasiloxane (TMCTS), tetraoxymethylcyclotetrasiloxane (TOMCTS), triethoxysilane (TES), triethoxysiloxane (TRIES), and trimethoxysilane (TMS or TriMOS).

[0119] In some embodiments, the silicon-containing precursor may comprise a siloxane or an amino-group-containing siloxane. In some embodiments, the siloxane used herein is a compound represented by the formula: X(R 1 ) a Si-O-Si(R 2 ) b Y, where a and b are integers from 0 to 2, and X and Y are independently H or NR 3 R 4 R 1 , R 2 , R 3 , and R 4 Each of X and Y is hydrogen, unbranched alkyl, branched alkyl, saturated heterocyclic group, unsaturated heterocyclic group, or combinations thereof. In some embodiments, at least one X or Y is NR 3 R 4When R3 and R4 are taken together with the atom to which they are each attached, they form a saturated heterocyclic compound. In some embodiments, the silicon-containing precursor is a pentamethylated amino group-containing siloxane or a dimethylated amino group-containing siloxane.Examples of amino group-containing siloxanes include 1-diethylamino-1,1,3,3,3-pentamethyldisiloxane, 1-diisopropylamino-1,1,3,3,3-pentamethyldisiloxane, 1-dipropylamino-1,1,3,3,3-pentamethyldisiloxane, 1-di-n-butylamino-1,1,3,3,3-pentamethyldisiloxane, 1-di-sec-butylamino-1,1,3,3,3-pentamethyldisiloxane, 1-N-methylethylamino-1,1,3,3,3-pentamethyldisiloxane, 1-N-methylpropylamino-1,1,3,3,3-pentamethyldisiloxane, 1 N-methylbutylamino-1,1,3,3,3-pentamethyldisiloxane, 1-t-butylamino-1,1,3,3,3-pentamethyldisiloxane, 1-piperidino-1,1,3,3,3-pentamethyldisiloxane, 1-dimethylamino-1,1-dimethyldisiloxane, 1-diethylamino-1,1-dimethyldisiloxane, 1-diisopropylamino-1,1-dimethyldisiloxane, 1-dipropylamino-1,1-dimethyldisiloxane, 1-di-n-butylamino-1,1-dimethyldisiloxane, 1-di-sec-butylamino-1,1-dimethyldisiloxane, 1-N-methylethylamino-1,1-dimethyldisiloxane, 1-N-methylpropylamino-1,1-dimethyldisiloxane, e Examples of the disiloxanes include 1-N-methylbutylamino-1,1-dimethyldisiloxane, 1-piperidino-1,1-dimethyldisiloxane, 1-t-butylamino-1,1-dimethyldisiloxane, 1-dimethylaminodisiloxane, 1-diethylaminodisiloxane, 1-diisopropylaminodisiloxane, 1-dipropylaminodisiloxane, 1-di-n-butylaminodisiloxane, 1-di-sec-butylaminodisiloxane, 1-N-methylethylaminodisiloxane, 1-N-methylpropylaminodisiloxane, 1-N-methylbutylaminodisiloxane, 1-piperidinodisiloxane, 1-t-butylaminodisiloxane, and 1-dimethylamino-1,1,5,5,5-pentamethyldisiloxane.

[0120] In addition to the silicon-containing precursor, one or more other gases may also be flowed, including inert gases such as argon, nitrogen, helium, hydrogen, or combinations thereof. In various embodiments, argon gas may be introduced using a flow rate of about 1 slm to about 20 slm. In some embodiments, nitrogen gas is introduced using a flow rate of about 0 slm to about 30 slm (it should be understood that 0 slm refers to no nitrogen gas being flowed). In some embodiments, hydrogen gas is introduced using a flow rate of about 0 slm to about 5 slm (it should be understood that 0 slm refers to no hydrogen gas being flowed).

[0121] Plasma energy is provided to activate the second reactant into ions and radicals, and other active species, which react with the adsorbed layer of precursor and any precursors present in the gas phase. In various embodiments, the plasma is an in-situ plasma, whereby the plasma is formed directly above the substrate surface in the chamber. The in-situ plasma has a power of about 0.2122 W / cm 2 ~Approx. 2.122W / cm 2 , or approximately 0.4421 W / cm 2 ~Approx. 1.7684W / cm 2 The wafers may be fired at a power per substrate area of ​​about 150 W to about 6000 W. For example, the power for a single wafer may range from about 150 W to about 6000 W, or from about 500 W to about 6000 W, or from about 600 W to about 6000 W, or from about 800 W to about 4000 W, or from about 310 W to about 1250 W. The power for four 300 mm wafers may range from about 150 W to about 6000 W, or from about 1250 W to about 5000 W. The ranges set forth herein include their endpoints.

[0122] Plasmas for ALD processes can be generated by applying a radio frequency (RF) field to a gas using two capacitively coupled plates. Ionization of the gas between the plates by the RF field ignites the plasma, generating free electrons in the plasma discharge region. These electrons are accelerated by the RF field and can collide with gas-phase reactant molecules. Collisions of these electrons with the reactant molecules can form radical species that are involved in the deposition process. It will be appreciated that the RF field can be coupled through any suitable electrodes.

[0123] In this application, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" are used interchangeably. Those skilled in the art will understand that the term "partially fabricated integrated circuit" can refer to a silicon wafer at any of the many stages of integrated circuit fabrication. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, or 300 mm, or 450 mm. Unless otherwise stated, the process details (e.g., flow rates, power levels, etc.) described herein relate to the processing of 300 mm diameter substrates or processing chambers configured to process 300 mm diameter substrates and may be scaled for other sized substrates or chambers.

[0124] 17 illustrates a schematic diagram of one embodiment of a plasma enhanced atomic layer deposition (PEALD) process station 1700 having a process chamber body 1702. The PEALD process station 1700 may be suitable for processing substrates in a low pressure environment in some embodiments. In some embodiments, one or more hardware parameter values ​​of the PEALD process station 1700 (including those described in more detail below) may be programmatically adjusted by one or more computer controllers 1750.

[0125] The PEALD process station 1700 is in fluid communication with a reactant delivery system 1701a for delivering process gases to a distribution showerhead 1706. The reactant delivery system 1701a can include one or more manifolds, mixing vessels, mass flow controllers, liquid flow controllers, and valves as described above with reference to FIG. 1 or below with reference to FIG. 18. In various embodiments, the delivery of one or more process gases to the showerhead 1706 or the process chamber 1702 can vary over the cycle. For example, the duration of dosing one or more process gases may vary. In the disclosed embodiment, the controller 1750 can control the delivery of one or more process gases by controlling one or more inlet valves, diverter valves, and outlet valves.

[0126] The showerhead 1706 distributes process gases toward the substrate 1712. In the embodiment illustrated in Figure 17, the substrate 1712 is shown positioned below the showerhead 1706 and resting on a pedestal 1708. The showerhead 1706 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 1712. Optionally, the pedestal 408 may be lowered and / or raised during portions of the process to adjust process pressure, reactant concentration, plasma density, etc.

[0127] The showerhead 1706 and / or pedestal 1708 are in electrical communication with a high frequency radio frequency (HFRF) power source 1714a and a low frequency radio frequency (LFRF) power source via a matching network 1716 to power the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. Such parameter values ​​can vary from ALD cycle to ALD cycle in the multi-cycle ALD processes described herein. For example, the LFRF power source 1714b and matching network 1716 can be operated at any suitable power to obtain a desired sputtering effect during one or more ALD cycles. Examples of suitable powers are included above. Exemplary low frequency RF frequencies can include, but are not limited to, frequencies between 50 kHz and 500 kHz. Exemplary high frequency RF frequencies can include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz.

[0128] In some embodiments, the plasma can be monitored in-situ by one or more plasma monitors. In one scenario, the plasma power can be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, the plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, OES sensors can be used in a feedback loop to provide programmatic control of the plasma power. It will be appreciated that in some embodiments, other monitors can be used to monitor the plasma and other process characteristics. Such monitors can include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0129] In some embodiments, instructions for the controller 1750 may be provided via input / output control (IOC) sequence instructions. In one example, instructions for setting conditions for a process step may be included in a corresponding recipe step of a process recipe. In some cases, a process recipe step may be arranged in sequence such that all instructions for a process step are executed simultaneously with that process step. In some embodiments, instructions for setting one or more reactor parameter values ​​may be included in a recipe step. For example, a first recipe step may include instructions for setting a flow rate of an inert gas and / or reactant gas (e.g., a first precursor such as silane), instructions for setting a flow rate of a carrier gas (such as nitrogen or argon), and a time delay instruction for the first recipe step. A second subsequent recipe step may include instructions for adjusting or stopping the flow rate of an inert gas and / or reactant gas, instructions for adjusting the flow rate of a carrier gas or purge gas, and a time delay instruction for the second recipe step. The third recipe step may include instructions for setting the flow rate of an inert gas and / or reactant gas, which may be the same or different than the gas used in the first recipe step (e.g., the second precursor such as oxygen), instructions for setting the plasma HFRF power, instructions for setting the plasma LFRF power, a flow rate of a carrier gas, which may be the same or different than the flow rate in the first recipe step, instructions for adjusting the plasma conditions, and a time delay instruction for the third recipe step. The fourth recipe step may include instructions for adjusting or stopping the flow rate of an inert gas and / or reactant gas, instructions for adjusting the flow rate of a carrier gas or a purge gas, and a time delay instruction for the fourth recipe step. The fifth recipe step may include instructions for setting the flow rate of an inert gas and / or reactant gas (e.g., oxygen and / or argon), instructions for setting a different or the same plasma LFRF and / or HFRF power, instructions for adjusting the flow rate of a carrier gas, plasma conditions, and a time delay instruction for the fifth recipe step to perform an intermittent plasma process.In some cases, the recipe steps may also include instructions for pulsing the plasma between on and off states. More recipe steps may also be used. It will be understood that these recipe steps may be further subdivided and / or repeated in any suitable manner within the scope of the present disclosure.

[0130] In some embodiments, the pedestal 1708 may be temperature controlled via a heater 1710. Additionally, in some embodiments, pressure control for the process station 1700 may be provided by a butterfly valve 1718. As shown in the embodiment of FIG. 17, the butterfly valve 1718 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of the process station 1700 may also be adjusted by varying the flow rate of one or more gases introduced to the process station 1700. The process station 1700 may include a controller 1750 for controlling an exemplary recipe as described above.

[0131] In some implementations, the controller 1750 is part of a system, such a system may be part of the examples described above. Such a system may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics for controlling system operations before, during, and after processing of a semiconductor wafer or substrate. Such electronics may be referred to as a "controller" and may control various components or subparts of one or more systems. The controller 1750 may be programmed to control any of the processes disclosed herein depending on the processing requirements and / or type of system. Such processes may include changing different dosage times for delivery of process gases including delivery of processing gases and / or diversion of one or more gases, changing temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings and / or RF power settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and motion settings, loading and unloading of wafers into and out of tools and other transport tools connected or interfaced with a particular system, and / or loading and unloading of wafers into and out of load locks.

[0132] Broadly, the controller 1750 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, i.e., microcontrollers that execute program instructions (e.g., software). The program instructions may be instructions communicated to the controller 450 in the form of various individual settings (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. The operational parameters may, in some embodiments, be part of a recipe defined by a process engineer to accomplish one or more processing steps in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0133] The controller 1750 may be part of, or coupled to, a computer that is integrated or coupled with the system or otherwise networked to the system, or a combination thereof, in some embodiments. For example, the controller 1750 may be in the "cloud" or all or part of a fab host computer system. This allows for remote access of wafer processing. The computer may allow remote access to the system to monitor the current progress of a fabrication operation, review the history of past fabrication operations, review trends or performance criteria from multiple fabrication operations, modify parameters of a current process, set processing steps following a current process, or start a new process. In some examples, a remote computer (e.g., a server) may provide a process recipe to the system over a network. Such a network may include a local network or the Internet. The remote computer may include a user interface that allows entry or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the controller 1750 receives instructions in the form of data. Such data identifies parameters for each processing step performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool that the controller 1750 is configured to interface with or control. Thus, as described above, the controller 1750 may be distributed, for example, by including one or more individual controllers that are networked together and cooperate toward a common purpose (such as the processes and controls described herein).An example of a distributed controller for such purposes would include one or more integrated circuits on the chamber that communicate with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) and coupled to control the process in the chamber.

[0134] Without being limited thereto, exemplary systems may include a plasma etch chamber or module, a deposition chamber or module, a spin rinse chamber or module, a metal plating chamber or module, a cleaning chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a tracking chamber or module, and any other semiconductor processing system that may be associated with or used in the fabrication and / or manufacturing of semiconductor wafers.

[0135] As described above, depending on the process step or steps being performed by the tool, the controller 1750 may communicate with one or more other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used for material transport to and from tool locations and / or load ports within a semiconductor manufacturing factory.

[0136] The methods described herein can be implemented using multi-station or single-station substrate processing equipment. In some embodiments of multi-station substrate processing equipment, the control and / or supply of various process inputs (e.g., process gases, plasma power, gases for plasma generation, reactants, film precursors, heater power, etc.) may be distributed to multiple processing stations in the multi-station equipment from a shared source. For example, in some embodiments, a shared RF power source can provide RF power for generating plasma in two or more processing stations. In another example, a shared gas distribution manifold can supply process gases to two or more processing stations. Some non-limiting exemplary embodiments of multi-station processing tools are described below.

[0137] FIG. 18 shows a schematic of an exemplary substrate processing apparatus 3840 including multiple processing stations 3842 in a common low-pressure reaction chamber. By maintaining each station in a low-pressure environment, defects caused by vacuum breaks between film deposition processes can be avoided. In the example shown in FIG. 18, each processing station 3842 is configured to deposit a silicon-containing film as described above. In the embodiment illustrated in FIG. 18, process gases for each processing station 3842 are supplied by a common mixing vessel 3844 for blending and / or conditioning the process gases before delivery. In some embodiments, the mixing vessel 3844 may be temperature controlled. Process gases including film precursors (such as silicon-containing film precursors) and possibly other reactants in a carrier gas, as well as gases for plasma support, may be supplied from multiple process gas delivery lines, valves, and manifolds. For example, Figure 18 illustrates manifold A containing a silicon precursor / argon mixture and argon (as a carrier gas) in fluid communication with delivery line 3845, manifold B containing nitrogen and argon (also functioning as carrier gases) in fluid communication with delivery line 3847, and manifold C containing oxygen gas (O2) and / or nitrous oxide (NO), helium, and / or argon (the latter two as carrier gases) in fluid communication with delivery line 3848. It is understood that other suitable arrangements and chemistries (as described above) are within the scope of the present disclosure, and that a variety of ALD-based film deposition chemistries and multi-substrate apparatus and arrangements can benefit from the process timing sequences disclosed herein. In some embodiments, separate mixing vessels can be used to separate incompatible reactants and precursors.

[0138] 18 illustrates a multi-station substrate processing apparatus having four processing stations within a single reaction chamber, other configurations may have a greater or lesser number of processing stations within a single reaction chamber. Thus, for example, in some embodiments, a multi-station substrate processing apparatus may have 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, or 16 or more processing stations per reaction chamber, or a number of processing stations per reaction chamber within a range defined by any pair of the aforementioned numbers of processing stations per reaction chamber, e.g., 2-6 processing stations per reaction chamber, 4-8 processing stations per reaction chamber, 8-16 processing stations per reaction chamber, etc.

[0139] In other embodiments, the substrate processing apparatus may only have a single processing station per reaction chamber.

[0140] The apparatus / processes described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, solar panels, and the like. Typically, but not necessarily, such tools / processes are used or performed together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following operations, each of which is enabled by a number of available tools: (1) applying photoresist to a workpiece (i.e., substrate) using a spin-on or spray-on tool; (2) curing the photoresist using a hotplate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or X-ray light using a tool such as a wafer stepper; (4) developing the resist to selectively remove the resist, thereby patterning the resist, using a tool such as a wet bench; (5) transferring the resist pattern to an underlying film or workpiece by using a dry etching tool or a plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

[0141] conclusion Although the foregoing embodiments have been described in some detail for clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Thus, the present embodiments should be considered as illustrative rather than restrictive, and the embodiments should not be limited to the details set forth herein.

Claims

1. Providing a substrate within a processing station comprising a substrate support and a showerhead, wherein the substrate comprises a gap to be filled, and Operations (a) to (d): (a) A dosing operation including flowing a silicon-containing precursor into the processing station through the showerhead and enabling the silicon-containing precursor to be adsorbed onto the substrate, (b) After (a), an operation of flowing a purge gas into the processing station, (c) After (b), an operation of exposing the substrate to plasma species and reacting with the adsorbed silicon-containing precursor, and (d) After (c), an operation of flowing a purge gas into the processing station Depositing a silicon-containing film in the gap by a plasma enhanced atomic layer deposition (PEALD) process including a plurality of cycles of including, The silicon-containing precursor continues to flow into the processing station at least during (b), Method.

2. The method according to claim 1, wherein The silicon-containing precursor continues to flow into the processing station at least during at least a part of (c).

3. The method according to claim 1, wherein The silicon-containing precursor continues to flow into the processing station during (c) and at least a part of (d).

4. The method according to claim 1, wherein After (a), the flow of the silicon-containing precursor continues to flow into the processing station with a reduced flow rate.

5. The method according to claim 1, wherein (a) is flowing an inert gas and a vaporized silicon-containing precursor from a silicon-containing precursor source fluidly connected to a gas supply line through an outlet valve, the gas supply line being fluidly connected to the showerhead, and closing the outlet valve at the end of (a).

6. The method according to claim 5, wherein The silicon-containing precursor in the gas supply line continues to flow into the processing station even after the outlet valve is closed.

7. The method according to claim 1, further comprising During one or more of (c) and (d), diverting the silicon-containing precursor from the processing station.

8. The method according to claim 1, wherein The plasma in (c) is a dual-frequency RF plasma generated using high-frequency (HF) and low-frequency (LF) RF power.

9. The method according to claim 8, further comprising increasing a flow of an inert gas into the processing station during (c).

10. The method according to claim 8, wherein the HF power is at least 4 kW and the LF power is from 500 W to 5 kW.

11. The method according to claim 8, further comprising sputtering and redepositing a silicon-containing film in the gap during deposition of the silicon-containing film into the gap.

12. The method according to claim 1, The plasma species is oxygen (O 2 ), a method generated from

13. The method according to claim 1, The plasma species is generated from nitrous oxide (N 2 O), method.

14. The method according to claim 1, The plasma species is nitrogen (N 2 ), and the method is generated from it.

15. The method according to claim 1, wherein (b) has a duration of 50 to 500 milliseconds.

16. The method according to claim 1, wherein the gap to be filled is a gap between memory stacks of a 3D NAND structure.

17. The method according to claim 1, wherein the gap has an aspect ratio of at least 20:

1.

18. The method according to claim 1, further comprising exposing the deposited film to a suppression plasma prior to at least one of the plurality of cycles.

19. providing a substrate having a structure including a gap to be filled, an administration operation including flowing a silicon-containing precursor into a processing station via a showerhead to enable adsorption of the silicon-containing precursor onto the substrate, an operation of flowing a purge gas into the processing station after (a), an operation of exposing the substrate to plasma species after (b) to react with the adsorbed silicon-containing precursor, wherein the plasma in (c) is a dual-frequency RF plasma generated using high-frequency (HF) and low-frequency (LF) RF power, and an operation of flowing a purge gas into the processing station after (c) selectively depositing a silicon-containing protective film on an upper portion of the structure so as to extend only partially into the gap by a plasma-enhanced atomic layer deposition (PEALD) process including including.

20. The method according to claim 19, exposing the substrate including the protective film to a suppression plasma including halogen species to suppress deposition on a part of the gap, and After exposing the substrate to the suppression plasma, depositing a dielectric material in the gap Further including performing one or more cycles of

21. The method according to claim 19, wherein The silicon-containing precursor continues to flow within the processing station at least during (b).

22. The method according to claim 20, wherein The protective film is etched during exposure to the suppression plasma.

23. The method according to claim 20, wherein The plasma between (a) is generated from nitrogen trifluoride (NF 3 ), and the protective film is a silicon nitride film, method.

24. The method according to claim 19, wherein The protective film has a thickness of 10 to 999 angstroms.

25. The method according to claim 20, wherein Depositing the protective film and performing one or more cycles are carried out in the same chamber.

26. The method according to claim 19, wherein The structure is a 3D NAND structure, the gap is formed by two stacks each including a plurality of pairs of oxide layers and nitride layers, capped by a polysilicon layer, and the protective film protects the polysilicon layer.

27. Providing a substrate in a processing station comprising a substrate support and a showerhead, and Operations (a) to (d): (a) A dosing operation including flowing a silicon-containing precursor into the processing station through the showerhead and enabling the silicon-containing precursor to be adsorbed onto the substrate, (b) After (a), flowing a purge gas into the processing station, (c) After (b), exposing the substrate to plasma species and reacting with the adsorbed silicon-containing precursor, and (d) After (c), flowing a purge gas into the processing station Depositing a silicon-containing film on the substrate by a plasma-enhanced atomic layer deposition (PEALD) process including a plurality of cycles of Including, The silicon-containing precursor continues to flow within the processing station at least during (b). Method.

28. The method according to claim 27, wherein The silicon-containing film fills a gap on the substrate.

29. The method according to claim 27, wherein The method wherein the silicon-containing film is deposited non-conformally on a structure having two stacks separated by a gap, such that the film is deposited on the upper part of the stack that extends only partially into the gap.

30. The method according to claim 27, wherein the plasma in (c) is a dual-frequency RF plasma generated using high-frequency (HF) and low-frequency (LF) RF power.

31. providing a substrate within a processing station comprising a substrate support and a showerhead, and operations (a) to (d): an administration operation including flowing a silicon-containing precursor into the processing station through the showerhead to enable adsorption of the silicon-containing precursor on the substrate, an operation of flowing a purge gas into the processing station after (a), an operation of exposing the substrate to plasma species and reacting the adsorbed silicon-containing precursor after (b), and an operation of flowing a purge gas into the processing station after (c) depositing a silicon-containing film on the substrate by a plasma-enhanced atomic layer deposition (PEALD) process including a plurality of cycles of wherein the plasma in (c) is a dual-frequency RF plasma generated using high-frequency (HF) and low-frequency (LF) RF power. The method.

32. The method according to claim 31, wherein the silicon-containing film fills a gap on the substrate.

33. The method according to claim 31, wherein the silicon-containing film is deposited non-conformally on a structure having two stacks separated by a gap, such that the film is deposited on the upper part of the stack that extends only partially into the gap.

34. providing a substrate within a processing station, (a) stabilizing the process conditions within the processing station for silicon oxide deposition, (b) performing x plasma-enhanced atomic layer deposition (PEALD) cycles using an oxygen-based plasma, where x is an integer greater than 0, (c) stabilizing the process conditions within the processing station for silicon nitride deposition, (d) performing y plasma-enhanced atomic layer deposition (PEALD) cycles using a nitrogen-based plasma, where y is an integer greater than 0, and (e) repeating (a) to (d) one or more times ​ Depositing a silicon oxynitride (SiON) film on the substrate by including, a method.

35. The method according to claim 34, where x + y is 20 or less, a method.

36. The method according to claim 34, where x + y is 15 or less, a method.

37. The method according to claim 34, where x + y is 10 or less, a method.

38. The method according to claim 34, the oxygen-based plasma of each cycle in (b) has a first duration, the nitrogen-based plasma of each cycle in (d) has a second duration, and the second duration is at least twice the first duration, a method.

39. The method according to claim 34, where the SiON film is conformally deposited on a patterned layer, a method.

40. Providing a substrate in a processing station comprising a substrate support and a showerhead, the substrate having a gap to be filled, and operations (a) to (d): (a) A dosing operation including flowing a silicon-containing precursor into the processing station through the showerhead and enabling the silicon-containing precursor to be adsorbed on the substrate, (b) After (a), an operation of flowing a purge gas into the processing station, (c) After (b), an operation of exposing the substrate to plasma species generated from a reactant gas and reacting with the adsorbed silicon-containing precursor, and (d) After (c), an operation of flowing a purge gas into the processing station Depositing a silicon-containing film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process including a plurality of cycles of including, the reactant gas and / or the plasma species continuously flow into the processing station at least during (a), a method.

41. Providing a substrate in a processing station comprising a substrate support and a showerhead, the substrate having a gap to be filled, and operations (a) to (d): (a) A dosing operation including flowing a silicon-containing precursor into the processing station through the showerhead and enabling the silicon-containing precursor to be adsorbed on the substrate, (b) After (a), an operation of flowing a purge gas into the processing station, (c) After (b), exposing the substrate to plasma species generated from a reactant gas and reacting with the adsorbed silicon-containing precursor; and (d) After (c), flowing a purge gas into the processing station (e) Depositing a silicon-containing film in the gap by a plasma-enhanced atomic layer deposition (PEALD) process including a plurality of cycles of (a) to (d); (f) including: The silicon-containing precursor continues to flow into the processing station at least during (b), and / or the reactant gas and / or the plasma species continue to flow into the processing station at least during (a), (g) a closed void is formed in the gap, (h) method.

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