PACKAGE SUBSTRATE EMPLOYING INTEGRATED SLOT TYPE ANTENNA(S) AND ASSOCIATED INTEGRATED CIRCUIT (IC) PACKAGE AND MANUFACTURING METHODS - Patent application
Patent Information
- Application Number
- JP2023579795
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-07-14
- Filing Date
- 2022-06-14
- Publication Date
- 2025-06-11
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
【0007】 このように、ICパッケージのパッケージ基板内に配置されたスロット(1つ又は複数)にスロット型アンテナ(1つ又は複数)を一体化することにより、アンテナを設けるために必要なICパッケージ内の領域を低減することができる。例えば、スロット型アンテナ(1つ又は複数)をパッケージ基板内に一体化することにより、アンテナを提供するためのアンテナ素子を含む別個のアンテナ基板をICパッケージ内に設ける必要性を排除することができる。あるいは、パッケージ基板内に配置されたスロット型アンテナ(1つ又は複数)は、ICパッケージ内のアンテナ基板に設けられたアンテナ素子に加えて追加のアンテナ素子を設けるために採用され得る。例えば、パッケージ基板内に配置されたスロット内にスロット型アンテナを一体化することは、指向性RF性能を達成するために異なる所望の方向の放射パターンをサポートするために別個のアンテナ基板に含まれる他のパッチアンテナの向きに直交する向きを容易にすることができる。
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Abstract
Description
[Technical field]
[0001] Priority Application This application claims priority to U.S. patent application Ser. No. 17 / 375,289, filed July 14, 2021, entitled “PACKAGE SUBSTRATE EMPLOYING INTEGRATED SLOT-SHAPED ANTENNA(S), AND RELATED INTEGRATED CIRCUIT (IC) PACKAGES AND FABRICATION METHODS,” which is incorporated by reference in its entirety.
[0002] I. Field of Disclosure The field of the disclosure relates to radio frequency (RF) integrated circuit (IC) (RFIC) packages that include an RF transceiver and antenna module supported by a package substrate. [Background technology]
[0003] II. Background Modern smartphones and other portable devices have expanded the use of different wireless links using various technologies in different radio frequency bands. For example, fifth generation (5G) cellular networks, commonly referred to as 5G New Radio (NR), include frequencies in the range of 24.25 gigahertz (GHz) to 86 gigahertz (GHz), with the lower 19.25 GHz (24.25 GHz to 43.5 GHz) often used for mobile devices. This frequency spectrum for 5G communications is within the millimeter wave (mmWave) or millimeter wave band. mmWave allows for higher data rates than those in lower frequencies, such as those used for Wi-Fi and current cellular networks.
[0004] Radio frequency (RF) transceivers supporting the mmWave spectrum are incorporated into mobile devices and other portable devices designed to support mmWave communication signals. To support the integration of RF transceivers in devices, the RF transceivers may be integrated into an RF integrated circuit (IC) (RFIC) transceiver chip ("RFIC chip") provided as part of an RFIC package. A conventional RFIC package includes one or more RFIC chips, a power management IC (PMIC), and passive electrical components (e.g., inductors, capacitors, etc.) mounted on one side of a package substrate as a support structure. The package substrate supports the metallization structure and provides inter-chip and external signal interfaces to the RFIC chip(s). The RFIC package may also include an antenna module that is part of the package substrate. The antenna module may include one or more antennas that can receive and radiate electrical RF signals as electromagnetic (EM) signals. The antenna module may include multiple antennas, also referred to as an antenna array, to provide signal coverage within a larger desired area around the RFIC package. The antenna elements in the antenna array of the antenna module are coupled to the RFIC chip(s) via one or more metallization structures in the package substrate.
[0005] To reduce the overall size of the RFIC package, it may be desirable to minimize the area consumed by the antenna in the antenna module of the RFIC package. However, the antenna module must also have a sufficient radiation pattern to achieve the desired RF performance depending on the desired application. For example, a patch antenna is a low-profile antenna that may be employed in the antenna module of the RFIC package. However, the radiation pattern of the patch antenna may be primarily in the direction of the plane of its "patch". As another example, a dipole antenna is an antenna with two conductors of half the maximum desired wavelength that may also be employed in the antenna module of the RFIC package. However, the radiation pattern of the dipole antenna may be primarily in the direction perpendicular to the antenna pole. Therefore, to achieve the desired directional RF performance, it may be necessary to provide different types of antennas in the RFIC package and in different areas, but with the increase in size and complexity of the RFIC package. Also, if the RFIC package is used for multiple-input multiple-output (MIMO) communication applications, further additional antennas must be provided in the antenna module of the RFIC package to support multiple MIMO signal streams, thus further increasing the RFIC package size in an undesirable manner. Summary of the Invention [Means for solving the problem]
[0006] The embodiments disclosed in the detailed description include a package substrate employing an integrated slot-type antenna(s). Related integrated circuit (IC) packages and manufacturing methods are also disclosed. The package substrate may be provided as part of an IC package including, as an example, an RFIC die(s) in a radio frequency (RF) IC (RFIC) chip for supporting RF communications. For example, the RFIC die may be provided in an IC die layer coupled to the package substrate. The package substrate includes one or more metallization layers each including metal interconnects for routing signals to and from the RFIC die. For example, the package substrate may include a coreless metallization substrate including one or more metallization layers. In an exemplary embodiment, the package substrate includes one or more slot-type antennas each formed from a slot disposed in one or more metallization layers of the package substrate and each capable of being coupled to an RFIC die for receiving and radiating RF signals. The slot-type antenna includes a conductive slot disposed in at least one metallization layer in the package substrate. As an example, the conductive slot may extend completely through the package substrate in a direction perpendicular to the plane of the metallization layers in the package substrate. To form a conductive slot, a slot may be formed in a metallization layer(s), thereby forming one or more interior sidewalls in the metallization layer(s) within the slot. A metal material may then be disposed on the interior sidewall(s) of the slot to form one or more separate antenna elements within the slot that are not physically coupled to one another. Thus, the separate antenna elements formed within the slot may be similar in structure and design to a patch antenna. Metal interconnects in a metallization layer within the package substrate are coupled to the conductive slot to provide an antenna feedline for the slot-type antenna.For example, a slot disposed in a metallization layer(s) in a package substrate may expose a sidewall of a metal interconnect that is conductively coupled to the conductive slot as a result of a metal material being disposed on the inner sidewall of the slot to form an antenna feedline. The antenna element coupled to the antenna feedline may be electromagnetically coupled to other antenna elements formed in the conductive slot to provide a slot-type antenna.
[0007] In this manner, by integrating the slot-type antenna(s) in the slot(s) disposed in the package substrate of the IC package, the area in the IC package required for providing the antenna can be reduced. For example, by integrating the slot-type antenna(s) in the package substrate, the need for providing a separate antenna substrate in the IC package including antenna elements for providing the antenna can be eliminated. Alternatively, the slot-type antenna(s) disposed in the package substrate can be employed to provide additional antenna elements in addition to the antenna elements provided on the antenna substrate in the IC package. For example, integrating the slot-type antenna in the slot disposed in the package substrate can facilitate an orientation orthogonal to the orientation of other patch antennas included in the separate antenna substrate to support radiation patterns in different desired directions to achieve directional RF performance.
[0008] In this regard, in one exemplary aspect, a package substrate is provided. The package substrate includes one or more metallization layers, each including one or more metal interconnects. The package substrate also includes a slot-type antenna. The slot-type antenna includes a conductive slot disposed in at least one of the one or more metallization layers, and at least one antenna feedline coupled to the conductive slot, the antenna feedline including at least one of the one or more metal interconnects.
[0009] In another exemplary aspect, a method of forming an integrated slot-type antenna in a package substrate is provided. The method includes forming one or more metallization layers, each including one or more metal interconnects. The method also includes forming a conductive slot disposed in at least one of the one or more metallization layers to form the slot-type antenna. The method includes coupling at least one antenna feedline including at least one of the one or more metal interconnects of the at least one metallization layer to the conductive slot.
[0010] In another exemplary aspect, an integrated circuit (IC) package is provided. The IC package includes a package substrate. The package substrate includes one or more metallization layers each including one or more metal interconnects. The package substrate also includes a slot-type antenna. The slot-type antenna includes a conductive slot disposed in at least one substrate metallization layer of the one or more substrate metallization layers, and at least one antenna feed line including at least one metal interconnect of the one or more metal interconnects coupled to the conductive slot. The IC package also includes an IC die layer coupled to the package substrate, the IC die layer including a radio frequency (RF) IC (RFIC) die including a plurality of die interconnects. At least one die interconnect of the plurality of die interconnects is coupled to at least one antenna feed line of the slot-type antenna. [Brief description of the drawings]
[0011] [Figure 1A] FIG. 1 is a side view of a radio frequency (RF) integrated circuit (IC) (RFIC) package including an antenna substrate supporting patch and dipole antenna elements. [Figure 1B] FIG. 2 is a bottom view of a radio frequency (RF) integrated circuit (IC) (RFIC) package including an antenna substrate supporting patch and dipole antenna elements. [Figure 2A]FIG. 1 is a side view of an RFIC package including a package substrate having one or more integrated slot-type antennas for supporting RF signal communication. [Figure 2B] FIG. 2 is a bottom view of an RFIC package including a package substrate having one or more integrated slot-type antennas for supporting RF signal communication. [Figure 2C] 2B is an enlarged cross-sectional side view of the package substrate of FIG. 2A further illustrating slot-type antennas formed by respective conductive slots disposed through the package substrate. [Figure 2D] 2B is an enlarged cross-sectional side view of the package substrate of FIG. 2A further illustrating slot-type antennas formed by respective conductive slots disposed through the package substrate. [Diagram 3] FIG. 2E is a side view of a slot-type antenna formed by a conductive slot disposed through the package substrate of FIG. 2D. [Figure 4] FIG. 2C is a flowchart showing an exemplary process for manufacturing a slot-type antenna, such as the slot-type antenna of FIGS. 2A-2D, formed by placing a conductive slot in a package substrate and coupling the conductive slot to a respective metal interconnect in a metallization layer as an antenna feedline. [Figure 5A] 2A-2D, depict exemplary manufacturing stages during the manufacture of a packaging substrate having an integrated slot-type antenna, including but not limited to the packaging substrate of FIGS. 2A-2D. [Figure 5B] 2A-2D, depict exemplary manufacturing stages during the manufacture of a packaging substrate having an integrated slot-type antenna, including but not limited to the packaging substrate of FIGS. 2A-2D. [Figure 5C] 2A-2D, depict exemplary manufacturing stages during the manufacture of a packaging substrate having an integrated slot-type antenna, including but not limited to the packaging substrate of FIGS. 2A-2D. [Figure 5D] 2A-2D, depict exemplary manufacturing stages during the manufacture of a packaging substrate having an integrated slot-type antenna, including but not limited to the packaging substrate of FIGS. 2A-2D. [Figure 5E] 2A-2D, depict exemplary manufacturing stages during the manufacture of a packaging substrate having an integrated slot-type antenna, including but not limited to the packaging substrate of FIGS. 2A-2D. [Figure 6A] FIG. 5B is a flow chart illustrating an exemplary process for manufacturing a package substrate having an integrated slot-type antenna, including but not limited to the package substrate of FIGS. 2A-2D, according to the manufacturing stages of FIGS. 5A-5E. [Figure 6B] FIG. 5B is a flow chart illustrating an exemplary process for manufacturing a package substrate having an integrated slot-type antenna, including but not limited to the package substrate of FIGS. 2A-2D, according to the manufacturing stages of FIGS. 5A-5E. [Figure 7] FIG. 2C is a block diagram of an exemplary wireless communication device including RF components disposed within one or more RFIC packages employing a package substrate with an integrated slot-type antenna according to any of the manufacturing processes of FIGS. 4-6B, including but not limited to the package substrate of FIGS. 2A-2D. [Figure 8] FIG. 2C is a block diagram of an exemplary processor-based system including RF components disposed within one or more RFIC packages employing a package substrate having an integrated slot-type antenna according to any of the manufacturing processes of FIGS. 4-6B, including but not limited to the package substrates of FIGS. 2A-2D. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0012] Some exemplary aspects of the present disclosure will now be described with reference to the drawings. The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any aspect described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other aspects.
[0013] The embodiments disclosed in the detailed description include a package substrate employing an integrated slot-type antenna(s). Related integrated circuit (IC) packages and manufacturing methods are also disclosed. The package substrate may be provided as part of an IC package including, as an example, an RFIC die(s) in a radio frequency (RF) IC (RFIC) chip for supporting RF communications. For example, the RFIC die may be provided in an IC die layer coupled to the package substrate. The package substrate includes one or more metallization layers each including metal interconnects for routing signals to and from the RFIC die. For example, the package substrate may include a coreless metallization substrate including one or more metallization layers. In an exemplary embodiment, the package substrate includes one or more slot-type antennas each formed from a slot disposed in one or more metallization layers of the package substrate and each capable of being coupled to the RFIC die for receiving and radiating RF signals. The slot-type antenna includes a conductive slot disposed in at least one metallization layer in the package substrate. As an example, the conductive slot may extend completely through the package substrate in a direction perpendicular to the plane of the metallization layers in the package substrate. To form a conductive slot, a slot may be formed in a metallization layer(s), thereby forming one or more interior sidewalls in the metallization layer(s) within the slot. A metal material may then be disposed on the interior sidewall(s) of the slot to form one or more separate antenna elements within the slot that are not physically coupled to one another. Thus, the separate antenna elements formed within the slot may be similar in structure and design to a patch antenna. Metal interconnects in a metallization layer within the package substrate are coupled to the conductive slot to provide an antenna feedline for the slot-type antenna.For example, a slot disposed in a metallization layer(s) in a package substrate may expose a sidewall of a metal interconnect that is conductively coupled to the conductive slot as a result of a metal material being disposed on the inner sidewall of the slot to form an antenna feedline. The antenna element coupled to the antenna feedline may be electromagnetically coupled to other antenna elements formed in the conductive slot to provide a slot-type antenna.
[0014] In this manner, by integrating the slot-type antenna(s) in the slot(s) disposed in the package substrate of the IC package, the area in the IC package required for providing the antenna can be reduced. For example, by integrating the slot-type antenna(s) in the package substrate, the need for providing a separate antenna substrate in the IC package including antenna elements for providing the antenna can be eliminated. Alternatively, the slot-type antenna(s) disposed in the package substrate can be employed to provide additional antenna elements in addition to the antenna elements provided on the antenna substrate in the IC package. For example, integrating the slot-type antenna in the slot disposed in the package substrate can facilitate an orientation orthogonal to the orientation of other patch antennas included in the separate antenna substrate to support radiation patterns in different desired directions to achieve directional RF performance.
[0015] Before describing an IC package including a package substrate that includes one or more integrated slot-type antennas formed by respective conductive slots disposed in the package substrate to support RF communications, an IC package in the form of an RFIC package 100 that does not include an integrated slot-type antenna in its package substrate will first be described with reference to Figures 1A and 1B. An example of an IC package including a package substrate that includes one or more integrated slot-type antennas formed by respective conductive slots disposed in the package substrate to support RF communications will be described below beginning with Figure 2A.
[0016] In this regard, Figures 1A and 1B are side and bottom views, respectively, of an RFIC package 100 including an antenna substrate 102 supporting patch and dipole antenna elements for supporting RF communications. As shown in Figure 1A, the RFIC package 100 includes an IC die layer 106 arranged in a horizontal XY horizontal plane, the IC die layer 106 including an RFIC die 108 including an encapsulated RF transceiver IC(s). The RFIC die 108 may also include a power management IC (PMIC). The IC die layer 106 is mounted to a package substrate 110 to provide a support structure for the IC die layer 106 and an interconnect structure for coupling the RFIC die 108 to other components and circuits in the RFIC package 100. An electromagnetic interference (EMI) shield 109 is disposed around the RFIC die 108 and other components in the IC die layer 106. In this example, the package substrate 110 includes a metallization substrate 112 adjacent to the IC die layer 106. The metallization substrate 112 includes a plurality of substrate metallization layers 114, each of which includes metal interconnects 116 (e.g., pads, vertical interconnect access (vias), traces, lines) formed therein to provide an interconnect structure that facilitates an interconnection that provides an electrical interface between the RFIC die 108 and other components and circuits in the RFIC package 100. The die interconnects 118 couple the RFIC die 108 to the metal interconnects 116 in the metallization substrate 112. The metallization substrate 112 may be a coreless substrate. The substrate metallization layers 114 may be formed as separate substrate layers that are laminated together to form the metallization substrate 112. One or more of the substrate metallization layers 114 may also be formed as redistribution layers (RDLs). In this example, the metallization substrate 112 is coupled to the core substrate 120 as part of the package substrate 110. A core substrate, such as core substrate 120, is a substrate that is typically thicker and made from a stiff dielectric material to prevent or reduce warping of RFIC package 100.The core substrate 120 also includes one or more metallization layers 122 including metal interconnects 124 coupled to vertical interconnect accesses (vias) 126 (e.g., metal pillars) that are coupled to metal interconnects 116 in adjacent metallization substrates 112 to provide electrical connections between the metallization substrate 112 and the core substrate 120.
[0017] 1A , the package substrate 110 in the RFIC package 100 also includes an antenna substrate 102. The antenna substrate 102 is coupled to the core substrate 120 such that the core substrate 120 is disposed in the Z-axis direction between the antenna substrate 102 and the metallization substrate 112. The antenna substrate 102 also includes one or more metallization layers 128 including metal interconnects 130 coupled to vias 132 coupled to metal interconnects 124 in the core substrate 120. The antenna substrate 102 includes four antenna elements 134(1)-134(4) electrically coupled to the RFIC die 108 via interconnects between the antenna elements 134(1)-134(4) and the metallization substrate 112, the core substrate 120, and respective metal interconnects 116, 124, 130 in the antenna substrate 102. In this example, each antenna element 134(1)-134(4) includes a dipole antenna 136(1)-136(4) adjacent to the core substrate 120 and a patch antenna 138(1)-138(4) disposed under each dipole antenna 136(1)-136(4). This is to provide different directional RF performance. For example, the patch antennas 138(10)-138(4) may be thin structures having respective radiation pattern directions 140(1)-140(4) mainly in the X-axis direction in the RFIC package 100, as shown in FIG. 1B. The radiation pattern directions 142(1)-142(4) of the dipole antennas 136(1)-136(4) may mainly in the Y-axis direction in the RFIC package 100, as shown in FIG. 1B. However, neither dipole antennas 136(1)-136(4) nor patch antennas 138(1)-138(4) can provide a radiation pattern directed toward the Z-axis direction of RFIC package 100. This may therefore require additional antenna elements to be placed in other areas of RFIC package 100, not shown, to provide the desired RF directivity performance. However, this may entail an increase in the size and complexity of RFIC package 100, which may be undesirable or impractical for some applications.
[0018] 2A and 2B are side and bottom views, respectively, of an exemplary IC package 200 including a package substrate 202 having one or more integrated slot-type antennas 204 for supporting RF signal communication. In this example, as shown in FIGS. 2A and 2B, four slot-type antennas 204(1)-204(4) are disposed in and integrated into the package substrate 202. For example, the slot-type antennas 204(1)-204(4) may be designed for millimeter wave (mmWave) reception, including RF signals in the fifth generation (5G) new wireless (NR) spectrum. It should be noted that the IC package 200 is not limited to having fewer than four or more than four slot-type antennas 204. In this example, the slot-type antennas 204(1)-204(4) are disposed in and through the metallization substrate 206, the core substrate 208, and the antenna substrate 210 of the package substrate 202. In this example, slot-type antennas 204(1)-204(4) are formed from respective conductive slots 212(1)-212(4) disposed within metallization substrate 206, core substrate 208, and antenna substrate 210 coupled to RFIC die 216 via respective antenna feedlines 214(1), 214(2) (see FIG. 2A) to support RF communications. In one example, a conductive slot is a physical slot (e.g., opening) of a given interior width (e.g., inner diameter or interior distance) disposed within substrate(s), typically extending in a lengthwise direction perpendicular to the interior width or inner diameter. Metal material is at least partially disposed on one or more interior sidewalls or surfaces of the slot to form the conductive slot. For example, the slot may be a cylindrical opening having an inner diameter with metal material disposed on at least a portion(s) of the interior wall(s) of the opening. In this example, slot-type antennas 204(1), 204(2) formed from conductive slots 212(1), 212(2) extend in the Y-axis direction compared to the X-axis direction, as shown in Figure 2A. Slot-type antennas 204(3), 204(3) extend in the X-axis direction, which is perpendicular to the extension direction of slot-type antennas 204(1), 204(2), in this example.The RFIC die 216 can radiate RF signals through the antenna feeds 214(1)-214(4) to the respective conductive slots 212(1)-212(4) to wirelessly radiate the RF signals outside the IC package 200.
[0019] 2A, the RFIC package 200 in this example includes an IC die layer 218 arranged in a horizontal XY horizontal plane, which includes an RFIC die 216 within an IC chip that includes an encapsulated RF transceiver IC(s). The IC die layer 218 may also include a PMIC die 220 within the IC chip. The IC die layer 218 is mounted or formed on the package substrate 202 to provide a support structure for the IC die layer 218 and to provide an interconnect structure for coupling the RFIC die 216 and the PMIC die 220 to other components and circuits within the IC package 200. An EMI shield 222 is disposed around the RFIC die 216 and the PMIC die 220 within the IC die layer 218.
[0020] In this example, the antenna feeds 214(1), 214(2) shown in FIG. 2A are metal interconnects 224 (e.g., pads, vertical interconnect access (vias), traces, metal lines) formed in the metallization substrate 206 (also referred to as "metallization layer 226"). In this example, the conductive slots 212(1)-212(4) extend completely through the package substrate 202, including the metallization layer 226, in a direction shown as a Z-axis direction orthogonal to the XY-axis plane of the metallization substrate 206, the core substrate 208, and the antenna substrate 210. As described in more detail below and as shown in the bottom view of the IC package 200 in FIG. 2B, the conductive slots 212(1)-212(4) formed from the slots 228(1)-228(4) are separate antenna elements that are not physically coupled to one another. The separate antenna elements formed in the slots can be similar in structure and design to a patch antenna. Metal interconnect 224 as each antenna feed 214(1), 214(2) shown in FIG. 2A can be coupled to one of the antenna elements of conductive slot 212(1), 212(2), which can be electromagnetically coupled to the other antenna element formed in its respective conductive slot 212(1), 212(2) to provide slotted antenna 204(1), 204(2).
[0021] In this manner, the slot-type antennas 204(1)-204(4) integrated into the package substrate 202, including the metallization substrate 206, of the IC package 200 can reduce the area in the IC package 200 required to provide the antennas. For example, integrating the slot-type antennas 204(1)-204(4) into the package substrate 202 can eliminate the need to provide a separate antenna substrate, such as the antenna substrate 210, in the IC package 200 to provide the antennas. Alternatively, as shown in the IC package 200 of FIGS. 2A and 2B, the slot-type antennas 204(1)-204(4) in the package substrate 202 can be used to provide additional antenna elements in addition to the antenna elements provided in the antenna substrate 210 in the IC package 200. For example, integrating slot-type antennas 204(1)-204(4) into package substrate 202 can facilitate orthogonal orientations (e.g., Y- and Z-axis orientations) to the orientations (e.g., X- and Y-axis orientations) of other patch antennas 230(1)-230(4) included in antenna substrate 210 to support radiation patterns in different desired directions to achieve directional RF performance.
[0022] FIG. 2C is an enlarged cross-sectional side view of the package substrate 202 of FIG. 2A illustrating further exemplary details of the package substrate 202 and the slot-type antenna 204 formed therein. The package substrate 202 includes a metallization substrate 206 adjacent to the IC die layer 218 of FIG. 2A. The metallization substrate 206 includes a plurality of substrate metallization layers 226, each including a respective conductive metal interconnect 224 (e.g., pads, vertical interconnect access (vias), traces, metal lines) formed therein to provide a conductive interconnect structure that facilitates interconnections that provide an electrical interface between the RFIC die 216 and other components and circuits in the IC die layer 218 in the IC package 200 of FIG. 2A. Vias 225(1)-225(6) are formed in respective substrate metallization layers 226(1)-226(6) to provide interconnections between the respective metal interconnects 224(1)-224(6). In this example, the metallization substrate 206 includes six substrate metallization layers 226(1)-226(6), each including a respective metal interconnect 224(1)-224(6) to facilitate electrical interconnection between the core substrate 208 and the IC die layer 218. The metallization substrate 206 may be a coreless substrate. The substrate metallization layers 226(1)-226(6) may be formed as separate substrate layers that are laminated together to form the metallization substrate 206. One or more of the substrate metallization layers 226(1)-226(6) may also be formed as RDLs. In this example, the metallization substrate 206 is bonded to a core substrate 208. A core substrate, such as the core substrate 208, is a substrate that is typically thicker and made from a stiff dielectric material to prevent or reduce warping. The core substrate 208 also includes one or more core metallization layers 232 (also referred to as “metallization layers 232”) that may also include metal interconnects coupled to vias 234 (e.g., metal pillars) that are coupled to metal interconnects 224(6) in adjacent substrate metallization layers 226(6) of the metallization substrate 206 to provide electrical connections between the metallization substrate 206 and the core substrate 208.
[0023] 2C, the package substrate 202 in this example also includes an optional antenna substrate 210. The antenna substrate 210 is coupled to the core substrate 208 in this example such that the core substrate 208 is disposed in the Z-axis direction between the antenna substrate 210 and the metallization substrate 206. The antenna substrate 210 also includes one or more metallization layers 236, each including metal interconnects 238 (e.g., pads, vertical interconnect access (vias), traces, metal lines) that are coupled to the vias 240, 240(1) and that may be coupled to vias 234 in the core substrate 208. In this example, the antenna substrate 210 includes six metallization layers 236(1)-236(6). In this example, antenna substrate 210 includes four antenna elements 242(1)-242(4) electrically coupled to RFIC die 216 of FIGURE 2A through interconnections between antenna elements 242(1)-242(4) and metal interconnects 238(1)-238(6), vias 234 in core substrate 208, and metal interconnects 224(1)-224(6) in metallization substrate 206. In this example, each antenna element 242(1)-242(4) includes a dipole antenna 244(1)-244(4) disposed in metallization layer 236(5) as a substrate antenna layer adjacent to core substrate 208. The antenna elements 242(1)-242(4) also include patch antennas 230(1)-230(4) disposed in the metallization layer 236(6) as a substrate antenna layer adjacent to and below the respective dipole antennas 244(1)-244(4) in the Z-axis direction. This is to provide different directional RF performance. For example, the patch antennas 230(1)-230(4) may be thin structures having their respective radiation patterns oriented primarily in the X-axis direction, as shown in FIG. 2C. The radiation patterns of the dipole antennas 244(1)-244(4) may be primarily in the Y-axis direction, as shown in FIG. 2C. However, neither the dipole antennas 244(1)-244(4) nor the patch antennas 230(1)-230(4) can provide a radiation pattern oriented in the Z-axis direction of the package substrate 202, as provided by the slot-type antennas 204(1)-204(4).
[0024] Figure 2D is another enlarged cross-sectional side view of package substrate 202 of Figures 2A and 2C to illustrate and explain further example details of slot-type antennas 204(1)-204(4) in IC package 200 of Figure 2A. Note that in Figure 2D, only slot-type antenna 204(1) is shown. However, the following description of example details of slot-type antenna 204(1) is equally applicable to slot-type antennas 204(2)-204(4) of Figure 2B.
[0025] In this regard, referring to FIG. 2D and using slot-type antenna 204(1) as an example, slot-type antenna 204(1) includes a conductive slot 212(1) formed from a slot 246(1) that, in this example, extends entirely through package substrate 202. This is also shown in the top view of conductive slot 212(1) in FIG. 3. Slot 246(1) extends in a Z-axis direction, in this example, through metallization substrate 206, core substrate 208, and antenna substrate 210. Slot 246(1) extends in a height or Z-axis direction perpendicular to the plane of metallization layer 226 in metallization substrate 206 (XY-plane), as shown in FIG. 3. Slot 246(1) also extends in a depth or Y-axis parallel to the plane of metallization layer 226 in metallization substrate 206 (XY-plane), as shown in FIG. Thus, slot 246(1) extends in the YZ plane, as shown in Figures 2D and 3. However, it should be noted that slot 246(1) need not extend entirely through package substrate 202, including each of substrate metallization layers 226(1)-226(6) of metallization substrate 206, core metallization layer 232 of core substrate 208, and / or each of metallization layers 236(1)-236(6) of antenna substrate 210. For example, slot 246(1) extending entirely through package substrate 202 may extend only partially or entirely through metallization layers 226, 232, 236 of metallization substrate 206, core substrate 208, and / or antenna substrate 210. Slot 246(1) formed in package substrate 202 forms sidewalls 248(1), 248(2) in this example. This is a result of slot 246(1) extending in the Z-axis direction entirely through package substrate 202 forming first opening 250(1) and second opening 250(2) on opposite sides of package substrate 202 at a first end 252(1) and a second end 252(2) of slot 246(1) opposite first end 252(1).In this example, an opening 250(1) is formed in the metallization substrate 206 as a result of forming a slot 246(1) through the package substrate 202, and a second opening 250(2) is formed in the antenna substrate 210. Metallic materials 254(1), 254(2) are disposed on respective sidewalls 248(1), 248(2) formed by forming the slot 246(1) through the package substrate 202 to form conductive sidewalls 258(1), 258(2). For example, the metallic materials 254(1), 254(2) can be copper. Also, by way of example, a metallic plating material, such as NiAu, can be plated on the metallic materials 254(1), 254(2) to protect the surfaces of the metallic materials 254(1), 254(2) from oxidation. Metal material 254(1) does not contact metal material 254(2) in this example, which is a result of slot 246(1) being an open slot with openings 250(1), 205(2) separating sidewalls 248(1), 248(2). Conductive sidewalls 258(1), 258(2) form respective antenna elements 260(1), 260(2) in this example, like patch antennas. For example, when metal material 254(1), 254(2) is disposed on respective sidewalls 248(1), 248(2), curved metal patch-like antenna elements 260(1), 260(2) (shown in FIG. 3) are formed on each side of slot 246(1), which in this example extends in the Z-axis direction through package substrate 202.
[0026] When the slot 246(1) is formed in the package substrate 202, the metal interconnect 224, such as in the metallization substrate 206, may be exposed. The metallization substrate 206 may be designed such that the metal interconnect 224 is exposed proximate the sidewall 248(2) when the slot 246(1) is formed. In this manner, the metal material 254(2) disposed on the sidewall 248(2) will be conductively coupled to the exposed metal interconnect 224 such that the metal interconnect 224 can form the antenna feedline 214. The metal interconnect 224 as the antenna feedline 214 may then be conductively coupled to, for example, the RFIC die 216 of FIG. 2A via the metallization substrate layer 226. In this manner, the conductive slot 212(1) forms an antenna for the RFIC die 216. In this example, the metal material 254(1) of the antenna element 260(1) is not in direct contact with the metal interconnect 224 as the antenna feed 214. This is also shown in the top view of the conductive slot 212(1) in FIG. 3. However, the antenna element 260(1) adjacent to the antenna element 260(2) formed by the conductive slot 212(1) can be electromagnetically (EM) coupled to the antenna element 260(2) when the antenna element 260(2) is energized by current from, for example, the RFIC die 216. In this manner, the antenna elements 260(1), 260(2) of the conductive slot 212(1) form an antenna that can be coupled to the RFIC die 216 through the metallization substrate 206 without the need for a separate antenna element in the antenna substrate, as in the antenna substrate 210 of FIG. 2D.
[0027] It should be noted that the package substrate 202 includes a separate antenna substrate 210, but this is not required. In this example, a separate antenna substrate 210 is provided to support another antenna, as previously described. Also, it should be noted that in this example, the conductive slot 212(1) extends through each of the metallization substrate 206, the core substrate 208, and the antenna substrate 210. This is not required. The conductive slot 212(1) may be partially disposed within the package substrate 202. For example, the conductive slot 212(1) may be partially or completely disposed within one or more of the metallization substrate 206, the core substrate 208, and the antenna substrate 210. Also, the antenna feed 214 may be provided as a metal interconnect within the core substrate 208 or a metal interconnect 234 within the antenna substrate 210. Additionally, the conductive slot 212 ( 1 ) may have multiple antenna feeds formed from the metal interconnects 224 , 234 in the metallization substrate 206 , the core substrate 208 , and / or the antenna substrate 210 .
[0028] There are various ways in which a slot-type antenna integrated into a package substrate, such as the slot-type antennas 204(1)-204(4) integrated into the package substrate 202 in the IC package 200 of Figures 2A-2D, can be formed and manufactured. Figure 4 is a flow chart illustrating an example process 400 for manufacturing a slot-type antenna, such as the slot-type antennas 204(1)-204(4) integrated into a package substrate, such as the package substrate 202 in the IC package 200 of Figures 2A-2D. The process 400 of Figure 4 is described with respect to the package substrate 202 of Figures 2A-2D, as an example.
[0029] In this regard, the process 400 includes forming one or more metallization layers 226(1)-226(6), 232, 236(1)-236(6), each including one or more respective metal interconnects 224, 234, 238 (block 402 of FIG. 4). It should be noted that the formed metallization layers may include metallization layers from any or all of the metallization layers 226(1)-226(6), 232, 236(1)-236(6) in the respective metallization substrate 206, the core substrate 208, and the antenna substrate 210. The process 400 then includes forming a conductive slot 212 disposed in at least one metallization layer 226, 232, 236 of the one or more substrate metallization layers 226(1)-226(6), 232, 236(1)-236(6) to form a slot-type antenna 204 (block 404 of FIG. 4). The process 400 then includes coupling at least one antenna feed line 214, including at least one metal interconnect 224 of the one or more metal interconnects 224 of the at least one metallization layer 226, 232, 236, to the conductive slot 212 (block 406 of FIG. 4).
[0030] Other manufacturing methods are possible. For example, Figures 5A-5E show exemplary manufacturing stages 500A-500E, respectively, during the manufacturing of a package substrate having an integrated slot-type antenna, including but not limited to the slot-type antennas 204(1)-204(4) in the package substrate 202 of Figures 2A-2D. Figures 6A and 6B are a flow chart illustrating an exemplary process 600 for manufacturing a package substrate having an integrated slot-type antenna according to the manufacturing stages 500A-500E of Figures 5A-5E. The manufacturing stages 500A-500E of Figures 5A-5E according to the exemplary manufacturing process 600 of Figures 6A-6B will now be described with respect to the package substrate 202 of Figures 2A-2D as an example.
[0031] In this regard, the first exemplary step in the process 600 of Figure 6A is to form the core substrate 208 (block 602 of Figure 6A). This is shown in the exemplary manufacturing stage 500A of Figure 5A. The core substrate 208 may be formed of a ferroelectric material 502 within a dielectric layer 504 that has a desired stiffness to resist bending or warping. Metal interconnects 234 are formed within the dielectric layer 504 to support metal interconnects with other substrates that are placed in contact with the core substrate 208.
[0032] In the next exemplary step in the process 600 of FIG. 6A, the substrate metallization layer 226 and the substrate metallization layer 236 of the metallization substrate 206 and the antenna substrate 210, respectively, are formed on the core substrate 208 (block 604 of FIG. 6A), as shown in the exemplary manufacturing stage 500B of FIG. 5B. Additional substrate metallization layers 226(2), 226(3) and metallization layers 236(2), 236(3) are formed on the previously formed substrate metallization layers 226 and the substrate metallization layers 236 on the core substrate 208 (block 606 of FIG. 6C), as shown in the manufacturing stage 500C, until the metallization substrate 206 and the antenna substrate 210 are formed with the desired number of substrate metallization layers 226 and the substrate metallization layers 236. Any number of substrate metallization layers 226 and the substrate metallization layers 236 may be formed as desired to form the metallization substrate 206 and the antenna substrate 210. For example, metallization layers 226 and 236 of metallization substrate 206 and antenna substrate 210 may be formed as separate layers that are formed and laminated to core substrate 208 and / or to each other. Alternatively, some or all of metallization layers 226 and 236 may be formed by forming RDLs.
[0033] The next exemplary step of process 600 includes forming slots 246(1)-246(4) in package substrate 202 formed by process steps 602-606 of FIG. 6A, as shown in manufacturing stages 500A-500C of FIG. 5A-5C. As previously mentioned, slots 246(1)-246(4) are formed in and / or through package substrate 202 in the Z-axis direction, in this example, to form conductive slots 212(1)-212(4) and form integrated antenna elements to provide an antenna within IC package 200. As shown in manufacturing stage 500D of FIG. 5D, slots 246(1)-246(4) may be formed by drilling openings in package substrate 202 with drill 506 (block 608 of FIG. 6B). A drill bit 508 of drill 506 may be aligned to desired locations of slots 246(1)-246(4) to be formed in package substrate 202. Power may then be applied to the drill 506 to rotate the drill bit 508 downward into the package substrate 202 to form the slots 246(1)-246(4) in the package substrate 202.
[0034] Conductive slots 212(1)-212(2) are then formed in the package substrate (block 610 of FIG. 6B) as shown in manufacturing stage 500E of FIG. 5B, as previously described. Package substrate 202 of FIGS. 2A-2D actually has four conductive slots 212(1)-212(4). However, manufacturing stage 500E of FIG. 5E shows only conductive slots 212(1)-212(2). Metallic material 254(1)-254(4) is disposed in conductive slots 212(1)-212(2) to form conductive sidewalls 258(1)-258(4). For example, metallic material 254(1)-254(4) can be copper. Also, by way of example, a metal plating material 510(1)-510(4), such as NiAu, may be plated onto each of the metal materials 254(1)-254(4) to protect the surfaces of the metal materials 254(1)-254(4) from oxidation. When the slots 246(1), 246(2) are formed in the package substrate 202, the metal interconnects 224, such as in the metallization substrate 206, may be exposed. The metallization substrate 206 may be designed such that when the slots 246(1), 246(2) are formed, the metal interconnects 224 are exposed proximate the sidewalls 248(2), 248(3). In this manner, the metal material 254(2), 254(3) disposed on the sidewalls 248(2), 248(3) becomes conductively coupled to the exposed metal interconnect 224 such that the metal interconnect 224 can form the antenna feedlines 214(1), 214(2). In this manner, the conductive slots 212(1), 212(2) form the slot-type antennas 204(1), 204(2) for the RFIC die 216 of FIG. 2A.
[0035] It should be noted that the slot-type antenna(s) described above may be formed and disposed in a slot disposed in any metallization layer of a package substrate, such as package substrate 202 of FIG. 2A. The slot-type antenna(s) may be formed and disposed in a metallization substrate adjacent to an IC die layer, such as IC die layer 218, a core substrate, such as core substrate 208, and an antenna substrate, such as antenna substrate 210.
[0036] A package substrate having one or more integrated slot-type antennas that can be provided within an IC package, including an RFIC package, for supporting RF signal communication, by any of the manufacturing processes of Figures 4-6B, including but not limited to the package substrates of Figures 2A-2D, can be provided or integrated within any wireless communication device and / or processor-based device. Examples include, but are not limited to, set-top boxes, entertainment units, navigation devices, communication devices, fixed location data units, mobile location data units, global positioning system (GPS) devices, mobile phones, cellular phones, smartphones, session initiation protocol (SIP) phones, tablets, phablets, servers, computers, portable computers, mobile computing devices, wearable computing devices (e.g., smart watches, health or fitness trackers, eyewear, etc.), desktop computers, personal digital assistants (PDAs), monitors, computer monitors, televisions, tuners, radios, satellite radios, music players, digital music players, portable music players, digital video players, video players, digital video disc (DVD) players, portable digital video players, automobiles, vehicle components, avionics systems, drones, and multicopters.
[0037] FIG. 7 illustrates an exemplary wireless communication device 700 including an RF component formed of one or more ICs 702, where any of the ICs 702 may be included in an RFIC package 703 employing a package substrate having one or more integrated slot-type antennas for supporting RF signal communication, by any of the manufacturing processes of FIGS. 4-6B, including but not limited to the package substrates of FIGS. 2A-2D. The wireless communication device 700 may include any of the above devices or may be provided within any of the above devices, as examples. As shown in FIG. 7, the wireless communication device 700 includes a transceiver 704 and a data processor 706. The data processor 706 may include a memory for storing data and program codes. The transceiver 704 includes a transmitter 708 and a receiver 710 supporting bidirectional communication. In general, the wireless communication device 700 may include any number of transmitters 708 and / or receivers 710 for any number of communication systems and frequency bands. All or a portion of the transceiver 704 may be implemented on one or more analog ICs, RFICs, mixed-signal ICs, and the like.
[0038] The transmitter 708 or receiver 710 may be implemented with a super-heterodyne architecture or a direct-conversion architecture. In a super-heterodyne architecture, the signal is frequency converted between RF and baseband in multiple stages in the receiver 710, for example, from RF to an intermediate frequency (IF) in one stage and then from IF to baseband in another stage. In a direct-conversion architecture, the signal is frequency converted between RF and baseband in one stage. The super-heterodyne architecture and the direct-conversion architecture may use different circuit blocks and / or have different requirements. In the wireless communication device 700 in FIG. 7, the transmitter 708 and the receiver 710 are implemented with a direct-conversion architecture.
[0039] On the transmit path, a data processor 706 processes data to be transmitted and provides I and Q analog output signals to a transmitter 708. In the example wireless communications device 700, the data processor 706 includes digital-to-analog converters (DACs) 712(1) and 712(2) to convert digital signals generated by the data processor 706 into I and Q analog output signals, e.g., I and Q output currents, for further processing.
[0040] Within the transmitter 708, low pass filters 714(1) and 714(2) filter the I and Q analog output signals, respectively, to remove unwanted signals caused by the previous digital-to-analog conversion. Amplifiers (AMPs) 716(1), 716(2) amplify the signals from low pass filters 714(1), 714(2), respectively, and provide I and Q baseband signals. An upconverter 718 upconverts the I and Q baseband signals using I and Q TX local oscillator (LO) signals from a transmit (TX) LO signal generator 722 through mixers 720(1), 720(2) to provide an upconverted signal 724. A filter 726 filters the upconverted signal 724 to remove unwanted signals caused by frequency upconversion as well as noise in the receive frequency band. A power amplifier (PA) 728 amplifies the upconverted signal 724 from filter 726 to obtain a desired output power level and provides a transmit RF signal. The transmit RF signal is routed through a duplexer or switch 730 and transmitted via an antenna 732.
[0041] In the receive path, an antenna 732 receives a signal transmitted by a base station and provides a received RF signal, which is routed through a duplexer or switch 730 and provided to a low noise amplifier (LNA) 734. The duplexer or switch 730 is designed to operate at a particular RX to TX duplexer frequency separation such that the receive (RX) signal is separated from the TX signal. The received RF signal is amplified by the LNA 734 and filtered by a filter 736 to obtain a desired RF input signal. Downconversion mixers 738(1), 738(2) mix the output of the filter 736 with I and Q RX LO signals (i.e., LO_I and LO_Q) from a RX LO signal generator 740 to generate I and Q baseband signals. The I and Q baseband signals are amplified by AMPs 742(1), 742(2) and further filtered by low pass filters 744(1), 744(2) to obtain I and Q analog input signals, which are provided to data processor 706. In this example, data processor 706 includes analog-to-digital converters (ADCs) 746(1), 746(2) to convert the analog input signals to digital signals for further processing by data processor 706.
[0042] In the wireless communication device 700 of FIG. 7, a TX LO signal generator 722 generates I and Q TX LO signals for use in frequency up-conversion, and a RX LO signal generator 740 generates I and Q RX LO signals for use in frequency down-conversion. Each LO signal is a periodic signal having a particular fundamental frequency. A TX phase-locked loop (PLL) circuit 748 receives timing information from the data processor 706 and generates control signals used to adjust the frequency and / or phase of the TX LO signal from the TX LO signal generator 722. Similarly, a RX PLL circuit 750 receives timing information from the data processor 706 and generates control signals used to adjust the frequency and / or phase of the RX LO signal from the RX LO signal generator 740.
[0043] FIG. 8 illustrates an example of a processor-based system 800. A component of the processor-based system 800 is an IC 802. Some or all of the IC 802 in the processor-based system 800 may be provided as an IC package 804 employing a package substrate having one or more integrated slot-type antennas for supporting RF signal communication, including but not limited to a package substrate according to any of the manufacturing processes of FIGS. 2A-2D and 4-6B and according to any aspect disclosed herein. In this example, the processor-based system 800 may be formed as an IC package 804 as a system-on-chip (SoC) 806. The processor-based system 800 includes a CPU 808 including one or more processors 810, sometimes referred to as CPU cores or processor cores. The CPU 808 may have a cache memory 812 coupled to the CPU 808 for quick access to temporarily stored data. The CPU 808 is coupled to a system bus 814, which may interconnect master and slave devices included in the processor-based system 800. As is well known, the CPU 808 communicates with these other devices by exchanging address, control, and data information via a system bus 814. For example, the CPU 808 may communicate bus transaction requests to a memory controller 816, as an example of a slave device. Although not shown in FIG. 8, multiple system buses 814 may be provided, with each system bus 814 constituting a different fabric.
[0044] Other master and slave devices may be connected to the system bus 814. As shown in FIG. 8, these devices may include, by way of example, a memory system 820 including a memory controller 816 and a memory array 818(s), one or more input devices 822, one or more output devices 824, one or more network interface devices 826, and one or more display controllers 828. Each of the memory system 820, the one or more input devices 822, the one or more output devices 824, the one or more network interface devices 826, and the one or more display controllers 828 may be provided in the same or different IC packages. The input device(s) 822 may include any type of input device including, but not limited to, input keys, switches, voice processors, and the like. The output device(s) 824 may include any type of output device including, but not limited to, audio, video, other visual indicators, and the like. The network interface device(s) 826 may be any device configured to enable the exchange of data to and from the network 830. The network 830 may be any type of network, including, but not limited to, a wired or wireless network, a private or public network, a local area network (LAN), a wireless local area network (WLAN), a wide area network (WAN), a Bluetooth network, and the Internet. The network interface device(s) 826 may be configured to support any type of communication protocol desired.
[0045] The CPU 808 may also be configured to access a display controller(s) 828 via the system bus 814 to control information sent to one or more displays 832. The display controller(s) 828 send information to the display(s) 832 for display via one or more video processors 834, which process the information to be displayed into a format suitable for the display(s) 832. The display controller(s) 828 and the video processor(s) 834 may be included in the same or different IC package as the IC package 804, as well as in the same or different IC package that includes the CPU 808, by way of example. The display(s) 832 may include any type of display, including, but not limited to, a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, a light emitting diode (LED) display, and the like.
[0046] Those skilled in the art will further appreciate that the various exemplary logic blocks, modules, circuits, and algorithms described in connection with the aspects disclosed herein may be implemented as electronic hardware, instructions stored in a memory or in another computer-readable medium and executed by a processor or other processing device, or a combination of both. The memory disclosed herein may be any type and size of memory and may be configured to store any type of information desired. To clearly illustrate this interchangeability, various exemplary components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. How such functionality is implemented depends on the particular application, design choices, and / or design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in various ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
[0047] The various example logic blocks, modules, and circuits described in connection with the aspects disclosed herein may be implemented or performed using a processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The processor may be a microprocessor, but alternatively the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration).
[0048] Aspects disclosed herein may be embodied in hardware and instructions stored in the hardware and may reside in, for example, a random access memory (RAM), a flash memory, a read-only memory (ROM), an electrically programmable ROM (EPROM), an electrically erasable programmable ROM (EEPROM), a register, a hard disk, a removable disk, a CD-ROM, or any other form of computer readable medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from and write information to the storage medium. Alternatively, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a remote station. Alternatively, the processor and the storage medium may reside as discrete components in a remote station, a base station, or a server.
[0049] It should also be noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and explanations. The described operations may be performed in many different sequences other than the sequence shown. Furthermore, an operation described in a single operational step may actually be performed in several different steps. In addition, one or more operational steps discussed in the exemplary aspects may be combined. It should be understood that the operational steps shown in the flow chart diagrams may be subject to many different modifications, as will be readily apparent to those skilled in the art. Those skilled in the art will also understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referred to throughout the above description may be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, optical fields or optical particles, or any combination thereof.
[0050] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other examples. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
[0051] Example implementations are described in the following numbered aspects / clauses. 1. one or more metallization layers, each including one or more metal interconnects; A slot-type antenna, a conductive slot disposed in at least one of the one or more metallization layers; at least one antenna feedline including at least one metal interconnect of the one or more metal interconnects coupled to the conductive slot; A slot type antenna including: A package substrate comprising: 2. The package substrate of clause 1, wherein the conductive slot is configured to radiate a radio frequency (RF) signal received from at least one antenna feedline. 3. Conductive slots are a slot including at least one sidewall disposed within the at least one metallization layer; a metallic material disposed on at least one sidewall; Including, At least one metal interconnect of the one or more metal interconnects of the at least one metallization layer is bonded to a metallic material; 3. A packaging substrate as claimed in claim 1 or 2. 4. The slot extends along an axis parallel to the plane of the at least one metallization layer; The conductive slot is configured to radiate a radio frequency (RF) signal in a direction perpendicular to an elongation direction of the slot. 4. A packaging substrate as defined in clause 3. 5. The conductive slot includes a slot, the slot being a first conductive sidewall, a first sidewall disposed within the at least one metallization layer; a first metallic material disposed on the first sidewall; a first conductive sidewall comprising: a second conductive sidewall, a second sidewall disposed within the at least one metallization layer adjacent to the first sidewall; a second metallic material disposed on the second sidewall; a second conductive sidewall comprising: Including, at least one metal interconnect of the one or more metal interconnects of the at least one metallization layer is bonded to a first metal material; Item 5. A package substrate according to any one of items 1 to 4. 6. The package substrate of clause 5, wherein the first metallic material is not physically bonded to the second metallic material. 7. The package substrate of clause 5 or 6, wherein the second conductive sidewall is configured to be electromagnetically coupled to the first conductive sidewall in response to a radio frequency (RF) signal. 8. Conductive slots are a first end disposed adjacent a first opening in the one or more metallization layers; a second end opposite the first end and adjacent a second opening in the one or more metallization layers; Including, 8. A package substrate according to any one of claims 1 to 7. 9. The one or more metallization layers each extend along a first axis; the conductive slots are disposed in the at least one metallization layer in a direction perpendicular to the first axis; 9. A package substrate according to any one of claims 1 to 8. 10. The one or more metallization layers include a plurality of metallization layers; the conductive slot is disposed in at least two metallization layers of the plurality of metallization layers; 10. A package substrate according to any one of claims 1 to 9. 11. The one or more metallization layers include a plurality of metallization layers; the conductive slot is disposed through each metallization layer of the plurality of metallization layers; 11. A package substrate according to any one of claims 1 to 10. 12. The package substrate of any one of clauses 1-11, further comprising a metallization substrate including one or more metallization layers each including one or more metal interconnects. 13. Further comprising a core substrate disposed adjacent to the metallization substrate; 13. The package substrate of clause 12, wherein the core substrate includes a core metallization layer including one or more metal interconnects coupled to one or more metal interconnects in the metallization substrate. 14. The package substrate of clause 12 or 13, further comprising an antenna substrate including one or more antenna elements each coupled to one of the one or more metal interconnects in the metallization substrate. 15. The packaging substrate of clause 14, wherein the one or more antenna elements include one or more patch antennas. 16. The packaging substrate of clause 14, wherein the one or more antenna elements include one or more dipole antennas. 17. One or more antenna elements may be one or more patch antennas disposed in a first substrate antenna layer in the antenna substrate; one or more dipole antennas disposed in a second substrate antenna layer within the antenna substrate adjacent to the first substrate antenna layer; Including, 15. The packaging substrate of clause 14. 18. A second conductive slot disposed within at least one metallization layer of the one or more metallization layers; at least one second antenna feedline including at least one second metal interconnect of the one or more metal interconnects of the at least one metallization layer coupled to the second conductive slot; A second slot-type antenna, 18. The package substrate of any one of clauses 1 to 17, further comprising: 19. The conductive slot extends in a first direction; The second conductive slot extends in a second direction perpendicular to the first direction. 19. The packaging substrate of clause 18. 20. The packaging substrate of any one of clauses 1 to 19, wherein the slot-type antenna includes a 5G antenna. 21. The package substrate of any one of clauses 1-20 integrated into a device selected from the group consisting of a set-top box, an entertainment unit, a navigation device, a communication device, a fixed location data unit, a mobile location data unit, a Global Positioning System (GPS) device, a mobile phone, a cellular phone, a smartphone, a Session Initiation Protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, an avionics system, a drone, and a multicopter. 22. A method of forming an integrated slot-type antenna in a packaging substrate, comprising: forming one or more metallization layers, each including one or more metal interconnects; forming a conductive slot disposed within at least one metallization layer of the one or more metallization layers to form a slot-type antenna; coupling at least one antenna feedline including at least one metal interconnect of the one or more metal interconnects of the at least one metallization layer coupled to the conductive slot; A method comprising: 23. Forming a conductive slot is forming a slot in the opening and in the at least one metallization layer to form at least one sidewall in the slot; disposing a metallic material within the opening and on the at least one sidewall to form a conductive sidewall within the slot; Including, Coupling the at least one antenna feed line includes: coupling at least one antenna feedline to a metallic material disposed on at least one sidewall of the slot; Including, The method described in clause 22. 24. The method of claim 23, wherein forming a slot in the at least one metallization layer includes forming a slot through each metallization layer of the at least one metallization layer to form at least one sidewall in the slot. 25. The method of claim 23 or 24, wherein forming the slot includes drilling an opening and at least one metallization layer. 26. Forming a conductive slot is forming an opening in at least one metallization layer; forming a slot through the opening and through the at least one metallization layer to form a first sidewall through the at least one metallization layer and a second sidewall disposed through the at least one metallization layer adjacent the first sidewall; disposing a first metallic material within the opening and on the first sidewall to form a first conductive sidewall within the slot; disposing a second metallic material within the opening and on the second sidewall to form a second conductive sidewall within the slot; Including, Coupling the at least one antenna feed line includes: coupling at least one antenna feedline to a first metallic material disposed on a first sidewall of the slot; Including, 26. The method according to any one of clauses 22 to 25. 27. Forming one or more metallization layers includes forming one or more metallization layers in a metallization substrate; bonding the core substrate to a metallization substrate; bonding the antenna substrate to a core substrate; Further comprising: Forming the conductive slot comprises: forming a slot through at least one of the metallization layers in the metallization substrate, the core substrate, and the one or more metallization layers in the antenna substrate to form at least one sidewall in the slot; disposing a metallic material within the opening and on the at least one sidewall to form a conductive sidewall within the slot; Including, 26. The method according to any one of clauses 22 to 25. 28. A package substrate, a metallization substrate including one or more metallization layers each including one or more metal interconnects; A slot type antenna, comprising: a conductive slot disposed in at least one of the one or more metallization layers; at least one antenna feedline including at least one metal interconnect of the one or more metal interconnects of at least one metallization layer coupled to the conductive slot; A package substrate including: an IC die layer coupled to a package substrate, the IC die layer including a radio frequency (RF) IC (RFIC) die including a plurality of die interconnects; at least one die interconnect of the plurality of die interconnects coupled to at least one antenna feed of the slot-type antenna; An integrated circuit (IC) package comprising: 29. The IC package of clause 28, wherein the conductive slot is configured to radiate RF signals received from the at least one antenna feedline from the RFIC die. 30. Conductive slots are a slot including at least one sidewall disposed within the at least one metallization layer; a metallic material disposed on at least one sidewall; Including, At least one metal interconnect of the one or more metal interconnects of the at least one metallization layer is bonded to a metallic material; 27. An IC package as defined in clause 28 or 29. 31. The IC package of any one of clauses 28-30, wherein the package substrate further comprises a metallization substrate including one or more metallization layers each including one or more metal lines. 32. The package substrate further comprises a core substrate disposed adjacent to the metallization substrate; the core substrate includes a core metallization layer including one or more metal interconnects coupled to one or more metal interconnects in the metallization substrate; An IC package as described in clause 31. 33. The package substrate of clause 31 or 32, further comprising an antenna substrate including one or more antenna elements each coupled to a metal interconnect of the one or more metal interconnects in the metallization substrate. 34. One or more antenna elements may be one or more patch antennas disposed in a first substrate antenna layer in the antenna substrate; one or more dipole antennas disposed in a second substrate antenna layer within the antenna substrate adjacent to the first substrate antenna layer; Including, An IC package as described in clause 33. 35. The IC package of any one of clauses 28-34 integrated into a device selected from the group consisting of a set-top box, an entertainment unit, a navigation device, a communication device, a fixed location data unit, a mobile location data unit, a Global Positioning System (GPS) device, a mobile phone, a cellular phone, a smartphone, a Session Initiation Protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, a vehicle component, an avionics system, a drone, and a multicopter. [Explanation of symbols]
[0052] 100 RFIC Packages 102 Antenna board 106 IC die layers 108 RFIC Dies 109 Electromagnetic Interference (EMI) Shielding 110 Package Substrate 112 Metallization Board 114 Substrate Metallization Layer 116 Metallic Interconnects 118 Die Interconnect 120 Core Board 122 Metallization Layer 124 Metallic Interconnects 126 Vertical Interconnection Access 128 Metallization Layer 130 Metallic Interconnects 132 Beer 134 Antenna Element 136 Dipole Antenna 138 Patch Antenna 140 Radiation Pattern Direction 142 Radiation Pattern Direction 200 IC packages 200 RFIC Packages 202 Package substrate 204 Slot Type Antenna 205 Opening 206 Metallization Board 208 Core Board 210 Antenna Board 212 Conductive Slot 214 Antenna feed line 216 RFIC Dies 218 IC die layer 220 PMIC Dies 222 EMI Shielding 224 Metallic Interconnects 225 Beer 226 Metallization Layer 228 Slots 230 Patch Antenna 232 Metallization Layer 234 Beer 234 Metallic Interconnects 236 Metallization Layer 238 Metallic Interconnects 240 Beer 242 Antenna Element 244 Dipole Antenna 246 Slots 248 Side wall 250 opening 252 End 254 Metal materials 258 Conductive Sidewall 260 Antenna Elements 400 processes 402 Block 404 Block 406 Block 500 Production Stage 502 Ferroelectric Materials 504 Dielectric layer 506 Drill 508 Drill Bit 510 Material 600 processes 600 Manufacturing Process 602 Process Steps 603 Process Steps 604 Process Steps 605 Process Steps 606 Process Steps 608 Block 610 Block 700 Wireless communication devices 700 Wireless Communication Devices 702 IC 703 RFIC Package 704 Transceiver 706 Data Processor 708 Transmitter 710 Receiver 712 Digital to Analog Converter (DAC) 714 Low Pass Filter 716 Amplifier (AMP) 718 Upconverter 720 Mixer 722 Transmit (TX) Local Oscillator (LO) Signal Generator 724 signal 726 Filters 728 Power Amplifier (PA) 730 Switch 732 Antenna 734 Low Noise Amplifier (LNA) 736 Filters 738 Down Conversion Mixer 740 LO signal generator 742 AMP 744 Low Pass Filter 746 Analog-to-Digital Converter (ADC) 748 TX Phase Locked Loop (PLL) Circuit 800 Systems 802 IC 804 IC package 806 System on Chip (SoC) 808 CPU 810 Processor 812 Cache Memory 814 System Bus 816 Memory Controller 818 Memory Array 820 Memory System 822 Input Devices 824 Output Device 826 Network Interface Device 828 Display Controller 830 Network 832 Display 834 Video Processor
Claims
1. One or more metallization layers, each including one or more metal interconnects, A slot antenna, A conductive slot, A slot that opens in each of the one or more metallization layers, the slot including at least one sidewall that extends completely through each of the one or more metallization layers, A metal material disposed entirely on the at least one sidewall, A conductive slot including, At least one antenna feed line including at least one of the one or more metal interconnects coupled to the metal material, A slot antenna including, A package substrate comprising.
2. The package substrate according to claim 1, wherein the conductive slot is configured to radiate a radio frequency (RF) signal received from the at least one antenna feed line.
3. The slot extends along an axis parallel to the plane of the one or more metallization layers, The conductive slot is configured to radiate a radio frequency (RF) signal in a direction orthogonal to the extending direction of the slot, The package substrate according to claim 1.
4. The at least one sidewall is A first sidewall that extends completely through each of the one or more metallization layers, A second sidewall that extends completely through each of the one or more metallization layers, Including, The metal material is A first metal material disposed entirely on the first sidewall, A second metal material disposed entirely on the second sidewall, Including, The at least one metal interconnect is coupled to the first metal material, The first metal material is not physically coupled to the second metal material, The second metal material is configured to be electromagnetically coupled to the first metal material in response to a radio frequency (RF) signal. The package substrate according to claim 1.
5. Each of the one or more metallization layers extends along a first axis, The slot opens in each of the one or more metallization layers in a direction orthogonal to the first axis, The package substrate according to claim 1.
6. The one or more metallization layers include a plurality of metallization layers, The slot opens in each of the plurality of metallization layers. The package substrate according to claim 1.
7. The package substrate according to claim 1, further comprising a metallization substrate including the one or more metallization layers each including the one or more metal interconnecting portions.
8. Further comprising a core substrate disposed adjacent to the metallization substrate, The core substrate includes a core metallization layer including one or more metal interconnecting portions coupled to the one or more metal interconnecting portions in the metallization substrate, and the package substrate according to claim 7.
9. Further comprising an antenna substrate including one or more antenna elements each coupled to a metal interconnecting portion among the one or more metal interconnecting portions in the metallization substrate, The one or more antenna elements include one or more patch antennas and / or one or more dipole antennas, and the package substrate according to claim 7.
10. A second conductive slot including a slot opened in at least one second metallization layer among the one or more metallization layers; At least one second antenna feed line including at least one second metal interconnecting portion among the one or more metal interconnecting portions of the at least one second metallization layer coupled to the second conductive slot; A second slot-type antenna Further comprising The conductive slot extends in a first direction, The second conductive slot extends in a second direction orthogonal to the first direction, The package substrate according to claim 1.
11. The slot-type antenna includes a 5G antenna, and the package substrate according to claim 1.
12. A package substrate according to claim 1, integrated into a device selected from the group consisting of a set-top box, an entertainment unit, a navigation device, a communication device, a fixed location data unit, a mobile location data unit, a global positioning system (GPS) device, a mobile phone, a cellular phone, a smartphone, a session initiation protocol (SIP) phone, a tablet, a phablet, a server, a computer, a portable computer, a mobile computing device, a wearable computing device, a desktop computer, a personal digital assistant (PDA), a monitor, a computer monitor, a television, a tuner, a radio, a satellite radio, a music player, a digital music player, a portable music player, a digital video player, a video player, a digital video disc (DVD) player, a portable digital video player, an automobile, vehicle parts, an avionics system, a drone, and a multicopter.
13. A method of forming an integrated slot antenna in a package substrate, comprising: forming one or more metallization layers each including one or more metal interconnects; forming a conductive slot, forming a slot that opens in each of the one or more metallization layers to form a slot antenna, wherein forming the slot includes forming at least one sidewall that extends completely through each of the one or more metallization layers; disposing a metal material completely on the at least one sidewall; including; coupling the metal material to at least one antenna feed line including at least one of the one or more metal interconnects of the one or more metallization layers; including a method.
14. The method according to claim 13, wherein forming the slot includes perforating the opening and the one or more metallization layers.
15. A package substrate according to any one of claims 1 to 12, and An IC die layer coupled to the package substrate, the IC die layer including a radio frequency (RF) IC (RFIC) die including a plurality of die interconnects, At least one of the plurality of die interconnects coupled to the at least one antenna feed line of the slot antenna, An integrated circuit (IC) package comprising.