Motion vectors derived with single reference signaling - Patents.com

Abstract

The present disclosure relates to deriving motion vector differentials via reference signaling for coding and / or decoding a video stream. There may be a syntax flag or value that indicates a particular inter-coded mode. Based on the inter-coded mode, a first motion vector of a current reference frame is used to derive a second motion vector that points to a different reference frame. The coded video stream is decoded based on the derived second motion vector.

Description

[Technical field]

[0001] Priority This application claims priority to U.S. Provisional Application No. 63 / 280,978, entitled "DERIVED MOTION VECTOR WITH SINGLE REFERENCE SIGNALLING", filed November 18, 2021, and U.S. Provisional Application No. 63 / 289,008, entitled "DERIVED MOTION VECTOR WITH SINGLE REFERENCE SIGNALLING", filed December 13, 2021, which claims the benefit of priority to U.S. Provisional Application No. 18 / 049,914, entitled "DERIVED MOTION VECTOR WITH SINGLE REFERENCE SIGNALING", filed October 26, 2022, each of which is incorporated by reference in its entirety herein.

[0002] This disclosure describes a set of advanced video coding techniques. More specifically, the disclosed techniques include deriving motion vector differentials using single reference signaling for coding and / or decoding. [Background technology]

[0003] The discussion of the background art provided herein is intended to generally present the context of the present disclosure. The inventors' work is not admitted, expressly or impliedly, as prior art to the present disclosure to the extent that that work is described in this background section, together with aspects of the description that may not otherwise be admitted as prior art at the time of filing of this application.

[0004] Video coding and video decoding can be performed using inter-picture prediction with motion compensation. Uncompressed digital video can include a sequence of pictures, each having spatial dimensions of, for example, 1920x1080 luminance samples and associated full or subsampled chrominance samples. The sequence of pictures can have a fixed or variable picture rate (alternatively called frame rate), for example, 60 pictures per second or 60 frames per second. Uncompressed video has specific bit rate requirements for streaming or data processing. For example, a video with a pixel resolution of 1920x1080, a frame rate of 60 frames / second, and 4:2:0 chroma subsampling with 8 bits per pixel per color channel requires a bandwidth approaching 1.5 Gbit / s. One hour of such video requires more than 600 GByte of storage space.

[0005] One objective of video coding and video decoding may be the reduction of redundancy in an uncompressed input video signal through compression. Compression may help reduce the aforementioned bandwidth and / or storage space requirements, in some cases by more than two orders of magnitude. Both lossless and lossy compression, as well as combinations thereof, may be used. Lossless compression refers to techniques where an exact copy of an original signal can be reconstructed from a compressed original signal through a decoding process. Lossy compression refers to a coding / decoding process where the original video information is not fully preserved when coding and cannot be fully restored when decoding. When using lossy compression, the reconstructed signal may not be identical to the original signal, but the distortion between the original signal and the reconstructed signal is small enough to make the reconstructed signal useful for its intended application, even with some information loss. For video, lossy compression is widely used in many applications. The amount of distortion that can be tolerated depends on the application. For example, a user of a particular consumer video streaming application may tolerate higher distortion than a user of a movie or television broadcast application. The compression ratio achievable by a particular coding algorithm can be selected or adjusted to reflect different distortion tolerances; that is, in general, higher distortion tolerances allow for coding algorithms that result in higher losses and higher compression ratios.

[0006] Video encoders and decoders can utilize techniques from a number of broad categories and steps, including, for example, motion compensation, Fourier transform, quantization, and entropy coding.

[0007] Video codec techniques can include a technique known as intra-coding. In intra-coding, sample values ​​are represented without reference to samples or other data from previously reconstructed reference pictures. In some video codecs, a picture is spatially subdivided into blocks of samples. If all blocks of samples are coded in intra mode, the picture can be called an intra-picture. Intra-pictures and their derived pictures, such as independent decoder refresh pictures, can be used to reset the decoder state and can therefore be used as the first picture in a coded video bitstream and video session or as a still image. The samples of the block after intra prediction can then undergo a transform to the frequency domain, and the transform coefficients so generated can be quantized before entropy coding. Intra prediction represents a technique that minimizes sample values ​​in the pre-transform domain. In some cases, the smaller the DC value after the transform and the smaller the AC coefficients, the fewer bits are required for a given quantization step size to represent the block after entropy coding.

[0008] Conventional intra-coding, for example as known from MPEG-2 generation coding techniques, does not use intra-prediction. However, some newer video compression techniques include techniques that attempt to code / decode a block based on surrounding sample data and / or metadata that precedes the block of intra-coded or intra-decoded data in decoding order, e.g., obtained during encoding and / or decoding of spatial neighbors. Such techniques are hereafter referred to as "intra-prediction" techniques. It should be noted that in at least some cases, intra-prediction uses reference data only from the current picture being reconstructed, and not from other reference pictures.

[0009] There may be many different forms of intra-prediction. If more than one of such techniques is available in a given video coding technique, the technique used may be referred to as an intra-prediction mode. One or more intra-prediction modes may be provided in a particular codec. In certain cases, a mode may have sub-modes and / or may be associated with various parameters, and the mode / sub-mode information and intra-coding parameters for a block of video may be coded individually or collectively included in the codeword of the mode. Which codeword is used for a given mode, sub-mode, and / or parameter combination may affect the coding efficiency gains via intra-prediction and may affect the entropy coding technique used to convert the codeword into a bitstream.

[0010] Certain modes of intra prediction were introduced in H.264, improved in H.265, and further improved in newer coding techniques such as Joint Search Model (JEM), Versatile Video Coding (VVC), and Benchmark Set (BMS). In general, in intra prediction, a predictor block can be formed using neighboring sample values ​​that become available. For example, available values ​​of a particular set of neighboring samples along a particular direction and / or line may be copied to the predictor block. The reference to the direction used may be coded in the bitstream or may itself be predicted.

[0011] Referring to FIG. 1A, illustrated at the bottom right is a subset of the nine predictor directions specified in the 33 possible intra predictor directions of H.265 (corresponding to the 33 angle modes of the 35 intra modes specified in H.265). The point (101) where the arrows converge represents the sample being predicted. The arrows represent the directions from which neighboring samples are used to predict the sample at 101. For example, arrow (102) indicates that sample (101) is predicted from one or more neighboring samples to the upper right at an angle of 45 degrees from the horizontal. Similarly, arrow (103) indicates that sample (101) is predicted from one or more neighboring samples to the lower left of sample (101) at an angle of 22.5 degrees from the horizontal.

[0012] 1A, at the top left is shown a square block (104) of 4×4 samples (indicated by a thick dashed line). The square block (104) contains 16 samples, each labeled with "S", its Y-dimensional position (e.g., row index), and its X-dimensional position (e.g., column index). For example, sample S21 is the second sample (from the top) in the Y dimension and the first sample (from the left) in the X dimension. Similarly, sample S44 is the fourth sample in the block (104) in both the Y and X dimensions. Since the block is 4×4 samples in size, S44 is at the bottom right. Also shown are exemplary reference samples that follow a similar numbering scheme. The reference samples are labeled with R, their Y position (e.g., row index), and X position (column index) relative to the block (104). In both H.264 and H.265, predicted samples that are adjacent neighbors of the block being reconstructed are used.

[0013] Intra-picture prediction of block 104 may start by copying reference sample values ​​from neighboring samples according to a signaled prediction direction. For example, assume that the coded video bitstream includes signaling for this block 104 indicating the prediction direction of the arrow (102), i.e., the sample is predicted from one or more prediction samples to the upper right and at an angle of 45 degrees from the horizontal. In such a case, samples S41, S32, S23, and S14 are predicted from the same reference sample R05. Then, sample S44 is predicted from reference sample R08.

[0014] In certain cases, to calculate a reference sample, especially when the orientation is not evenly divisible by 45 degrees, the values ​​of multiple reference samples may be combined, for example by interpolation.

[0015] The number of possible directions has increased as video coding technology continues to develop. In H.264 (2003), for example, nine different directions are available for intra prediction. This increases to 33 in H.265 (2013), and JEM / VVC / BMS can support up to 65 directions at the time of this disclosure. Experimental studies have been conducted to help identify the most suitable intra prediction directions, and certain techniques of entropy coding can be used to encode those most suitable directions with a small number of bits, accepting a certain bit penalty for the direction. Furthermore, the direction itself may be predicted from neighboring directions used in intra prediction of the neighboring block being decoded.

[0016] FIG. 1B shows a diagram (180) illustrating 65 intra prediction directions according to JEM to illustrate the increasing number of prediction directions in various encoding techniques that have evolved over time.

[0017] Schemes for mapping bits representing intra-prediction directions to prediction directions in a coded video bitstream may vary across video coding techniques, and may range, for example, from simple direct mappings of prediction directions to intra-prediction modes to complex adaptation schemes involving codewords, most probable modes, and similar techniques. In all cases, however, there may be certain directions of intra-prediction that are statistically less likely to occur in the video content than certain other directions. Because the goal of video compression is to reduce redundancy, these less likely directions may be represented with more bits than the more likely directions in a well-designed video coding technique.

[0018] Inter-picture prediction, or inter-prediction, may be based on motion compensation. In motion compensation, sample data from a previously reconstructed picture or part thereof (reference picture) may be used to predict a newly reconstructed picture or picture part (e.g., block) after being spatially shifted in a direction indicated by a motion vector (hereinafter, MV). In some cases, the reference picture may be the same as the picture currently being reconstructed. The MV may have two dimensions X and Y, or three dimensions, with the third dimension being an indication of the reference picture to be used (similar to the temporal dimension).

[0019] In some video compression techniques, a current MV applicable to a particular area of ​​sample data can be predicted from other MVs, e.g., other MVs related to other areas of sample data that are spatially adjacent to the area being reconstructed and that precede the current MV in decoding order. Doing so can significantly reduce the overall amount of data required to code the MV by relying on the removal of redundancy in correlated MVs, thereby increasing compression efficiency. MV prediction can work effectively because, for example, when coding an input video signal derived from a camera (known as natural video), areas larger than the area to which a single MV is applicable have a statistical likelihood to move in a similar direction in the video sequence and therefore, in some cases, can be predicted using similar motion vectors derived from MVs of neighboring areas. As a result, the actual MV of a given area is similar or identical to the MV predicted from the surrounding MVs. Such MVs can further be represented with fewer bits after entropy coding than would be used if the MV was directly coded instead of predicted from the neighboring MV(s). In some cases, MV prediction can be an example of lossless compression of a signal (i.e., an MV) derived from an original signal (i.e., a sample stream). In other cases, the MV prediction itself may be non-lossy, for example due to rounding errors when computing a predictor from several surrounding MVs.

[0020] Various MV prediction mechanisms are described in H.265 / HEVC (ITU-T Rec. H.265, "High Efficiency Video Coding", December 2016). Among the many MV prediction mechanisms specified by H.265, the one described below is a technique hereafter referred to as "spatial merging".

[0021] Specifically, referring to FIG. 2, a current block (201) contains samples that are detected by the encoder during the motion search process as predictable from a spatially shifted previous block of the same size. Instead of coding its MV directly, the MV can be derived from metadata associated with one or more reference pictures, e.g., from the most recent reference picture (in decoding order), using MVs associated with any one of five surrounding samples denoted as A0, A1, and B0, B1, B2 (202-206, respectively). In H.265, MV prediction can use predictors from the same reference picture that neighboring blocks use.

[0022] AOMedia Video 1 (AV1) is an open video coding format designed for video transmission over the Internet. AV1 was developed as a successor to VP9 by building on the VP9 code base and incorporating additional technologies. The AV1 bitstream specification includes reference video codecs such as H.265, the High Efficiency Video Coding (HEVC) standard, and Versatile Video Coding (VVC). Summary of the Invention [Means for solving the problem]

[0023] The embodiments of the present disclosure provide a method and apparatus for deriving a motion vector differential with single reference signaling for coding and / or decoding a video stream. There may be a syntax flag / value indicating a particular inter-coded mode. Based on the inter-coded mode, a first motion vector of a current reference frame is used to derive a second motion vector pointing to a different reference frame. The coded video stream is decoded based on the derived second motion vector.

[0024] In one embodiment, a method for decoding a video stream includes the steps of: receiving a video stream including a syntax flag indicating whether a first motion vector of a first reference frame is used to derive a second motion vector of a second / different reference frame; receiving a first reference frame of a current frame in the video stream; determining whether the first motion vector of the first reference frame is used to derive a second motion vector of a second reference frame based on a value of the syntax flag; deriving a second motion vector of the second reference frame in response to the value of the syntax flag indicating that the first motion vector of the current reference frame is used to derive the second motion vector of the second reference frame, the deriving step being based on the value of the syntax flag and the first motion vector of the first reference frame; and decoding the video stream based on the derived second motion vector. The first motion vector points to the first reference frame, the second motion vector points to a second reference frame different from the first reference frame, and a motion vector differential (MVD) provides a prediction based on the motion vector. The deriving step includes an inter-coded mode, the inter-coded mode including a DERIVED NEWMV mode or a DERIVED_NEARMV mode. The DERIVED_NEWMV mode includes the second motion vector being derived directly from the first reference frame. The DERIVED_NEARMV mode includes the second motion vector being derived from a neighboring frame of the first reference frame. The method includes indicating which of the inter-coded modes is applied in response to a syntax flag, the deriving step being performed in response to an indication that a first motion vector of a single reference frame can derive the second motion vector. The method includes signaling a motion vector differential (MVD) based on the indicated inter-coded mode.The method includes signaling a reference frame index indicating which of the reference frames is used for the current block for the inter prediction mode. The signaling is when there are at least two reference frames in the reference frame buffer available for the current frame, one of the at least two reference frames is before the current frame in display order, and another of the at least two reference frames is after the current frame in display order. The direction of the reference frame is based on whether the reference frame is before the current frame in display order or after the current frame in display order. The direction of the single reference frame is different from the different reference frames. When the picture order counts (POC) of both reference frames of one motion vector pair are both larger or both smaller than the POC of the current reference frame, the directions of both reference frames are the same. When the picture order count (POC) of one of the pair of reference frames is larger than the POC of the current reference frame, and the POC of the other of the pair of reference frames is smaller than the POC of the current reference frame, the directions of both reference frames are different. The different reference frame to which the derived second motion vector points may be different from the signaled reference frame or may have a different orientation from the single reference frame.

[0025] In another embodiment, an apparatus for decoding a video bitstream includes a memory storing instructions and a processor in communication with the memory, the processor being configured, when executing the instructions, to cause the apparatus to process a video bitstream including a syntax flag indicating an inter-coded mode, identify from the video bitstream a first reference frame for a current frame, a first motion vector pointing to the first reference frame, determine whether a first motion vector of the first reference frame is used to derive a second motion vector of a second reference frame based on a value of the syntax flag, derive a second motion vector based on the determination and the first motion vector, and decode the video bitstream based on the derived second motion vector. The inter-coded mode includes a DERIVED NEWMV mode or a DERIVED_NEARMV mode, further including the DERIVED_NEWMV mode including the second motion vector being derived from the first reference frame, and the DERIVED_NEARMV mode including the second motion vector being derived from a neighborhood of the first reference frame. A first motion vector points to a first reference frame, a second motion vector points to a second reference frame, and a motion vector differential (MVD) provides a description based on the motion vectors.

[0026] In another embodiment, a non-transitory computer-readable storage medium storing instructions, which when executed by a processor, are configured to: process a video stream including a syntax instruction including an inter-coded mode; receive a first reference frame for a current frame from the video stream, the first motion vector pointing to the first reference frame; determine whether the first motion vector of the first reference frame is used to derive a second motion vector of a second reference frame based on a value of the syntax instruction; derive a second motion vector based on the syntax instruction and the first motion vector based on the determination, the second motion vector pointing to the second reference frame; and decode the video stream based on the derived second motion vector. The inter-coded mode includes a DERIVED NEWMV mode or a DERIVED_NEARMV mode, and further includes the DERIVED_NEWMV mode including the second motion vector being derived from the first reference frame and the DERIVED_NEARMV mode including the second motion vector being derived from a neighborhood of the first reference frame.

[0027] In some other implementations, a device for processing video information is disclosed. The device may include circuitry configured to perform any one of the implementations described above.

[0028] Embodiments of the present disclosure also provide a non-transitory computer-readable medium storing instructions that, when executed by a computer for video decoding and / or video encoding, cause the computer to perform video decoding and / or video encoding.

[0029] Further features, nature and various advantages of the disclosed subject matter will become more apparent from the following detailed description and the accompanying drawings. [Brief description of the drawings]

[0030] [Figure 1A]1 shows a schematic diagram of an example subset of intra-prediction directional modes. [Figure 1B] 1 shows a diagram of an exemplary intra-prediction direction. [Diagram 2] 1 illustrates a schematic diagram of a current block and its surrounding spatial merging candidates for motion vector prediction in an example. [Diagram 3] 1 shows a simplified block diagram schematic of a communication system (300) according to an exemplary embodiment. [Figure 4] 4 shows a simplified block diagram schematic of a communication system (400) according to an exemplary embodiment. [Diagram 5] 1 shows a schematic diagram of a simplified block diagram of a video decoder according to an example embodiment; [Figure 6] 1 shows a schematic diagram of a simplified block diagram of a video encoder according to an example embodiment; [Figure 7] 4 shows a block diagram of a video encoder according to another example embodiment. [Figure 8] 4 shows a block diagram of a video decoder according to another example embodiment. [Figure 9] 1 illustrates a coding block partitioning scheme according to an exemplary embodiment of the present disclosure. [Figure 10] 1 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 11] 1 illustrates another scheme for coding block partitioning according to an exemplary embodiment of the present disclosure. [Figure 12] 4 illustrates an exemplary partitioning of a base block into coding blocks according to an exemplary partitioning scheme. [Figure 13] 1 illustrates an exemplary division-of-thirds scheme. [Figure 14] 1 illustrates an exemplary Quad-Tree Binary Tree (QTBT) coding block partitioning scheme. [Figure 15] 4 illustrates a scheme for splitting a coding block into multiple transform blocks and the coding order of the transform blocks, according to an example embodiment of the present disclosure. [Figure 16]4 illustrates another scheme for splitting a coding block into multiple transform blocks and the coding order of the transform blocks according to an example embodiment of the present disclosure. [Figure 17] 1 illustrates another scheme for splitting a coding block into multiple transform blocks according to an exemplary embodiment of the present disclosure. [Figure 18] 1 illustrates an exemplary partitioning tree for block partitioning. [Figure 19] 1 illustrates an exemplary ternary tree division. [Figure 20a] 1 illustrates exemplary merge mode by motion vector difference (MMVD) search points. [Figure 20b] 13 illustrates another example merge mode with motion vector difference (MMVD) search point. [Figure 21] 1 shows a flowchart of a method according to an exemplary embodiment of the present disclosure. [Figure 22] 1 shows a schematic diagram of a computer system according to an exemplary embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] Throughout this specification and the claims, terms may have subtle meanings that are suggested or implied in the context beyond the meaning explicitly stated. The phrases "in one embodiment" or "in some embodiments" used herein do not necessarily refer to the same embodiment, and the phrases "in another embodiment" or "in other embodiments" used herein do not necessarily refer to different embodiments. Similarly, the phrases "in one implementation" or "in some implementations" used herein do not necessarily refer to the same implementation, and the phrases "in another implementation" or "in other implementations" used herein do not necessarily refer to different implementations. For example, the claimed subject matter is intended to include all or some combinations of the example embodiments / implementations.

[0032] Generally, terms may be understood at least in part from their usage in context. For example, terms such as "and", "or", or "and / or" as used herein may include various meanings that may depend at least in part on the context in which such terms are used. Typically, "or" when used to relate a list such as A, B, or C is intended to mean A, B, and C, which in this case is used in an inclusive sense, as well as A, B, or C, which in this case is used in an exclusive sense. In addition, the terms "one or more" or "at least one" as used herein may be used to describe any feature, structure, or characteristic in a singular sense, or may be used to describe a combination of features, structures, or characteristics in a plural sense, depending at least in part on the context. Similarly, terms such as "a", "an", or "the" may also be understood to convey a singular usage or a plural usage, depending at least in part on the context. In addition, the terms "based on" or "determined by" may be understood as not necessarily intended to convey an exclusive set of factors, but instead may allow for the existence of additional factors not necessarily expressly recited, also depending at least in part on the context.

[0033] FIG. 3 illustrates a simplified block diagram of a communication system (300) according to one embodiment of the present disclosure. The communication system (300) includes, for example, a plurality of terminal devices that can communicate with each other via a network (350). For example, the communication system (300) includes a first pair of terminal devices (310) and (320) interconnected via the network (350). In the example of FIG. 3, the first pair of terminal devices (310) and (320) may perform unidirectional transmission of data. For example, the terminal device (310) may code video data (e.g., a stream of video pictures captured by the terminal device (310)) for transmission to the other terminal device (320) via the network (350). The encoded video data may be transmitted in the form of one or more coded video bitstreams. The terminal device (320) may receive the coded video data from the network (350), decode the coded video data to reconstruct the video pictures, and display the video pictures according to the reconstructed video data. Unidirectional data transmission may be implemented, for example, for media serving applications.

[0034] In another example, the communication system (300) includes a second pair of terminal devices (330) and (340) for bidirectional transmission of coded video data, which may be implemented, for example, during video conferencing applications. For the bidirectional transmission of data, in one example, each of the terminal devices (330) and (340) may code video data (e.g., of a stream of video pictures captured by that terminal device) for transmission to the other of the terminal devices (330) and (340) over the network (350). Each of the terminal devices (330) and (340) may also receive coded video data transmitted by the other of the terminal devices (330) and (340), decode the coded video data to reconstruct the video pictures, and display the video pictures on an accessible display device according to the reconstructed video data.

[0035] In the example of FIG. 3, the terminal devices (310), (320), (330), and (340) may be implemented as a server, a personal computer, and a smartphone, although the applicability of the principles underlying the present disclosure is not so limited. The embodiments of the present disclosure may be implemented in desktop computers, laptop computers, tablet computers, media players, wearable computers, dedicated video conferencing equipment, and the like. The network (350) represents any number or type of network that conveys coded video data between the terminal devices (310), (320), (330), and (340), including, for example, wired (cabled) and / or wireless communication networks. The communication network (350) may exchange data over circuit-switched channels, packet-switched channels, and / or other types of channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet. For purposes of this discussion, the architecture and topology of the network (350) may not be important to the operation of the present disclosure unless explicitly described herein.

[0036] 4 illustrates an arrangement of video encoders and video decoders in a video streaming environment as an example of an application of the disclosed subject matter. The disclosed subject matter may be equally applicable to other video applications including, for example, video conferencing, digital television broadcasting, gaming, virtual reality, storage of compressed video on digital media including CDs, DVDs, memory sticks, etc.

[0037] A video streaming system may include a video source (401), e.g., a video capture subsystem (413) that may include a digital camera, for creating a stream of uncompressed video pictures or images (402). In one example, the stream of video pictures (402) includes samples recorded by the digital camera of the video source 401. The stream of video pictures (402) is illustrated as a bold line to emphasize its high amount of data compared to the encoded video data (404) (or coded video bitstream), and may be processed by an electronic device (420) that includes a video encoder (403) coupled to the video source (401). The video encoder (403) may include hardware, software, or a combination thereof to enable or implement aspects of the disclosed subject matter, as described in more detail below. The encoded video data (404) (or encoded video bitstream (404)), shown as thin lines to emphasize its low amount of data compared to the stream of uncompressed video pictures (402), can be stored directly on the streaming server (405) or on a downstream video device (not shown) for future use. One or more streaming client subsystems, such as the client subsystems (406) and (408) of FIG. 4, can access the streaming server (405) to retrieve copies (407) and (409) of the encoded video data (404). The client subsystem (406) can include a video decoder (410), for example, within the electronic device (430). The video decoder (410) decodes the input copy of the encoded video data (407) and creates an output stream of video pictures (411) that is uncompressed and can be rendered on a display (412) (e.g., a display screen) or other rendering device (not shown). The video decoder 410 may be configured to perform some or all of the various functions described in this disclosure.In some streaming systems, the encoded video data (404), (407), and (409) (e.g., video bitstreams) may be encoded according to a particular video coding / compression standard. Examples of such standards include ITU-T Recommendation H.265. In one example, a video coding standard under development is informally known as Versatile Video Coding (VVC). The disclosed subject matter may be used in the context of VVC, as well as other video coding standards.

[0038] It should be noted that the electronic devices (420) and (430) may include other components (not shown). For example, the electronic device (420) may also include a video decoder (not shown), and the electronic device (430) may also include a video encoder (not shown).

[0039] 5 shows a block diagram of a video decoder (510) according to any of the following embodiments of the present disclosure. The video decoder (510) can be included in an electronic device (530). The electronic device (530) can include a receiver (531) (e.g., a receiving circuit). The video decoder (510) can be used in place of the video decoder (410) of the example of FIG. 4.

[0040] The receiver (531) may receive one or more coded video sequences to be decoded by the video decoder (510). In the same or another embodiment, one coded video sequence may be decoded at a time, with the decoding of each coded video sequence being independent of the other coded video sequences. Each video sequence may be associated with multiple video frames or video images. The coded video sequences may be received from a channel (501), which may be a hardware / software link to a storage device that stores the encoded video data, or a streaming source that transmits the encoded video data. The receiver (531) may receive the encoded video data along with other data, such as coded audio data and / or auxiliary data streams, which may be forwarded to respective processing circuits (not shown). The receiver (531) may separate the coded video sequences from the other data. To combat network jitter, a buffer memory (515) may be placed between the receiver (531) and the entropy decoder / parser (520) (hereafter "parser (520)"). In certain applications, the buffer memory (515) may be implemented as part of the video decoder (510). In other applications, the buffer memory (515) may be separate and external to the video decoder (510) (not shown). In still other applications, there may be a buffer memory (not shown) external to the video decoder (510), for example, to combat network jitter, and there may be another additional buffer memory (515) internal to the video decoder (510), for example, to handle playback timing. When the receiver (531) is receiving data from a storage / forwarding device with sufficient bandwidth and controllability, or from an isosynchronous network, the buffer memory (515) may be unnecessary or may be small.For use with best-effort packet networks such as the Internet, a buffer memory (515) of sufficient size may be required, and may be relatively large in size. Such a buffer memory may be implemented with an adaptive size and may be implemented at least in part in an operating system or similar element (not shown) external to the video decoder (510).

[0041] The video decoder (510) may include a parser (520) to reconstruct symbols (521) from the coded video sequence. These categories of symbols include information used to manage the operation of the video decoder (510) and potentially information for controlling a rendering device such as a display (512) (e.g., a display screen) that may or may not be an integral part of the electronic device (530) as shown in FIG. 5, but may be coupled to the electronic device (530). The control information for the rendering device(s) may be in the form of a supplemental enhancement information (SEI message) or a video usability information (VUI) parameter set fragment (not shown). The parser (520) may parse / entropy decode the coded video sequence received by the parser (520). The entropy coding of the coded video sequence may be in accordance with a video coding technique or standard and may follow various principles including variable length coding, Huffman coding, arithmetic coding with or without context dependency, etc. The parser (520) may extract from the coded video sequence a set of subgroup parameters for at least one of the subgroups of pixels in the video decoder based on at least one parameter corresponding to the subgroup. The subgroups may include Group of Pictures (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser (520) may also extract information from the coded video sequence, such as transform coefficients (e.g., Fourier transform coefficients), quantization parameter values, motion vectors, etc.

[0042] The parser (520) may perform an entropy decoding / parsing operation on the video sequence received from the buffer memory (515) to produce symbols (521).

[0043] The reconstruction of the symbols (521) may require a number of different processing or functional units, depending on the type of coded video picture or portion thereof (inter-picture and intra-picture, inter-block and intra-block, etc.), as well as other factors. Which units are required and how they are required may be controlled by subgroup control information parsed from the coded video sequence by the parser (520). The flow of such subgroup control information between the parser (520) and the following processing or functional units is not shown for the sake of simplicity.

[0044] Beyond the functional blocks already described, the video decoder (510) may be conceptually subdivided into several functional units as described below. In an actual implementation operating under commercial constraints, many of these functional units may interact closely with each other and may be, at least in part, integrated with each other. However, for the purpose of clearly describing the various functions of the disclosed subject matter, a conceptual subdivision into functional units is adopted in the following disclosure.

[0045] The first unit may include a scalar / inverse transform unit (551), which may receive quantized transform coefficients as well as control information from the parser (520) including information indicating which type of inverse transform to use, block size, quantization coefficients / parameters, quantization scaling matrices, etc. The scalar / inverse transform unit (551) may output a block including sample values ​​that may be input to an aggregator (555).

[0046] In some cases, the output samples of the scaler / inverse transform (551) may relate to intra-coded blocks, i.e., blocks that do not use prediction information from a previously reconstructed picture, but may use prediction information from a previously reconstructed portion of the current picture. Such prediction information may be provided by an intra-picture prediction unit (552). In some cases, the intra-picture prediction unit (552) may generate blocks of the same size and shape as the block being reconstructed using information of surrounding blocks already reconstructed and stored in the current picture buffer (558). The current picture buffer (558) may, for example, buffer the partially reconstructed and / or fully reconstructed current picture. The aggregator (555) may, in some implementations, add the prediction information generated by the intra-prediction unit (552) to the output sample information provided by the scaler / inverse transform unit (551) on a sample-by-sample basis.

[0047] In other cases, the output samples of the scalar / inverse transform unit (551) may relate to an inter-coded and potentially motion-compensated block. In such cases, the motion compensated prediction unit (553) may access the reference picture memory (557) to fetch samples used for inter-picture prediction. After motion compensating the fetched samples according to the symbols (521) related to the block, these samples may be added to the output of the scalar / inverse transform unit (551) by the aggregator (555) to generate output sample information (the output of unit 551 may be referred to as a residual sample or residual signal). The address in the reference picture memory (557) from which the motion compensated prediction unit (553) fetches the prediction sample may be controlled by a motion vector and is available to the motion compensated prediction unit (553) in the form of a symbol (521) that may have, for example, an X component, a Y component (shift), and a reference picture component (time). Motion compensation may also include interpolation of sample values ​​fetched from a reference picture memory (557) when sub-sample accurate motion vectors are used, and may be associated with a motion vector prediction mechanism, etc., and so on.

[0048] The output samples of the aggregator (555) may be subjected to various loop filtering techniques in the loop filter unit (556). The video compression techniques may include in-loop filter techniques controlled by parameters included in the coded video sequence (also called the coded video bitstream) and provided to the loop filter unit (556) as symbols (521) from the parser (520), but may also be responsive to meta-information obtained during decoding of a previous portion (in decoding order) of the coded picture or coded video sequence, or to previously reconstructed and loop filtered sample values. As described in more detail below, several types of loop filters may be included as part of the loop filter unit 556, in various orders.

[0049] The output of the loop filter unit (556) may be a sample stream that can be output to a rendering device (512) as well as stored in a reference picture memory (557) for use in future inter-picture prediction.

[0050] Once a particular coded picture is fully reconstructed, it can be used as a reference picture for future inter-picture prediction. For example, once a coded picture corresponding to a current picture is fully reconstructed and the coded picture is identified as a reference picture (e.g., by the parser (520)), the current picture buffer (558) can become part of the reference picture memory (557), and any unused current picture buffer can be reallocated before beginning reconstruction of the next coded picture.

[0051] The video decoder (510) may perform decoding operations according to a given video compression technique adopted in a standard such as ITU-T Rec. H.265. The coded video sequence may conform to a syntax specified by the video compression technique or standard used in the sense that the coded video sequence adheres to both the syntax of the video compression technique or standard and to a profile documented in the video compression technique or standard. Specifically, a profile may select certain tools from all tools available in the video compression technique or standard as limited tools that may be used under that profile. To conform to a standard, the complexity of the coded video sequence may be within a range defined by a level of the video compression technique or standard. In some cases, the level limits a maximum picture size, a maximum frame rate, a maximum reconstruction sample rate (e.g., measured in megasamples per second), a maximum reference picture size, etc. The limits set by the level may be further constrained in some cases by a hypothetical reference decoder (HRD) specification and metadata for HRD buffer management signaled in the coded video sequence.

[0052] In some exemplary embodiments, the receiver (531) may receive additional (redundant) data along with the encoded video. The additional data may be included as part of the coded video sequence(s). The additional data may be used by the video decoder (510) to properly decode the data and / or to more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or signal-to-noise ratio (SNR) enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0053] 6 shows a block diagram of a video encoder (603) according to an exemplary embodiment of the present disclosure. The video encoder (603) may be included in an electronic device (620). The electronic device (620) may further include a transmitter (640) (e.g., a transmitting circuit). The video encoder (603) may be used in place of the video encoder (403) of the example of FIG.

[0054] The video encoder (603) may receive video samples from a video source (601) (which is not part of the electronic device (620) in the example of FIG. 6) that may capture video image(s) to be coded by the video encoder (603). In another example, the video source (601) may be implemented as part of the electronic device (620).

[0055] The video source (601) may provide a source video sequence to be coded by the video encoder (603) in the form of a digital video sample stream that may be of any suitable bit depth (e.g., 8-bit, 10-bit, 12-bit, ...), any color space (e.g., BT.601 YCrCb, RGB, XYZ ...), and any suitable sampling structure (e.g., YCrCb 4:2:0, YCrCb 4:4:4). In a media serving system, the video source (601) may be a storage device capable of storing previously prepared video. In a video conferencing system, the video source (601) may be a camera that captures local image information as a video sequence. The video data may be provided as a number of individual pictures or images that give motion when viewed in sequence. The pictures themselves may be organized as a spatial array of pixels, each pixel may contain one or more samples depending on the sampling structure, color space, etc. being used. Those skilled in the art can easily understand the relationship between pixels and samples. The following description focuses on samples.

[0056] According to some example embodiments, the video encoder (603) may code and compress pictures of a source video sequence into a coded video sequence (643) in real time or under any other time constraint required by the application. Enforcing an appropriate coding rate constitutes one function of the controller (650). In some embodiments, the controller (650) may be operatively coupled to and control other functional units as described below. For simplicity, coupling is not shown. Parameters set by the controller (650) may include rate control related parameters (picture skip, quantization, lambda value for rate distortion optimization techniques...), picture size, Group of Pictures (GOP) layout, maximum motion vector search range, etc. The controller (650) may be configured to have other appropriate functions related to the video encoder (603) optimized for a particular system design.

[0057] In some example embodiments, the video encoder (603) may be configured to operate in a coding loop. As an oversimplified explanation, in one example, the coding loop may include a source coder (630) (e.g., responsible for generating symbols, such as a symbol stream, based on an input picture to be coded and reference picture(s)) and a (local) decoder (633) embedded in the video encoder (603). The decoder (633) reconstructs the symbols to create sample data in a manner similar to that which a (remote) decoder would create even if the embedded decoder 633 processes a video stream coded by the source coder 630 without entropy coding (as the compression between the symbols and the coded video bitstream in entropy coding may be lossless in the video compression techniques considered in the disclosed subject matter). The reconstructed sample stream (sample data) is input to a reference picture memory (634). Since decoding of the symbol stream produces bit-exact results regardless of the location of the decoder (local or remote), the contents in the reference picture memory (634) are also bit-exact between the local and remote encoders. In other words, the predictive part of the encoder "sees" exactly the same sample values ​​as the reference picture samples that the decoder "sees" when using prediction during decoding. This basic principle of reference picture synchrony (and the resulting drift when synchrony cannot be maintained, e.g., due to channel errors) is used to improve coding quality.

[0058] The operation of the "local" decoder (633) may be the same as the operation of a "remote" decoder, such as the video decoder (510), already described in detail above in connection with Figure 5. Referring also briefly to Figure 5, however, because symbols are available and the encoding / decoding of symbols into a coded video sequence by the entropy coder (645) and parser (520) may be lossless, the entropy decoding portion of the video decoder (510), including the buffer memory (515) and parser (520), may not be fully implemented in the local decoder (633) within the encoder.

[0059] At this point, it can be said that any decoder technology, except for parsing / entropy decoding, which may only exist in the decoder, may also necessarily need to exist in the corresponding encoder in substantially the same functional form. For this reason, the subject matter of the disclosure may focus on the decoder operation, which is linked to the decoding part of the encoder. Thus, the description of the encoder technology may be omitted, since it is the opposite of the decoder technology described in general. Only in certain areas or aspects, a more detailed description of the encoder is provided below.

[0060] In operation, in some example implementations, the source coder (630) may perform motion-compensated predictive coding, which predictively codes an input picture with reference to one or more previously coded pictures from a video sequence designated as "reference pictures." In this manner, the coding engine (632) codes color channel differences (or residuals) between pixel blocks of the input picture and pixel blocks of the reference picture(s) that may be selected as the prediction reference(s) to the input picture. The terms "residual" and its adjective form "residual" may be used interchangeably.

[0061] The local video decoder (633) may decode the coded video data of pictures that may be designated as reference pictures based on the symbols created by the source coder (630). The operation of the coding engine (632) may advantageously be a lossy process. If the coded video data may be decoded in a video decoder (not shown in FIG. 6), the reconstructed video sequence may typically be a copy of the source video sequence with some errors. The local video decoder (633) may replicate the decoding process that may be performed by the video decoder on the reference pictures and store the reconstructed reference pictures in a reference picture cache (634). In this way, the video encoder (603) may locally store copies of reconstructed reference pictures that have common content with reconstructed reference pictures obtained by a far-end (remote) video decoder (without transmission errors).

[0062] The predictor (635) may perform a predictive search for the coding engine (632). That is, for a new picture to be coded, the predictor (635) may search the reference picture memory (634) for sample data (as candidate reference pixel blocks) or specific metadata such as reference picture motion vectors, block shapes, etc., that may serve as suitable prediction references for the new picture. The predictor (635) may operate on a sample block by pixel block basis to find suitable prediction references. In some cases, as determined by the search results obtained by the predictor (635), the input picture may have prediction references drawn from multiple reference pictures stored in the reference picture memory (634).

[0063] The controller (650) may manage the coding operations of the source coder (630), including, for example, setting the parameters and subgroup parameters used to encode the video data.

[0064] The output of all the aforementioned functional units may be entropy coded in an entropy coder (645), which converts the symbols produced by the various functional units into a coded video sequence by lossless compression of the symbols according to techniques such as Huffman coding, variable length coding, arithmetic coding, etc.

[0065] The transmitter (640) may buffer the coded video sequence(s) produced by the entropy coder (645) for transmission over a communication channel (660), which may be a hardware / software link to a storage device that stores the encoded video data. The transmitter (640) may merge the coded video data from the video coder (603) with other data to be transmitted, such as coded audio data and / or auxiliary data streams (sources not shown).

[0066] The controller (650) may manage the operation of the video encoder (603). During coding, the controller (650) may assign a particular coded picture type to each coded picture, which may affect the coding technique that may be applied to the respective picture. For example, pictures may often be assigned as one of the following picture types:

[0067] An intra picture (I-picture) may be a picture that can be coded and decoded without using any other picture in a sequence as a source of prediction. Some video codecs allow different types of intra pictures, including, for example, independent decoder refresh ("IDR") pictures. Those skilled in the art are aware of these variations of I-pictures, as well as their respective uses and characteristics.

[0068] A predictive picture (P picture) may be a picture that can be coded and decoded using intra- or inter-prediction, which predicts sample values ​​for each block using at most one motion vector and reference index.

[0069] A bidirectionally predicted picture (B-picture) may be a picture that can be coded and decoded using intra- or inter-prediction, which predicts sample values ​​for each block using at most two motion vectors and reference indexes. Similarly, a multi-prediction picture may use more than two reference pictures and associated metadata for the reconstruction of a single block.

[0070] A source picture may generally be spatially subdivided into multiple sample coding blocks (e.g., blocks of 4x4 samples, 8x8 samples, 4x8 samples, or 16x16 samples each) and coded block by block. A block may be predictively coded with reference to other (already coded) blocks as determined by a coding assignment applied to the respective picture of the block. For example, a block of an I picture may be non-predictively coded or predictively coded with reference to already coded blocks of the same picture (spatial prediction or intra prediction). A pixel block of a P picture may be predictively coded via spatial prediction or via temporal prediction with reference to one previously coded reference picture. A block of a B picture may be predictively coded via spatial prediction or via temporal prediction with reference to one or two previously coded reference pictures. A source picture or an intermediate processed picture may be subdivided into other types of blocks for other purposes. The division of coding blocks and other types of blocks may or may not follow the same scheme, as described in more detail below.

[0071] The video encoder (603) may perform coding operations in accordance with a given video coding technique or standard, such as ITU-T Rec. H.265. In so doing, the video encoder (603) may perform various compression operations, including predictive coding operations that exploit temporal and spatial redundancy in the input video sequence. The coded video data may accordingly conform to a syntax specified by the video coding technique or standard being used.

[0072] In some example embodiments, the transmitter (640) may transmit additional data along with the encoded video. The source coder (630) may include such data as part of the coded video sequence. The additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, SEI messages, VUI parameter set fragments, etc.

[0073] Video may be captured as multiple source pictures (video pictures) in a time sequence. Intra-picture prediction (often abbreviated as intra-prediction) exploits spatial correlation in a given picture, while inter-picture prediction exploits temporal or other correlation between pictures. For example, a particular picture being encoded / decoded, called the current picture, may be divided into blocks. If a block in the current picture is similar to a reference block in a previously coded yet buffered reference picture in the video, it may be coded by a vector, called a motion vector. A motion vector points to a reference block in a reference picture and may have a third dimension that identifies the reference picture if multiple reference pictures are used.

[0074] In some exemplary embodiments, bi-prediction techniques can be used for inter-picture prediction. According to such bi-prediction techniques, two reference pictures, such as a first reference picture and a second reference picture, are used, both of which precede the current picture in a video in decoding order (but may be in the past or future, respectively, in display order). A block in the current picture can be coded by a first motion vector that points to a first reference block in the first reference picture and a second motion vector that points to a second reference block in the second reference picture. A block can be jointly predicted by a combination of the first reference block and the second reference block.

[0075] Additionally, merge mode techniques may be used to improve coding efficiency in inter-picture prediction.

[0076] According to some example embodiments of the present disclosure, prediction, such as inter-picture prediction and intra-picture prediction, is performed on a block-by-block basis. For example, a picture in a sequence of video pictures is divided into coding tree units (CTUs) for compression, and the CTUs in a picture may have the same size, such as 64×64 pixels, 32×32 pixels, or 16×16 pixels. In general, a CTU may include three parallel coding tree blocks (CTBs), i.e., one luma CTB and two chroma CTBs. Each CTU may be recursively quadtree partitioned into one or more coding units (CUs). For example, a CTU of 64×64 pixels may be partitioned into one CU of 64×64 pixels or into four CUs of 32×32 pixels. Each of one or more of the 32×32 blocks may be further partitioned into four CUs of 16×16 pixels. In some example embodiments, each CU may be analyzed during encoding to determine a prediction type for that CU among various prediction types, such as inter prediction type and intra prediction type. A CU may be divided into one or more prediction units (PUs) according to temporal predictability and / or spatial predictability. In general, each PU includes one luma prediction block (PB) and two chroma PBs. In one embodiment, prediction operations in coding (encoding / decoding) are performed in units of prediction blocks. The division of a CU into PUs (or PBs of different color channels) may be performed in various spatial patterns. A luma PB or a chroma PB may include a matrix of sample values ​​(e.g., luma values), such as 8×8 pixels, 16×16 pixels, 8×16 pixels, 16×8 pixels, etc.

[0077] 7 shows a diagram of a video encoder (703) according to another exemplary embodiment of this disclosure. The video encoder (703) is configured to receive a processed block (e.g., a predictive block) of sample values ​​in a current video picture in a sequence of video pictures and to encode the processed block into a coded picture that is part of a coded video sequence. The exemplary video encoder (703) may be used in place of the example video encoder (403) of FIG. 4.

[0078] For example, the video encoder (703) receives a matrix of sample values ​​of a processing block, such as a prediction block of 8x8 samples. The video encoder (703) then determines whether the processing block is best coded using intra-mode, inter-mode, or bi-predictive mode, for example using rate-distortion optimization (RDO). If it is determined that the processing block is coded in intra-mode, the video encoder (703) may encode the processing block into a coded picture using intra-prediction techniques, and if it is determined that the processing block is coded in inter-mode or bi-predictive mode, the video encoder (703) may encode the processing block into a coded picture using inter-prediction techniques or bi-prediction techniques, respectively. In some exemplary embodiments, a merge mode may be used as a sub-mode of inter-picture prediction, in which a motion vector is derived from one or more motion vector predictors without the aid of an external coded motion vector component of the predictor. In some other exemplary embodiments, there may be a motion vector component applicable to the current block. Thus, the video encoder (703) may include components not explicitly shown in FIG. 7, such as a mode decision module, to determine the prediction mode of a processing block.

[0079] In the example of FIG. 7, the video encoder (703) includes an inter-encoder (730), an intra-encoder (722), a residual calculator (723), a switch (726), a residual encoder (724), a general-purpose controller (721), and an entropy encoder (725), coupled to each other as shown in the exemplary arrangement of FIG.

[0080] The inter-encoder (730) is configured to receive samples of a current block (e.g., a processing block), compare the block to one or more reference blocks in a reference picture (e.g., blocks in previous and subsequent pictures in display order), generate inter-prediction information (e.g., a description of redundancy information, motion vectors, merge mode information according to an inter-encoding technique), and calculate an inter-prediction result (e.g., a predicted block) based on the inter-prediction information using any suitable technique. In some examples, the reference picture is a decoded reference picture that has been decoded based on encoded video information using a decoding unit 633 incorporated in the example encoder 620 of FIG. 6 (shown as a residual decoder 728 of FIG. 7, as described in more detail below).

[0081] The intra encoder (722) is configured to receive samples of a current block (e.g., a processing block), compare the block to already coded blocks in the same picture, generate transformed quantized coefficients, and possibly also generate intra prediction information (e.g., intra prediction direction information according to one or more intra encoding techniques). The intra encoder (722) may calculate an intra prediction result (e.g., a predicted block) based on the intra prediction information and reference blocks in the same picture.

[0082] The generic controller (721) may be configured to determine generic control data and control other components of the video encoder (703) based on the generic control data. In one example, the generic controller (721) determines a prediction mode of the block and provides a control signal to the switch (726) based on the prediction mode. For example, if the prediction mode is an intra mode, the generic controller (721) controls the switch (726) to select an intra mode result for use by the residual calculator (723) and controls the entropy encoder (725) to select intra prediction information and include the intra prediction information in the bitstream, and if the predication mode of the block is an inter mode, the generic controller (721) controls the switch (726) to select an inter prediction result for use by the residual calculator (723) and controls the entropy encoder (725) to select inter prediction information and include the inter prediction information in the bitstream.

[0083] The residual calculator (723) may be configured to calculate a difference (residual data) between a received block and a prediction result for a block selected from the intra-encoder (722) or the inter-encoder (730). The residual encoder (724) may be configured to encode the residual data to generate transform coefficients. For example, the residual encoder (724) may be configured to transform the residual data from the spatial domain to the frequency domain to generate transform coefficients. The transform coefficients then undergo a quantization process to obtain quantized transform coefficients. In various exemplary embodiments, the video encoder (703) also includes a residual decoder (728). The residual decoder (728) is configured to perform an inverse transform and generate decoded residual data. The decoded residual data can be used by the intra-encoder (722) and the inter-encoder (730) as appropriate. For example, the inter-encoder (730) may generate decoded blocks based on the decoded residual data and the inter-prediction information, and the intra-encoder (722) may generate decoded blocks based on the decoded residual data and the intra-prediction information. The decoded blocks may be appropriately processed to generate decoded pictures, which may be buffered in a memory circuit (not shown) and used as reference pictures.

[0084] The entropy encoder (725) may be configured to format a bitstream to include the encoded block and perform entropy coding. The entropy encoder (725) may be configured to include various information in the bitstream. For example, the entropy encoder (725) may be configured to include general control data, selected prediction information (e.g., intra-prediction information or inter-prediction information), residual information, and other suitable information in the bitstream. Residual information may not be present when coding a block in a merged sub-mode of either an inter mode or a bi-prediction mode.

[0085] 8 shows a diagram of an example video decoder (810) according to another embodiment of the present disclosure. The video decoder (810) is configured to receive coded pictures that are part of a coded video sequence and to decode the coded pictures to generate reconstructed pictures. In one example, the video decoder (810) may be used in place of the example video decoder (410) of FIG. 4.

[0086] In the example of FIG. 8, the video decoder (810) includes an entropy decoder (871), an inter-decoder (880), a residual decoder (873), a reconstruction module (874), and an intra-decoder (872), coupled to each other as shown in the exemplary arrangement of FIG. 8.

[0087] The entropy decoder (871) may be configured to reconstruct from the coded picture certain symbols that represent syntax elements of which the coded picture is composed. Such symbols may include, for example, prediction information (e.g., intra-mode, inter-mode, bi-predictive mode, merged sub-mode, or another sub-mode) that may identify the mode in which the block is coded, certain samples or metadata used for prediction by the intra-decoder (872) or inter-decoder (880), residual information in the form of quantized transform coefficients, etc. In one example, if the prediction mode is an inter-mode or bi-predictive mode, the inter-prediction information is provided to the inter-decoder (880), and if the prediction type is an intra-prediction type, the intra-prediction information is provided to the intra-decoder (872). The residual information may undergo inverse quantization and is provided to the residual decoder (873).

[0088] The inter decoder (880) may be configured to receive the inter prediction information and generate inter prediction results based on the inter prediction information.

[0089] The intra decoder (872) may be configured to receive intra prediction information and generate a prediction result based on the intra prediction information.

[0090] The residual decoder (873) may be configured to perform inverse quantization to extract inverse quantized transform coefficients and process the inverse quantized transform coefficients to transform the residual from the frequency domain to the spatial domain. The residual decoder (873) may also utilize certain control information that may be provided by the entropy decoder (871) (to include a quantization parameter (QP)) (a data path is not shown as this information may be only low-volume control information).

[0091] The reconstruction module (874) may be configured to combine, in the spatial domain, the residual as output by the residual decoder (873) and the prediction result (possibly as output by an inter-prediction module or an intra-prediction module) to form a reconstructed block that forms part of a reconstructed picture as part of the reconstructed video. It should be noted that other suitable operations, such as a deblocking operation, may be performed to improve visual quality.

[0092] It should be noted that the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) can be implemented using any suitable technology. In some exemplary embodiments, the video encoders (403), (603), and (703) and the video decoders (410), (510), and (810) can be implemented using one or more integrated circuits. In another embodiment, the video encoders (403), (603), and (603) and the video decoders (410), (510), and (810) can be implemented using one or more processors executing software instructions.

[0093] Turning to block partitioning for coding and decoding, a general partitioning may start from a base block and follow a predefined set of rules, a specific pattern, a partitioning tree, or any partitioning structure or scheme. The partitioning may be hierarchical and recursive. After partitioning or dividing the base block into partitions according to any of the exemplary partitioning procedures described below or other procedures, or combinations thereof, a final set of partitions or coding blocks may be obtained. Each of these partitions may be at one of various partitioning levels in the partitioning hierarchy and may be of various shapes. Each of the partitions may be referred to as a coding block (CB). In various exemplary partitioning implementations described further below, each resulting CB may be of any of the allowed sizes and partitioning levels. Such partitions are referred to as coding blocks because they may form the units for which some basic coding / decoding decisions are made and coding / decoding parameters may be optimized, determined, and signaled in the encoded video bitstream. The highest or deepest level in the final partition represents the depth of the coding block partitioning tree structure. The coding blocks may be luma coding blocks or chroma coding blocks. The CB tree structure for each color may be called a coding block tree (CBT).

[0094] The coding blocks of all color channels may be collectively referred to as a coding unit (CU). The hierarchical structure of all color channels may be collectively referred to as a coding tree unit (CTU). The division pattern or structure of various color channels within a CTU may or may not be the same.

[0095] In some implementations, the partition tree schemes or structures used for the luma and chroma channels may not be the same. In other words, the luma and chroma channels may have separate coding tree structures or patterns. Furthermore, whether the luma and chroma channels use the same or different coding partition tree structures, and the actual coding partition tree structure to be used, may depend on whether the slice being coded is a P slice, a B slice, or an I slice. For example, for an I slice, the chroma and luma channels may have separate coding partition tree structures or coding partition tree structure modes, whereas for a P slice or a B slice, the luma and chroma channels may share the same coding partition tree scheme. When separate coding partition tree structures or modes are applied, the luma channel may be partitioned into CBs by one coding partition tree structure, and the chroma channels may be partitioned into chroma CBs by another coding partition tree structure.

[0096] In some example implementations, a predefined partitioning pattern may be applied to the base block. As shown in FIG. 9, an example four-way partitioning tree may start at a first predefined level (e.g., 64×64 block level or other size as the base block size), and the base block may be partitioned hierarchically down to a predefined lowest level (e.g., 4×4 level). For example, the base block may follow four predefined partitioning options or patterns shown by 902, 904, 906, and 908, and the partition designated as R allows for recursive partitioning in that the same partitioning options shown in FIG. 9 may be repeated at a lower scale down to the lowest level (e.g., 4×4 level). In some implementations, additional restrictions may be applied to the partitioning scheme of FIG. 9. In the implementation of FIG. 9, rectangular partitions (e.g., 1:2 / 2:1 rectangular partitions) may be allowed but not recursive, while square partitions are allowed to be recursive. Subsequent partitioning of FIG. 9 by recursion generates a final set of coding blocks, if necessary. A coding tree depth may be further defined to indicate the division depth from the root node or root block. For example, the coding tree depth of the root node or root block of a 64×64 block may be set to 0, and after the root block is further divided one time according to FIG. 9, the coding tree depth increases by 1. The maximum or deepest level from the 64×64 base block to the 4×4 minimum partition is 4 (starting from level 0) in the above scheme. Such a division scheme may be applied to one or more of the color channels. Each color channel may be independently divided according to the scheme of FIG. 9 (e.g., for each of the color channels at each hierarchical level, a division pattern or option in the predefined pattern may be determined independently). Alternatively, two or more of the color channels may share the same hierarchical pattern tree of FIG. 9 (e.g., for two or more color channels at each hierarchical level, the same division pattern or option in the predefined pattern may be selected).

[0097] FIG. 10 illustrates another exemplary predefined partitioning pattern that allows recursive partitioning to form a partitioning tree. As illustrated in FIG. 10, an exemplary 10-way partitioning structure or pattern may be predefined. The root block may start from a predefined level (e.g., from a base block at a 128×128 level or a 64×64 level). The exemplary partitioning structure of FIG. 10 includes various 2:1 / 1:2 and 4:1 / 1:4 rectangular partitions. A partition type having three subpartitions, shown at 1002, 1004, 1006, and 1008 in the second column of FIG. 10, may be referred to as a “T” partition. The “T” partitions 1002, 1004, 1006, and 1008 may be referred to as a left T, an upper T, a right T, and a lower T. In some exemplary implementations, none of the rectangular partitions of FIG. 10 may be further subdivided. A coding tree depth may be further defined to indicate the partitioning depth from the root node or root block. For example, the coding tree depth of a root node or block, e.g., a 128x128 block, may be set to 0, and the coding tree depth increases by 1 after the root block is further split according to FIG. 10 one more time. In some implementations, only the all-square partitions of 1010 may be allowed to recursively split to the next level of the split tree following the pattern of FIG. 10. In other words, recursive splitting is not allowed for the square partitions in the T-shaped patterns 1002, 1004, 1006, and 1008. The splitting procedure following FIG. 10 by recursion generates a final set of coding blocks, as needed. Such a scheme may be applied to one or more of the color channels. In some implementations, more flexibility may be added to the use of partitions less than 8x8 levels. For example, 2x2 chroma inter prediction may be used in certain cases.

[0098] In some other example implementations of coding block partitioning, a quadtree structure may be used to partition a base block or an intermediate block into quadtree partitions. Such quadtree partitioning may be applied hierarchically and recursively to any square partition. Whether a base block or intermediate block or partition is further quadtree partitioned may be adapted to various local characteristics of the base block or intermediate block / partition. The quadtree partitioning at the picture boundary may be further adapted. For example, an implicit quadtree partitioning may be performed at the picture boundary such that a block continues to be quadtree partitioned until its size fits into the picture boundary.

[0099] In some other example implementations, a hierarchical bisection from the base block may be used. In such a scheme, the base block or mid-level block may be divided into two partitions. The bisection may be either horizontal or vertical. For example, a horizontal bisection may divide the base block or mid-block into equal left and right partitions. Similarly, a vertical bisection may divide the base block or mid-block into equal top and bottom partitions. Such bisection may be hierarchical and recursive. A determination may be made for each of the base block or mid-block whether the bisection scheme should continue and, if the scheme continues further, whether a horizontal or vertical bisection should be used. In some implementations, further division may stop at a predefined minimum partition size (in one or both dimensions). Alternatively, further division may stop when a predefined division level or depth from the base block is reached. In some implementations, the aspect ratio of the partitions may be limited. For example, the aspect ratio of the partitions may be equal to or greater than 1:4 (or greater than 4:1). Therefore, a vertical strip partition with a vertical to horizontal aspect ratio of 4:1 can only be further divided vertically into upper and lower partitions each having a vertical to horizontal aspect ratio of 2:1.

[0100] In yet some other examples, a three-way division scheme may be used to divide the base block or any intermediate blocks, as shown in FIG. 13. The ternary pattern may be implemented vertically, as shown at 1302 in FIG. 13, or horizontally, as shown at 1304 in FIG. 13. The exemplary division ratio in FIG. 13 is shown as 1:2:1 either vertically or horizontally, but other ratios may be predefined. In some implementations, two or more different ratios may be predefined. Such a three-way division scheme may be used to complement a quadtree or bipartition structure, in that such a ternary tree division may capture an object located at a block center in one contiguous partition, whereas quadtrees and bipartites will always divide along the block center, thus dividing the object into separate partitions. In some implementations, the width and height of the partitions of the exemplary ternary tree are always powers of two to avoid further transformations.

[0101] The above partitioning schemes may be combined in any manner at different partitioning levels. As an example, the quadtree partitioning and bipartitioning schemes described above may be combined to partition a base block into a quadtree-binary tree (QTBT) structure. In such a scheme, a base block or intermediate blocks / partitions, if specified, may be quadtree partitioned or bipartitioned according to a set of predefined conditions. A specific example is shown in FIG. 14.

[0102] FIG. 14 illustrates an example partition and tree of a quad-tree plus binary tree (QTBT) structure. The QTBT structure may not have a similar concept of multiple partition types and may eliminate the separation of the concepts of CU, PU, ​​and TU. The QTBT structure may support increased flexibility in CU partition shapes. In some embodiments of the QTBT block structure, the CU may have a square or rectangular shape.

[0103] In the example of FIG. 14, the base block is first quadtree partitioned into four partitions, as shown by 1402, 1404, 1406, and 1408. Each of the resulting partitions is then either quadtree partitioned into four further partitions at the next level (as in 1408), or bisected into two further partitions (e.g., horizontally or vertically, as in 1402 and 1406, both of which are symmetric), or not partitioned (as in 1404). Bisection or quadtree partitioning may be allowed recursively for square partitions, as shown by the overall example partitioning pattern in 1410 and the corresponding tree structure / representation in 1420, where solid lines represent quadtree partitioning and dashed lines represent bisection. A flag may be used for each bisection node (non-leaf binary partition) to indicate whether the bisection is horizontal or vertical. For example, as shown in 1420, which corresponds to the partitioning structure of 1410, a flag "0" may represent a horizontal bisection and a flag "1" may represent a vertical bisection. In the case of a quadtree partition, there is no need to indicate the partition type, since a quadtree partition always divides a block or partition both horizontally and vertically to generate four sub-blocks / partitions of equal size. In some implementations, a flag "1" may represent a horizontal bisection and a flag "0" may represent a vertical bisection.

[0104] As shown in FIG. 14, a coding tree unit (CTU) is first divided by a quadtree structure. The quadtree leaf node is further divided by a binary tree structure. The binary tree division may have two division types: symmetric horizontal division and symmetric vertical division. The binary tree leaf node is called a coding unit (CU), and its segmentation may be used for prediction and transformation processes without further division. The CU, PU, ​​and TU may have the same block size in the QTBT coding block structure. In JEM, a CU may include coding blocks (CBs) of different color components (e.g., one CU includes one luma CB and two chroma CBs for P slices and B slices in 4:2:0 chroma format). In other embodiments, a CU may include a CB of a single component (e.g., one CU includes one luma CB or two chroma CBs for I slices).

[0105] In some example implementations of QTBT, the quadtree and bisection rule sets may be represented by the following predefined parameters and corresponding functions associated with them: CTU size: Size of the root node of the quadtree (size of the base block) MinQTSize: The minimum allowable quadtree leaf node size. MaxBTSize: The maximum allowable binary tree root node size MaxBTDepth: Maximum allowed binary tree depth MinBTSize: The minimum allowable binary tree leaf node size. In some example implementations of the QTBT partitioning structure, the CTU size may be set as 128×128 luma samples with two corresponding 64×64 blocks of chroma samples (when the example chroma subsampling is considered and used), the MinQTSize may be set as 16×16, the MaxBTSize may be set as 64×64, the MinBTSize may be set as 4×4 (for both width and height), and the MaxBTDepth may be set as 4. Quad-tree partitioning may be applied to the CTU first to generate quad-tree leaf nodes. The quad-tree leaf nodes may have a size from its minimum allowable size of 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If the node is 128×128, it will not be split by the binary tree first because its size exceeds MaxBTSize (i.e., 64×64). Otherwise, the node that does not exceed MaxBTSize can be split by the binary tree. In the example of FIG. 14, the base block is 128×128. The base block can only be quadtree partitioned according to a predefined set of rules. The base block has a partition depth of 0. Each of the resulting four partitions is 64×64, not exceeding MaxBTSize, and may be further quadtree or bintree partitioned at level 1. The process continues. When the bintree depth reaches MaxBTDepth (i.e., 4), no further partitions may be considered. When the width of a bintree node is equal to MinBTSize (i.e., 4), no further horizontal partitions may be considered. Similarly, when the height of a bintree node is equal to MinBTSize, no further vertical partitions may be considered.

[0106] In some example implementations, the above QTBT scheme may be configured to support flexibility for luma and chroma to have the same or separate QTBT structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same QTBT structure. However, for I slices, the luma CTB may be divided into CBs by a QTBT structure, and the chroma CTB may be divided into chroma CBs by another QTBT structure. This means that CUs may be used to refer to different color channels in an I slice, for example, an I slice may consist of a coding block of a luma component or a coding block of two chroma components, and a CU in a P slice or B slice may consist of coding blocks of all three color components.

[0107] Figure 14 shows an example of block partitioning by using QTBT (left side of Figure 14) and the corresponding tree representation (right side of Figure 14). The solid lines indicate quadtree partitioning and the dotted lines indicate binary tree partitioning. At each partition (i.e., non-leaf) node of the binary tree, one flag is signaled to indicate which partition type (i.e., horizontal or vertical) is used, with 0 indicating horizontal partitioning and 1 indicating vertical partitioning. In the case of quadtree partitioning, there is no need to indicate the partition type, since the quadtree partitioning splits the block both horizontally and vertically to generate four sub-blocks of equal size.

[0108] In some other implementations, the QTBT scheme may be complemented with the ternary scheme described above. Such implementations may be referred to as multi-type tree (MTT) structures. For example, in addition to the bisection of the nodes, one of the trisection patterns of FIG. 13 may be selected. In some implementations, only square nodes may undergo trisection. An additional flag may be used to indicate whether the trisection is horizontal or vertical.

[0109] Two-level or multi-level tree designs, such as the QTBT implementation and the QTBT implementation complemented by trisection, are often motivated primarily by reducing complexity. In theory, the complexity of traversing a tree is T D where T represents the number of split types and D is the depth of the tree. Tradeoffs can be made by using multiple types (T) while reducing the depth (D).

[0110] In addition, the QTBT scheme supports the flexibility for luma and chroma to have separate QTBT structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU share the same QTBT structure. However, for I slices, the luma CTB is divided into CUs by a QTBT structure, and the chroma CTB is divided into chroma CUs by another QTBT structure. In this example, a CU in an I slice includes a coding block of a luma component or a coding block of two chroma components, and a CU in a P slice or B slice includes coding blocks of all three color components. In HEVC, inter prediction of small blocks may be restricted such that bi-prediction is not supported for 4x8 and 8x4 blocks, and inter prediction is not supported for 4x4 blocks, in order to reduce memory access for motion compensation. In the QTBT implemented in JEM-7.0, these restrictions can be removed.

[0111] In some implementations, the CB may be further divided. For example, the CB may be further divided into multiple prediction blocks (PBs) for the purpose of intra-frame or inter-frame prediction during the coding and decoding processes. In other words, the CB may be further divided into different sub-partitions, where individual prediction decisions / configurations may be made. In parallel, the CB may be further divided into multiple transform blocks (TBs) for the purpose of describing the level at which the transformation or inverse transformation of the video data is performed. The division scheme of the CB into PBs and TBs may be the same or different. For example, each division scheme may be performed using a unique procedure based on, for example, various characteristics of the video data. The division scheme of the PBs and TBs may be independent in some exemplary implementations. The division schemes and boundaries of the PBs and TBs may be correlated in some other exemplary implementations. In some implementations, for example, the TBs may be divided after the PB division, and in particular, each PB may be determined following the division of the coding block, and then further divided into one or more TBs. For example, in some implementations, the PB may be divided into one, two, four, or some other number of TBs.

[0112] In some implementations, the luma and chroma channels may be treated differently for splitting base blocks into coding blocks and further into predictive and / or transform blocks. For example, in some implementations, splitting of coding blocks into predictive and / or transform blocks may be allowed for the luma channel, whereas such splitting of coding blocks into predictive and / or transform blocks is not allowed for the chroma channel(s). In such implementations, transform and / or prediction of luma blocks may thus be performed only at the coding block level. As another example, the minimum transform block size of the luma and chroma channel(s) may be different, e.g., coding blocks of the luma channel may be allowed to be split into smaller transform and / or predictive blocks than the chroma channels. As yet another example, the maximum depth of splitting of coding blocks into transform and / or predictive blocks may be different between the luma and chroma channels, e.g., coding blocks of the luma channel may be allowed to be split into deeper transform and / or predictive blocks than the chroma channels. As a specific example, a luma coding block may be partitioned into transform blocks of multiple sizes that can be represented by a recursive partitioning down up to two levels, and transform block shapes such as square, 2:1 / 1:2, and 4:1 / 1:4, as well as transform block sizes from 4×4 to 64×64 may be allowed. However, for chroma blocks, only the largest possible transform block designated for the luma block may be allowed.

[0113] In some example implementations for partitioning a coding block into PBs, the depth, shape, and / or other characteristics of the PB partition may depend on whether the PB is intra-coded or inter-coded.

[0114] The division of the coding block (or prediction block) into transform blocks may be performed in various exemplary manners, including but not limited to quadtree division and predefined pattern division, recursively or non-recursively, further considering transform blocks at the boundaries of the coding block or prediction block. In general, the resulting transform blocks may be at different division levels, may not be of the same size, and may not be square in shape (e.g., they may be rectangular with some allowed size and aspect ratio). Further examples are described in more detail below in connection with Figures 15, 16, and 17.

[0115] However, in some other implementations, the CB obtained through any of the above partitioning schemes may be used as a basic or minimum coding block for prediction and / or transformation. In other words, no further partitioning is performed for the purpose of performing inter-prediction / intra-prediction and / or transformation. For example, the CB obtained from the above QTBT scheme may be directly used as a unit for performing prediction. Specifically, such a QTBT structure removes the concept of multiple partition types, i.e., removes the separation of CU, PU, ​​and TU, and supports more flexibility for CU / CB partition shapes as described above. In such a QTBT block structure, the CU / CB can have either a square or rectangular shape. The leaf nodes of such a QTBT are used as units for prediction and transformation processing without further partitioning. This means that the CU, PU, ​​and TU have the same block size in such an exemplary QTBT coding block structure.

[0116] The various CB division schemes described above, as well as further division of the CB into PB and / or TB (including no PB / TB division), may be combined in any manner. The following specific implementations are provided as non-limiting examples.

[0117] A specific exemplary implementation of the division of coding blocks and transform blocks is described below. In one such exemplary implementation, a base block may be divided into coding blocks using a recursive quadtree division or a predefined division pattern described above (such as the division patterns of Figures 9 and 10). At each level, whether further quadtree division of a particular partition should be continued may be determined by local video data characteristics. The resulting CBs may be of various sizes of CBs at various quadtree division levels. The decision of whether to code a picture area using inter-picture (temporal) prediction or intra-picture (spatial) prediction may be made at the CB level (or CU level for all three color channels). Each CB may be further divided into one, two, four, or other number of PBs according to a predefined PB division type. Within one PB, the same prediction process may be applied, and related information may be transmitted to the decoder on a PB basis. After obtaining the residual block by applying a prediction process based on the PB division type, the CB can be divided into TBs according to another quadtree structure similar to the coding tree of the CB. In this particular implementation, the CB or TB may not be limited to a square. Furthermore, in this particular example, the PB may be square or rectangular in inter prediction, and only square in intra prediction. The coding block may be divided into, for example, four square TBs. Each TB may be further divided recursively (using quadtree division) into smaller TBs called residual quadtrees (RQTs).

[0118] Another exemplary implementation for splitting a base block into CB, PB, and / or TB is further described below. For example, instead of using multiple partition unit types such as the types shown in FIG. 9 or FIG. 10, a quadtree with nested multi-type trees using bipartition and tripartition segmentation structures (e.g., QTBT or QTBT with tripartition described above) may be used. Separation of CB, PB, and TB (i.e., splitting CB into PB and / or TB, and splitting PB into TB) may be abandoned except when required for CBs with a size too large for the maximum transform length, which may require further splitting. This exemplary splitting scheme may be designed to support more flexibility on CB splitting shape, so that prediction and transformation can both be performed at the CB level without further splitting. In such a coding tree structure, the CB may have either a square or rectangular shape. Specifically, the coding tree block (CTB) may first be split by a quadtree structure. Then, the quadtree leaf nodes may be further split by a nested multi-type tree structure. An example of a nested multi-type tree structure using bisection or trisection is shown in Figure 11. Specifically, the exemplary multi-type tree structure of Figure 11 includes four split types called vertical bisection (SPLIT_BT_VER) (1102), horizontal bisection (SPLIT_BT_HOR) (1104), vertical trisection (SPLIT_TT_VER) (1106), and horizontal trisection (SPLIT_TT_HOR) (1108). CB then corresponds to the leaf of the multi-type tree. In this exemplary implementation, as long as CB is not too large for the maximum transform length, this segmentation is used for both prediction and transform processing without further splitting. This means that in most cases, CB, PB, and TB have the same block size in the quadtree with nested multi-type tree coding block structure. An exception occurs when the maximum supported transform length is smaller than the width or height of the color components of CB.In some implementations, in addition to bisection or trisection, the nested pattern of FIG. 11 may further include a quadtree division.

[0119] One specific example of a quadtree with nested multi-type tree coding block structure of block partitioning (including quadtree partitioning, bisection, and trisection options) for one base block is shown in FIG. 12. More specifically, FIG. 12 shows that a base block 1200 is quadtree partitioned into four square partitions 1202, 1204, 1206, and 1208. A decision to further use the multi-type tree structure and quadtree of FIG. 11 for further partitioning is made for each of the quadtree partitioned partitions. In the example of FIG. 12, partition 1204 is not further partitioned. Partition 1202 and partition 1208 each adopt another quadtree partitioning. In partition 1202, the second level quadtree partitioned top left, top right, bottom left, and bottom right partitions adopt third level partitioning of quadtree, horizontal bisection 1104 of FIG. 11, non-partition, and horizontal trisection 1108 of FIG. 11, respectively. Partition 1208 adopts another quadtree division, and the second level quadtree divided top-left, top-right, bottom-left, and bottom-right partitions adopt third level division of vertical third division 1106, unsplit, unsplit, and horizontal bisection 1104 of FIG. 11, respectively. Two of the subpartitions of the top-left partition of the third level of 1208 are further divided according to horizontal bisection 1104 and horizontal bisection 1108 of FIG. 11, respectively. Partition 1206 adopts a second level division pattern into two partitions following vertical bisection 1102 of FIG. 11, and the two partitions are further divided at the third level according to horizontal third division 1108 and vertical bisection 1102 of FIG. 11. A fourth level division is further applied to one of them according to horizontal bisection 1104 of FIG. 11.

[0120] In the above specific example, the maximum luma transform size may be 64 x 64, and the maximum supported chroma transform size may be different from the luma, e.g., 32 x 32. Even if the above example CB of Figure 12 is not generally further divided into smaller PBs and / or TBs, when the width or height of a luma coding block or a chroma coding block is larger than the maximum transform width or maximum transform height, the luma coding block or the chroma coding block may be automatically divided in the horizontal and / or vertical directions to satisfy the transform size constraints in that direction.

[0121] In the specific example of the above division of base blocks into CBs, as described above, the coding tree scheme may support the ability for luma and chroma to have separate block tree structures. For example, for P slices and B slices, the luma CTB and chroma CTB in one CTU may share the same coding tree structure. For I slices, for example, luma and chroma may have separate coding block tree structures. When separate block tree structures are applied, the luma CTB may be divided into luma CBs by one coding tree structure, and the chroma CTB may be divided into chroma CBs by another coding tree structure. This means that a CU in an I slice can consist of a coding block of a luma component or a coding block of two chroma components, and a CU in a P slice or B slice always consists of coding blocks of all three color components unless the video is monochrome.

[0122] When a coding block is further divided into multiple transform blocks, the transform blocks therein may be ordered in the bitstream according to various orders or scanning schemes. Exemplary implementations for dividing a coding block or a predictive block into transform blocks and the coding order of the transform blocks are described in further detail below. In some exemplary implementations, as described above, the transform division may support transform blocks of multiple shapes, e.g., 1:1 (square), 1:2 / 2:1, and 1:4 / 4:1, with transform block sizes ranging from, e.g., 4×4 to 64×64. In some implementations, when a coding block is smaller than or equal to 64×64, the transform block division may be applied only to the luma component, such that for chroma blocks, the transform block size is identical to the coding block size. Otherwise, if the width or height of the coding block is greater than 64, then both the luma coding block and the chroma coding block may be implicitly divided into transform blocks that are multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32), respectively.

[0123] In some example implementations of transform block partitioning, for both intra-coded and inter-coded blocks, the coding block may be further partitioned into multiple transform blocks with a partition depth up to a predefined number of levels (e.g., two levels). The partition depth and size of the transform block may be related. For some example implementations, the mapping from the transform size of the current depth to the transform size of the next depth is shown below in Table 1.

[0124] [Table 1]

[0125] Based on the example mapping of Table 1, for a 1:1 square block, the next level transform partitioning may create four 1:1 square sub-transform blocks. The transform partitioning may stop at, for example, 4×4. Thus, a transform size of the current depth of 4×4 corresponds to the same size of 4×4 of the next depth. In the example of Table 1, for a 1:2 / 2:1 non-square block, the next level transform partitioning may create two 1:1 square sub-transform blocks, whereas for a 1:4 / 4:1 non-square block, the next level transform partitioning may create two 1:2 / 2:1 sub-transform blocks.

[0126] In some example implementations, further restrictions may be applied on transform block partitioning for the luma components of intra-coded blocks. For example, for each level of transform partitioning, all sub-transform blocks may be restricted to have equal size. For example, for a 32×16 coding block, level 1 transform partitioning creates two 16×16 sub-transform blocks, and level 2 transform partitioning creates eight 8×8 sub-transform blocks. In other words, to keep the transform units equal in size, a second level partitioning must be applied to all first level sub-blocks. An example of transform block partitioning for an intra-coded square block according to Table 1 is shown in FIG. 15 with the coding order indicated by the arrows. Specifically, 1502 shows a square coding block. The first level partitioning according to Table 1 into four equal-sized transform blocks is shown in 1504 with the coding order indicated by the arrows. The second level partitioning of all first level equal-sized blocks according to Table 1 into 16 equal-sized transform blocks is shown in 1506 with the coding order indicated by the arrows.

[0127] In some example implementations, the above restrictions on intra-coding may not apply to the luma components of an inter-coded block. For example, after the first level of transform partitioning, any one of the sub-transform blocks may be further partitioned independently at another level. The resulting transform blocks may or may not be of the same size. An example partitioning of an inter-coded block into transform blocks according to their coding order is shown in FIG. 16. In the example of FIG. 16, an inter-coded block 1602 is partitioned into transform blocks at two levels according to Table 1. At the first level, the inter-coded block is partitioned into four transform blocks of equal size. Then, only one of the four transform blocks (but not all of them) is further partitioned into four sub-transform blocks, resulting in a total of seven transform blocks with two different sizes, as indicated by 1604. An example coding order of these seven transform blocks is indicated by an arrow at 1604 in FIG. 16.

[0128] In some example implementations, for the chroma component(s), some further restrictions on the transform blocks may be applied. For example, for the chroma component(s), the transform block size may be as large as the coding block size, but cannot be smaller than a predefined size, e.g., 8×8.

[0129] In some other example implementations, for coding blocks with either width (W) or height (H) greater than 64, both luma and chroma coding blocks may be implicitly divided into multiples of min(W,64)×min(H,64) and min(W,32)×min(H,32), respectively, where in this disclosure, “min(a,b)” may return the smaller value between a and b.

[0130] Figure 17 further illustrates another alternative exemplary scheme for splitting a coding block or a predictive block into transform blocks. As illustrated in Figure 17, instead of using recursive transform partitioning, a set of predefined partition types may be applied to a coding block according to its transform type. In the particular example illustrated in Figure 17, one of six exemplary partition types may be applied to split a coding block into a varying number of transform blocks. Such a scheme for generating transform block partitions may be applied to either a coding block or a predictive block.

[0131] More specifically, the partitioning scheme of FIG. 17 provides up to six exemplary partitioning types for any given transform type (transform type refers to the type of primary transform, such as, for example, ADST, etc.). In this scheme, every coding block or predictive block may be assigned a transform partitioning type, for example, based on a rate-distortion cost. In one example, the transform partitioning type assigned to a coding block or predictive block may be determined based on the transform type of the coding block or predictive block. As shown by the six transform partitioning types illustrated in FIG. 17, a particular transform partitioning type may correspond to the partitioning size and pattern of the transform block. The correspondence between various transform types and various transform partitioning types may be predefined. An example is shown below, where the capitalized labels indicate the transform partitioning types that may be assigned to a coding block or predictive block based on a rate-distortion cost. ·PARTITION_NONE: Allocate transformation size equal to block size. ·PARTITION_SPLIT: Allocates a transformation size of 1 / 2 the block size in width and 1 / 2 the block size in height. ·PARTITION_HORZ: Allocates a transformation size with width equal to the block size and height equal to 1 / 2 the block size. ·PARTITION_VERT: Allocates a transformation size with a width half the block size and a height equal to the block size. ·PARTITION_HORZ4: Allocates a transformation size with width equal to the block size and height equal to 1 / 4 of the block size. ·PARTITION_VERT4: Allocates a transformation size with a width of 1 / 4 of the block size and a height equal to the block size.

[0132] In the above example, the transform split types shown in Figure 17 include uniform transform sizes for all split transform blocks. This is not a limitation but merely an example. In some other implementations, mixed transform block sizes may be used for split transform blocks in a particular split type (or pattern).

[0133] The PBs (or CBs, also called PBs when not further divided into predictive blocks) obtained from any of the above partitioning schemes can then become individual blocks for coding via either intra-prediction or inter-prediction. In the inter-prediction of the current PB, a residual between the current block and the predictive block can be generated, coded, and included in the coded bitstream.

[0134] Inter prediction may be performed, for example, in single reference mode or mixed reference mode. In some implementations, a skip flag may be included in the bitstream of the current block first (or at a higher level) to indicate whether the current block is inter-coded and should not be skipped. If the current block is inter-coded, another flag may be further included in the bitstream as a signal indicating whether a single reference mode or a mixed reference mode is used for predicting the current block. In the case of a single reference mode, one reference block may be used to generate a prediction block of the current block. In the case of a mixed reference mode, two or more reference blocks may be used to generate a prediction block, for example, by weighted averaging. The mixed reference mode may be referred to as a two or more reference mode, a two-reference mode, or a multiple reference mode. The one or more reference blocks may be identified using one or more reference frame indexes and also using a corresponding one or more motion vectors that indicate a shift(s) of position between the reference block(s) and the current block in horizontal and vertical pixels. For example, an inter-predicted block of the current block may be generated from a single reference block identified by one motion vector in a reference frame as the predictive block in a single reference mode, whereas in the case of a mixed reference mode, the predictive block may be generated by a weighted average of two reference blocks in two reference frames indicated by two reference frame indexes and two corresponding motion vectors. The motion vector(s) may be coded in various manners and included in the bitstream.

[0135] In some implementations, an encoding or decoding system may maintain a decoded picture buffer (DPB). Some images / pictures may be maintained in the DPB waiting to be displayed (in the decoding system), and some images / pictures in the DPB may be used as reference frames to enable inter prediction (in the decoding system or encoding system). In some implementations, reference frames in the DPB may be tagged as either short-term or long-term references for the current image being encoded or decoded. For example, short-term reference frames may include frames used for inter prediction of blocks in the current frame or in a predefined number (e.g., two) subsequent video frames closest to the current frame in decoding order. Long-term reference frames may include frames in the DPB that can be used to predict image blocks in frames that are more than a predefined number of frames away from the current frame in decoding order. Information regarding such tags for short-term and long-term reference frames may be referred to as a reference picture set (RPS) and may be added to the header of each frame in the encoded bitstream. Each frame in the encoded video stream may be identified by a picture order counter (POC), which is numbered either absolutely according to playback order or relative to a group of pictures starting with, for example, an I-frame.

[0136] In some example implementations, one or more reference picture lists including identification of short-term and long-term reference frames for inter prediction may be formed based on information in the RPS. For example, a single-picture reference list may be formed for unidirectional inter prediction, represented as L0 reference (or reference list 0), whereas two-picture reference lists may be formed for bidirectional inter prediction, represented as L0 (or reference list 0) and L1 (or reference list 1) for each of the two prediction directions. The reference frames included in the L0 and L1 lists may be ordered in various predetermined manners. The lengths of the L0 and L1 lists may be signaled in the video bitstream. The unidirectional inter prediction may be a single reference mode or a mixed reference mode when multiple references for generating a prediction block by weighted averaging of the mixed prediction mode are on the same side of the block to be predicted. The bidirectional inter prediction may be a mixed mode only in that it includes at least two reference blocks.

[0137] Block division FIG. 18 shows an exemplary partition tree for block partitioning. VP9 uses a 4-way partition tree starting from the 64×64 level down to the 4×4 level, with an additional restriction for blocks 8×8 and below. This is shown in FIG. 18. The partitions, designated as R, can be recursive in that the same partition tree is repeated at lower scales until the lowest 4×4 level is reached. AV1 not only expands the partition tree to a 10-way structure as shown in the figure, but also increases the maximum size (called superblocks in VP9 / AV1) to start at 128×128. This includes 4:1 / 1:4 rectangular partitions, which did not exist in VP9. None of the rectangular partitions can be further subdivided. In addition, AV1 adds more flexibility to the use of partitions below the 8×8 level. For example, 2×2 chroma inter prediction is allowed in certain cases.

[0138] In HEVC, coding tree units (CTUs) are divided into coding units (CUs) by using a quadtree structure represented as a coding tree to fit various local characteristics. A CU may also be considered to be a block containing a prediction block or a coding block. The decision of whether to use inter-picture (temporal) prediction or intra-picture (spatial) prediction to code a picture area is made at the CU level. Each CU can be further divided into one, two, or four prediction units (PUs) according to a PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying a prediction process based on the PU partition type, the CU can be divided into transform units (TUs) according to another quadtree structure, such as a coding tree of the CU. The HEVC structure has multiple partition concepts, including CUs, PUs, and TUs. In HEVC, a CU or TU can only be square in shape, while a PU can be square or rectangular in shape for an inter-predicted block. In HEVC, one coding block may be further divided into four square subblocks, and a transform is performed on each subblock (i.e., TU). Each TU can be further divided recursively (using quadtree partitioning) into smaller TUs called residual quadtrees (RQTs). At picture boundaries, HEVC uses implicit quadtree partitioning, such that a block continues to be quadtree partitioned until its size fits within the picture boundary.

[0139] There may be a block positioning structure using a quadtree (QT) plus a binary tree (BT). In HEVC, a CTU may be divided into CUs by using a quadtree structure represented as a coding tree to fit various local characteristics. The decision of whether to use inter-picture (temporal) prediction or intra-picture (spatial) prediction to code a picture area is made at the CU level. In some embodiments, each CU may be further divided into one, two, or four PUs according to a PU partition type. Within one PU, the same prediction process may be applied, and related information is transmitted to the decoder on a PU basis. After obtaining the residual block by applying a prediction process based on the PU partition type, the CU may be divided into transform units (TUs) according to another quadtree structure, such as the coding tree of the CU. The HEVC structure may have multiple partition concepts, including CU, PU, ​​and TU.

[0140] The block partitioning may use a ternary tree (TT) structure. Figure 19 shows an example ternary tree partitioning. In VVC, a multi-type tree (MTT) structure may add horizontal and vertical center-side ternary trees in addition to the QTBT, as shown in Figure 19 (a and b, respectively). Ternary tree partitioning may complement quadtree and binary tree partitioning. Ternary tree partitioning may be able to capture objects located at the block center, and quadtree and binary tree partitions across the block center. In ternary tree partitioning, the width and height of the partitions of the proposed ternary tree may be a power of two so that no additional transformation is required. The design of a two-level tree may be motivated by complexity reduction, and the complexity of traversing the tree is T. D where T represents the number of split types and D is the depth of the tree.

[0141] Merge Mode by Motion Vector Difference (MMVD) In addition to the merge mode, in which the implicitly derived motion information may be directly used for the prediction sample generation of the current CU, the merge mode by motion vector difference (MMVD) may also be used. The MMVD flag is signaled immediately after sending the skip flag and the merge flag to specify whether the MMVD mode is used for the CU. In MMVD, after a merge candidate is selected, the MMVD mode may be further refined by the signaled MMVD information. The further information includes a merge candidate flag, an index specifying the magnitude of the motion, and an index to indicate the direction of the motion. In the MMVD mode, one of the first two candidates in the merge list is selected to be used as the MV basis. The merge candidate flag is signaled to specify which one is used.

[0142] FIG. 20a illustrates an exemplary merge mode by motion vector difference (MMVD) search point. FIG. 20b illustrates another exemplary merge mode by MMVD search point. The distance index specifies the motion magnitude information and indicates a predefined offset from the starting point. As shown in FIG. 20a-b, the offset is added to either the horizontal or vertical component of the starting MV. The relationship between the distance index and the predefined offset is specified in Table 2 below.

[0143] [Table 2]

[0144] The direction index represents the direction of the MVD relative to the starting point. The direction index can represent four directions as shown in Table 3. Note that the meaning of the MVD code may be different according to the information of the starting MV. If the starting MV is a uni-predictive MV or a bi-predictive MV with both lists pointing to the same side of the current picture (i.e., the POC of the two references are both greater than or both less than the POC of the current picture), the code in Table 2 specifies the code of the MV offset added to the starting MV. The POC may be a value that can identify when a picture is displayed. In some embodiments, the higher the POC, the more frames are displayed before the picture.

[0145] If the starting MV is a bi-predictive MV with two MVs pointing to different sides of the current picture (i.e., the POC of one reference is greater than that of the current picture and the POC of the other reference is less than that of the current picture) and the difference in the POC in list 0 is greater than that in list 1, then the signs in Table 3 specify the signs of the MV offsets added to the MV components of list 0 of the starting MV, and the signs of the MVs of list 1 have opposite values. Otherwise, if the difference in the POC in list 1 is greater than that in list 0, then the signs in Table 3 specify the signs of the MV offsets added to the MV components of list 1 of the starting MV, and the signs of the MVs of list 0 have opposite values.

[0146] [Table 3]

[0147] The MVD may be scaled according to the difference in POC in each direction. If the difference in POC in both lists is the same, no scaling is necessary. Otherwise, if the difference in POC in list 0 is greater than the difference in POC in list 1, the MVD in list 1 is scaled. If the POC difference in L1 is greater than L0, the MVD in list 0 is scaled similarly. If the starting MV is uni-predicted, the MVD is added to the available MV.

[0148] Symmetric MVD coding The symmetric MVD mode may be used in VVC in one example. It may be in addition to the normal unidirectional and bidirectional predictive mode MVD signaling. The symmetric MVD mode may be for bidirectional MVD signaling. In the symmetric MVD mode, the motion information including the reference picture indexes of both list 0 and list 1 and the MVD of list 1 is not signaled, but is derived in one embodiment.

[0149] The decoding process of the symmetric MVD mode may include: 1. At the slice level, the variables BiDirPredFlag, RefIdxSymL0 and RefIdxSymL1 are derived as follows: - If mvd_l1_zero_flag is 1, then BiDirPredFlag is set equal to 0. - Otherwise, if the closest reference picture in list 0 and the closest reference picture in list 1 form a backward-forward pair of reference pictures of a forward-backward pair of reference pictures, then BiDirPredFlag is set to 1 and both the reference pictures in list 0 and list 1 are short-term reference pictures. Otherwise, BiDirPredFlag is set to 0. 2. At the CU level, if a CU is bi-predictively coded and BiDirPredFlag is equal to 1, a symmetric mode flag is explicitly signaled indicating whether symmetric mode is used or not.

[0150] If the symmetric mode flag is true, only mvp_l0_flag, mvp_l1_flag, and MVD 0 are explicitly signaled. The reference indexes of list 0 and list 1 are set equal to a pair of reference pictures, respectively. MVD1 may be set equal to (-MVD0).

[0151] MVD coding in CWG-B018 may be another example. In AV1, for each coded block in an inter frame, if the mode of the current block is an inter-coded mode rather than a skip mode, another flag may be signaled to indicate whether a single or mixed reference mode is used for the current block. In single reference mode, the predictive block is generated by one motion vector, whereas in mixed reference mode, the predictive block is generated by a weighted average of two predictive blocks derived from two motion vectors.

[0152] In the case of a single reference, the following modes can be signaled: NEARMV Use one of the motion vector predictors (MVPs) in the list pointed to by the DRL (Dynamic Reference List) index · NEWMV Use one of the motion vector predictors (MVP) in the list signaled by the DRL index as a reference and apply the delta to the MVP. ·GLOBALMV Use motion vectors based on frame-level global motion parameters

[0153] For the mixed reference mode, the following modes may be signaled: · NEAR_NEARMV Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index. · NEAR_NEWMV Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference and transmit the delta MV of the second MV. · NEW_NEARMV Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as reference and transmit the delta MV of the first MV. · NEW_NEWMV Use one of the motion vector predictors (MVPs) in the list signaled by the DRL index as reference and send the delta MV of both MVs. ·GLOBAL_GLOBALMV Use the MVs from each reference based on their frame-level global motion parameters

[0154] Inter-Prediction Mode Signaling When signaling an inter prediction mode, the flag skip_mode is signaled first to determine whether SKIP mode applies to the current coding block. If SKIP mode is enabled, a composite inter prediction is performed using two reference frames and translational motion. The MV and reference frame are not signaled, but are all implicitly derived (considered as the first entry in the DRL). If SKIP mode is not enabled, the reference frame information is signaled.

[0155] When signaling reference frames, the flag comp_mode is signaled first to indicate whether one or two reference frames should be used for inter prediction. This flag may be signaled only if both the width and height of the coding block are equal to or greater than 8. In one example, for coding blocks with a width or height less than 8, only a single reference frame is used for inter prediction. If composite prediction is applied, the comp_ref_type syntax is further signaled to indicate whether the composite prediction is unidirectional or bidirectional. Furthermore, if a unidirectional composite prediction mode is applied, one of four predefined reference frame combinations is signaled. If a bidirectional composite prediction mode is applied, the reference frame indexes of the forward and backward reference frames are signaled separately. In the case of single reference prediction, only one of the seven possible reference frames is signaled.

[0156] After reference frame signaling, the YMode value is derived by several syntaxes to indicate which mode should be applied for MV prediction and signaling. The mapping between YMode and MV prediction is listed in Table 4 below.

[0157] [Table 4]

[0158] After derivation of YMode, the drl_mode syntax is further signaled to indicate which candidate in the DRL should be used for MV prediction. Then, MVD is further signaled when one of NEWMV, NEAREST_NEWMV, NEW_NEARESTMV, NEAR_NEWMV, NEW_NEARMV, or NEW_NEWMV is applied. If YMode is equal to NEW_NEARESTMV, NEW_NEARMV, or NEW_NEWMV, MVD is signaled for the MV associated with the first reference frame. If YMode is equal to NEAREST_NEWMV, NEAR_NEWMV, or NEW_NEWMV, MVD is signaled for the MV associated with the second reference frame.

[0159] After signaling the MV prediction mode, a composite inter-intra mode may be further signaled. The composite inter-intra mode may be signaled only when a single reference frame inter prediction is applied and, in one example, the block size is 8×8 or more but 32×32 or less. The composite inter-intra mode signaling includes a flag inter-intra indicating whether the composite inter-intra mode should be applied.

[0160] If a composite inter-intra mode is applied, an intra mode index interintra_mode is further signaled to indicate which of the DC_PRED, V_PRED, H_PRED, and SMOOTH modes should be used to perform intra prediction. Then, a flag wedge_interintra is further signaled to indicate whether a wedge-based inter-intra prediction mode should be applied. If a wedge-based inter-intra prediction mode is applied, a wedge_index syntax is further signaled to indicate the wedge partition pattern to be applied in the wedge-based inter-intra prediction. After signaling a composite inter-intra mode, a motion_mode is further signaled or implicitly derived to indicate which of the translation mode, overlapped block motion compensation (OBMC) mode, and warp motion compensation mode should be applied. After signaling motion_mode, a composite prediction type is further signaled to indicate which composite prediction mode should be applied. The composite prediction modes include composite wedge-based prediction, differentially modulated composite prediction, and distance-based composite prediction. Finally, an interpolation filter index is signaled when applicable to direct the selection of an interpolation filter when translational motion compensation is applied.

[0161] When two reference indexes are signaled, i.e., in the case of joint inter prediction, an inter prediction mode named JOINT_NEWMV may be used. The embodiments of the inter prediction mode described herein may also be applied in the JOINT_NEWMV mode. The delta MVs of multiple reference lists (e.g., reference list 0 and reference list 1) are signaled together, and the delta MVs of reference list 0 and reference list 1 are signaled together. Therefore, only one delta MV named joint_delta_mv is signaled and transmitted to the decoder, and the delta MVs of reference list 0 and reference list 1 are derived from joint_delta_mv. However, when two reference indexes are signaled, the inter prediction mode JOINT_NEWMV may be applied, which may limit higher coding gain. The embodiments described below explain and illustrate the application with a single reference index.

[0162] In the mixed reference mode, if the POC of both reference frames in a motion vector pair is larger or smaller than the POC of the current frame, the orientations of the two reference frames may be the same, otherwise, if the POC of one reference frame is larger than the POC of the current frame and the POC of the other reference frame is smaller than the POC of the current frame, the orientations of the two reference frames are different.

[0163] The proposed embodiments may be used separately or combined in any order. Moreover, each of the method (or embodiment), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. In the following, the term block may be interpreted as a prediction block, a coding block, or a coding unit, i.e., a CU. The orientation of the reference frame may be determined by whether the reference frame is before the current frame in display order or after the current frame in display order.

[0164] In a single reference example, only one reference frame is signaled. There may be exemplary inter prediction modes (e.g., DERIVED_NEWMV and / or DERIVED_NEARMV). These modes are applied to indicate whether a motion vector signaled / predicted for a current reference frame may be used to derive another motion vector pointing to a different reference frame. DERIVED_NEWMV may be an inter prediction mode where a motion vector differential (MVD) is signaled. In this example, one reference frame signaling is used for two reference frames. DERIVED_NEARMV may be an inter prediction mode where a motion vector differential (MVD) is selected based on what neighboring blocks are using. This may have less overhead, but may also have less accuracy. In this example, one reference frame neighboring block mode is used for two reference frames.

[0165] In one embodiment, a reference frame index may be signaled indicating which reference frame is used for the current block. This signaling may precede the newly added inter prediction mode. In one embodiment, DERIVED_NEWMV and / or DERIVED_NEARMV may be signaled together with NEWMV, NEARMV, and / or GLOBALMV. Each of these are inter prediction modes that use two reference frames instead of a single reference frame. NEWMV may signal a motion vector, while NEARMV may rely on neighboring blocks.

[0166] In one embodiment, the signaling of MVD is the same between DERIVED_NEWMV and NEWMV modes. In one embodiment, MVD is not signaled for DERIVED_NEARMV. In one embodiment, DERIVED_NEWMV and / or DERIVED_NEARMV are signaled only if there are at least two reference frames in the reference frame buffer available for the current picture to select from, at least one of which is before the current frame in display order, and at least one of which is after the current frame in display order.

[0167] The joint reference cases are further described below. NEARMV uses one of the motion vector predictors (MVPs) in the list indicated by the DRL (Dynamic Reference List) index directly without MVD. NEWMV uses one of the motion vector predictors (MVPs) in the list signaled by the DRL index as a reference and applies a delta to the MVP (e.g., using the MVD). GLOBALMV uses a motion vector based on a frame-level global motion parameter. The term "NEAR" above refers to MV prediction using a reference MV without MVD as a general merge mode, whereas the term "NEW" refers to MV prediction using a referenced MV and offsetting it with the signaled MVD similar to the MMVD mode. In the case of composite inter prediction, both the reference-based motion vector and the motion vector delta above may generally be different or independent between the two references, even if they are correlated and such correlation can be utilized to reduce the amount of information required to signal two motion vector deltas. The dynamic reference list (DRL) mentioned above may be dynamically maintained and used to hold a set of indexed motion vectors that are considered as candidate motion vector predictors. In some example implementations, an optical flow-based approach may be used to refine the motion vector (MV) per subblock for composite prediction. In particular, the optical flow equation may be applied to formulate a least squares problem, from which fine motions may be derived from gradients of composite inter prediction samples. Using these fine motions, the MV per subblock may be refined within the prediction block, which may improve inter prediction quality. Certain coding features may be an extension of the concept of bidirectional optical flow (BDOF), since they support MV refinement when two reference blocks have any temporal distance to the current block. In various embodiments of the present disclosure, a "block" may refer to a prediction block, a coding block, a transform block, or a coding unit (CU).

[0168] Referring back to the example of derived reference, where a single reference signal is used to derive the MVD of multiple reference signals. In one embodiment, when a block uses a single reference frame (i.e., comp_mode is equal to SINGLE_REFERENCE) and the inter prediction mode is DERIVED_NEARMV (or DERIVED_NEWMV), a new MV may be derived by mirroring the predicted or signaled MV. This derived MV may point to another reference frame in a different direction from the current reference frame. In other words, there may only be a single reference frame signal, but it is used to identify the MV of another reference frame.

[0169] In one embodiment, the derived MV may have the same magnitude but opposite sign as the predicted (or signaled) MV. In one embodiment, the reference frame to which the derived MV points may have the same temporal distance to the current frame compared to the temporal distance between the signaled reference frame and the current frame. In another embodiment, the derived MV may be used to generate another prediction block. For example, there may be two prediction blocks when there are two frames (e.g., reference and derived). This prediction block may be derived by the predicted (or signaled) MV and the signaled reference frame along with the original prediction block. This may be used to derive the final prediction block using a weighted average.

[0170] In one embodiment, the reference frame to which the derived MV points may have a different orientation than the signaled reference frame. The temporal distance to the current frame may be different. The temporal distance may be modified. In one embodiment, if the temporal distance to the current frame differs between the signaled reference frame and the reference frame associated with the derived MV, the derived MV may be scaled according to the temporal distance.

[0171] FIG. 21 shows a flowchart of a method according to an exemplary embodiment of the present disclosure. In block 2102, a coded video stream is received. The coded video stream includes a syntax flag indicating a particular inter-coded mode. The inter-coded mode may include DERIVED NEWMV and / or DERIVED_NEARMV. In block 2104, a single reference frame is received for a current frame in the coded video stream. In block 2106, in response to the syntax flag, indicates a particular inter-coded mode to be applied. The particular mode may include a decision on whether to use a first motion vector for the current reference frame to derive a second motion vector pointing to a different reference frame as in block 2108. Based on the decision, in block 2108, a second motion vector is determined based on the syntax flag and the first motion vector. Based on the derived second motion vector, in block 2110, the coded video stream is decoded.

[0172] Although described as a reference frame, it may include a reference frame pair. In one embodiment, when multiple motion vectors point to one reference frame or one reference frame pair, the minimum different value referenced by these motion vectors may be marked as the score value of one reference frame or one reference frame pair. In another embodiment, when there is no motion vector pointing to one reference frame or one reference frame pair, the score value of that reference frame or reference frame pair is marked as the maximum allowable value. In another embodiment, when multiple reference frames or multiple reference frame pairs have the same score value, the ranking order of these reference frames or reference frame pairs is the same as the scanning order of the spatial reference motion information and / or the temporal reference motion information. In another embodiment, when multiple reference frames or multiple reference frame pairs have the same score value, the ranking order of these reference frames or reference frame pairs depends on the frequency of occurrence of these reference frames or reference frame pairs used in the spatial reference motion information and / or the temporal reference motion information.

[0173] In one embodiment, all allowed unidirectional and bidirectional composite reference frame pairs are ranked together by using the TM method, and the index of the reference frame pair of the current block in this ranking order is signaled in the bitstream. In one embodiment, all allowed single reference frames are ranked together by using the TM method, and the index of the reference frame of the current block in this ranking order is signaled in the bitstream.

[0174] In one embodiment, a method for reordering reference frames by block by template matching (TM) includes the steps of: comparing a template of a current block with a template of a reference block of motion information, the motion information including spatial reference motion information or temporal reference motion information; calculating a difference between the template of the current block and the template of the reference block; determining a score value of the associated reference frame based on the calculated difference; and reordering the reference frames based on the determined score. The reference frames further comprise a reference frame pair. The TM includes a decoder-side motion vector derivation for improving the motion information of the current block. The reordering step further includes ranking the available reference frames based on the score value of each of the reference frames. If the score values ​​of the multiple reference frames are equal, the ranking is consistent with the scanning order of the spatial reference motion information or the temporal reference motion information. If the score values ​​of the multiple reference frames are equal, the ranking is based on the frequency of occurrence of these reference frames used in the spatial reference motion information or the temporal reference motion information. The calculating step includes at least one of sum of absolute differences (SAD), sum of squared differences (SSD), mean squared error (MSE), or sum of difference transform (SATD). The template includes an upper neighboring block or a left neighboring block. The spatial reference motion information includes one or more spatial motion vectors. The temporal reference motion information includes one or more temporal motion vectors. When multiple motion vectors point to one of the reference frames, one of the motion vectors with the smallest difference is used to determine the score value. When there is no motion vector that points to one of the reference frames, the score value is determined to be the maximum allowed value. The allowed unidirectional and bidirectional composite reference frames are ranked together by using TM, and the index of the reference frame of the current block is signaled in the bitstream. The allowed single reference frames are ranked together by using TM, and the index of the reference frame of the current block is signaled in the bitstream.

[0175] The embodiments of the present disclosure may be used separately or combined in any order. Furthermore, each of the methods (or embodiments), the encoder, and the decoder may be implemented by a processing circuit (e.g., one or more processors or one or more integrated circuits). In one example, the one or more processors execute a program stored in a non-transitory computer-readable medium. The term block may include a prediction block, a coding block, or a coding unit, i.e., a CU. The embodiments of the present disclosure may be applied to a luma block or a chroma block.

[0176] The techniques described above can be implemented as computer software using computer-readable instructions and physically stored on one or more computer-readable media. For example, Figure 22 illustrates a computer system (2200) suitable for implementing certain embodiments of the disclosed subject matter.

[0177] The computer software can be coded using any suitable machine or computer language that can be subject to assembly, compilation, linking, or similar mechanisms to produce code including instructions that can be executed directly or via interpretation, microcode execution, or the like by one or more computer central processing units (CPUs), graphics processing units (GPUs), or the like.

[0178] The instructions may be executed on various types of computers or computer components including, for example, personal computers, tablet computers, servers, smartphones, gaming consoles, Internet of Things devices, and the like.

[0179] 22 with respect to computer system (2200) are exemplary in nature and are not intended to suggest any limitation as to the scope of use or functionality of the computer software implementing the embodiments of the present disclosure. The arrangement of components should not be interpreted as having any dependency or requirement regarding any one or combination of components illustrated in the exemplary embodiment of computer system (2200).

[0180] The computer system (2200) may include certain human interface input devices. Such human interface input devices may be responsive to input by one or more human users through, for example, tactile input (keystrokes, swipes, data glove movements, etc.), audio input (voice, clapping, etc.), visual input (gestures, etc.), olfactory input (not shown). Human interface devices may also be used to capture certain media not necessarily directly associated with conscious human input, such as audio (voice, music, ambient sounds, etc.), images (scanned images, photographic images obtained from still image cameras, etc.), and video (two-dimensional video, three-dimensional video including stereoscopic video, etc.).

[0181] The input human interface devices may include one or more (only one of each is shown) of a keyboard (2201), a mouse (2202), a trackpad (2203), a touch screen (2210), a data glove (not shown), a joystick (2205), a microphone (2206), a scanner (2207), and a camera (2208).

[0182] The computer system (2200) may also include certain human interface output devices. Such human interface output devices may stimulate one or more of the senses of a human user, for example, through haptic output, sound, light, and smell / taste. Such human interface output devices may include haptic output devices (e.g., haptic feedback via a touch screen (2210), data gloves (not shown), or joystick (2205), although some haptic feedback devices may not function as input devices), audio output devices (such as speakers (2209), headphones (not shown)), visual output devices (such as screens (2210) including CRT screens, LCD screens, plasma screens, OLED screens, each with or without touch screen input capability, each with or without haptic feedback capability, some capable of outputting two-dimensional visual output or output in more than three dimensions by means of stereographic output, virtual reality glasses (not shown), holographic displays, and smoke tanks (not shown)), and printers (not shown).

[0183] The computer system (2200) may also include human accessible storage devices and associated media such as optical media including CD / DVD ROM / RW (2220) with media (2221) such as CDs / DVDs, thumb drives (2222), removable hard drives or solid state drives (2223), legacy magnetic media such as tapes and floppy disks (not shown), and dedicated ROM / ASIC / PLD based devices such as security dongles (not shown).

[0184] Those skilled in the art will also understand that the term "computer-readable medium" as used in connection with the subject matter of this disclosure does not include transmission media, carrier waves, or other transitory signals.

[0185] The computer system (2200) may also include an interface (2254) to one or more communication networks (2255). The networks may be, for example, wireless, wired, optical. The networks may further be local, wide area, metropolitan, vehicular and industrial, real-time, delay tolerant, etc. Examples of networks include local area networks such as Ethernet, wireless LAN, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., television wired or wireless wide area digital networks including cable television, satellite television, and terrestrial broadcast television, vehicular and industrial including CAN bus, etc. Certain networks typically require an external network interface adapter attached to a particular general-purpose data port (e.g., a USB port of the computer system (2200)) or peripheral bus (2249), while other networks are typically integrated into the core of the computer system (2200) by attachment to a system bus as described below (e.g., an Ethernet interface to a PC computer system, or a cellular network interface to a smartphone computer system). Using any of these networks, the computer system (2200) can communicate with other entities. Such communications may be unidirectional, receive only (e.g., television broadcast), unidirectional transmit only (e.g., a CANbus to a particular CANbus device), or bidirectional, for example, to other computer systems using local or wide area digital networks. As discussed above, specific protocols and protocol stacks may be used for each of these networks and network interfaces.

[0186] The aforementioned human interface devices, human accessible storage devices, and network interfaces may be attached to the core (2240) of the computer system (2200).

[0187] The cores (2240) may include one or more central processing units (CPUs) (2241), graphics processing units (GPUs) (2242), dedicated programmable processing units in the form of field programmable gate areas (FPGAs) (2243), hardware accelerators for specific tasks (2244), graphics adapters (2250), etc. These devices may be connected via a system bus (2248), along with read-only memory (ROM) (2245), random access memory (2246), internal mass storage (2247) such as an internal hard drive or SSD that is not user accessible. In some computer systems, the system bus (2248) may be accessible in the form of one or more physical plugs to allow expansion with additional CPUs, GPUs, etc. Peripheral devices may be attached directly to the core's system bus (2248) or via a peripheral bus (2249). In one example, a screen (2210) may be connected to the graphics adapter (2250). Peripheral bus architectures include PCI, USB, and the like.

[0188] The CPU (2241), GPU (2242), FPGA (2243), and accelerator (2244) can combine to execute certain instructions that may constitute the aforementioned computer code. The computer code can be stored in ROM (2245) or RAM (2246). Persistent data can be stored, for example, in internal mass storage (2247), while transitory data can also be stored in RAM (2246). Rapid storage and retrieval from any memory device can be made possible through the use of cache memory, which can be closely associated with one or more of the CPU (2241), GPU (2242), mass storage (2247), ROM (2245), RAM (2246), etc.

[0189] The computer-readable medium can bear computer code for performing various computer-implemented operations. The medium and computer code can be those specially designed and constructed for the purposes of the present disclosure, or they can be of the kind well known and available to those skilled in the computer software arts.

[0190] As a non-limiting example, a computer system (2200) having an architecture, and specifically a core (2240), can provide functionality as a result of a processor (including a CPU, GPU, FPGA, accelerator, etc.) executing software embodied in one or more tangible computer-readable media. Such computer-readable media can be the user-accessible mass storage described above, as well as media associated with specific storage of the core (2240) of a non-transitory nature, such as the core internal mass storage (2247) or ROM (2245). Software implementing various embodiments of the present disclosure can be stored in such devices and executed by the core (2240). The computer-readable media can include one or more memory devices or chips, depending on the particular needs. The software can cause the core (2240), and specifically the processor therein (including a CPU, GPU, FPGA, etc.) to perform certain processes or certain parts of certain processes described herein, including defining data structures stored in RAM (2246) and modifying such data structures according to the processes defined by the software. Additionally or alternatively, the computer system may provide functionality as a result of hardwired or otherwise embodied logic in circuitry (e.g., accelerator (2244)), where logic may operate in place of or in conjunction with software to perform particular processes or particular portions of particular processes described herein. References to software may encompass logic, and vice versa, where appropriate. References to computer-readable media may encompass circuitry (such as integrated circuits (ICs)) that stores software for execution, circuitry that embodies logic for execution, or both, where appropriate. The present disclosure encompasses any suitable combination of hardware and software.

[0191] While this disclosure describes several exemplary embodiments, there are alterations, substitutions, and various substitute equivalents that fall within the scope of this disclosure. Thus, it will be appreciated that those skilled in the art will be able to devise numerous systems and methods that, although not explicitly shown or described herein, embody the principles of the present disclosure and are thus within the spirit and scope of the present disclosure. Appendix A: Acronyms ALF: Adaptive Loop Filter AMVP: Advanced Motion Vector Prediction APS: Adaptation Parameter Set ASIC: Application-Specific Integrated Circuit AV1:AOMedia Video 1 AV2:AOMedia Video 2 BCW: Bi-prediction with CU-level Weights BM: Bilateral Matching BMS: benchmark set CANBus: Controller Area Network Bus CC-ALF: Cross-Component Adaptive Loop Filter CCSO: Cross-Component Sample Offset CD: Compact Disc CDEF: Constrained Directional Enhancement Filter CDF: Cumulative Density Function CfL: Chroma from Luma CIIP: Combined intra-inter prediction CPUs: Central Processing Units CRT: Cathode Ray Tube CTBs: Coding Tree Blocks CTU: Coding Tree Unit CTUs: Coding Tree Units CU: Coding Unit DMVR: Decoder-side Motion Vector Refinement DPB: Decoded Picture Buffer DPS: Decoding Parameter Set DVD: Digital Video Disc FPGA: Field Programmable Gate Areas GBI: Generalized Bi-prediction GOPs: Groups of Pictures GPUs: Graphics Processing Units GSM: Global System for Mobile communications HDR: High Dynamic Range HEVC: High Efficiency Video Coding HRD: Hypothetical Reference Decoder IBC (or IntraBC): Intra Block Copy IC: Integrated Circuit ISP: Intra Sub-Partitions JEM: Joint exploration model JVET: Joint Video Exploration Team LAN: Local Area Network LCD: Liquid Crystal Display LR: Loop Restoration Filter LSO: Local Sample Offset LTE: Long-Term Evolution MMVD: Merge Mode with Motion Vector Difference MPM: Most probable mode MV: Motion Vector MVD: Motion Vector Difference MVP: Motion Vector Predictor OLED: Organic Light-Emitting Diode PBs: Prediction Blocks PCI: Peripheral Component Interconnect PDPC: Position Dependent Prediction Combination PLD: Programmable Logic Device POC: Picture Order Count PPS: Picture Parameter Set PU: Prediction Unit PUs: Prediction Units RAM: Random Access Memory ROM: Read-Only Memory RPS: Reference Picture Set SAD: Sum of Absolute Difference SAO: Sample Adaptive Offset SB: Super Block SCC: Screen Content Coding SDP: Semi Decoupled Partitioning SDR: standard dynamic range SDT: Semi Decoupled Tree SEI: Supplementary Enhancement Information SNR: Signal Noise Ratio SPS: Sequence Parameter Setting SSD: Solid-state drive SST: Semi-Separate Tree TM: Template Matching TU: Transform Unit TUs: Transform Units USB: Universal Serial Bus VPS: Video Parameter Set VUI: Video Usability Information VVC: versatile video coding WAIP: Wide-Angle Intra Prediction [Explanation of symbols]

[0192] 101 Samples 102 Arrow 103 Arrow 104 Square Block 201 Current Block 202 Surrounding Samples 204 Surrounding Samples 205 Surrounding Samples 206 Surrounding Samples 300 Communication Systems 310 Terminal Devices 320 Terminal Devices 330 Terminal Devices 340 Terminal Devices 350 Network 400 Communication Systems 401 Video Source 402 Video Picture Stream 403 Video Encoder 404 Encoded video data 405 Streaming Server 406 Client Subsystem A copy of the 407 encoded video data 408 Client Subsystem 409 Copy of encoded video data 410 Video Decoder 411 Video Picture Output Stream 412 Display 413 Video Capture Subsystem 420 Electronic Devices 430 Electronic Devices 501 Channel 510 Video Decoder 512 Display, rendering device 515 Buffer Memory 520 Parser 521 Symbols 530 Electronic Devices 531 Receiver 551 Scaler / Descaler Unit 552 Intra-picture prediction unit 553 Motion Compensation Prediction Unit 555 Aggregator 556 Loop Filter Unit 557 Reference Picture Memory 558 Current Picture Buffer 601 Video Sources 603 Video Encoder 620 Electronic Devices 630 Source Coder 632 Coding Engine 633 Local Decoder 634 Reference Picture Memory 635 Predictor 640 Transmitter 643 coded video sequence 645 Entropy Coder 650 Controller 660 Communication Channels 703 Video Encoder 721 General-purpose controller 722 Intra Encoder 723 Residual Calculator 724 Residual Encoder 725 Entropy Encoder 726 Switch 728 Residual Decoder 730 InterEncoder 810 Video Decoder 871 Entropy Decoder 872 Intra Decoder 873 Residual Decoder 874 Reconstruction Module 880 Interdecoder 902 Predefined Split Options 904 Predefined Split Options 906 Predefined Split Options 908 Predefined Split Options 1002 T-shaped partition 1004 T-shaped partition 1006 T-shaped partition 1008 T-shaped partition 1010 All Square Partition 1102 Vertical bisection 1104 Horizontal bisection 1106 Vertical third division 1108 Horizontal third division 1200 Base Block 1202 Square Partition 1204 Square Partition 1206 Square Partition 1208 Square Partition 1302 Vertical Ternary Pattern 1304 Horizontal Ternary Pattern 1402 Partition 1404 Partition 1406 Partition 1408 Partition 1410 Overall division pattern 1420 Tree Structure / Representation 1502 Square coding block 1504 4 equal sized transformation blocks 1506 16 equal sized transformation blocks 1602 Inter-coded Blocks 1604 A total of 7 transformation blocks with 2 different sizes 2200 Computer System 2201 Keyboard 2202 Mouse 2203 Trackpad 2205 Joystick 2206 Microphone 2207 Scanner 2208 Camera 2209 Speaker 2210 Touch Screen 2220 CD / DVD ROM / RW 2221 CD / DVD or similar media 2222 Thumb Drive 2223 Removable Hard Drive or Solid State Drive 2240 Computer System Core 2241 Central Processing Unit (CPU) 2242 Graphics Processing Unit (GPU) 2243 Field Programmable Gate Area (FPGA) 2244 Hardware Accelerator 2245 Read-Only Memory (ROM) 2246 Random Access Memory (RAM) 2247 Internal Mass Storage 2248 System Bus 2249 General Purpose Data Port or Peripheral Bus 2250 Graphics Adapter 2254 Interface 2255 Communication Network

Claims

1. 1. A method for decoding a video stream, the method comprising: receiving the video stream including a syntax flag indicating whether a first motion vector of a first reference frame is used to derive a second motion vector of a second reference frame; receiving the first reference frame for a current frame in the video stream; determining whether the first motion vector of the first reference frame is used to derive the second motion vector of the second reference frame based on the value of the syntax flag; deriving the second motion vector of the second reference frame in response to the value of the syntax flag indicating that the first motion vector of the first reference frame is used to derive the second motion vector of the second reference frame, the deriving being based on the value of the syntax flag and the first motion vector of the first reference frame; and decoding the video stream based on the derived second motion vector.

2. 2. The method of claim 1, wherein the first motion vector points to the first reference frame, the second motion vector points to the second reference frame that is different from the first reference frame, and a motion vector differential (MVD) provides a prediction based on the motion vectors.

3. The method of claim 1 , wherein the deriving step includes an inter-coded mode, the inter-coded mode including a DERIVED_NEWMV mode or a DERIVED_NEARMV mode.

4. The method of claim 3 , wherein the DERIVED_NEWMV mode includes the second motion vector being derived directly from the first reference frame.

5. The method of claim 3 , wherein the DERIVED_NEARMV mode includes the second motion vector being derived from a neighboring frame of the first reference frame.

6. The method of claim 5 , wherein there is no motion vector differential (MVD) signaling for the DERIVED_NEARMV mode.

7. indicating, in response to the syntax flag, which of the inter-coded modes is to be applied, the deriving step being performed in response to the indication that the first motion vector of the first reference frame can derive the second motion vector.

4. The method of claim 3, further comprising:

8. signaling a motion vector differential (MVD) based on the indicated inter-coded mode.

4. The method of claim 3, further comprising:

9. signaling a reference frame index indicating which of the reference frames is used for the current block for an inter prediction mode. The method of claim 1 further comprising:

10. 10. The method of claim 9, wherein the signaling step occurs when there are at least two reference frames in a reference frame buffer available for the current frame, one of the at least two reference frames being before the current frame in display order, and another of the at least two reference frames being after the current frame in display order.

11. The method of claim 1 , wherein the orientation of a reference frame is based on whether the reference frame is before the current frame in display order or after the current frame in display order.

12. The method of claim 11 , wherein the orientation of the first frame of reference is different from the second frame of reference.

13. 2. The method of claim 1, wherein when the picture order counts (POC) of both reference frames of a motion vector pair are both greater than or both less than the POC of the current frame, the directions of the reference frames are the same.

14. 2. The method of claim 1, wherein the orientations of both reference frames are different when one of the pair of reference frames has a picture order count (POC) greater than the POC of the current frame and the other of the pair of reference frames has a POC less than the POC of the current frame.

15. 2. The method of claim 1, wherein the second reference frame to which the derived second motion vector points is different from the signaled reference frame or has a different orientation than the first reference frame.

16. An apparatus configured to perform the method of any one of claims 1 to 15.

17. A computer program product for causing a processor to carry out a method according to any one of claims 1 to 15.

Images