Display device and electronic apparatus

Abstract

To provide a liquid crystal display device which can reduce the power consumption, or a liquid crystal display device which can achieve reduction in the variation of the transmittance.SOLUTION: A liquid crystal display device comprises: a first substrate including a transistor including an oxide semiconductor film in a channel formation region, a pixel electrode electrically connected to the transistor, an insulating layer in contact with the pixel electrode, and a first common electrode in contact with the insulating layer; a second substrate which is arranged so as to face the first substrate and includes a second common electrode; and a liquid crystal layer which is sandwiched between the first substrate and the second substrate. The liquid crystal layer uses a negative liquid crystal material. The specific resistivity of the liquid crystal material is greater than or equal to 1.0×1013 Ω cm and less than or equal to 1.0×1016 Ω cm.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to, for example, a semiconductor device, a display device, a light-emitting device, a driving method thereof, or In particular, the present invention relates to a method for manufacturing an active matrix liquid crystal display. Regarding the device. [Background technology]

[0002] In recent years, with the rapid spread of mobile information terminals such as smartphones, the performance of the terminals themselves has become increasingly The functionality of the screen is also advancing rapidly. Screens are becoming larger and higher definition. At the same time, the power consumption of display devices has become important. A typical example is a liquid crystal display device using the element.

[0003] As a display method of a liquid crystal display device, for example, liquid crystal molecules having negative dielectric anisotropy are applied to a substrate. Vertically aligned (VA) mode, which is aligned perpendicular to the surface, and positive or negative dielectric anisotropy An in-plane switch that aligns the liquid crystal molecules horizontally with respect to the substrate surface and applies a transverse electric field to the liquid crystal layer. These include in-plane switching (IPS) mode and fringe field switching (FFS) mode.

[0004] For example, as the liquid crystal display device of the above-mentioned FFS driving method, A liquid crystal sandwiched between the first substrate and the second substrate, and a high-speed input data transfer The first substrate has a 100% luminance and a 100% luminance. The first common electrode layer on the second substrate and the pixel electrodes and the second common electrode layer on the second substrate and a means for generating an electric field between the light source and the display device. (See Patent Document 1)

[0005] In addition, as a liquid crystal display device using the FFS driving method, two pairs of electrodes are used to drive the liquid crystal and achieve high speed display. A responsive liquid crystal display device has been disclosed (see Patent Document 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Special Publication No. 2006-523850 [Patent Document 2] International Publication No. 2013 / 001979 Brochure Summary of the Invention [Problem to be solved by the invention]

[0007] The liquid crystal driving device disclosed in Patent Document 1 realizes a wide viewing angle and high-speed response. To achieve this, three electrodes are used to control the liquid crystal molecules. Even if this were possible, the three electrodes would need to be driven separately, which would increase the power consumption of the display device. The force increases.

[0008] In addition, in the liquid crystal driving device disclosed in Patent Document 2, two pairs of electrodes, in other words, four Since the liquid crystal needs to be driven by electrodes, at least four power lines are required. In addition, the increase in the number of power lines increases the power supply voltage applied to the liquid crystal. The method of driving or controlling the voltage to be used becomes complicated, and the power consumption increases with the increase in the number of power lines. There is a problem with the number of cases increasing.

[0009] In light of the above technical background, one aspect of the present invention is to realize a reduction in power consumption. Another object of the present invention is to provide a liquid crystal display device capable of One of the objects of the present invention is to provide a liquid crystal display device capable of reducing the fluctuation in transmittance. Another embodiment of the present invention is a liquid crystal display capable of reducing fluctuations in display luminance. Another object of the present invention is to provide a display device that can reduce display flicker. It is an object of the present invention to provide a liquid crystal display device capable of reducing the One embodiment of the present invention provides a liquid crystal display device that can realize display that is easy on the eyes. Another object of the present invention is to reduce the influence of eye fatigue. It is an object of the present invention to provide a liquid crystal display device capable of realizing a high-quality image.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0011] In the liquid crystal display device according to one embodiment of the present invention, after writing of an image signal to a pixel portion is stopped, In order to maintain image display in the pixel area, an insulated gate electrode with an extremely small off-current is required. A field effect transistor (hereinafter simply referred to as a transistor) is provided in the pixel. The transistor is used as an element for controlling the supply of voltage to the liquid crystal element of the pixel. As a result, the period during which the voltage supply to the liquid crystal element is maintained can be secured long. A pixel area that has the same image information over several consecutive frame periods, such as a still image. In cases where image signals that correspond to the same pixel are written repeatedly, the writing of image signals to the pixel section is temporarily stopped. In other words, the driving frequency is lowered by stopping the image signal for a certain period of time. Even if the number of times writing is reduced, the image display can be maintained.

[0012] Furthermore, in the liquid crystal display device according to one aspect of the present invention, the liquid crystal element includes a pixel electrode, a first common electrode, and a second common electrode. The liquid crystal layer has an electric field applied thereto by three electrodes, a first common electrode, and a second common electrode. The liquid crystal layer uses a negative type liquid crystal material, and the specific resistivity of the liquid crystal material is 1.0×10 13 Ω·c m or more 1.0×10 16 This structure allows for a constant Even if the number of times that image signals are written within a period is reduced, the fluctuation in transmittance is small, and the liquid crystal display For a viewer of the display device, the liquid crystal display device can be one in which image flicker is suppressed. . Effect of the Invention

[0013] According to one embodiment of the present invention, a liquid crystal display device capable of realizing reduced power consumption is provided. According to one embodiment of the present invention, the fluctuation in transmittance can be reduced. It is possible to provide a liquid crystal display device that can [Brief description of the drawings]

[0014] [Figure 1] 1A and 1B are a circuit diagram and a cross-sectional view illustrating a pixel configuration of a liquid crystal display device according to one embodiment of the present invention. [Diagram 2] 1A and 1B are diagrams for explaining transmittance depending on polarity when a positive-type liquid crystal material and a negative-type liquid crystal material are used. [Diagram 3] FIG. 1 is a block diagram illustrating a configuration example of a panel of a liquid crystal display device according to one embodiment of the present invention. [Figure 4]FIG. 1 is a block diagram illustrating a configuration of a liquid crystal display device according to one embodiment of the present invention. [Diagram 5] FIG. 2 is a top view illustrating a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 6] FIG. 1 is a cross-sectional view illustrating a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 7] 1A to 1C are cross-sectional views illustrating a method for manufacturing a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 8] 1A to 1C are cross-sectional views illustrating a method for manufacturing a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 9] 1A to 1C are a cross-sectional view of a transistor that can be used in a liquid crystal display device of one embodiment of the present invention, and a diagram illustrating an energy band of an oxide semiconductor. [Figure 10] FIG. 2 is a top view illustrating a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 11] FIG. 1 is a cross-sectional view illustrating a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 12] 1A to 1C are cross-sectional views illustrating a method for manufacturing a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 13] 1A to 1C are cross-sectional views illustrating a method for manufacturing a pixel of a liquid crystal display device according to one embodiment of the present invention. [Figure 14] 1A to 1C are diagrams illustrating electronic devices in which a liquid crystal display device according to one embodiment of the present invention can be used. [Figure 15] FIG. 2 is a cross-sectional view illustrating a sample structure according to an embodiment of the present invention. [Figure 16] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 17] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 18] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 19] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 20] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 21] FIG. 4 is a diagram illustrating the transmittance of a sample according to an embodiment of the present invention. [Figure 22] FIG. 2 is a cross-sectional view illustrating the configuration of a liquid crystal display device used in the calculation of the examples. [Figure 23]FIG. 11 is a diagram for explaining calculation results of transmittance in an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications and details may be made to the present invention. The present invention should not be construed as being limited to the description of the following embodiment modes.

[0016] In this specification, a liquid crystal display device refers to a panel in which a liquid crystal element is formed in each pixel, A module in which ICs, including drive circuits or controllers, are mounted on the panel Furthermore, a liquid crystal display device according to one embodiment of the present invention includes the following: The term "element substrate" refers to a part of the liquid crystal device that is in a state before the device is completed. Included in the category.

[0017] In addition, in the liquid crystal display device according to one embodiment of the present invention, A touch sensor is a position input device that can detect a position and generate a signal containing the position information. A chip panel may be included in the components.

[0018] (Embodiment 1) In this embodiment, a configuration example of a pixel in a liquid crystal display device according to one embodiment of the present invention will be described with reference to FIG. The explanation will be given using 1.

[0019] Example of pixel configuration FIG. 1A illustrates an example of a pixel configuration of a liquid crystal display device according to one embodiment of the present invention. The pixel 100 shown in FIG. 1 includes a liquid crystal element 111 and a pixel circuit for controlling the supply of an image signal to the liquid crystal element 111. The pixel includes a transistor 112 and a capacitor 113.

[0020] The liquid crystal element 111 includes a pixel electrode, a first common electrode, a second common electrode, a pixel electrode, a first common electrode, a second common electrode, a second pixel electrode, a first pixel ... second pixel electrode, a liquid crystal layer including a liquid crystal material to which a voltage is applied between a first common electrode and a second common electrode; It has.

[0021] In addition, in FIG. 1A, the liquid crystal element 111 has a voltage between the pixel electrode and the first common electrode. The region to which the voltage is applied is the liquid crystal element 111a, and a voltage is applied between the pixel electrode and the second common electrode. The region where the voltage is applied is the liquid crystal element 111b, and a voltage is applied between the first common electrode and the second common electrode. The regions to which the voltage is applied are shown as liquid crystal elements 111c.

[0022] In FIG. 1A, the liquid crystal element 111 is a FFS (Fringe Field Switch). In this example, the pixel electrode and the first common electrode are formed by an insulating film. The area has an overlapping area with a voltage applied between the pixel electrode and the first common electrode. Voltage V LC In FIG. 1(A), the region The capacitance is illustrated as a capacitance element 113.

[0023] The transistor 112 converts the potential of an image signal input to a wiring SL into a potential of a pixel of the liquid crystal element 111. The first common electrode of the liquid crystal element 111 is supplied with a predetermined reference voltage. Place V COM1 is given.

[0024] The specific connections between the liquid crystal element 111, the transistor 112, and the capacitor element 113 will be described below. Explain the relationship.

[0025] In this specification, the term "connection" means electrical connection, and is not limited to current, voltage, or potential. Therefore, the connected state is the state where the It does not necessarily refer to a connected state, but rather to a state in which a current, voltage or potential can be supplied or or transmittable through circuit elements such as wiring, resistors, diodes, and transistors. This also includes situations where the connection is indirectly made via a direct connection.

[0026] In addition, even if components that are independent on the circuit diagram are connected, In the case of the above, for example, when a part of the wiring functions as an electrode, one conductive film is connected to a plurality of components. In this specification, the term "connection" refers to such a conductive A membrane that combines the functions of multiple components is also included in this category.

[0027] The source and drain of a transistor are determined by the channel type and each terminal of the transistor. The name changes depending on the level of the potential applied to the transistor. Generally, n-channel In a transistor, the terminal to which a low potential is applied is called the source, and the terminal to which a high potential is applied is called the The terminal is called the drain. In addition, in a p-channel transistor, a low potential is applied The terminal to which the high potential is applied is called the drain, and the terminal to which the high potential is applied is called the source. For convenience, let us assume that the source and drain are fixed. In some cases, the relationship between the source and drain is explained, but in reality, the source and drain are named according to the above potential relationship. The parties switch places.

[0028] The source of a transistor is a part of the semiconductor film that functions as an active layer. The term "source electrode" refers to a region or a source electrode connected to the semiconductor film. The drain is a drain region that is a part of the semiconductor film, or a region that is connected to the semiconductor film. The term "gate" refers to a gate electrode.

[0029] In the pixel 100 shown in FIG. 1A, the gate of the transistor 112 is electrically connected to the wiring GL. One of the source and the drain of the transistor 112 is connected to the wiring SL. The other of the source and drain of the transistor 112 is connected to a pixel electrode of the liquid crystal element 111. The capacitor element 113 has a pair of electrodes. One of the electrodes is connected to the liquid crystal element. The other electrode is electrically connected to the pixel electrode of the pixel 111, and a predetermined potential V COM1 but In the pixel 100 shown in FIG. 1A, the second common electrode of the liquid crystal element 111 is is connected to the wiring CL, and the wiring CL has V COM2 is given.

[0030] In FIG. 1A, a pixel 100 includes a switch that controls input of an image signal to the pixel 100. In the example shown, one transistor 112 is used as a switch. In the embodiment, multiple transistors may function as one switch.

[0031] In one embodiment of the present invention, the off-state current of the transistor 112 is extremely small. The above configuration ensures a long period during which the voltage applied to the liquid crystal element 111 is maintained. Therefore, the image can be displayed over several consecutive frame periods, like a still image. When image signals having the same image information are written to the element 100, the driving frequency is lowered. In other words, the number of times that an image signal is written to the pixel 100 within a certain period of time is reduced. For example, a highly purified oxide semiconductor can be used as a By using the transistor 112 included in the channel formation region, the interval between writing of image signals can be shortened. It can be 10 seconds or more, preferably 30 seconds or more, and more preferably 1 minute or more. The longer the interval at which the image signals are written, the more the power consumption can be reduced. can be done.

[0032] The transistor 112 has a band gap larger than that of silicon or germanium, By using a semiconductor such as an oxide semiconductor having a low intrinsic carrier density, This increases the breakdown voltage and significantly reduces the off-state current. Compared to transistors made of semiconductors such as germanium, This can prevent deterioration of the capacitor 112 and maintain the voltage held in the liquid crystal element 111.

[0033] Even if the amount of charge leaking through transistor 112 is small, it can be affected by several factors. As a result, the electric field applied to the liquid crystal layer may change after the writing of the image signal is completed.

[0034] For example, one of the factors that change the electric field applied to the liquid crystal layer is the introduction of ionic impurities into the alignment film. The liquid crystal material contains ionic impurities, but the impurities are oriented When impurities are adsorbed onto the film, an electric field called residual DC may occur. When residual DC occurs, the electric field applied to the liquid crystal layer changes, so the transmittance of the liquid crystal element 111 The longer the DC voltage is applied to the liquid crystal element, the more the residual DC Therefore, in the driving method in which the interval between writing of image signals is long as in one embodiment of the present invention, In this case, the change in transmittance is larger than in the normal driving method with a frame frequency of about 60 Hz. It's easy to become.

[0035] Another factor that changes the electric field applied to the liquid crystal layer is leakage current flowing through the liquid crystal element 111. When a voltage is applied to the liquid crystal element 111, a current flows between the pixel electrode and the first common electrode. through the liquid crystal layer between the conducting electrodes, or through the liquid crystal layer between the pixel electrode and the second common electrode, Since a small amount of leakage current flows, the voltage applied to the liquid crystal element 111 decreases over time. Therefore, as in one embodiment of the present invention, the interval between writing of image signals is long. For example, in the case of a conventional driving method with a frame frequency of about 60 Hz, The change in transmittance is likely to be large.

[0036] However, in the liquid crystal display device of one embodiment of the present invention, the liquid crystal layer used in the liquid crystal element 111 is A negative liquid crystal material is used, and the specific resistivity of the liquid crystal material is 1.0×10 13 Ω cm or more1. 0×10 16 More preferably, the liquid crystal material has a specific resistivity of 1.0 Ω·cm or less. ×10 14 Ω cm or more 1.0×10 16 In this specification, etc., The specific resistivity of the liquid crystal material is measured at 20°C.

[0037] By using a negative type liquid crystal material for the liquid crystal layer used in the liquid crystal element 111, In addition, the specific resistivity of the liquid crystal material is set within the above range. By doing so, the leakage current flowing through the liquid crystal element 111 can be reduced.

[0038] The liquid crystal element 111 is configured to change the polarity (positive (+) polarity or negative (-) polarity) applied to the liquid crystal layer. For example, the liquid crystal layer of the liquid crystal element 111 may be made of polyimide. When positive-type and negative-type liquid crystal materials are used, the transmittance differs depending on the polarity. Here, the transmittance depending on the polarity when using positive type liquid crystal material and negative type liquid crystal material is The following explains this with reference to Figure 2. Note that positive-type liquid crystal materials are liquid crystals that have positive dielectric anisotropy. A negative type liquid crystal material is a liquid crystal material that has negative dielectric anisotropy.

[0039] FIG. 2(A) shows the case where a positive type liquid crystal material (Merck Co., Ltd.: MLC-7030) is used. Figure 2(B) shows the voltage-transmittance characteristics of a negative-type liquid crystal material (Merck Ltd.: MLC The voltage-transmittance characteristics of the ZnO thin film transistor (A-3006) are shown in Fig. 2(A). The physical properties of the positive liquid crystal material shown in Table 1 are that the anisotropy of the dielectric constant Δε is 3.8, and Resistivity ρ is 4.9×10 14 In addition, the negative type liquid crystal material shown in Figure 2(B) has a The physical properties of the dielectric constant are anisotropy Δε of -3.0 and resistivity ρ of 1.8×10 13 In the voltage-transmittance characteristics shown in Figure 2(A) and (B), The vertical axis represents the voltage (V) and the vertical axis represents the transmittance (%). In the voltage-transmittance characteristic shown in Fig. 1, the solid line indicates the transmittance when positive (+) polarity is applied, The dashed lines represent the transmittance when a negative (-) polarity is applied.

[0040] As shown in Figures 2(A) and (B), when a negative type liquid crystal material is used, the voltage applied to the liquid crystal layer is smaller. It can be seen that the difference in transmittance due to polarity is small. This is due to the flexoelectric effect. The flexoelectric effect is mainly due to the molecular shape and is caused by the orientation distortion. This is a phenomenon in which polarization occurs due to stress.

[0041] For example, spontaneous polarization can be generated by applying splay or bend distortion to a nematic liquid crystal. In reality, the liquid crystal molecules themselves do not distinguish between the polarities of the applied voltage, but The polarization tends to show opposite behavior depending on the polarity of the electric field. Therefore, the transmittance varies depending on the polarity. It is believed that the flexoelectric effect is The polarization P is expressed by the following equation (1).

[0042]

number

[0043] Here, e is the flexo coefficient mainly due to the molecular shape, n is the director of the liquid crystal, The poles are expressed as the product of the flexo coefficient and the orientation distortion.

[0044] For this reason, in order to suppress the occurrence of polarization and reduce flicker, the flexo coefficient or orientation It is preferable to reduce the distortion.

[0045] As shown in Fig. 2(A) and (B), the use of a negative type liquid crystal material leads to the above-mentioned flexotropy. The orientation distortion caused by the electric effect can be reduced.

[0046] In addition, in a liquid crystal display device according to one embodiment of the present invention, a pixel electrode, a first common electrode, and a second common electrode are provided. The liquid crystal element 111 is driven by the electrodes. The following explanation will be given using 1(B).

[0047] FIG. 1B is a cross-sectional view illustrating an example of a liquid crystal element 111 of a liquid crystal display device according to one embodiment of the present invention. Equivalent.

[0048] The liquid crystal element 111 includes a first common electrode 122 on a substrate 120 and a The insulating layer 124, the pixel electrode 126 on the insulating layer 124, and the insulating layer 124 and the pixel electrode 12 A liquid crystal layer 134 on the liquid crystal layer 136, a second common electrode 132 on the liquid crystal layer 134, and a second common electrode 13 2 and a substrate 130 on the substrate 122. Also, as shown in FIG. 1(B), the pixel electrode 126 is an insulating The insulating layer 124 is in contact with the first common electrode 122. The conductive electrode 122, the insulating layer 124, and the pixel electrode 126 are formed on the substrate 120. The common electrode 132 is formed below the substrate 130. The pixel electrode 126 is sandwiched between the insulating layer 124 and the substrate 130. Since slits (slits) are formed, a plurality of pixel electrodes 126 are shown in FIG. It has been done.

[0049] In the cross-sectional view shown in FIG. 1B, the liquid crystal element 111a has a first common electrode 122 The first common electrode 122 is formed of a pixel electrode 126 and a liquid crystal layer 134. and the pixel electrode 126 to control the alignment state of the liquid crystal layer 134. The liquid crystal element 111b includes a second common electrode 132 and a pixel electrode 126. , and a liquid crystal layer 134. By applying a voltage, the alignment state of the liquid crystal layer 134 can be controlled. The liquid crystal element 111c applies a voltage between the first common electrode 122 and the second common electrode 132. In this way, the alignment state of the liquid crystal layer 134 can be controlled. The capacitance element 113 includes a first common electrode 122, an insulating layer 124, and a pixel electrode 126. The insulating layer 124 functions as a dielectric layer of the capacitor element 113. .

[0050] In the cross-sectional view shown in FIG. 1B, the voltage applied to the liquid crystal layer 134 is indicated by arrows. It is expressed formally.

[0051] For example, 5.5V is applied to the pixel electrode 126, 0V is applied to the first common electrode 122, and By applying 0.8 V to the conducting electrodes 132, the liquid crystal element 11 shown in FIG. In this case, the first common electrode 122 and the second common electrode 132 Since the potential difference between the electrodes is 0.8 V, the effect of the electric field of the liquid crystal element 111c shown in FIG. On the other hand, there is a potential difference of 5.5 V between the first common electrode 122 and the pixel electrode 126. Therefore, there is a potential difference of 4.7V between the pixel electrode 126 and the second common electrode 132. The alignment direction of the liquid crystal in the liquid crystal layer 134 is mainly determined by the potential between the first common electrode 122 and the pixel electrode 126. The potential difference between the first common electrode 132 and the second common electrode 133 is controlled by the potential difference between the first common electrode 132 and the second common electrode 133. This can assist the alignment control of the liquid crystal element 111 by the conductive electrode 122 and the pixel electrode 126. Therefore, the first common electrode 122 and the second common electrode 132 can be powered by independent power supplies. It is preferable that the electrodes are connected to lines so that each can be controlled at an independent potential.

[0052] In this way, the potential difference between the first common electrode 122 and the pixel electrode 126 causes the first common electrode By reducing the potential difference between the first common electrode 122 and the second common electrode 132, the transmittance of the liquid crystal layer 134 can be reduced. The change can be kept small.

[0053] The liquid crystal layer 134 of the liquid crystal element 111 is made of a negative type liquid crystal material and has a resistivity of 0.1 μm. The rate is 1.0 x 10 13 Ω cm or more 1.0×10 16 It is preferable to keep it at Ω·cm or less.

[0054] In this manner, the liquid crystal layer 134 is connected to the first common electrode 122, the pixel electrode 126, and the second common electrode 124. By controlling the three electrodes of the electrode 132 and using a negative type liquid crystal, The change in transmittance of the liquid crystal layer 134 can be suppressed to a small value, thereby preventing flicker from being visible. This is an excellent effect that can be achieved only in one embodiment of the present invention.

[0055] In the liquid crystal display device according to one embodiment of the present invention, the voltage V LC1 Hold Since the function of the capacitance element 113 can be achieved by the capacitance element 113, the area of ​​the capacitance element 113 can be reduced. That is, it is possible to suppress the area of ​​the capacitor 113 to be small and prevent flicker from being visually recognized. This makes it possible to suppress the pixel size from being increased. In addition, the interval at which image signals are written to the pixels can be lengthened, reducing eye fatigue. It is therefore possible to realize a liquid crystal display device that is easy on the eyes.

[0056] <Panel configuration example> Next, a configuration example of a panel, which corresponds to one aspect of a liquid crystal display device, will be described.

[0057] In the panel 230 shown in FIG. 3, a pixel section 231 includes a plurality of pixels 100 and a A wiring GL indicated by wiring GL1 to wiring GLy (y is a natural number) for selecting each The wirings SL1 to SLx (x is a self-contained wiring) are used to supply image signals to the selected pixel 100. The signal input to the wiring GL is provided by the driving circuit The input of the image signal to the wiring SL is controlled by a driving circuit 233. The pixels 100 are controlled by at least one of the wirings GL and at least one of the wirings SL. are also connected to one another.

[0058] The type and number of wirings provided in the pixel section 231 depend on the configuration, number and Specifically, in the case of the pixel unit 231 shown in FIG. The pixels 100 in a row are arranged in a matrix, and wirings SL1 to SLx and wiring GL 1 to GLy are arranged in the pixel portion 231.

[0059] In one aspect of the present invention, the drive circuits 232 and 233 are intermittently put into an operating state. This significantly reduces the number of times that image signals are written to the pixel unit 231 while maintaining the image display. For example, a transistor having a channel formation region made of a highly purified oxide semiconductor can be used. When using the transistor 112, the length of the frame period is set to 10 seconds or more, preferably 30 seconds or more. , and more preferably, can be set to 1 minute or more. 233 driving frequency can be significantly reduced, and the power consumption of the liquid crystal display device can be reduced. This can be done.

[0060] Note that in one embodiment of the present invention, image signals are transmitted from the driver circuit 233 to the wirings SL1 to SLx. Alternatively, a dot sequential drive may be used in which a signal is input in sequence from the drive circuit 233 to the wirings SL1 to SL2. Alternatively, a line-sequential driving method may be used in which image signals are simultaneously input to the wirings SLx. In the liquid crystal display device according to one embodiment, a driving method is provided in which an image signal is input to each of the plurality of wirings SL in sequence. You may use the law.

[0061] In addition, the wiring GL may be selected in either a progressive or interlace format. may also be used.

[0062] In addition, the response time of liquid crystal is generally 10 seconds from when a voltage is applied until the transmittance converges. Therefore, the slow response of the liquid crystal is easily perceived as blurring of moving images. Therefore, in one embodiment of the present invention, the voltage applied to the liquid crystal element 111 is temporarily increased. It is also possible to use overdrive driving, which quickly changes the alignment of the liquid crystal. By using a light-drive drive, the response speed of the liquid crystal is increased, blurring of the video is prevented, and the video image is clear. Quality can be improved.

[0063] In addition, even after the transistor 112 is turned off, the transmission If the dielectric constant does not converge but continues to change, the dielectric constant of the liquid crystal changes, and the retention of the liquid crystal element 111 In particular, the voltage applied to the liquid crystal element 111 as in one embodiment of the present invention is easily changed. When the capacitance value of the capacitance element 113 is small, the change in the voltage held by the liquid crystal element 111 is However, by using the above-mentioned overdrive, the response time can be shortened. Therefore, the liquid crystal element 114 can be prevented from being turned off after the transistor 112 is turned off. Therefore, the change in the transmittance of the liquid crystal element 111 can be reduced. Even if the capacitance value of the connected capacitor 113 is small, the transistor 112 is in a non-conducting state. After this, the voltage held by the liquid crystal element 111 can be prevented from changing.

[0064] Furthermore, the liquid crystal material used in the liquid crystal element 111 is a negative type liquid crystal material with a resistivity of 1.0×1 0 13 Ω cm or more 1.0×10 16 Ω·cm or less, the transistor 112 is It is possible to prevent the voltage held by the liquid crystal element 111 from changing after the liquid crystal element 111 is turned on. .

[0065] <Configuration Example of Liquid Crystal Display Device> Next, a configuration example of a liquid crystal display device according to one embodiment of the present invention will be described.

[0066] FIG. 4 is a block diagram illustrating an example of a configuration of a liquid crystal display device according to one embodiment of the present invention. The liquid crystal display device 240 shown in FIG. 4 includes a panel 230 having a plurality of pixels 100 in a pixel section 231. 4. The liquid crystal display device shown in FIG. The device 240 includes an input device 242, a CPU 243, an image processing circuit 244, and an image memory 245. The liquid crystal display device 240 shown in FIG. 32 and a drive circuit 233.

[0067] The controller 241 controls the operation of the drive circuit 232, the drive circuit 233, etc. The driving circuit 23 has a function of supplying various driving signals to the panel 230. A start pulse signal for the drive circuit 233 that controls the operation of the drive circuit 233, a start pulse signal for the drive circuit 232 that controls the operation of the drive circuit 232; Included are a clock signal for circuit 232 and the like.

[0068] The input device 242 provides information and commands to the CPU 243 of the liquid crystal display device 240. For example, the panel 230 can be switched from an operating state to a stopped state from the input device 242. or a command for transitioning the pixel unit 231 from a stopped state to an operating state. The instructions can be given to the CPU 243. The input device 242 can include a keyboard, a mouse, A display, touch panel, etc. can be used.

[0069] The CPU 243 decodes the command input from the input device 242 and displays the command on the liquid crystal display device 24. It has the function of executing the command by comprehensively controlling the operation of various circuits in 0. .

[0070] For example, a command to transition the pixel unit 231 from an operating state to a stopped state is received from the input device 242. When the power supply voltage V p is stopped, and the supply of the drive signal to the panel 230 is stopped. Issues a command to the controller 241.

[0071] Alternatively, a command to transition the pixel unit 231 from a stopped state to an operating state is input from the input device 242. When the power supply voltage V p and resume the supply of the drive signal to the panel 230. The controller 241 is instructed to:

[0072] The image memory 245 stores data 246 having image information input to the liquid crystal display device 240. In FIG. 4, the liquid crystal display device has only one image memory 245. In the example shown, the image memory 245 is provided in the liquid crystal display device 240. For example, three pieces of data each corresponding to a hue such as red, blue, and green may be provided. When a full-color image is displayed on the pixel section 231, the data 24 for each hue is 6, an image memory 245 corresponding to each of the above may be provided.

[0073] The image memory 245 may be, for example, a dynamic random access memory (DRAM). s Memory), SRAM (Static Random Access Memo) Alternatively, the image memory 245 may include a VRAM (Video Random Access Memory). Alternatively, video RAM may be used.

[0074] The image processing circuit 244 processes the image data of the data 246 according to an instruction from the controller 241. The data is written to the image memory 245 and the data 246 is read from the image memory 245. The image sensor 244 has a function of generating an image signal from the image sensor 246.

[0075] The power supply circuit 247 not only supplies the power supply voltage Vp to the panel 230 but also provides a potential V COM 1 and potential V COM 2 to the pixel 100.

[0076] <Top view of pixel> Next, an example of a top view of the pixel 100 shown in FIG. 1(A) is shown in FIG. In order to clarify the top view of the pixel 100, some of the components such as the gate insulating film are omitted. In addition, the cuts between dashed lines A1 and A2 and between dashed lines A3 and A4 shown in FIG. A cross-sectional view corresponding to the cross section is shown in FIG.

[0077] The pixel 100 shown in FIGS. 5 and 6 includes a transistor 1 on a substrate 302 having an insulating surface. A conductive film 304 having a function as the gate of the gate electrode 12 and a function as the wiring GL is provided. In addition, a first common electrode A first common electrode 318 is provided, which functions as a first common The electrode 318 is connected to a potential V COM1 is supplied.

[0078] In addition, an insulating film 306 is provided on the substrate 302 so as to cover the conductive film 304 . Then, the transistor 112 is provided at a position overlapping with the conductive film 304 with the insulating film 306 interposed therebetween. An oxide semiconductor film 308 functioning as a channel formation region is provided. Conductive films 310 and 312 are provided on the film 308. A conductive film 313 formed in the same process as the conductive film 310 is provided on the insulating film 306. functions as the wiring SL and as the source or drain of the transistor 112. The conductive film 312 functions as a source or a drain of the transistor 112. In addition, the conductive film 313 functions as a capacitance line.

[0079] Further, over the insulating film 306, the oxide semiconductor film 308, and the conductive films 310, 312, and 313, An insulating film 314 is provided on the insulating film 314. The insulating film 314 and 316 are provided with a conductive film 3 An opening 360 is provided that reaches the conductive film 312. 13. An opening 362 is provided which reaches

[0080] A first common electrode 318 is provided on the insulating film 316. The insulating film 316 and the conductive film 313 are connected to each other through the opening 362. An insulating film 320 is provided on the first common electrode 318. A pixel electrode 322 is provided at a position where it overlaps with the first common electrode 318. The opening 364 is located at a position overlapping the opening 360, and the openings 360 and 364 are interposed between the openings 360 and 364. The conductive film 312 and the pixel electrode 322 are connected to each other. As shown in the top view, the insulating film 320 and the pixel electrode 322 have an opening (slit). An alignment film 324 is provided on the electrode 322 .

[0081] Further, a substrate 330 is provided so as to face the substrate 302. The light-shielding film 332 has a function of blocking visible light, and the light-shielding film 333 has a function of transmitting visible light in a specific wavelength range. A color film 334, an insulating film 336 in contact with the light-shielding film 332 and the color film 334, and a A second common electrode 338 contacting the first common electrode 338 and an alignment film 340 contacting the second common electrode 338 are provided. The insulating film 336 is formed by forming the light-shielding film 332 and the colored film 334 in such a manner that the surface shapes of the light-shielding film 332 and the colored film 334 are the same as the second common film. It has a function of suppressing the deterioration of the flatness of the electrode 338 or the alignment film 340. The border film 336 may not be provided.

[0082] Between the substrate 302 and the substrate 330, an alignment film 324 and an alignment film 340 are provided. As shown in FIG. 1, a liquid crystal layer 350 containing a liquid crystal material is provided. A first common electrode 318, an insulating film 320, a pixel electrode 322, a second common electrode 338, and a liquid crystal The liquid crystal layer 350 is made of a negative type liquid crystal material, and the inherent resistance of the liquid crystal material is Resistance is 1.0×10 13 Ω cm or more 1.0×1016 Ω·cm or less.

[0083] <Production Method> Next, an example of a method for manufacturing the pixel shown in FIG. 6 will be described with reference to FIGS. 7 and 8. .

[0084] As shown in FIG. 7(A), after forming a conductive film on a substrate 302, the conductive film is etched. The conductive film 304 is formed by processing the shape by etching or the like. Next, an oxide semiconductor film is formed on the insulating film 306, and then the oxide The semiconductor film is processed by etching or the like to be separated into islands at positions overlapping with the conductive film 304. In this manner, an oxide semiconductor film 308 is formed.

[0085] The substrate 302 is preferably a substrate having a heat resistance sufficient to withstand the subsequent manufacturing steps. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. are used. .

[0086] The conductive film 304 may be made of aluminum, titanium, chromium, cobalt, nickel, copper, or indium. tritium, zirconium, molybdenum, ruthenium, silver, tantalum and tungsten It is preferable to use one or more layers of a film made of one or more conductive materials. For example, The conductive film 304 may be a conductive film in which a copper film is laminated on a tungsten nitride film or a single layer tungsten A stainless steel film can be used.

[0087] The insulating film 306 may be made of aluminum oxide, magnesium oxide, silicon oxide, or nitrogen oxide. Silicon oxide, silicon nitride, silicon oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide and oxide An insulating film containing one or more tantalum chlorides may be used in a single layer or a multilayer structure.

[0088] For example, when the insulating film 306 has a two-layer structure, the first layer is a silicon nitride film and the second layer is a silicon nitride film. The second silicon oxide film is a silicon oxynitride film. In addition, the first silicon nitride film can be made into a silicon oxide nitride film. can be done.

[0089] It is preferable to use a silicon oxide film having a small defect density. , Electron Spin Resonance (ESR) The spin density of the spins originating from the signal with a value of 2.001 is 3×10 17 spins / cm 3 Less than or equal to 5×10 16 spins / cm 3 The following silicon oxide film is used. The silicon oxide film is preferably a silicon oxide film containing excess oxygen. The silicon nitride film used is one that releases less hydrogen and ammonia. The amount of emission was measured using the Thermal Desorption Spectroscope (TDS). y: Thermal desorption spectroscopy) analysis.

[0090] Materials that can be used for the oxide semiconductor film 308 are described in detail in Embodiment 2. In addition, the oxide semiconductor film used as the oxide semiconductor film 308 contains a large amount of hydrogen. When the oxide semiconductor is bonded to hydrogen, some of the hydrogen becomes a donor and the carrier This causes the threshold voltage of the transistor to shift in the negative direction. Therefore, after the formation of the oxide semiconductor film, a dehydration treatment (dehydrogenation Hydrogen or moisture is removed from the oxide semiconductor film by a chemical treatment to minimize the amount of impurities contained therein. It is preferable to do so.

[0091] Note that the oxide semiconductor film is dehydrated (dehydrogenated) to Therefore, the oxide semiconductor film is preferably subjected to a dehydration treatment (dehydrogenation treatment). In order to compensate for oxygen vacancies increased by the above-mentioned process, oxygen is added to the oxide semiconductor film. It is preferred.

[0092] In this manner, the oxide semiconductor film is dehydrated by dehydration treatment (dehydrogenation treatment). By removing oxygen and filling the oxygen vacancies with oxygen addition treatment, the i-type (intrinsic) or The oxide semiconductor film can be an oxide semiconductor film that is nearly i-type and is substantially i-type (intrinsic).

[0093] Next, as shown in FIG. 7B, a conductive film is formed over the insulating film 306 and the oxide semiconductor film 308. After the formation of the conductive film, the shape of the conductive film is processed by etching or the like, so that the oxide semiconductor Conductive films 310 and 312 are formed in contact with the film 308. A conductive film 313 is formed on the insulating film 306 in the same manner as in the step 2.

[0094] The conductive films 310, 312, and 313 may be made of, for example, aluminum, titanium, chromium, or nickel. Nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten A single metal consisting of tin or an alloy consisting mainly of this metal, in a single layer structure or a laminated structure. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a tongue A two-layer structure in which a titanium film is laminated on a stainless steel film, and a copper-magnesium-aluminum alloy film is laminated on A two-layer structure in which a copper film is laminated, a titanium film or titanium nitride film, and the titanium film or titanium nitride film are laminated. An aluminum film or copper film is laminated on the silicon film, and a titanium film or nitride film is further laminated on top of that. A three-layer structure that forms a titanium film, a molybdenum film or a molybdenum nitride film, and the molybdenum An aluminum film or a copper film is laminated on the film or the molybdenum nitride film, and then an aluminum film or a copper film is laminated on the film or the molybdenum nitride film. There are three-layer structures in which a molybdenum film or a molybdenum nitride film is formed on the indium oxide film. A transparent conductive material containing aluminum, tin oxide, or zinc oxide may be used. For example, a sputtering method can be used.

[0095] Next, as shown in FIG. 7C, the insulating film 306, the oxide semiconductor film 308, and the conductive film 3 An insulating film 314 is formed on the layers 10, 312, and 313.

[0096] The insulating film 314 is, for example, a thin film disposed in a vacuum-evacuated processing chamber of a plasma CVD apparatus. The substrate is heated to 180° C. or higher and 400° C. or lower, more preferably 200° C. or higher and 370° C. or lower. The pressure in the processing chamber is maintained at 30 Pa or more and 250 Pa or less by introducing a raw material gas into the processing chamber. The pressure is preferably 40 Pa or more and 200 Pa or less. Depending on the conditions under which the high frequency power is supplied, a silicon oxide film or a silicon oxynitride film is formed.

[0097] The source gas for the insulating film 314 is a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, trisilane, and tetrasilane. Examples of oxidizing gases include oxygen, ozone, nitrous oxide, and Nitric oxide, etc.

[0098] In this embodiment, the insulating film 314 has a laminated structure of a first insulating film and a second insulating film. For example, the first insulating film is made of silane with a flow rate of 20 sccm and silane with a flow rate of 3000 sccm. The pressure in the processing chamber was 40 Pa, the substrate temperature was 220°C, and A 7.12MHz high-frequency power source was used to supply 100W of high-frequency power to parallel plate electrodes. A silicon oxynitride film with a thickness of 50 nm is formed by the plasma CVD method. The CVD equipment has an electrode area of ​​6000 cm 2 This is a parallel plate type plasma CVD device. The power supplied can be converted to power per unit area (power density) of 1.6 x 10 -2 W / c m 2 Under these conditions, a silicon oxynitride film that is permeable to oxygen can be formed. do.

[0099] The second insulating film is formed by first insulating a substrate placed in a processing chamber of a plasma CVD apparatus that has been evacuated. The temperature is kept at 80° C. or higher and 260° C. or lower, and more preferably at 180° C. or higher and 230° C. or lower. The raw material gas is introduced into the processing chamber so that the pressure in the processing chamber is 100 Pa or more and 250 Pa or less, and more preferably Preferably, the pressure is 100 Pa or more and 200 Pa or less, and the pressure applied to the electrode provided in the treatment chamber is 0.17 W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 More than 0.35W / cm 2 Silicon oxide film or silicon oxynitride film is formed by supplying the following high frequency power. A film is formed.

[0100] As the film forming conditions for the second insulating film, a high frequency power having the above power density is applied in a processing chamber at the above pressure. By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the second insulating film becomes lower than the stoichiometric composition. However, when the substrate temperature is set to the above temperature, the bonding strength between silicon and oxygen becomes As a result, the oxygen in the stoichiometric composition is less than that of the oxygen in the stoichiometric composition. It is possible to form an oxide insulating film that contains more oxygen than the silicon oxide film and from which some of the oxygen is released by heating. Cut.

[0101] In this embodiment, the second insulating film is made of silane with a flow rate of 160 sccm and silane with a flow rate of 400 The source gas was dinitrogen monoxide at 0 sccm, the pressure in the processing chamber was 200 Pa, and the substrate temperature was 22 The temperature was set at 0°C, and a 27.12MHz high-frequency power source was used to apply 1500W of high-frequency power to the parallel plate. A 400 nm thick silicon oxynitride film is formed by plasma CVD using a magnetron. The plasma CVD device has an electrode area of ​​6000 cm. 2 Parallel plate plasma C The power density per unit area (power density) is 2.5 ×10 -1 W / cm 2 It is.

[0102] Next, at least the insulating film 314 is formed, and then a heat treatment is performed to remove the oxides contained in the insulating film 314. The oxygen is transferred to the oxide semiconductor film 308 to fill the oxygen vacancies in the oxide semiconductor film 308. It is preferable that

[0103] Next, as shown in FIG. 7(D), a desired region of the insulating film 314 is processed to form a conductive film 312. An opening 360 reaching the conductive film 313 and an opening 362 reaching the conductive film 313 are formed.

[0104] The openings 360 and 362 can be formed by, for example, dry etching or wet etching. In addition, a combination of dry etching and wet etching is used. In this way, openings 360 and 362 may be formed.

[0105] Next, as shown in FIG. 8A, an insulating film 316 having an opening is formed. The insulating film 316 has openings at positions corresponding to the openings 360 and 362. This is a film that serves as the base for the common electrode 318. It is made of transistors, conductive films, etc., and is used to form the first common electrode It has a function of preventing unevenness from being formed on the surface of the substrate 318. In other words, it has a function as a flattening film. The insulating film 316 may be made of an acrylic resin, a polyimide resin, or the like.

[0106] Next, as shown in FIG. 8B, a first common electrode 318 is formed on the insulating film 316. Thereafter, an insulating film 320 is formed so as to cover the insulating film 316 and the first common electrode 318 . The first common electrode 318 is connected to the conductive film 313 through the opening 362 .

[0107] The first common electrode 318 may be made of, for example, indium oxide containing tungsten oxide, Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, acid Indium tin oxide, indium tin oxide, indium zinc oxide, oxide containing titanium A conductive film containing indium tin oxide or the like to which silicon is added can be used. The first common electrode 318 can be formed by using a sputtering method.

[0108] The insulating film 320 may be a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a nitride film, or the like. A silicon oxide film or the like can be used. In particular, the insulating film 320 is a dielectric material for the capacitance element. The insulating film is made of nitrogen because it functions as a protective film for the transistor. A silicon oxide film or a silicon nitride oxide film is preferred.

[0109] The insulating film 320 is, for example, a silicon nitride film having a thickness of 50 nm or more and 400 nm or less. Alternatively, a silicon nitride oxide film or the like can be used. In this embodiment, the insulating film 32 For 0, a silicon nitride film with a thickness of 100 nm is used.

[0110] In addition, the silicon nitride film is preferably formed at a high temperature in order to enhance blocking properties. Preferably, the substrate temperature is 100° C. or higher and lower than the distortion point of the substrate, more preferably 300° C. or higher and 400° C. or higher. It is preferable to form the film by heating at a temperature of 00°C or less. However, when forming the film at a high temperature, In some cases, oxygen may be released from the oxide semiconductor film 308, causing an increase in the carrier concentration. Therefore, the temperature must be set at a level at which such a phenomenon does not occur.

[0111] Next, as shown in FIG. 8C, an opening 364 is formed in the insulating film 320. The insulating film 316 is provided with an opening 360, which is formed in the insulating film 316. The opening 364 is formed so as to expose the conductive film 312. , the openings 360, 362 can be formed using the methods described above.

[0112] Next, as shown in FIG. 8(D), a pixel electrode 322 is formed on the insulating film 320. The pixel electrode 322 is connected to the conductive film 312 through the openings 360 and 364 .

[0113] The pixel electrode 322 is formed by forming a transparent conductive film on the insulating film 320 and then etching the transparent conductive film. It is formed by processing the shape of the transparent conductive film.

[0114] The pixel electrode 322 is made of indium oxide containing tungsten oxide, tungsten oxide, Indium zinc oxide with tin oxide, Indium oxide with titanium oxide, Titanium oxide Including indium tin oxide, indium tin oxide, indium zinc oxide, silicon oxide A conductive film containing indium tin oxide or the like to which ZnO is added can be used.

[0115] Next, an alignment film 324 (not shown) is formed on the insulating film 320 and the pixel electrodes 322. The alignment film 324 can be formed by using a rubbing method, a photoalignment method, or the like.

[0116] Through the above steps, the structure formed on the substrate 302 can be formed.

[0117] Next, a method for fabricating a structure formed below a substrate 330 provided opposite the substrate 302 will be described. The following will explain this.

[0118] First, a substrate 330 is prepared. The substrate 330 is made of the same material as that of the substrate 302. Next, a light-shielding film 332 and a colored film 334 are formed in contact with the substrate 330. The light film 332 and the color film 334 can be made of various materials by printing, inkjet, photolithography, etc. They are formed at the desired positions by an etching method using lithography technology.

[0119] Next, an insulating film 336 is formed in contact with the light-shielding film 332 and the colored film 334. For example, an organic insulating film made of an acrylic resin or the like can be used as the insulating film 336. By forming the colored film 334, for example, impurities contained in the colored film 334 can be removed to the liquid crystal layer 350 side. It is possible to suppress the diffusion of the

[0120] Next, a second common electrode 338 is formed in contact with the insulating film 336. Examples of the conductive film that can be used include indium oxide containing tungsten oxide, oxide Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide (ITO) containing tin, in ... Conductive materials with light-transmitting properties such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used for the second common electrode 338. For example, the insulating film 11 can be formed by sputtering.

[0121] Next, an alignment film 340 is formed in contact with the second common electrode 338. The method for forming the alignment film 324 can be used.

[0122] Through the above steps, the structure formed below the substrate 330 can be formed.

[0123] Thereafter, a liquid crystal layer 350 is formed between the substrate 302 and the substrate 330. The method of forming the film may be a dispenser method (dropping method) or a method of bonding the substrate 302 and the substrate 330 together. Then, liquid crystal is injected by utilizing capillary action after the liquid crystal is heated.

[0124] Through the above steps, the pixel shown in FIG. 6 can be fabricated.

[0125] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0126] (Embodiment 2) In this embodiment, an oxide that can be used in the liquid crystal display device of one embodiment of the present invention is The semiconductor film will be described.

[0127] Impurities such as water or hydrogen, which act as electron donors, are reduced, and oxygen deficiency is eliminated. The highly purified oxide semiconductor (purified OS) has the following properties: i-type (intrinsic semiconductor) or extremely close to i-type. Therefore, a highly purified oxide semiconductor film A transistor having a channel formation region in a gate insulating film has an extremely small off-state current and high reliability.

[0128] Specifically, a transistor having a channel formation region in a highly purified oxide semiconductor film The small off-state current can be proven by various experiments. For example, when the channel width is 1× 10 6 Even in a device with a channel length of 10 μm, the voltage between the source and drain electrodes is In the drain voltage range of 1V to 10V, the off-state current is Below the measurement limit of the analyzer, i.e. 1×10 -13 You can get a characteristic of A or less. In this case, the off-state current normalized by the channel width of the transistor is 100zA / μm or less. In addition, by connecting the capacitance element and the transistor, The off-state current is measured using a circuit that controls the charge flowing out of the capacitor with the transistor. In this measurement, a highly purified oxide semiconductor film was used as a channel of the transistor. The on / off state of the transistor is calculated from the change in the charge amount per unit time of the capacitance element. The current flowing through the transistor was measured. As a result, the voltage between the source and drain electrodes of the transistor was 3V In the case of , it was found that an even smaller off-current of several tens of yA / μm can be obtained. Therefore, a transistor in which a highly purified oxide semiconductor film is used for a channel formation region has an off-state The current is significantly smaller than that of a transistor using crystalline silicon.

[0129] Unless otherwise specified, the off-state current in this specification refers to the off-state current in an n-channel transistor. In this case, the drain is at a higher potential than the source and gate, and the source potential is When the gate potential is below 0, the current that flows between the source and drain is Alternatively, in this specification, the off-state current refers to a current in a p-channel transistor. In this case, the drain is set to a lower potential than the source and gate, and the source potential is set to When the gate potential is greater than or equal to 0, the current that flows between the source and drain is It means flow.

[0130] As the oxide semiconductor, at least indium (In) or zinc (Zn) is used. It is preferable to include a stabilizer for reducing the variation in the electrical characteristics of the transistor. It is preferable to have gallium (Ga) in addition to the above as a riser. It is preferable to have tin (Sn) as a stabilizer. It is preferable to use aluminum ( It is preferable that the alloy contains zirconium (Zr) as a stabilizer. It is preferable to do so.

[0131] Among oxide semiconductors, In-Ga-Zn oxide and In-Sn-Zn oxide are Unlike silicon carbide, gallium nitride, or gallium oxide, it is not produced by sputtering or wet deposition. This method makes it possible to fabricate transistors with excellent electrical characteristics, and is suitable for mass production. In addition, unlike silicon carbide, gallium nitride, or gallium oxide, The In-Ga-Zn oxide is used to fabricate transistors with excellent electrical characteristics on a glass substrate. It is also possible to manufacture larger substrates.

[0132] Other stabilizers include the lanthanides lanthanum (La) and cerium. (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium Eu, Gadolinium (Gd), Terbium (Tb), Dysprosium (Dy), Luminium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), It may contain one or more of lutetium (Lu).

[0133] For example, oxide semiconductors include indium oxide, gallium oxide, tin oxide, zinc oxide, In-Zn oxide, Sn-Zn oxide, Al-Zn oxide, Zn-Mg oxide, Sn-Mg oxide, In-Mg oxide, In-Ga oxide, In-Ga-Zn oxide oxide (also written as IGZO), In-Al-Zn oxide, In-Sn-Zn oxide , Sn-Ga-Zn oxide, Al-Ga-Zn oxide, Sn-Al-Zn oxide, In-Hf-Zn oxide, In-La-Zn oxide, In-Pr-Zn oxide, I n-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, In -Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In- Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In-Y b-Zn oxide, In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, In -Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Z n-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide It is possible.

[0134] For example, In-Ga-Zn oxide is an oxide containing In, Ga, and Zn. The ratio of In, Ga, and Zn does not matter. In-Ga-Zn oxides have a sufficiently high resistance when no electric field is present, and therefore The current can be made sufficiently small, and the mobility is also high.

[0135] For example, In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:1.2 (5:5 :6), atomic ratios such as In:Ga:Zn=2:2:1, In:Ga:Zn=3:1:2 In-Ga-Zn oxides or oxides with compositions close to those can be used. , In:Sn:Zn=1:1:1, In:Sn:Zn=2:1:3 or In:Sn: Using In-Sn-Zn oxide with an atomic ratio of Zn=2:1:5 and oxides with similar compositions, It would be good to have one.

[0136] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. However, in the case of In-Ga-Zn oxides, the mobility can be improved by reducing the defect density in the bulk. It can be raised.

[0137] Oxide semiconductor films are roughly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. The non-single-crystal oxide semiconductor film is called CAAC-OS (C Axis Aligned Crystal-Oxide Semiconductor Film). (stalline oxide semiconductor) film, polycrystalline oxide semiconductor The oxide semiconductor film includes a film, a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, and the like.

[0138] Here, we describe a CAAC-OS film.

[0139] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts. The crystal part is small enough to fit inside a cube with one side less than 100 nm. The crystal parts contained in the OS film are cubes with one side less than 10 nm, 5 nm, or 3 nm. This also includes cases where the size fits within the

[0140] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between crystal parts were observed, i.e. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0141] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects a convexity, and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0142] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0143] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" refers to two straight lines that form an angle between 80° and 100°. Therefore, cases between 85° and 95° are also included.

[0144] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0145] X-ray diffraction (XRD) of CAAC-OS film When the structure was analyzed using the device, for example, CAAC-OS with InGaZnO4 crystals was In the out-of-plane analysis of the film, the diffraction angle (2θ) peaked at around 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis faces the surface on which the film is formed or the upper surface. It can be seen that it is oriented in a roughly vertical direction.

[0146] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a nitride semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is the axis (φ axis). When the sample is rotated and analyzed (φ scan), a crystal plane equivalent to the (110) plane is detected. In contrast, in the case of the CAAC-OS film, six peaks are observed, which are assigned to Even when φ is fixed at around 56° and scanned, no clear peak appears.

[0147] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0148] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned to the surface on which the CAAC-OS film is to be formed. For example, in the CAAC-OS film, When the shape is changed by etching, the c-axis of the crystal is aligned with the CAAC-OS film. It may not be parallel to the face or top surface normal vector.

[0149] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.

[0150] In addition, the out-of-plane crystal structure of the CAAC-OS film with InGaZnO4 crystals In the analysis by the method, in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° is due to the (311) plane of the ZnGa2O4 crystal. Therefore, it is considered that the Z-type ZnO crystals are present in a part of the CAAC-OS film. The CAAC-OS film shows that it contains nGa2O4 crystals. It is preferable that the peak be present near the 2θ value of 36° and that the peak be absent near the 2θ value of 36°.

[0151] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are disturbed, which causes a decrease in crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0152] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0153] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.

[0154] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0155] CAAC-OS films are formed by sputtering a polycrystalline metal oxide target. When ions collide with the target, the target is decomposed by the ions. The crystal region is cleaved from the ab plane and has a flat or pellet-like shape with a surface parallel to the ab plane. It may peel off as sputtered particles. In this case, the plate or pellet The sputtered particles reach the substrate while maintaining their crystalline state, resulting in CAAC-OS A film can be formed.

[0156] In addition, the following conditions are preferably applied to form the CAAC-OS film.

[0157] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the processing chamber In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of −80° C. or lower, preferably −100° C. or lower is used.

[0158] In addition, by increasing the substrate heating temperature during film formation, the microstructure of sputtered particles is improved after they reach the substrate. Specifically, the substrate heating temperature is set to 100° C. or higher and 740° C. or lower, preferably The film is formed at a temperature between 200 and 500°C. By increasing the substrate heating temperature during film formation, When flat or pellet-shaped sputtered particles reach the substrate, they migrate onto the substrate. sputtering occurs, and the flat surfaces of the sputtered particles are deposited on the substrate.

[0159] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. Expressed as volume percent.

[0160] In addition, the oxide semiconductor layer may have a stacked structure.

[0161] Here, the oxide semiconductor film 308 used in the transistor 112 shown in FIG. An example of a laminated structure of a semiconductor film 307 and an oxide semiconductor film 309 will be described with reference to FIG. Do the following.

[0162] FIG. 9A shows an oxide semiconductor film used in the transistor 112. 307 and an oxide semiconductor film 309. The configuration of this transistor is the same as that of the transistor 112 shown in FIG. 6, and the above description can be taken into consideration. do.

[0163] The oxide semiconductor film 307 and the oxide semiconductor film 309 have at least one common constituent element. Alternatively, the oxide semiconductor film 307 and the oxide semiconductor film The constituent elements of 309 may be the same, but the compositions of the two may be different.

[0164] The oxide semiconductor film 307 is an In-M-Zn oxide (wherein M is Al, Ga, Ge, Y, Zr, or S In the case of In, La, Ce or Hf, the spatula used to deposit the In-M-Zn oxide film The atomic ratio of the metal elements in the ion implantation target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is In:M:Z. n=1:1:1, In:M:Zn=5:5:6(1:1:1.2), In:M:Zn=3 Note that the atomic ratio of the oxide semiconductor film 307 to be formed is preferably 1:1:2. The difference is the plus or minus of the atomic ratio of the metal elements contained in the sputtering target. Includes a 20% fluctuation in speed.

[0165] When the oxide semiconductor film 307 is an In-M-Zn oxide, the The atomic ratio of In and M in the above-mentioned alloy is preferably 25 atomic % or more of In and 75 atomic % or less of M. More preferably, In is 34 atomic % or more and M is 66 atomic % or less. Less than c%.

[0166] The oxide semiconductor film 307 has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, the oxide semiconductor having a wide energy gap is By using a conductor, the off-state current of the transistor 112 can be reduced.

[0167] The thickness of the oxide semiconductor film 307 is 3 nm to 200 nm, preferably 3 nm to 100 nm. 00 nm or less, and more preferably 3 nm or more and 50 nm or less.

[0168] The oxide semiconductor film 309 is typically made of In-Ga oxide, In-Zn oxide, or In- M-Zn oxide (M is Al, Ga, Ge, Y, Zr, Sn, La, Ce or Hf) The energy of the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 307. Specifically, the energy of the bottom of the conduction band of the oxide semiconductor film 309 and the energy of the bottom of the conduction band of the oxide semiconductor film 307 are The difference in energy from the bottom of the conduction band is 0.05 eV or more, 0.07 eV or more, or 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or That is, the electron affinity of the oxide semiconductor film 309 and the electron affinity of the oxide semiconductor film 304 are 0.4 eV or less. The difference between the electron affinity of 07 and that of 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 e V or less.

[0169] When the oxide semiconductor film 309 contains the element M in a higher atomic ratio than In, (1) The energy gap of the oxide semiconductor film 309 can be increased. (2) The electron affinity of the oxide semiconductor film 309 is reduced. (4) The insulating property is higher than that of the oxide semiconductor film 307. Since M is a metal element with strong bonding strength with oxygen, by having a higher atomic ratio of M than In, Oxygen deficiency is less likely to occur.

[0170] When the oxide semiconductor film 309 is an In-M-Zn oxide, I other than Zn and O is The atomic ratio of n to M is preferably such that In is less than 50 atomic % and M is less than 50 atomic %. ic% or more, more preferably, In is less than 25 atomic % and M is 75 atomic %. % or more.

[0171] The oxide semiconductor film 307 and the oxide semiconductor film 309 are made of In-M-Zn oxide (M is Al, Ga, Ge, Y, Zr, Sn, La, Ce or Hf), oxide semiconductor film The atomic ratio of M contained in the oxide semiconductor film 309 is larger than that in the oxide semiconductor film 307. The amount of the atoms contained in the oxide semiconductor film 307 is 1.5 times or more, preferably 2 times as large as the amount of the atoms contained in the oxide semiconductor film 307. The atomic ratio is more preferably 3 times or more higher.

[0172] The oxide semiconductor film 309 is formed by oxidizing In:M:Zn=x1:y1:z1 [atomic ratio]. When the compound semiconductor film 307 has an atomic ratio of In:M:Zn=x2:y2:z2, y1 / x 1 is greater than y2 / x2, and preferably, y1 / x1 is 1.5 times or more greater than y2 / x2 More preferably, y1 / x1 is at least twice as large as y2 / x2. In most cases, y1 / x1 is three times larger than y2 / x2. When y2 is equal to or larger than x2, the transistor 102 including the oxide semiconductor film is stable. However, if y2 is three times or more larger than x2, the oxide Since the field effect mobility of the transistor 102 using the nitride semiconductor film is decreased, y is preferably less than three times x2.

[0173] In the case where the oxide semiconductor film 309 is an In-M-Zn oxide, the In-M-Zn oxide is formed. The atomic ratio of the metal elements in the sputtering target used for this purpose is M>In, and furthermore Z It is preferable that n≧M is satisfied. The atoms of the metal elements of such a sputtering target The numerical ratio is In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:3, In:G a:Zn=1:3:4, In:Ga:Zn=1:3:5, In:Ga:Zn=1:3:6 , In:Ga:Zn=1:3:7, In:Ga:Zn=1:3:8, In:Ga:Zn= 1:3:9, In:Ga:Zn=1:3:10, In:Ga:Zn=1:6:4, In: Ga:Zn=1:6:5, In:Ga:Zn=1:6:6, In:Ga:Zn=1:6: 7, In:Ga:Zn=1:6:8, In:Ga:Zn=1:6:9, In:Ga:Zn The ratio is preferably 1:6:10. The atomic ratios of metal elements contained in the nitride semiconductor film 307 and the oxide semiconductor film 309 are The error is the plasma atomic ratio of the metal elements contained in the sputtering target. Includes a 20% fluctuation in ins.

[0174] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density and impurity of the oxide semiconductor film 307 are The concentration of metals, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are appropriately adjusted. It is preferred.

[0175] The oxide semiconductor film 309 is used as a gate insulating film when the insulating film 314 is formed later. The oxide semiconductor film 309 also functions as a film for reducing damage to the oxide semiconductor film 307. The thickness is set to 100 nm or less, preferably 3 nm or more and 50 nm or less.

[0176] In the oxide semiconductor film 307 included in the transistor 112, When silicon or carbon is contained in the oxide semiconductor film 307, oxygen vacancies are increased, and n Therefore, the concentration of silicon or carbon in the oxide semiconductor film 307, The concentration of silicon or carbon in the vicinity of the interface between the oxide semiconductor film 309 and the oxide semiconductor film 307 is (concentration obtained by secondary ion mass spectrometry) is 2×10 18 atoms / cm 3 below , preferably 2 x 10 17 atoms / cm 3 The following applies.

[0177] In addition, in the oxide semiconductor film 307, an alkali metal ion was obtained by secondary ion mass spectrometry. The concentration of metal or alkaline earth metal is 1×10 18 atoms / cm 3 The following is preferably is 2 × 10 16 atoms / cm 3 The following are the alkali metals and alkaline earth metals: When a compound is bonded to an oxide semiconductor, carriers may be generated, increasing the off-state current of a transistor. For this reason, the alkali metal or alkali metal in the oxide semiconductor film 307 may be It is preferable to reduce the concentration of alkaline earth metals.

[0178] When the oxide semiconductor film 307 contains nitrogen, electrons serving as carriers are generated, and The carrier density increases and it becomes easier to make the material n-type. Therefore, the transistor having the oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, in the case of secondary ion mass spectrometry, The nitrogen concentration obtained is 5×10 18 atoms / cm 3 It is preferable to do the following: .

[0179] In the transistor 112 shown in FIG. 9A, the conductive film 304 The insulating film 314 is located between the oxide semiconductor film 307 and the insulating film 314. The oxide semiconductor film 309 is provided on the insulating film 302. Even if a trap level is formed between the films 314 due to impurities and defects, the trap There is a gap between the low level and the oxide semiconductor film 307. 7 is less likely to be captured by the trap level, increasing the on-current of the transistor 112. It is possible to increase the field effect mobility and to increase the trap When an electron is captured at a level, the electron becomes a negative fixed charge. The threshold voltage of the transistor 112 varies. 7 and the trap level, reducing the capture of electrons at the trap level. This makes it possible to reduce the variation in threshold voltage.

[0180] Note that the oxide semiconductor film 307 and the oxide semiconductor film 309 are not simply stacked. A continuous junction (here, the energy of the bottom of the conduction band changes continuously between the layers) is used. In other words, trap centers and recombination centers are formed at the interfaces of each film. The layered structure is formed so that there are no impurities that would create such defect levels. Impurities are present between the stacked oxide semiconductor films 307 and 309. When this happens, the continuity of the energy band is lost, and carriers are trapped or recombined at the interface. They combine and disappear.

[0181] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering apparatus is required for the oxide semiconductor film. In order to remove impurities such as water as much as possible, an adsorption type vacuum pump such as a cryopump is used. High vacuum pump (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 1 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to evacuate the chamber from the exhaust system. It is preferable to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the .

[0182] Here, the band structure of the stacked layer structure included in the transistor 112 is shown in FIG. I will use this to explain.

[0183] FIG. 9B illustrates a schematic diagram of a part of the band structure of the transistor 112. Here, a case where silicon oxide layers are provided as the insulating film 306 and the insulating film 314 will be described. In addition, EcI1 shown in FIG. 9B is a silicon oxide layer used as the insulating film 306. EcS1 is the energy of the bottom of the conduction band of the oxide semiconductor film 307. EcS2 represents the energy of the bottom of the conduction band of the oxide semiconductor film 309, and Ec I2 indicates the energy of the bottom of the conduction band of the silicon oxide layer used as the insulating film 314.

[0184] As shown in FIG. 9B, in the oxide semiconductor film 307 and the oxide semiconductor film 309, The energy at the bottom of the conduction band changes smoothly without any barrier. In other words, it changes continuously. This is because the oxide semiconductor film 307 and the oxide semiconductor film 309 are common. The oxide semiconductor film 307 and the oxide semiconductor film 309 each contain an element, and oxygen is transferred between the oxide semiconductor film 307 and the oxide semiconductor film 309. This can be attributed to the formation of a mixed layer due to the movement of the air.

[0185] As shown in FIG. 9B, the oxide semiconductor film 307 is a well in the oxide semiconductor film 308. ) in the transistor including the oxide semiconductor film 308, the channel formation region is It can be seen that the oxide semiconductor film 308 is formed in the oxide semiconductor film 307. Since the energy of the bottom edge changes continuously, the oxide semiconductor film 307 and the oxide semiconductor film It can also be said that 309 is connected in a continuous manner.

[0186] As shown in FIG. 9B, in the vicinity of the interface between the oxide semiconductor film 309 and the insulating film 314, The insulating film 314 is made of silicon or carbon, and the insulating film 314 is made of impurities or defects. Although a trap level may be formed, the oxide semiconductor film 309 is provided, and therefore, the oxide However, EcS1 and Ec When the energy difference between the oxide semiconductor film 307 and S2 is small, the electrons of the oxide semiconductor film 307 exceed the energy difference. When electrons are captured in the trap level, the insulating film A negative fixed charge is generated at the interface, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable to set the energy difference between EcS1 and EcS2 to 0.1 eV or more. If the threshold voltage is set to 0.15 eV or more, the fluctuation of the threshold voltage of the transistor is reduced and the transistor can be stabilized. This is preferable because it results in good electrical properties.

[0187] The above-described oxide semiconductor is used as a transistor in a liquid crystal display device according to one embodiment of the present invention. This allows the pixel section to continue displaying an image even after the writing of image signals to the pixel section has stopped. In addition, the transistor can be used as a voltage supply to a liquid crystal element included in a pixel. By using it as an element to control the supply of voltage to the liquid crystal element, the period during which the supply of voltage to the liquid crystal element is maintained can be secured for a long time.

[0188] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0189] (Embodiment 3) In this embodiment, a configuration example of a pixel in a liquid crystal display device according to one embodiment of the present invention will be described. Regarding an example different from the top view and the cross-sectional view of the pixel 100 shown in FIG. 5 and FIG. 6 of the first embodiment, The following description will be given with reference to FIG. 10 and FIG.

[0190] An example of a top view of the pixel 100 shown in FIG. In order to clarify the top view of 100, some of the components such as the gate insulating film are omitted. In addition, the cuts between the dashed lines A1 and A2 and between the dashed lines A3 and A4 shown in FIG. A cross-sectional view corresponding to the surface is shown in FIG.

[0191] The pixel 100 shown in FIG. 10 and FIG. 11 has a transistor on a substrate 302 having an insulating surface. A conductive film 304 having a function as the gate of the transistor 112 and a function as the wiring GL is provided. In addition, a first common An electrode 354 having a function as an electrode is provided.

[0192] In addition, an insulating film 306 is provided on the substrate 302 so as to cover the conductive film 304 . Then, the transistor 112 is provided at a position overlapping with the conductive film 304 with the insulating film 306 interposed therebetween. An oxide semiconductor film 308 functioning as a channel formation region is provided. Conductive films 310 and 312 are provided on the film 308. A conductive film 313 formed in the same process as that of the first embodiment is provided on the electrode 354 and the insulating film 306. . The conductive film 310 functions as a wiring SL and as a source or drain of the transistor 112. The conductive film 312 functions as a source or drain of the transistor 112. The conductive film 313 functions as a capacitance line.

[0193] Note that the electrode 354 is formed in the same step as the oxide semiconductor film 308. The electrode 3 is a conductive oxide semiconductor having a higher conductivity than the oxide semiconductor film 308. 54 is provided in contact with the insulating film 321, and hydrogen contained in the insulating film 321 is absorbed by the electrode 3 54, the conductivity is increased. Since the region where the insulating film 314 is formed is not in contact with the insulating film 314, oxygen vacancies in the oxide semiconductor are not filled. Therefore, the electrode 354 is formed in the same process as the oxide semiconductor film 308. Even an oxide semiconductor film formed in this manner can function as an electrode.

[0194] In addition, an insulating film 314 is formed so as to cover the oxide semiconductor film 308 and the conductive films 310 and 312. The insulating film 314 is provided on one end of the electrode 354 and the conductive film 313. The insulating film 314 is provided so as to cover one end portion of the electrode 354 and There is an opening 364 through which a part of the conductive film 313 is exposed.

[0195] In addition, an insulating film 321 is provided on the insulating film 314, the electrode 354, and the conductive film 313. In addition, an opening 366 reaching the conductive film 312 is provided in the insulating films 314 and 321. In addition, a pixel electrode 322 is provided on the insulating film 321. The first electrode 322 is connected to the conductive film 312 through the opening 366. 10. The electrode 354 functions as a common electrode. As shown in FIG. 1, the insulating film 321 and the pixel electrode 322 have an opening (slit). An alignment film 324 is provided.

[0196] Further, a substrate 330 is provided so as to face the substrate 302. The light-shielding film 332 has a function of blocking visible light, and the light-shielding film 333 has a function of transmitting visible light in a specific wavelength range. A color film 334, an insulating film 336 in contact with the light-shielding film 332 and the color film 334, and a A second common electrode 338 contacting the first common electrode 338 and an alignment film 340 contacting the second common electrode 338 are provided. It is being done.

[0197] Between the substrate 302 and the substrate 330, an alignment film 324 and an alignment film 340 are provided. As shown in FIG. 1, a liquid crystal layer 350 containing a liquid crystal material is provided. The electrode 354, which functions as an electrode, the insulating film 321, the pixel electrode 322, and the second common electrode 3 The liquid crystal element 111 is constituted by the liquid crystal layer 350. The liquid crystal material has a resistivity of 1.0×10 13 Ω cm or more 1.0×10 16 Ω - cm or less.

[0198] In the configuration of the pixel 100 shown in this embodiment, an insulating film functioning as a planarizing film is used. The electrode 354 functioning as a first common electrode is formed in the same process as the oxide semiconductor film 308. The conductive film 313 that functions as a capacitance line is provided in contact with the electrode 354. This is a major difference from the configuration of the first embodiment shown in FIGS.

[0199] In this way, by not using a planarizing film, impurities (e.g., water) contained in the planarizing film can be prevented. Therefore, the oxide semiconductor film 308 can be prevented from being infiltrated by the oxide semiconductor film 308. Since the reliability of the transistor 112 using the organic semiconductor film 308 is improved, a high quality display can be obtained. The display device may be a liquid crystal display device.

[0200] Next, an example of a method for manufacturing the pixel shown in FIG. 11 will be described with reference to FIGS. 12 and 13. Do the following.

[0201] As shown in FIG. 12(A), a conductive film is formed on a substrate 302, and then the conductive film is etched. The conductive film 304 is formed by processing the shape by etching or the like. Next, an oxide semiconductor film is formed on the insulating film 306, and then the oxide The semiconductor film is processed by etching or the like to be separated into islands at positions overlapping with the conductive film 304. and an oxide semiconductor film 352 separated from the oxide semiconductor film 308. Form.

[0202] The substrate 302, the conductive film 304, the insulating film 306, and the oxide semiconductor film 308 are The substrate 302, the conductive film 304, the insulating film 306, and the oxide semiconductor The film 308 can be formed by using the following materials and manufacturing methods: The oxide semiconductor film 352 is formed using a material and a method similar to those of the oxide semiconductor film 308. It can be formed more.

[0203] Next, as shown in FIG. 12B, a semiconductor film 308 and a semiconductor film 352 are After forming a conductive film on the substrate, the shape of the conductive film is processed by etching or the like. The conductive films 310 and 312 in contact with the oxide semiconductor film 308 and the conductive film 313 in contact with the oxide semiconductor film 352 are A conductive film 313 is formed.

[0204] The conductive films 310, 312, and 313 may be the conductive films 310 and 312 described in embodiment 1. , 313 can be formed by using the materials and manufacturing methods that can be used in 313. .

[0205] Next, as shown in FIG. 12C, the insulating film 306, the oxide semiconductor films 308 and 352, and An insulating film 314 is formed on the conductive films 310 , 312 , and 313 .

[0206] The insulating film 314 may be made of any material that can be used for the insulating film 314 described in Embodiment 1. and the manufacturing method thereof.

[0207] Next, as shown in FIG. 12(D), the insulating film 314 is shaped by etching or the like. An opening 364 is formed so that part of the oxide semiconductor film 352 and part of the conductive film 313 are exposed. Note that it is sufficient that at least the oxide semiconductor film 352 is exposed through the opening 364. In other words, the surface of the conductive film 313 does not need to be exposed.

[0208] The opening 364 can be formed by, for example, dry etching or wet etching. In addition, a combination of dry etching and wet etching is used to form an opening. A portion 364 may be formed.

[0209] Next, as shown in FIG. 13A, an insulating film is formed so as to cover the insulating film 314 and the opening 364. A film 321 is formed.

[0210] The insulating film 321 is resistant to external impurities such as water, alkali metals, alkaline earth metals, etc. The film is made of a material that prevents diffusion of the oxide semiconductor into the oxide semiconductor, and further contains hydrogen. Therefore, when hydrogen in the insulating film 321 diffuses into the oxide semiconductor film 352, the oxide semiconductor film 35 In 2, hydrogen bonds with oxygen, or hydrogen bonds with oxygen vacancies, and the carrier electron As a result, the oxide semiconductor film 352 has higher conductivity than the oxide semiconductor film 308. 3, and becomes electrode 354 which functions as a first common electrode.

[0211] The insulating film 321 is, for example, a silicon nitride film having a thickness of 50 nm or more and 400 nm or less. Alternatively, a silicon nitride oxide film or the like can be used. In this embodiment, the insulating film 32 A silicon nitride film having a thickness of 100 nm is used as the film 1.

[0212] In addition, the silicon nitride film is preferably formed at a high temperature in order to enhance blocking properties. Preferably, the substrate temperature is 100° C. or higher and lower than the distortion point of the substrate, more preferably 300° C. or higher and 400° C. or higher. It is preferable to form the film by heating at a temperature of 00°C or less. However, when forming the film at a high temperature, In some cases, oxygen may be released from the oxide semiconductor film 308, causing an increase in the carrier concentration. Therefore, the temperature must be set at a level at which such a phenomenon does not occur.

[0213] Although not shown in FIGS. 11 and 13, after the insulating film 321 is formed, An insulating film may be further formed. For example, the insulating film may be a P insulating film using an organic silane gas. A silicon oxide film formed by E-CVD can be used. The thickness of the organic silane gas is preferably 300 nm or more and 600 nm or less. Ethyl (TEOS: chemical formula Si(OC2H5)4), tetramethylsilane (TMS: chemical formula Formula Si(CH3)4), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane Omethylenecyclotetrasiloxane (OMCTS), Hexamethyldisilazane (HMDS), Riethoxysilane (SiH(OC2H5)3), trisdimethylaminosilane (SiH( Silicon-containing compounds such as N(CH3)2)3) can be used. For example, the silicon film is formed by using organic silane gas and oxygen, and the substrate temperature is set to 200°C or higher (550°C). Preferably, the temperature is 220° C. or higher and 500° C. or lower, and more preferably, the temperature is 300° C. or higher and 450° C. or lower. The film can be formed by the PE-CVD method.

[0214] By forming the above-mentioned insulating film on the insulating film 321, the transistors and the like can be formed. In addition, the insulating film is made of an inorganic material. Therefore, compared with planarization resin films using organic materials, the oxide semiconductor film is affected. Fewer impurities.

[0215] Next, at least the insulating film 314 is formed, and then a heat treatment is performed to remove the oxide contained in the insulating film 314. The oxygen is transferred to the oxide semiconductor film 308 to fill the oxygen vacancies in the oxide semiconductor film 308. It is preferred.

[0216] Next, as shown in FIG. 13(B), desired regions of the insulating films 314 and 321 are removed. Then, an opening 366 reaching the conductive film 312 is formed.

[0217] The opening 366 can be formed by, for example, dry etching or wet etching. In addition, a combination of dry etching and wet etching is used to form an opening. A portion 366 may be formed.

[0218] Next, as shown in FIG. 13(C), a pixel electrode 322 is formed on the insulating film 321. The pixel electrode 322 is connected to the conductive film 312 through the opening 366 .

[0219] The pixel electrode 322 is formed by forming a transparent conductive film on the insulating film 321 and then etching the transparent conductive film. It is formed by processing the shape of the transparent conductive film.

[0220] As the pixel electrode 322, a pixel electrode 322 that can be used for the pixel electrode 322 described in the first embodiment It can be formed by utilizing materials and manufacturing methods.

[0221] Next, an alignment film 324 (not shown) is formed on the insulating film 321 and the pixel electrodes 322. The alignment film 324 can be formed by using a rubbing method, a photoalignment method, or the like.

[0222] Through the above steps, the structure formed on the substrate 302 can be formed.

[0223] The substrate 330 provided opposite the substrate 302, the liquid crystal element 111, and the like are the same as those in the first embodiment. This can be formed by invoking the description of

[0224] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0225] (Embodiment 4) In this embodiment, one of electronic devices using a liquid crystal display device according to one embodiment of the present invention will be described. An example will be described with reference to FIG.

[0226] The liquid crystal display device according to one embodiment of the present invention is applicable to a display device, a personal computer, a recording medium, and the like. Image playback devices equipped with a DVD (Digital Versatile Disc) Used for devices that have a display that can play back recording media such as SC and display the images. In addition, the liquid crystal display device according to one embodiment of the present invention can be used in an electronic device. Devices include mobile phones, handheld game consoles, personal digital assistants, e-books, and video cameras. , cameras such as digital still cameras, goggle-type displays (head-mounted displays) Play), navigation systems, audio playback devices (car audio, digital audio player, etc.), copiers, facsimiles, printers, printer-multifunction machines, automated teller machines Examples of such electronic devices include ATMs and vending machines. Shown in 4.

[0227] FIG. 14A shows a portable game machine, which includes a housing 5001, a housing 5002, and a display unit 5003. , a display unit 5004, a microphone 5005, a speaker 5006, an operation key 5007, The display portion 5003 or the display portion 5004 includes a stylus 5008. The liquid crystal display device according to the present invention can be used in the portable game machine shown in FIG. The display device has two display units, 5003 and 5004, but the portable game machine has The number of display units is not limited to this.

[0228] FIG. 14B shows a display device, which includes a housing 5201, a display unit 5202, a support 5203, etc. The liquid crystal display device according to one embodiment of the present invention can be used for the display portion 5202. Display devices include all types of devices, including those for personal computers, those for receiving TV broadcasts, and those for displaying advertisements. This includes display devices for displaying all information.

[0229] FIG. 14C shows a notebook personal computer, which includes a housing 5401 and a display unit 540. 2, a keyboard 5403, a pointing device 5404, etc. A liquid crystal display device according to one embodiment of the present invention can be used for the above-mentioned applications.

[0230] FIG. 14D shows a portable information terminal, which includes a first housing 5601, a second housing 5602, a first display The first display unit 5603, the second display unit 5604, the connection unit 5605, the operation keys 5606, etc. The display unit 5603 is provided in the first housing 5601, and the second display unit 5604 is provided in the second housing 5602. The first housing 5601 and the second housing 5602 are connected to each other via a connection portion 5 605, and the angle between the first housing 5601 and the second housing 5602 is The image on the first display unit 5603 can be changed by the connection unit 5605. Switching according to the angle between the first housing 5601 and the second housing 5602 at 5605 The first display portion 5603 or the second display portion 5604 may have a display screen according to one embodiment of the present invention. Such a liquid crystal display device can be used. At least one of the devices 04 is a liquid crystal display device with a position input function. The function as a position input device may be realized by providing a touch panel on the liquid crystal display device. Alternatively, the function of the position input device can be added by providing a photo sensor. It can also be added by providing a photoelectric conversion element, also called a photodiode, in the pixel portion of the liquid crystal display device. can.

[0231] FIG. 14E shows a video camera, which includes a first housing 5801, a second housing 5802, and a display unit 5 803, operation keys 5804, a lens 5805, a connection part 5806, etc. The display unit 5803 is provided in the second housing. The first housing 5801 and the second housing 5802 are connected to each other. The first housing 5801 and the second housing 5802 are connected by a connector 5806, and the angle between the first housing 5801 and the second housing 5802 is The display can be changed by the connection unit 5806. is performed according to the angle between the first housing 5801 and the second housing 5802 at the connection portion 5806. The liquid crystal display device according to one embodiment of the present invention can be used for the display portion 5803. This can be done.

[0232] FIG. 14F shows a mobile phone. A housing 5901 includes a display unit 5902, a microphone 5907, Speaker 5904, camera 5903, external connection part 5906, operation button 5905 The liquid crystal display device according to one embodiment of the present invention is used for a circuit in a mobile phone. In addition, the liquid crystal display device according to one embodiment of the present invention can be formed over a flexible substrate. In this case, the liquid crystal display device is applied to a display portion 5902 having a curved surface as shown in FIG. It is possible to use.

[0233] The structures, methods, etc. described in this embodiment may be different from the structures, methods, etc. described in other embodiments. They can be used in appropriate combination. EXAMPLES

[0234] In this example, the transmittance of a liquid crystal display device according to one embodiment of the present invention was measured. The liquid crystal display device used in this example will be described below with reference to FIG.

[0235] A liquid crystal display device 720 illustrated in FIG. 15A is an example of a liquid crystal display device according to one embodiment of the present invention. do.

[0236] The liquid crystal display device 720 shown in FIG. 15(A) includes a substrate 602 and a transistor on the substrate 602. A conductive film 604 that functions as a gate of the transistor, and an insulating film 60 on the substrate 602 and the conductive film 604 6, an insulating film 606, and an oxide film formed on the insulating film 606 at a position overlapping the conductive film 604. an oxide semiconductor film 608; conductive films 610 and 612 connected to the oxide semiconductor film 608; and an insulating film 606, an oxide semiconductor film 608, and an insulating film 614 formed over the conductive films 610 and 612. an insulating film 616 on the insulating film 614; a first common electrode 618 on the insulating film 616; An insulating film 620 on the film 614 and the first common electrode 618, and a pixel electrode 62 on the insulating film 620 2, an alignment film 624 on the insulating film 620 and the pixel electrode 622, and a liquid crystal layer 6 50, an alignment film 640 on the liquid crystal layer 650, and a second common electrode 638 on the alignment film 640; The insulating film 636 on the second common electrode 638, the light-shielding film 632 on the insulating film 636, and the colored film 6 34 and a substrate 630 on a light-shielding film 632 and a colored film 634.

[0237] Note that the conductive film 604, the insulating film 606, the oxide semiconductor film 608, the conductive films 610 and 6 The transistor 712 is formed by the transistor 12. The conductive film 612 is connected to the pixel electrode 6 through an opening provided in the insulating film 616 and the insulating film 620. It is connected to 22.

[0238] Next, a comparative liquid crystal display device 730 shown in FIG. 15(B) will be described.

[0239] The liquid crystal display device 730 shown in FIG. 15B includes a substrate 602 and a transistor on the substrate 602. A conductive film 604 that functions as a gate of the transistor, and an insulating film 60 on the substrate 602 and the conductive film 604 6, an insulating film 606, and an oxide film formed on the insulating film 606 at a position overlapping the conductive film 604. an oxide semiconductor film 608; conductive films 610 and 612 connected to the oxide semiconductor film 608; and an insulating film 606, an oxide semiconductor film 608, and an insulating film 614 formed over the conductive films 610 and 612. an insulating film 616 on the insulating film 614; a first common electrode 618 on the insulating film 616; An insulating film 620 on the film 614 and the first common electrode 618, and a pixel electrode 62 on the insulating film 620 2, an alignment film 624 on the insulating film 620 and the pixel electrode 622, and a liquid crystal layer 6 50, an alignment film 640 on the liquid crystal layer 650, an insulating film 636 on the alignment film 640, and an insulating film 6 36, and the light-shielding film 632 and the colored film 634 on the substrate 63 0 and an electrode 642 on the substrate 630.

[0240] Note that the conductive film 604, the insulating film 606, the oxide semiconductor film 608, the conductive films 610 and 6 The transistor 712 is formed by the transistor 12. The conductive film 612 is connected to the pixel electrode 6 through an opening provided in the insulating film 616 and the insulating film 620. It is connected to 22.

[0241] In addition, a liquid crystal display device 720 according to one embodiment of the present invention shown in FIG. The difference between the comparative liquid crystal display device 730 is that the second common electrode 638 and the electrode 642 are More specifically, the liquid crystal display device 720 includes a second common electrode 630 below the substrate 630. 638 is provided, and the liquid crystal display device 730 has an electrode 642 provided above the substrate 630. It is being done.

[0242] In the configuration shown in FIG. 15A, the alignment film 640 is formed by the second common electrode 638. A voltage can be applied to the liquid crystal layer 650 via the liquid crystal layer 650. In the embodiment, the electrode 642 is provided above the substrate 630, so that the electrode 642 Therefore, it is difficult to apply a voltage to the liquid crystal layer 650.

[0243] A method for manufacturing the liquid crystal display devices 720 and 730 shown in FIGS. 15(A) and 15(B) will be described below. In the liquid crystal display device 720 and the liquid crystal display device 730, the second common electrode 63 The configurations are the same except for the electrode 642 and the electrode 8. First, the method of fabricating the common configuration is as follows. The following is an explanation.

[0244] A glass substrate was used as the substrate 602. Then, a conductive film 604 was formed on the substrate 602. As the conductive film 604, a tungsten film was formed to a thickness of 200 nm by sputtering. After that, an insulating film 606 was formed on the substrate 602 and the conductive film 604. 6 is a 400 nm thick silicon nitride film and a 50 nm thick silicon oxynitride film. It was formed by laminating.

[0245] The silicon nitride film includes a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer structure of silicon nitride films was used.

[0246] The first silicon nitride film was prepared by using silane at a flow rate of 200 sccm and 2000 sccm The plasma CVD equipment was used with nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as raw material gases. The pressure in the treatment chamber was controlled to 100 Pa, and a high-frequency current of 27.12 MHz was applied. The source was used to supply 2000 W of power and the thickness was 50 nm. For the silicon nitride film, silane at a flow rate of 200 sccm, nitrogen at a flow rate of 2000 sccm, Ammonia gas with a flow rate of 2000 sccm was used as the source gas for the plasma CVD equipment. The pressure in the treatment chamber was controlled to 100 Pa, and a high-frequency power source of 27.12 MHz was used. The third nitride layer was formed to a thickness of 300 nm by supplying a power of 2000 W to the GaN film. For the silicon film, silane at a flow rate of 200 sccm and nitrogen at a flow rate of 5000 sccm were used. It is supplied as a raw material gas to the processing chamber of the plasma CVD equipment, and the pressure in the processing chamber is controlled to 100 Pa. The thickness of the plate was 50 mm. The first silicon nitride film, the second silicon nitride film, and The substrate temperature was set to 350° C. when the third silicon nitride film was formed.

[0247] The silicon oxynitride film was prepared by using silane at a flow rate of 20 sccm and a Nitrous oxide was supplied as a raw material gas to the processing chamber of the plasma CVD device, and the pressure in the processing chamber was set at 4 The pressure was controlled at 0 Pa, and 100 W of power was supplied using a 27.12 MHz high-frequency power source. The silicon oxynitride film was formed at a substrate temperature of 350° C. did.

[0248] Next, an oxide semiconductor film 608 is formed so as to overlap with the conductive film 604 with the insulating film 606 interposed therebetween. Here, an oxide semiconductor film having a thickness of 35 nm was formed over the insulating film 614 by a sputtering method. Formed.

[0249] The oxide semiconductor film was formed by sputtering a target of In:Ga:Zn=1:1:1 (atomic ratio) The target was a 30sccm oxygen gas and a 270sccm argon gas. It is supplied as a sputtering gas into the processing chamber of the sputtering device, and the pressure in the processing chamber is kept at 0 The oxide semiconductor film was formed by controlling the pressure at the substrate to 0.6 Pa and supplying a direct current of 5 kW. The substrate temperature during the process was set to 170°C.

[0250] Next, conductive films 610 and 612 were formed in contact with the oxide semiconductor film 608 .

[0251] The conductive films 610 and 612 are made of a 400 nm thick aluminum film on a 50 nm thick tungsten film. An aluminum film was formed, and a titanium film having a thickness of 100 nm was formed on the aluminum film.

[0252] Next, the substrate is moved to a reduced pressure processing chamber, heated to 350° C., and then placed in the processing chamber. A high-frequency power of 150 W was supplied to the upper electrode using a 27.12 MHz high-frequency power source. The oxide semiconductor film 608 was exposed to oxygen plasma generated in a dinitrogen oxide atmosphere.

[0253] Next, an insulating film 614 was formed over the oxide semiconductor film 608 and the conductive films 610 and 612 . Here, the insulating film 614 includes a first oxide insulating film, a second oxide insulating film, and a nitride insulating film. A three-layer laminated structure of insulating films was formed.

[0254] First, after the oxygen plasma treatment, the first oxide insulating film is continuously formed without being exposed to the air. A first oxide insulating film was formed using a 50-nm-thick oxynitride film. A silicon film is formed, and a silicon oxynitride film with a thickness of 400 nm is formed as a second oxide insulating film. Formed.

[0255] The first oxide insulating film was formed using silane at a flow rate of 20 sccm and monoxide at a flow rate of 3000 sccm. Dinitrogen was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 350°C, and the The film was formed by the plasma CVD method in which high frequency power of 1000 Hz was supplied to parallel plate electrodes.

[0256] The second oxide insulating film was formed using silane at a flow rate of 160 sccm and monoacid at a flow rate of 4000 sccm. Nitrous oxide was used as the source gas, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220° C., and The film was formed by the plasma CVD method in which 0 W of high frequency power was supplied to the parallel plate electrodes. As a result, the mixture contains more oxygen than satisfies the stoichiometric composition, and some of the oxygen is removed by heating. A desorbing silicon oxynitride film can be formed.

[0257] Next, heat treatment is performed to remove water, nitrogen, and hydrogen from the first oxide insulating film and the second oxide insulating film. The oxygen contained in the second oxide insulating film is partly removed from the oxide semiconductor film 6. The samples were then fed to the 08 facility, where they were heat-treated at 350°C for 1 hour in a nitrogen and oxygen atmosphere. Ta.

[0258] Next, a nitride insulating film having a thickness of 100 nm was formed on the second oxide insulating film. The film was prepared by mixing silane at a flow rate of 50 sccm, nitrogen at a flow rate of 5000 sccm, and The source gas was ammonia gas of 100 m, the pressure in the processing chamber was 100 Pa, and the substrate temperature was 350°C. The film was formed by the plasma CVD method in which 1000 W of high frequency power was supplied to parallel plate electrodes. .

[0259] Next, an opening was formed in the insulating film 614, reaching the conductive film 612. It was formed by etching.

[0260] Next, an insulating film 616 having an opening was formed on the insulating film 614. The organic resin material, acrylic resin, was used. The thickness of the acrylic resin film was set to 2 μm. Ta.

[0261] Next, a first common electrode 618 was formed on the insulating film 616. The indium oxide-tin oxide compound (ITO) was deposited to a thickness of 100 nm by sputtering. The conductive film was formed using a target of In. The ratio of 2O3:SnO2:SiO2 was 85:10:5 [by weight].

[0262] Next, an insulating film 620 was formed on the insulating film 616 and the first common electrode 618. As the nitride insulating film 20, a nitride insulating film having a thickness of 300 nm was formed. The nitride insulating film was formed at a flow rate of 50 s ccm of silane, 5000 sccm of nitrogen, and 100 sccm of ammonia gas. The source gas was 1000 W, the pressure in the processing chamber was 200 Pa, the substrate temperature was 220°C, and The film was formed by the plasma CVD method in which high frequency power was supplied to parallel plate electrodes.

[0263] Next, a pixel electrode 622 was formed on the insulating film 620. A 80 nm thick indium oxide-tin oxide compound (ITO-SiO2) was prepared by the tapping method. The conductive film was formed using a target having the same composition as the first common electrode 61. The same procedure was followed as in 8. Then, a heat treatment was carried out in a nitrogen atmosphere at 250° C. for 1 hour.

[0264] Next, an alignment film 624 was formed on the insulating film 620 and the pixel electrode 622. A polyimide film having a thickness of 60 nm was used as the alignment film 624. The resistivity of the imide film is 4.0×10 15 The value was Ω·cm.

[0265] By the above steps, the structure formed on the substrate 602 was fabricated.

[0266] Next, a method for manufacturing a structure formed on a substrate 630 provided opposite the substrate 602 will be described. The structure formed on the substrate 630 will be described below. The display device 720 is different from the liquid crystal display device 730 shown in FIG. In the following description, the fabrication methods of the liquid crystal display device 720 and the liquid crystal display device 730 will be described separately. The liquid crystal display device 720 is designated as sample 1, and the liquid crystal display device 730 is designated as sample 2. Each will be explained below.

[0267] <Method for manufacturing the structure formed on the substrate 630 shown in FIG. 15(A)> A glass substrate was used as the substrate 630. Next, a shielding film was placed in a desired area in contact with the substrate 630. The light-shielding film 632 was formed by spin coating to a thickness of 600 nm. An organic resin film containing black pigment was used.

[0268] Next, a color film 634 was formed on the substrate 630. A 1.4 μm thick organic resin film containing pigment was prepared by the coating method.

[0269] Next, an insulating film 636 was formed in contact with the light-shielding film 632 and the colored film 634. An acrylic resin with a thickness of 1.5 μm was used.

[0270] Next, a second common electrode 638 was formed in contact with the insulating film 636. The indium oxide-tin oxide compound (ITO) was deposited to a thickness of 100 nm by sputtering. The composition of the target used for the conductive film was the same as that of the first The common electrode 618 was the same.

[0271] Next, an alignment film 640 was formed in contact with the second common electrode 638. The same material as that of the alignment film 624 was used.

[0272] Next, the above-prepared substrate 630 and the previously described substrate 602 are bonded together, and then a drop sealing method is performed. A liquid crystal material that functions as the liquid crystal layer 650 was injected using a liquid crystal filter.

[0273] The liquid crystal layer 650 has a cell gap (the distance between the alignment film 624 and the alignment film 640) of 3. The thickness was adjusted to 5 μm, and a negative liquid crystal material (Merck Co., Ltd.: MLC-3006) was used. was used.

[0274] Through the above steps, Sample 1, which is a liquid crystal display device according to one embodiment of the present invention, shown in FIG. 15A, was manufactured. did.

[0275] <Method of manufacturing the structure formed on the substrate 630 shown in FIG. 15(B)> A glass substrate was used as the substrate 630. Next, a shielding film was placed in a desired area in contact with the substrate 630. The light-shielding film 632 was formed by spin coating to a thickness of 600 nm. An organic resin film containing black pigment was used.

[0276] Next, a color film 634 was formed on the substrate 630. A 1.4 μm thick organic resin film containing pigment was prepared by the coating method.

[0277] Next, an insulating film 636 was formed in contact with the light-shielding film 632 and the colored film 634. An acrylic resin with a thickness of 1.5 μm was used.

[0278] Next, an electrode 642 is formed in contact with the surface of the substrate 630 on which the insulating film 636 is not formed. The electrode 642 was made of an indium oxide-oxide film having a thickness of 100 nm by sputtering. A conductive film of tin oxide compound (ITO-SiO2) was formed. The composition of the layer was the same as that of the first common electrode 618 .

[0279] Next, an alignment film 640 was formed in contact with the insulating film 636. The same material as the film 624 was used.

[0280] Next, the above-prepared substrate 630 and the previously described substrate 602 are bonded together, and then a drop sealing method is performed. A liquid crystal material that functions as the liquid crystal layer 650 was injected using a liquid crystal filter.

[0281] The liquid crystal layer 650 has a cell gap (the distance between the alignment film 624 and the alignment film 640) of 3. The thickness was adjusted to 5 μm, and a negative liquid crystal material (Merck Co., Ltd.: MLC-3006) was used. was used.

[0282] Through the above steps, sample 2, which is a liquid crystal display device for comparison and shown in FIG. 15(B), was fabricated.

[0283] Next, the transmittance of the prepared samples 1 and 2 was measured. In this example, 0V is applied to the first common electrode 618, 5.5V is applied to the pixel electrode 622, and A voltage of 0.8 V was applied to the pixel electrode 622 and the second common electrode 638. The voltage applied to the second common electrode 638 is intermittent, and each time the voltage is applied When measuring the transmittance of the sample 2, the data is rewritten to the first common electrode 0V is applied to 618, 5.5V to pixel electrode 622, and 0.8V to electrode 642. The voltages applied to the pixel electrode 622, the second common electrode 638, and the electrode 642 are The voltage is applied intermittently, and the data is rewritten every time the voltage is applied. The data rewriting control of Sample 2 is performed by a transistor 712 formed in the liquid crystal display device. This is done.

[0284] 16 to 20 show the time-transmittance characteristics of Sample 1 and Sample 2. 20, the horizontal axis represents time (s) and the vertical axis represents transmittance (%). 16 to 20, when the maximum gradation is obtained (transmittance is 100%), The time-transmittance characteristics of sample 1 are shown in Fig. 21. The results of the transmittance characteristics are shown in Fig. 21. In Fig. 21, the horizontal axis represents time (s) and the vertical axis represents transmittance (% ) and ) respectively. Also, in FIG. 21, when an intermediate gradation is obtained (transparent The graph shows the time-transmittance characteristics for the intermediate gradations (with a transmittance of 50%). In this case, the time-transmittance characteristics may differ from those in the case of maximum gradation.

[0285] In addition, Figs. 16(A), 17(A), 18(A), 19(A), and 20(A) The time-transmittance characteristics shown in FIG. 16(B) are the results for Sample 1, which is one embodiment of the present invention. 17(B), 18(B), 19(B), and 20(B) show the results of Sample 2 for comparison. The result is.

[0286] In addition, in the time-transmittance characteristics shown in Fig. 16(A) and (B), the data is taken once per second. The data has been rewritten, and in the time-transmittance characteristics shown in Figures 17(A) and (B), The data is rewritten once every 5 seconds, and the time-series data shown in Figs. 18(A) and (B) is In the transmittance characteristics, the data is updated once every 15 seconds. In the time-transmittance characteristics shown in (B), the data is updated once every 30 seconds. In the time-transmittance characteristics shown in Figures 20(A) and (B), the transmittance was 1 per 60 seconds. The data is updated times. Note that the data update interval is the same for the same graph. 16 to 2, the timing of data rewriting is different. In the time-transmittance characteristic shown in FIG. 0, the timing of rewriting is not the same time.

[0287] In addition, in the time-transmittance characteristic shown in FIG. 21(A), data is written once per second. In the time-transmittance characteristic shown in FIG. 21(B), the light was switched once every 5 seconds. The data is rewritten, and in the time-transmittance characteristic shown in FIG. 21(C), Data is rewritten once every 0 seconds.

[0288] From the results of FIG. 16 to FIG. 20, Sample 1, which is one embodiment of the present invention, has a high transmittance over time. On the other hand, the transmittance of sample 2 for comparison did not change much over time. There is a lot of fluctuation. In particular, when the data rewrite interval is long, for example, the 6 When data is rewritten once every 0 seconds, a variation in transmittance of 3% or more is confirmed. In the sample 1 according to one embodiment of the present invention, a voltage is applied to the second common electrode 638, and the liquid crystal This suggests that the variation in the transmittance of the layer 650 can be suppressed. In this embodiment, the second common electrode 638 is not provided, and the second common electrode 642 located above the substrate 630 is provided with a second The common electrode 638 is applied with the same potential. Therefore, the liquid crystal layer 65 0, the fluctuation of the liquid crystal layer 650 cannot be suppressed.

[0289] In addition, from the results shown in FIG. 21, it can be seen that Sample 1, which is one embodiment of the present invention, is a data set obtained once every 5 seconds. The transmittance fluctuates by about 2% when the data is rewritten. This can cause flickering depending on the image being displayed. Therefore, it is better to rewrite data within 5 seconds. This suggests that... EXAMPLES

[0290] In this example, the transmittance of a liquid crystal display device according to one embodiment of the present invention was calculated. The configuration of the liquid crystal display device used in the calculation of this embodiment will be described below with reference to FIG. conduct.

[0291] The liquid crystal display device used in the calculation shown in FIG. 22(A) has a substrate 802 and an electrode on the substrate 802. 804a, 804b, 854a, 854b, and electrodes 804a, 804b are covered with the electrodes An insulating film 814 that covers the ends of the electrodes 854a and 854b, and the insulating film 814 and the electrodes 854a and 85 4b, an insulating film 821 on the insulating film 821, and an insulating film 856 on the insulating film 821. A pixel electrode 822a is provided at a position overlapping the electrode 854a, and insulating films 821 and 85 A pixel electrode 822b is provided at a position overlapping with the electrode 854b via the insulating film 856. and a liquid crystal layer 850 on the pixel electrodes 822a and 822b, and an electrode 838 on the liquid crystal layer 850; and a substrate 830 on an electrode 838.

[0292] The configuration of the liquid crystal display device used in the calculation shown in FIG. 22(A) is the same as that shown in FIGS. The pixel of the liquid crystal display device according to one embodiment of the present invention was simplified to facilitate calculation. Specifically, the substrate 802 corresponds to the substrate 302 shown in FIG. 11, and the electrodes 854a and 854b correspond to the conductive film 304 shown in FIG. 11. The insulating film 814 corresponds to the insulating film 314 shown in FIG. 11, and pixel electrodes 822a and 822b correspond to the insulating film 321 shown in FIG. 11. The liquid crystal layer 850 corresponds to the liquid crystal layer 350 shown in FIG. 11, and the substrate 830 corresponds to the substrate 330 shown in FIG. Incidentally, the insulating film 856 shown in FIG. 22(A) is not shown in FIG. stomach.

[0293] The liquid crystal display device used in the calculation shown in FIG. 22(B) is the same as that used in the calculation shown in FIG. The electrode 838 on the liquid crystal layer 850 is not provided in the configuration of the liquid crystal display device described above. The other configuration is the same as that in FIG.

[0294] In the configuration of the liquid crystal display device used in the calculations shown in FIGS. 22(A) and 22(B), pixel 2 The left side of the figure, more specifically, electrodes 804a and 854a, are shown in cross section. The side including the pixel electrode 822a is represented as one pixel, and the right side in the figure, more specifically, the electrode The side including the pixel electrode 804b, the electrode 854b, and the pixel electrode 822b is represented as the other pixel. In addition, in FIG. 22(A) and (B), the pixel electrodes 822a and 822b are separated from each other. The three electrodes are shown as one electrode.

[0295] The liquid crystal display device used in the calculation shown in FIG. 22(A) is designated as Sample 3, and the liquid crystal display device shown in FIG. The configuration of the liquid crystal display device used in the calculation shown in (a) was designated as Sample 4. Sample 3 was an embodiment of the present invention. The sample 1 has a configuration of a liquid crystal display device according to the same embodiment, and the sample 2 has a configuration of a liquid crystal display device according to one embodiment for comparison.

[0296] The electrodes 804a and 804b shown in FIGS. 22(A) and 22(B) have a thickness of 200 nm and a width of 2 μm, and the electrodes 854a and 854b are set to a thickness of 200 nm and a width of 20 μm. The insulating film 814 is set to a thickness of 500 nm, and the insulating film 821 is set to a thickness of 100 nm. The insulating film 856 is set to a thickness of 400 nm, and the pixel electrodes 822a and 822b are set to a thickness of 100 The liquid crystal layer 850 is set to a thickness of 4 μm and made of a negative type liquid crystal material (Merck Co., Ltd.). The thickness of the electrode 838 shown in FIG. = 100 nm.

[0297] In addition, in the configuration of the liquid crystal display device used in the calculation shown in FIG. 22(A), 0V, 6V to electrode 804b, 0V to electrodes 854a and 854b, 0V to pixel electrode 822a, When 6V is applied to the pixel electrode 822b and 0V is applied to the electrode 838, the liquid crystal layer 8 A transmittance calculation of 50 was performed.

[0298] In addition, in the configuration of the liquid crystal display device used in the calculation shown in FIG. 22(B), 0V, 6V to electrode 804b, 0V to electrodes 854a and 854b, 0V to pixel electrode 822a, Calculation of the transmittance of the liquid crystal layer 850 when 6 V is applied to each pixel electrode 822b The settings for applying the voltage to each electrode were as follows for both (A) and (B) of FIG. The applied voltage when the pixel on the left side of the figure is assumed to display black and the pixel on the right side of the figure is assumed to display white is It is under pressure.

[0299] The calculation results of the transmittance are shown in Figure 23. The calculation software used to calculate the transmittance is LCD Master (manufactured by Shintech) was used.

[0300] In FIG. 23, the horizontal axis represents the position (μm) and the vertical axis represents the transmittance (%). In FIG. 23, the solid line represents sample 3 and the dashed line represents sample 4. In FIG. 23, the electrodes 804a, 804b, 854a, and 854b shown in FIG. Electrodes 804a, 804b, 854a, and 854b are shown in solid grey lines to represent the positions of electrodes 804a, 804b, 854a, and 854b. 1 shows a schematic shape of the

[0301] From the calculation results shown in FIG. 23, the sample 3, which is an embodiment of the present invention, is On the other hand, the transmittance of sample 4, which is a comparative example, is low at positions 20 to 30 This is because the transmittance of sample 3 is higher than that of sample 4. Since the electrode 838 is located on the opposite side, the voltage applied to the electrode 838 (in this embodiment, 0 V ) suppresses the increase in transmittance at the position of 20 to 30 μm. In the vicinity of the position of 40 to 50 μm, the transmittance of sample 3 is higher than that of sample 4. In FIG. 23, in the pixels on the left side represented by the positions 0 to 25 μm, Since the voltage at the pixel is set to 0V, it is desirable to display black, i.e., to have low transmittance. In the right pixel represented by the position 26μ to 55μm, the electrodes 804b and 854b are each provided with 6 V is applied, it is desirable to have a white display, i.e., a high transmittance. The sample 3, which is a configuration of the clear embodiment, has a larger thickness above the liquid crystal layer 850 than the sample 4, which is a comparative embodiment. The structure has an electrode 838 on one side, and calculations have confirmed that it has excellent transmittance characteristics. Done.

[0302] As described above, in the liquid crystal display device having the configuration according to one embodiment of the present invention, a white display is formed in adjacent pixels. These results suggest that a liquid crystal display device with excellent contrast between white and black can be obtained. .

[0303] The configuration shown in this embodiment may be used in conjunction with the configurations shown in other embodiments or the configurations shown in other embodiments. They can be used in any suitable combination. [Explanation of symbols]

[0304] 100 pixels 102 Transistor 111 Liquid crystal element 111a Liquid crystal element 111b Liquid crystal element 111c Liquid crystal element 112 Transistor 113 Capacitive element 120 Substrate 122 Common electrode 124 Insulating Layer 126 Pixel electrode 130 Substrate 132 Common electrode 134 Liquid crystal layer Panel 230 231 Pixel section 232 Drive circuit 233 Drive circuit 240 LCD display device 241 Controller 242 Input Device 243 CPU 244 Image Processing Circuit 245 Image Memory 246 Data 247 Power supply circuit 302 Substrate 304 Conductive film 306 Insulating film 307 Oxide Semiconductor Film 308 Oxide Semiconductor Film 309 Oxide Semiconductor Film 310 Conductive Film 312 Conductive Film 313 Conductive Film 314 Insulating film 316 Insulating Film 318 Common electrode 320 Insulating film 321 Insulating Film 322 Pixel electrode 324 Orientation Film 330 Substrate 332 Light-shielding film 334 Colored film 336 Insulating Film 338 Common electrode 340 Orientation Film 350 Liquid crystal layer 352 Oxide Semiconductor Film 354 Electrode 360 Opening 362 Opening 364 Opening 366 Opening 602 Substrate 604 Conductive film 606 Insulating film 608 Oxide Semiconductor Film 610 Conductive Film 612 Conductive Film 614 Insulating film 616 Insulating film 618 Common electrode 620 Insulating film 622 Pixel electrode 624 Orientation Film 630 Substrate 632 Light-shielding film 634 Colored film 636 Insulating Film 638 Common electrode 640 Orientation Film 642 Electrode 650 Liquid crystal layer 712 Transistor 720 LCD display device 730 LCD display device 802 Substrate 804a electrode 804b electrode 814 Insulating film 821 Insulating film 822a Pixel electrode 822b Pixel electrode 830 Substrate 838 Electrode 850 Liquid crystal layer 854a electrode 854b electrode 856 Insulating film 5001 Case 5002 Case 5003 Display section 5004 Display section 5005 Microphone 5006 Speaker 5007 Operation key 5008 Stylus 5201 Case 5202 Display section 5203 Support stand 5401 Case 5402 Display section 5403 Keyboard 5404 Pointing Device 5601 Case 5602 Case 5603 Display section 5604 Display section 5605 Connection 5606 Operation key 5801 Case 5802 Case 5803 Display section 5804 Operation key 5805 Lens 5806 Connection 5901 Case 5902 Display section 5903 Camera 5904 Speaker 5905 Button 5906 External connection part 5907 Mike

Claims

[Claim 1] a transistor including an oxide semiconductor film in a channel formation region; a pixel electrode electrically connected to the transistor; an insulating layer in contact with the pixel electrode; a first substrate having a first common electrode in contact with the insulating layer; a second substrate disposed opposite the first substrate and having a second common electrode; a liquid crystal layer sandwiched between the first substrate and the second substrate; The liquid crystal layer uses a negative type liquid crystal material, The specific resistivity of the liquid crystal material is 1.0×10 １３ Ω・cm or more 1.0×10 １６ Ω cm or less A liquid crystal display device comprising:

Images