Imaging device

Abstract

To reduce power consumption by varying a reset potential of a vertical signal line and to shorten settling time of the vertical signal line.SOLUTION: An imaging device includes: a plurality of pixels arranged in one direction and each having a photoelectric conversion element; a signal line for transmitting a plurality of pixel signals photoelectrically converted by the plurality of pixels; an illuminance determination unit for determining an illuminance of light incident on the plurality of pixels; and a reset potential switch for switching a reset potential for initializing a potential of the signal line on the basis of the illuminance determined by the illuminance determination unit.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to an imaging device. [Background technology]

[0002] In a typical CMOS image sensor (hereafter referred to as CIS), a vertical signal line is provided for each pixel column arranged in the vertical direction, and each vertical signal line transmits pixel signals output from each pixel in the corresponding pixel column. The time required for the potential of a vertical signal line to stabilize is called the settling time. In conventional CIS, a constant current load is sometimes used to shorten the settling time of the vertical signal line. A constant current load has the problem of large power consumption because it continuously flows current from the power supply voltage through the vertical signal line to the ground node.

[0003] In response to this, Patent Document 1 discloses a technology in which a current flows from a power supply voltage node connected to the drain of an amplifying transistor in a pixel to a vertical signal line through the amplifying transistor, thereby storing electric charge in a capacitor connected to the vertical signal line. In Patent Document 1, electric charge according to the potential difference obtained by subtracting the threshold voltage of the amplifying transistor from the potential of the floating diffusion (hereinafter, FD potential) can be stored in the capacitor, and since no current flows from the amplifying transistor to the vertical signal line after the charge is stored in the capacitor, power saving can be achieved. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent Publication No. 2021-40270 Summary of the Invention [Problem to be solved by the invention]

[0005] In the circuit configuration of Patent Document 1, current continues to flow from the amplifying transistor to the vertical signal line until a charge corresponding to the above-mentioned potential difference is accumulated in the capacitor, resulting in the problem that a small current flows even when the amplifying transistor is about to turn off, lengthening the settling time of the vertical signal line.

[0006] Furthermore, in the circuit configuration of Patent Document 1, when the FD potential rises, the potential of the vertical signal line can be raised in response to the FD potential, but when the FD potential falls, the potential of the vertical signal line cannot be lowered in response to the fall.

[0007] For this reason, in the circuit configuration of Patent Document 1, it is necessary to forcibly pull down the vertical signal line to the reset potential. For example, when high-illuminance light is incident on a pixel, the potential of the pixel signal is low, so it does not take much time to transition the vertical signal line from the reset potential to the potential of the pixel signal, but when low-illuminance light is incident on a pixel, the potential difference between the vertical signal line's reset potential and the potential of the pixel signal is large, so it takes time to stabilize the potential of the vertical signal line and also consumes a lot of power.

[0008] Therefore, the present disclosure provides an imaging device capable of reducing power consumption by making the reset potential of the vertical signal line variable and shortening the settling time of the vertical signal line. [Means for solving the problem]

[0009] In order to solve the above problems, according to the present disclosure, there is provided a liquid crystal display device comprising: a plurality of pixels arranged in one direction, each of which has a photoelectric conversion element; a signal line for transmitting a plurality of pixel signals photoelectrically converted by the plurality of pixels; an illuminance determination unit that determines an illuminance of light incident on the plurality of pixels; a reset potential switch that switches a reset potential for initializing a potential of the signal line based on the illuminance determined by the illuminance determination unit. An imaging device is provided.

[0010] The illuminance determining unit may determine the illuminance in at least two stages.

[0011] The illuminance determination unit determines whether the illuminance is high or low, The reset potential switch may set the reset potential higher when the illuminance is determined to be low than when the illuminance is determined to be high.

[0012] The reset potential switch may set the reset potential when the signal line is at a noise potential higher than the reset potential when the illuminance determination unit determines that the illuminance is low.

[0013] a pixel array section having the plurality of pixels arranged in a first direction and a second direction; a plurality of the signal lines each extending in the second direction and arranged in the first direction, transmitting two or more pixel signals photoelectrically converted by two or more of the pixels arranged in the second direction; The illuminance determining unit and the reset potential switch may be provided for each of the plurality of signal lines.

[0014] The reset potential switch may select one of a plurality of input potentials having different potential levels as the reset potential.

[0015] The plurality of input potentials may include at least three types of input potentials for setting a noise potential, a low illuminance reset potential, or a high illuminance reset potential to the signal line.

[0016] Each of the plurality of pixels includes a transfer transistor and a floating diffusion, The illuminance determination unit may determine the illuminance based on charges leaking from the photoelectric conversion element to the floating diffusion before starting charge transfer by photoelectric conversion from the photoelectric conversion element to the floating diffusion via the transfer transistor.

[0017] The illuminance determining unit may determine the illuminance based on a signal potential of the pixel signal corresponding to an amount of light incident on the plurality of pixels.

[0018] The plurality of pixels are capable of switching photoelectric conversion efficiency between at least two stages, The illuminance determining unit may determine the illuminance based on a signal potential of the pixel signal in a state where photoelectric conversion efficiency is maximum.

[0019] a signal processing unit that performs signal processing including generating a digital signal according to the potential of the signal line based on a result of comparing the potential of the signal line with a reference signal, When the signal line is at a noise potential, the reset potential switch may set the reset potential on the signal line to a value corresponding to the noise potential, and then set the reset potential on the signal line to a value corresponding to the illuminance determined by the illuminance determination unit.

[0020] Each of the plurality of pixels has a plurality of the photoelectric conversion elements having different sensitivities, The reset potential switch may determine the illuminance in the illuminance determination unit, and then set the reset potential corresponding to the noise potential to the signal line to read out the noise potential, and then set the reset potential corresponding to the illuminance determined by the illuminance determination unit to the signal line for each of the multiple photoelectric conversion elements in turn, to read out the signal potential.

[0021] a reference signal generating circuit for generating a reference signal for setting the signal line to a reference potential; The illuminance determining unit may determine the illuminance based on a potential difference between a potential of the signal line and the reference potential.

[0022] a constant current source that supplies a constant current to the signal line; The power supply may further comprise a first switch that connects the constant current source to the signal line only when the signal line is set to a reference potential.

[0023] the reset potential switch includes a plurality of reset potential setting circuits connected in parallel between the signal line and a reference potential node; Each of the plurality of reset potential setting circuits Voltage sources with different potential levels, The power supply may further include a second switch configured to switch whether or not to set the potential of the voltage source as the reset potential based on the illuminance determined by the illuminance determination unit.

[0024] The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of reset potential setting circuits may set, as the reset potential, a potential of the voltage source that is higher in potential level than when the illuminance determination unit determines that the illuminance is high.

[0025] the reset potential switch includes a plurality of source follower circuits, a third switch, and a current source connected in series between the signal line and a reference potential node; Each of the plurality of source follower circuits comprises: A transistor having gates to which potentials of different potential levels are input; a fourth switch that switches whether or not the signal line is set to a reset potential according to a potential input to the gate of the transistor; the third switch is turned on when the signal line is set to a reference potential, and causes a constant current to flow through the signal line using the current source; After the signal line is set to the reference potential, any one of the plurality of fourth switches may be turned on based on the illuminance determined by the illuminance determination unit to set a reset potential of the signal line.

[0026] The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the multiple source follower circuits may set a reset potential of the signal line by turning on the fourth switch connected to the transistor to whose gate a higher potential is input than when the illuminance determination unit determines that the illuminance is high.

[0027] the reset potential switch includes a single voltage source connected to the signal line, and a plurality of reset potential setting circuits connected in parallel between the signal line and the voltage source; Each of the plurality of reset potential setting circuits includes a third switch that switches whether or not to select the corresponding reset potential setting circuit, and a potential setting unit that is connected in series to the third switch; The potential setting units may each have a different number of diodes connected in series or diode-connected transistors, or the third switch may be connected to the voltage source.

[0028] The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the multiple reset potential setting circuits may set as the reset potential a potential of a greater number of diodes connected in series or diode-connected transistors than when the illuminance determination unit determines that the illuminance is high. [Brief description of the drawings]

[0029] [Figure 1] 1 is a block diagram showing a schematic configuration of an imaging device according to the present disclosure. [Figure 2A] FIG. 1 is a schematic perspective view showing an example of an imaging device according to the present disclosure having a two-layer structure. [Figure 2B] FIG. 1 is a schematic perspective view showing an example of an imaging device according to the present disclosure having a three-layer structure. [Diagram 3] 1 is a circuit diagram showing a main part of an imaging device according to a first embodiment. [Figure 4] FIG. 2 is a timing chart of the imaging apparatus according to the first embodiment. [Diagram 5] FIG. 11 is a circuit diagram showing a main part of an imaging device according to a second embodiment. [Figure 6] FIG. 11 is a timing chart of an imaging apparatus according to a second embodiment. [Figure 7] FIG. 11 is a circuit diagram showing a main part of an imaging device according to a third embodiment. [Figure 8]5 is a waveform diagram showing a reset potential that is set by a reset potential switch to a vertical signal line according to illuminance. [Figure 9] FIG. 13 is a circuit diagram showing a main part of an imaging device according to a fourth embodiment. [Figure 10] FIG. 13 is a circuit diagram showing a main part of an imaging device according to a fifth embodiment. [Figure 11] FIG. 13 is a circuit diagram showing a main part of an imaging device according to a sixth embodiment. [Figure 12] FIG. 1 is a block diagram showing an example of a schematic configuration of a vehicle control system. [Figure 13] FIG. 4 is an explanatory diagram showing an example of the installation positions of an outside-vehicle information detection unit and an imaging unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0030] Hereinafter, an embodiment of an imaging device will be described with reference to the drawings. The following description will focus on the main components of the imaging device, but the imaging device may include components and functions that are not shown or described. The following description does not exclude components and functions that are not shown or described.

[0031] Fig. 1 is a block diagram showing a schematic configuration of an image pickup device 1 according to the present disclosure. As shown in Fig. 1, the image pickup device 1 according to the present disclosure includes a pixel array section 2, a vertical scanning circuit 3, a column readout circuit 4, a column signal processing circuit 5, a horizontal scanning circuit 6, a control circuit 7, and a digital-to-analog converter (hereinafter, DAC) 8.

[0032] The pixel array section 2 has a plurality of pixels 10. The plurality of pixels 10 are arranged in one or two dimensions. In this specification, the pixel array section 2 in which a plurality of pixels 10 are arranged in a first direction (horizontal direction) X and a second direction (vertical direction) Y will be described. In this specification, the plurality of pixels 10 arranged in the first direction X will be called pixel rows, and the plurality of pixels 10 arranged in the second direction Y will be called pixel columns. In the pixel array section 2, a plurality of pixel rows are arranged in the second direction Y, and a plurality of pixel columns are arranged in the first direction X. In the pixel array section 2, a vertical signal line VSL is arranged for each pixel column, and a row selection line L1 is arranged for each pixel row.

[0033] As described below, the pixel 10 includes a photoelectric conversion element 11, a transfer transistor 12, a reset transistor 13, an amplification transistor 14, and a selection transistor 15. The pixel 10 may also be provided with a drain transistor or a conversion efficiency switching transistor.

[0034] Furthermore, as will be described later, a pixel 10 may be provided with a plurality of photoelectric conversion elements 11 each having a different sensitivity.

[0035] The photoelectric conversion element 11 accumulates electric charges according to the amount of incident light. The photoelectric conversion element 11 is, for example, a photodiode PD. The transfer transistor 12 switches whether or not to transfer the accumulated electric charges of the photodiode PD to the floating diffusion FD. The reset transistor 13 switches whether or not to set the floating diffusion FD to a reset signal level by discharging the electric charges of the floating diffusion FD to a power supply voltage VDD node. The amplification transistor 14 forms a source follower circuit together with the selection transistor 15, and generates a pixel signal according to the accumulated electric charges of the floating diffusion FD and outputs it to the vertical signal line VSL. The selection transistor 15 outputs the pixel signal to the vertical signal line VSL when the selection signal is at a high level.

[0036] The vertical scanning circuit 3 sequentially drives the row selection lines L1. For example, the vertical scanning circuit 3 sets the row selection line L1 to be driven to a high-level potential. As a result, the selection signal of each pixel 10 included in the pixel row connected to the row selection line L1 to be driven becomes high level, and the selection transistor 15 is turned on.

[0037] The column readout circuit 4 has a plurality of current sources that draw in currents flowing through a plurality of vertical signal lines VSL arranged in the first direction X. The column readout circuit 4 may also have a plurality of capacitors that hold charges according to the potentials of the vertical signal lines VSL. The column readout circuit 4 may also be called a load MOS circuit.

[0038] The column signal processing circuit 5 generates a digital signal based on a result of comparing the potentials of the multiple vertical signal lines VSL with a reference signal (also called a ramp signal) Ramp. As described later, the column signal processing circuit 5 has multiple analog-to-digital converters (AD converters). Each AD converter has a comparator and a counter. The comparator compares the potential of the corresponding vertical signal line VSL with the reference signal Ramp. The reference signal Ramp is generated by the DAC8. The counter performs a counting operation until the comparator detects a match between the potential of the vertical signal line VSL and the reference signal Ramp. The count value of the counter corresponds to a digital signal. The column signal processing circuit 5 can also perform correlated double sampling (CDS) processing to detect a difference between a noise potential and a signal potential.

[0039] The horizontal scanning circuit 6 sequentially selects and outputs digital signals output from a plurality of AD converters corresponding to a plurality of vertical signal lines VSL arranged in the first direction X.

[0040] The control circuit 7 controls the operation timings of the vertical scanning circuit 3, the column reading circuit 4, the column signal processing circuit 5, the horizontal scanning circuit 6, and the DAC 8.

[0041] The imaging device 1 according to the present disclosure can be realized by a chip with a stacked structure. FIG. 2A is a schematic perspective view showing an example of the imaging device 1 according to the present disclosure having a two-layer structure. The imaging device 1 of FIG. 2A includes a first substrate 16 arranged on the light incident surface side, and a second substrate 17 stacked on the first substrate 16. The first substrate 16 includes, for example, a photodiode PD of each pixel 10, a transfer transistor 12, a reset transistor 13, an amplification transistor 14, and a selection transistor 15. The second substrate 17 includes, for example, a vertical scanning circuit 3, a column readout circuit 4, a column signal processing circuit 5, a horizontal scanning circuit 6, and a control circuit 7. The first substrate 16 and the second substrate 17 are bonded and transmit signals by, for example, a CCC (Cupper-Cupper Connection). Alternatively, the first substrate 16 and the second substrate 17 may be bonded by a via or a bump other than a CCC.

[0042] 2B is a schematic perspective view showing an example of an imaging device 1 according to the present disclosure having a three-layer structure. The imaging device 1 in FIG. 2B includes a first substrate 16 disposed on the light incident surface side, a second substrate 17 laminated on the first substrate 16, and a third substrate 18 laminated on the second substrate 17. For example, the photodiode PD and the transfer transistor 12 of each pixel 10 are disposed on the first substrate 16. The pixel transistors (such as the reset transistor 13, the amplification transistor 14, and the selection transistor 15) other than the transfer transistor 12 of each pixel 10 are disposed on the second substrate 17. In addition, some circuits among the vertical scanning circuit 3, the column readout circuit 4, the column signal processing circuit 5, the horizontal scanning circuit 6, and the DAC 8 are disposed on the second substrate 17, and the remaining circuits are disposed on the third substrate 18. The first substrate 16 and the second substrate 17 are joined and signal-transmitted by, for example, a TSV (Through Silicon Via), and the second substrate 17 and the third substrate 18 are joined and signal-transmitted by, for example, a CCC.

[0043] (First embodiment) Fig. 3 is a circuit diagram showing a main part of the imaging device 1 according to the first embodiment. More specifically, Fig. 3 shows a circuit configuration of the pixels 10, the column readout circuit 4, and the column signal processing circuit 5 connected to one vertical signal line VSL.

[0044] The pixel 10 according to the first embodiment includes a photodiode PD, a floating diffusion FD, a transfer transistor 12, a reset transistor 13, an amplification transistor 14, and a selection transistor 15, as well as a conversion efficiency switching transistor 19. A charge holding unit LFD is connected to the conversion efficiency switching transistor 19 in addition to the floating diffusion FD.

[0045] The pixel 10 performs photoelectric conversion at a high conversion efficiency when the conversion efficiency switching transistor 19 is off, and at a low conversion efficiency when the conversion efficiency switching transistor 19 is on. In this specification, the mode in which photoelectric conversion is performed at a high conversion efficiency is called HCG (High Conversion Gain), and the mode in which photoelectric conversion is performed at a low conversion efficiency is called LCG (Low Conversion Gain). The transistors provided in the pixel 10 are collectively called pixel transistors. In this specification, an example in which the pixel transistor is configured with an NMOS transistor is shown, but it is also possible to configure the pixel transistor with a PMOS transistor.

[0046] The amplification transistor 14 and the selection transistor 15 form a source follower circuit, and the source of the selection transistor 15 is connected to a vertical signal line VSL. A capacitor 21 that accumulates a charge according to the FD potential is connected to the vertical signal line VSL via the source follower circuit.

[0047] In this manner, in the circuit of FIG. 3, a charge corresponding to the FD potential is accumulated in the capacitor 21 connected to the vertical signal line VSL via the source follower circuit, and therefore this source follower circuit can be called a dynamic source follower circuit.

[0048] The dynamic source follower circuit can quickly store charge in capacitor 21 equivalent to the increase in the FD potential when the FD potential rises, but does not have the function of discharging charge from capacitor 21 even when the FD potential falls.

[0049] Therefore, the imaging device 1 according to the first embodiment includes a reset potential switch 22 that forcibly sets the vertical signal line VSL to a reset potential. The reset potential switch 22 is disposed for each vertical signal line VSL. The reset potential switch 22 is provided in, for example, the column readout circuit 4. The reset potential switch 22 can switch the reset potential according to the illuminance.

[0050] The imaging device 1 according to the first embodiment includes an illuminance determination unit 23 for each vertical signal line VSL. The illuminance determination unit 23 determines the illuminance of light incident on a plurality of pixels 10 connected to the corresponding vertical signal line VSL. The illuminance determination unit 23 is provided in, for example, a column signal processing circuit 5. More specifically, the illuminance determination unit 23 is connected to an output node of a comparator 27 of the column signal processing circuit 5. The illuminance determination unit 23 determines the illuminance in at least two stages. In this specification, an example in which the illuminance determination unit 23 determines high illuminance or low illuminance will be described, but the illuminance determination unit 23 may determine three or more stages of illuminance. In this manner, the illuminance determination unit 23 determines the illuminance based on the signal potential of a pixel signal corresponding to the amount of light incident on a plurality of pixels. More specifically, the illuminance determination unit 23 determines the illuminance based on the signal potential of a pixel signal in a state in which the photoelectric conversion efficiency is maximum.

[0051] The above-mentioned reset potential switch 22 switches the reset potential for initializing the potential of the vertical signal line VSL based on the illuminance determined by the illuminance determination unit 23. When it is determined that the illuminance is low, the reset potential switch 22 sets the reset potential higher than when it is determined that the illuminance is high. The reason for this is that when the reset potential is lowered, the signal potential of the pixel signal is higher in the case of low illuminance than in the case of high illuminance, and therefore it becomes necessary to greatly change the potential of the vertical signal line VSL, and it takes time for the vertical signal line VSL to settle.

[0052] Moreover, the reset potential switch 22 sets the reset potential when the vertical signal line VSL is at a noise potential higher than the reset potential when the illuminance is determined to be low by the illuminance determination unit 23. The noise potential is the potential of the vertical signal line VSL when the photodiode PD does not perform photoelectric conversion, and the signal level of the pixel signal corresponding to the noise potential is higher than the signal level of the pixel signal at the time of low illuminance, so the reset potential for the noise potential is set higher in advance.

[0053] As shown in FIG. 3, the reset potential switch 22 according to the first embodiment has a plurality of reset potential setting circuits 24 connected in parallel between the corresponding vertical signal line VSL and a reference voltage node (for example, a ground node). In the example of FIG. 3, three reset potential setting circuits 24 are provided. Each reset potential setting circuit 24 has a voltage source 25 having a different potential level, and a switch (second switch) 26 for switching whether or not to set the potential of the voltage source 25 as the reset potential based on the illuminance determined by the illuminance determination unit 23. The plurality of voltage sources 25 may be provided outside the imaging device 1. In that case, pads for applying voltages from the plurality of externally provided voltage sources 25 are provided in the imaging device 1. In this way, the reset potential switch 22 selects one of a plurality of input potentials having different potential levels as the reset potential. The plurality of input potentials include at least three types of input potentials for setting the vertical signal line VSL to a noise potential, a low illuminance reset potential, or a high illuminance reset potential.

[0054] 3 includes a voltage source 25 that supplies a potential for a noise potential, a voltage source 25 that supplies a potential for low illuminance, a voltage source 25 that supplies a potential for high illuminance, and three switches 26 connected to the voltage sources 25. Only one of the three switches 26 is turned on, and the potential of the voltage source 25 connected to the switch 26 that is turned on is set as the reset potential of the vertical signal line VSL.

[0055] As shown in FIG. 3, the illuminance determination unit 23 is connected to an output node of the comparator 27 of the column signal processing circuit 5. The illuminance determination unit 23 determines the illuminance based on the amount of light incident on the pixel 10, for example, as described later. The pixel 10 outputs a pixel signal having a signal potential corresponding to the amount of light incident on the pixel 10 to the vertical signal line VSL. The comparator 27 outputs a comparison result between the potential of the vertical signal line VSL and the reference signal Ramp. The illuminance determination unit 23 determines the illuminance based on the output signal of the comparator 27. The reference signal Ramp is a ramp signal whose potential changes with time. When the reference signal Ramp is a ramp signal whose potential decreases with time, the lower the potential of the vertical signal line VSL, the slower the comparator 27 detects a match. The comparator 27 changes the logic of the output signal at the point in time when it detects a match. The illuminance determination unit 23 can determine whether the illuminance is high or low based on the length of time it takes for the logic of the output signal of the comparator 27 to change.

[0056] The three switches 26 of the reset potential setting circuit 24 are switched on or off based on the result of the determination by the illuminance determination unit 23. Specifically, when the illuminance determination unit 23 determines that the illuminance is high, the switch 26 connected to the voltage source 25 that supplies a potential for high illuminance is turned on. When the illuminance determination unit 23 determines that the illuminance is low, the switch 26 connected to the voltage source 25 that supplies a potential for low illuminance is turned on. When the noise potential is to be read, the switch 26 connected to the voltage source 25 that supplies a potential for the noise potential is turned on.

[0057] FIG. 3 shows a circuit configuration of a column readout circuit 4 and a column signal processing circuit 5 connected to one vertical signal line VSL, but a circuit similar to that in FIG. 3 is connected to each of a plurality of vertical signal lines VSL arranged in the first direction X.

[0058] Fig. 4 is a timing diagram of the imaging device 1 according to the first embodiment. Fig. 4 shows the gate voltage TRG of the transfer transistor 12, the gate voltage RST of the reset transistor 13, the gate voltage FDG of the conversion efficiency switching transistor 19, the gate voltage SEL of the selection transistor 15, the reference signal Ramp output from the DAC 8, the on / off timing of the three switches 26 of the reset potential setting circuit 24, the potential of the vertical signal line VSL at high illuminance, the potential of the vertical signal line VSL at low illuminance, and the waveforms of the potential of the vertical signal line VSL when illuminance determination is not performed. Hereinafter, the operation of the light emitting device according to the first embodiment will be described with reference to Fig. 4.

[0059] Although the photodetector according to the first embodiment includes the illuminance determination unit 23, it is also possible to select a mode in which illuminance determination is not performed by the illuminance determination unit 23. In this case, the potential of the vertical signal line VSL has a waveform in the case where illuminance determination is not performed, as shown in the bottom row of FIG.

[0060] 4 shows an example of driving the row selection line L1 of a pixel row, and the selection transistors 15 of all the pixels 10 included in this pixel row are turned on. From time t1 to t2, the reset transistor 13 is turned on to pull out the charge (electrons) of the floating diffusion FD to the power supply voltage VDD node, and the FD potential is reset. From time t1 to t3, the conversion efficiency switching transistor 19 is turned on, and the charge (electrons) held in the charge holding unit LFD connected to the conversion efficiency switching transistor 19 is also pulled out to the power supply voltage VDD node. From time t1 to t2, the signal level of the reference signal Ramp output from the DAC 8 is constant (high level potential).

[0061] Between times t2 and t3, the signal level of the reference signal Ramp output from the DAC8 gradually decreases. Between times t2 and t3, a noise potential readout period at low conversion efficiency is performed. At time t3, the switch 26 connected to the voltage source 25 for noise potential in the reset potential switch 22 is temporarily turned on. This sets the vertical signal line VSL to the reset potential for noise potential. Also, at time t3, the reference signal Ramp output from the DAC8 returns to the original high level potential, and thereafter, the signal level of the reference signal Ramp gradually decreases until time t4. Furthermore, at time t3, the conversion efficiency switching transistor 19 is turned off.

[0062] The period from time t3 to t4 is a period during which the noise potential is read out at high conversion efficiency. At time t4, the switch 26 connected to the high illuminance voltage source 25 in the reset potential switch 22 is temporarily turned on. This sets the vertical signal line VSL to a reset potential for high illuminance. In this manner, at time t4 when the readout of the noise potential is completed, the vertical signal line VSL is lowered to the reset potential for high illuminance regardless of the illuminance. Also, at time t4, the reference signal Ramp output from the DAC 8 returns to the original high level potential, and thereafter, the signal level of the reference signal Ramp gradually decreases until time t5.

[0063] Between times t1 and t4, regardless of the illuminance of light incident on the pixel 10, a noise potential is read out in a state in which a reset potential for the noise potential is set in the vertical signal line VSL.

[0064] The period from time t4 to t5 is a period in which the signal potential is read out at high conversion efficiency. Also, the illuminance determination unit 23 determines the illuminance during the period from time t4 to t5. At time t4, the vertical signal line VSL is set to a reset potential for high illuminance. Therefore, during the period from time t4 to t5, if the illuminance is high, the potential of the vertical signal line VSL does not rise much, but if the illuminance is low, the potential of the vertical signal line VSL rises significantly.

[0065] At time t5, the conversion efficiency switching transistor 19 is turned on, and during the period from time t5 to t6, the signal potential is read out at low conversion efficiency. At time t5, the switch 26 connected to the voltage source 25 for high illuminance or the switch 26 connected to the voltage source 25 for low illuminance in the reset potential switch 22 is turned on according to the illuminance determined by the illuminance determination unit 23. When the illuminance determination unit 23 determines that the illuminance is high, the switch 26 connected to the voltage source 25 for high illuminance is turned on, and the vertical signal line VSL is set to a reset potential for high illuminance. On the other hand, when the illuminance determination unit 23 determines that the illuminance is low, the switch 26 connected to the voltage source 25 for low illuminance is turned on, and the vertical signal line VSL is set to a reset potential for low illuminance. In this case, the potential of the vertical signal line VSL is raised higher than that at time t4. Furthermore, when the illuminance determining unit 23 does not perform an illuminance determination, the vertical signal line VSL is set at time t5 to a reset potential similar to that when the illuminance is determined to be high.

[0066] In this manner, in the first embodiment, after a reset potential of a potential level corresponding to the illuminance determined by the illuminance determination unit 23 is set to the vertical signal line VSL (time t5), the signal potential of the pixel signal is read out. This makes it possible to reduce the amount of fluctuation in the potential of the vertical signal line VSL, shorten the settling time of the vertical signal line VSL, and reduce the current flowing through the vertical signal line VSL, thereby achieving power saving.

[0067] Second embodiment FIG. 5 is a circuit diagram showing a main part of an imaging device 1 according to a second embodiment. The imaging device 1 according to the second embodiment includes a pixel 10 having a different configuration from that of the imaging device 1 according to the first embodiment. The pixel 10 according to the second embodiment includes a plurality of photoelectric conversion elements 11 (for example, photodiodes PD) each having a different light receiving area. In the example of FIG. 5, the pixel 10 includes two photodiodes PD having different light receiving areas, but three or more photodiodes PD may be provided. Hereinafter, the two photodiodes PD provided in the pixel 10 of FIG. 5 are referred to as a first photodiode PD1 and a second photodiode PD2. For example, the first photodiode PD1 has a larger light receiving area than the second photodiode PD2. The larger the light receiving area, the weaker the light can be detected, but the more likely it is to be saturated. By providing a plurality of photodiodes PD having different light receiving areas in the pixel 10, the dynamic range can be expanded.

[0068] 5 also has a charge holding unit 28 that holds the accumulated charge in the second photodiode PD2, and a second transfer transistor 12b that switches whether or not to connect the source of the reset transistor 13 and the cathode of the second photodiode PD2. Hereinafter, the transistor that transfers the accumulated charge in the first photodiode PD1 to the floating diffusion FD will be referred to as the first transfer transistor 12a.

[0069] The imaging device 1 according to the second embodiment has the same configuration as the imaging device 1 according to the first embodiment, except that the configuration of the pixel 10 differs from that of the first embodiment.

[0070] Fig. 6 is a timing diagram of the imaging device 1 according to the second embodiment. Fig. 6 shows the gate potential waveforms of the first transfer transistor 12a, the reset transistor 13, the conversion efficiency switching transistor 19, the second transfer transistor 12b, and the selection transistor 15, the potential waveform of the reference signal Ramp output from the DAC 8, and the potential waveform of the vertical signal line VSL. The potential waveform of the vertical signal line VSL includes a potential waveform when no illuminance determination is performed or when illuminance is high, and a potential waveform when illuminance is low.

[0071] In the first embodiment, the illuminance determination unit 23 determines the illuminance after the noise potential is read out, but in the second embodiment, the illuminance determination unit 23 determines the illuminance before the noise potential is read out. More specifically, in the first embodiment, the illuminance is determined based on the charge generated by photoelectric conversion of the photodiode PD, but in the second embodiment, the illuminance is determined based on the charge overflowing from the photodiode PD to the floating diffusion FD with the first transfer transistor 12a turned off.

[0072] At time t1 in FIG. 6, the vertical signal line VSL is set to a reset potential of the noise potential regardless of the illuminance. Between times t1 and t2, the first photodiode PD1 performs exposure. Charges that cannot be accumulated in the first photodiode PD1 and overflow are transferred to the floating diffusion FD. The FD potential becomes a potential corresponding to the accumulated charge in the floating diffusion FD. The more charge that overflows from the first photodiode PD1, the lower the FD potential becomes. The vertical signal line VSL becomes a potential corresponding to the FD potential.

[0073] The illuminance determination unit 23 determines the illuminance based on the potential of the vertical signal line VSL between times t1 and t2. That is, the illuminance determination unit 23 determines the illuminance based on the charge overflowing from the first photodiode PD1. The higher the illuminance, the more the charge overflowing from the first photodiode PD1 becomes, and the lower the FD potential and the potential of the vertical signal line VSL become. The illuminance determination unit 23 determines, for example, whether the illuminance is high or low based on the potential of the vertical signal line VSL. In this way, the illuminance determination unit 23 determines the illuminance based on the charge leaking from the photoelectric conversion element 11 to the floating diffusion FD before starting the charge transfer by photoelectric conversion from the photoelectric conversion element 11 to the floating diffusion FD via the transfer transistor 12.

[0074] The DAC 8 keeps the signal level of the reference signal Ramp low between times t1 and t2, raises it to a high-level potential at time t2, and then gradually lowers the signal level of the reference signal Ramp. Between times t2 and t3, the conversion efficiency switching transistor 19 is on, so that the noise potential is read out at a low conversion efficiency.

[0075] At time t3, the conversion efficiency switching transistor 19 is turned off. The DAC 8 raises the signal level of the reference signal Ramp to a high-level potential at time t3, and then gradually lowers the signal level of the reference signal Ramp. Between times t3 and t4, the noise potential is read out with high conversion efficiency.

[0076] Just before time t4, the first transfer transistor 12a is turned on. At time t4, the reset potential switch 22 sets the vertical signal line VSL to a reset potential for high illuminance regardless of the illuminance. Between times t4 and t5, the signal potential is read out with high conversion efficiency.

[0077] At time t5, the reset potential switch 22 sets the reset potential of the vertical signal line VSL based on the result of the illuminance determination performed by the illuminance determination unit 23 between times t1 and t2. For example, if the illuminance determination unit 23 determines that the illuminance is high, the reset potential switch 22 sets the vertical signal line VSL to a reset potential for high illuminance, and if the illuminance determination unit 23 determines that the illuminance is low, the reset potential switch 22 sets the vertical signal line VSL to a reset potential for low illuminance. As shown in FIG. 6, if the illuminance determination unit 23 determines that the illuminance is low, the reset potential switch 22 makes the potential level of the reset potential higher than when the illuminance determination unit 23 determines that the illuminance is high.

[0078] After time t5, the conversion efficiency switching transistor 19 is turned on. Between times t5 and t6 and between times t6 and t7, the signal potential is read out at a low conversion efficiency. The DAC8 raises the reference signal Ramp to a high level potential at time t5, and then gradually lowers it until time t6. Similarly, the DAC8 raises the reference signal Ramp to a high level potential at time t6, and then gradually lowers it until time t7.

[0079] At time t7, the reset transistor 13 is temporarily turned on. As a result, the charge stored in the floating diffusion FD is discharged to the power supply voltage VDD node via the reset transistor 13. Between times t7 and t8, the noise potential is read out.

[0080] At time t8, the reset transistor 13 is temporarily turned on. A little after time t8, the second transfer transistor 12b is turned on. As a result, a charge according to the amount of photoelectric conversion by the second photodiode PD2 is accumulated in the floating diffusion FD. Between times t8 and t9, the signal potential photoelectrically converted by the second photodiode PD2 is read out.

[0081] At time t9, the reset transistor 13 is temporarily turned on. As a result, the charge stored in the floating diffusion FD is discharged to the power supply voltage VDD node via the reset transistor 13. Between times t9 and t10, the noise potential of the second photodiode PD2 is read out.

[0082] At high illuminance, the counter provided at the rear of the comparator 27 of the column signal processing circuit 5 stops counting operation during the period from t2 to t6. At high illuminance, the counter starts counting operation after the time t6 to generate digital signals of the noise potential and the signal potential. At low illuminance, the counter stops counting operation during the period from t6 to t10. At low illuminance, the counter starts counting operation during the period from t2 to t6 to generate digital signals of the noise potential and the signal potential. As shown in the timing diagram of FIG. 6, the reset potential switch 22 according to the second embodiment determines the illuminance at the illuminance determination unit 23, sets a reset potential corresponding to the noise potential to the vertical signal line VSL, and reads out the noise potential. Then, for each of the multiple photoelectric conversion elements 11, the reset potential corresponding to the illuminance determined by the illuminance determination unit 23 is set to the vertical signal line VSL, and reads out the signal potential.

[0083] 6, the reset potential switch 22 turns on the switch 26 connected to the voltage source 25 for high illuminance at time t4 and time t5, and sets the vertical signal line VSL to a reset potential for high illuminance. On the other hand, if the illuminance judgement unit 23 judges the illuminance to be low between time t1 and time t2, the reset potential switch 22 sets the vertical signal line VSL to a reset potential for high illuminance at time t4, and sets the vertical signal line VSL to a reset potential for low illuminance at time t5. Therefore, after time t5, the amount of potential fluctuation of the vertical signal line VSL is suppressed, the settling time of the vertical signal line VSL can be shortened, and the current flowing through the vertical signal line VSL can be reduced, thereby saving power.

[0084] (Third embodiment) The third embodiment is characterized in that the reference potential of the vertical signal line VSL for determining the illuminance is generated by a reference signal generating circuit.

[0085] FIG. 7 is a circuit diagram showing a main part of an imaging device 1 according to a third embodiment. The imaging device 1 according to the third embodiment is obtained by adding a reference signal generating circuit 30 to the circuit configuration of FIG. 3. The reference signal generating circuit 30 generates a reference signal for setting the vertical signal line VSL to a reference potential. The reference signal generating circuit 30 has two transistors 31 and 32 cascode-connected between a power supply voltage VDD node and the vertical signal line VSL. These transistors 31 and 32 are, for example, NMOS transistors. These transistors 31 and 32 output, for example, a pixel signal corresponding to the potential of a floating diffusion FD of a dummy pixel 10 (not shown) to the vertical signal line VSL. The dummy pixel 10 is a pixel that is shielded from light, and can output a pixel signal of a stable signal level. Alternatively, the gate voltages of the two transistors 31 and 32 may be controlled from the outside.

[0086] The reference signal generating circuit 30 is a source follower circuit. A current flowing through two transistors 31 and 32 in the reference signal generating circuit 30 flows to the capacitor 21 via the vertical signal line VSL. As a result, the vertical signal line VSL has a potential corresponding to the charge held in the capacitor 21. In this way, the reference signal generating circuit 30 constitutes a dynamic source follower circuit in order to hold a charge corresponding to the current flowing through the two transistors 31 and 32 in the capacitor 21 connected to the vertical signal line VSL.

[0087] A charge corresponding to the reference signal generated by the reference signal generating circuit 30 is held in the capacitor 21, and the vertical signal line VSL is set to the reference potential. After the reference signal generating circuit 30 sets the vertical signal line VSL to the reference potential, the illuminance determining unit 23 determines the illuminance based on the amount of potential variation from the reference potential. Thereafter, the reset potential switch 22 sets a reset potential for high illuminance or low illuminance to the vertical signal line VSL based on the illuminance determined by the illuminance determining unit 23.

[0088] 8 is a waveform diagram showing the reset potential set by the reset potential switch 22 to the vertical signal line VSL according to the illuminance determined by the illuminance determination unit 23, where Fig. 8A shows the reset potential in the case of low illuminance, and Fig. 8B shows the reset potential in the case of high illuminance. The illuminance determination unit 23 determines the illuminance, for example, at the timing when the readout of the noise potential is completed, and the reset potential switch 22 switches the reset potential of the vertical signal line VSL based on the determination result. Note that, as shown in the first embodiment, the illuminance may be determined before the readout of the noise potential.

[0089] In this way, in the third embodiment, the reference signal generating circuit 30 sets the vertical signal line VSL to a reference potential, and then the illuminance determination unit 23 determines the illuminance, so that variation in the illuminance determination results for each vertical signal line VSL is less likely to occur.

[0090] (Fourth embodiment) The fourth embodiment differs from the third embodiment in the circuit configuration of the reference signal generating circuit 30.

[0091] Fig. 9 is a circuit diagram showing a main part of an imaging device 1 according to a fourth embodiment. The imaging device 1 according to the fourth embodiment has a reference signal generation circuit 30 having a different configuration from that of the third embodiment. As shown in Fig. 9, the reference signal generation circuit 30 according to the fourth embodiment has two transistors 31 and 32 cascode-connected between a power supply voltage VDD node and a vertical signal line VSL, and also has a switch 33 and a current source 34 connected in series between the vertical signal line VSL and a reference voltage (e.g., ground) node.

[0092] The switch 33 is turned on when the vertical signal line VSL is set to the reference potential. When the switch 33 is turned on, the current flowing through the two transistors 31 and 32 in the reference signal generating circuit 30 flows to the current source 34 via the switch 33. Since the current source 34 is a constant current source that supplies a constant current, the vertical signal line VSL can be set to a constant reference potential.

[0093] In the fourth embodiment, after the switch 33 is turned on and the vertical signal line VSL is set to a reference potential with a constant current load, the illuminance is judged by the illuminance judgment unit 23, a reset potential of the vertical signal line VSL is set based on the judgment result, and the signal potential is read out.

[0094] In the fourth embodiment, similarly to the third embodiment, the reference signal generating circuit 30 sets the vertical signal line VSL to a reference potential, and then the illuminance determination unit 23 determines the illuminance, so that the illuminance determination results are less likely to vary for each vertical signal line VSL.

[0095] Fifth embodiment The fifth embodiment differs from the first to fourth embodiments in the configuration of the reset potential switch 22.

[0096] 10 is a circuit diagram showing a main part of an imaging device 1 according to a fifth embodiment. The imaging device 1 according to the fifth embodiment includes a reset potential switch 22 having a different configuration from those of the first to fourth embodiments. The reset potential switch 22 according to the fifth embodiment includes a plurality of source follower circuits 35, a switch (fourth switch) 36, and a current source 37 connected in series between a vertical signal line VSL and a reference potential (for example, ground) node.

[0097] Each of the multiple source follower circuits 35 has a transistor 38 and a switch (fifth switch) 39 connected in series between a power supply voltage VDD node and a vertical signal line VSL. The transistor 38 is, for example, an NMOS transistor. The drain of the transistor 38 is connected to the power supply voltage VDD node, and the source is connected to one end of the switch 39. The other end of the switch 39 is connected to the vertical signal line VSL. Potentials of different potential levels are input to the gates of the transistors 38.

[0098] 10 shows an example in which two source follower circuits 35 are connected in series, but three or more source follower circuits 35 may be connected in series and potentials of different potential levels may be input to the gates of the transistors 38 in each source follower circuit 35. Hereinafter, the two source follower circuits 35 shown in FIG. 10 are referred to as the first source follower circuit 35 and the second source follower circuit 35. A reset potential for low illuminance is input to the gate of the transistor 38 in the first source follower circuit 35. A reset potential for high illuminance is input to the gate of the transistor 38 in the second source follower circuit 35.

[0099] The switch 36 is turned on when the vertical signal line VSL is set to the reference potential. When the switch 36 is turned on, a constant current flows from the vertical signal line VSL to the current source 37 via the switch 36.

[0100] After the vertical signal line VSL is set to the reference potential, the illuminance is determined by the illuminance determination unit 23. Thereafter, the reset potential switch 22 turns on any one of the switches 39 based on the illuminance determined by the illuminance determination unit 23, and sets the vertical signal line VSL to a reset potential according to the illuminance.

[0101] In the fifth embodiment, even if the potential of the connection node of the current source 37 that discharges a reset current fluctuates due to the illuminance of multiple pixels 10 that are read out simultaneously, the reset potential of the vertical signal line VSL is set by the source follower circuit 35, so that the reset potential is not affected by the potential fluctuation of the connection node of the current source 37. Therefore, a countermeasure against streaking can be taken.

[0102] Sixth embodiment In the sixth embodiment, the reset potential switch 22 is provided with a single voltage source.

[0103] 11 is a circuit diagram showing a main part of an imaging device 1 according to the sixth embodiment. The imaging device 1 according to the sixth embodiment differs from the first to fifth embodiments in the configuration of a reset potential switch 22. The reset potential switch 22 according to the sixth embodiment has a single voltage source 41 and a plurality of reset potential setting circuits 24 connected in parallel between a vertical signal line VSL and a voltage source 25.

[0104] Each of the multiple reset potential setting circuits 24 has a switch 26 and a potential setting unit 42. The switch 26 switches whether or not to select the corresponding reset potential setting circuit 24. The potential setting units 42 each have a different number of serially connected diodes or diode-connected transistors 43, or connect the corresponding switch 26 to a voltage source 41.

[0105] The diode or diode-connected transistor 43 has a predetermined forward voltage (e.g., about 0.6 V) between the anode and cathode or between the drain and source. Therefore, by adjusting the number of diodes or diode-connected transistors 43 connected in series, it can be used as the voltage source 41 in FIG.

[0106] In the example of Fig. 10, a reset potential for noise potential is generated by connecting two diode-connected transistors 43 in series. A reset potential for low illuminance is generated by using one diode-connected transistor 43. A reset potential for high illuminance is generated by not connecting the diode-connected transistor 43 to the switch 26. The number of diode-connected transistors 43 connected in series is arbitrary.

[0107] According to the sixth embodiment, a single voltage source 41 can generate a plurality of reset potentials, so that the number of pads for applying a voltage from the external voltage source 41 and the number of wires connected to the pads can be reduced.

[0108] <Applications to moving objects> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of moving body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility device, an airplane, a drone, a ship, a robot, etc.

[0109] FIG. 12 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a moving object control system to which the technology according to the present disclosure can be applied.

[0110] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 12, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also, as functional configurations of the integrated control unit 12050, a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (Interface) 12053 are illustrated.

[0111] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0112] The body system control unit 12020 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as head lamps, back lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves or signals of various switches transmitted from a portable device that replaces a key may be input to the body system control unit 12020. The body system control unit 12020 receives the input of these radio waves or signals and controls the door lock device, power window device, lamps, and the like of the vehicle.

[0113] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture an image outside the vehicle and receives the captured image. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for a person, a car, an obstacle, a sign, or characters on a road surface, based on the received image.

[0114] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal according to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0115] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing.

[0116] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, the steering mechanism, or the braking device based on the information inside and outside the vehicle acquired by the outside-of-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output a control command to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0117] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on the driver's operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle acquired by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0118] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12030 based on the information outside the vehicle acquired by the outside-vehicle information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detection unit 12030, and perform cooperative control for the purpose of preventing glare, such as switching from high beams to low beams.

[0119] The audio / video output unit 12052 transmits at least one output signal of audio and image to an output device capable of visually or audibly notifying information to passengers in the vehicle or the outside of the vehicle. In the example of Fig. 12, an audio speaker 12061, a display unit 12062, and an instrument panel 12063 are exemplified as the output device. The display unit 12062 may include at least one of an on-board display and a head-up display, for example.

[0120] FIG. 13 is a diagram showing an example of the installation position of the imaging unit 12031.

[0121] In FIG. 13, the imaging unit 12031 includes imaging units 12101, 12102, 12103, 12104, and 12105.

[0122] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided at positions such as the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield in the vehicle interior of the vehicle 12100. The imaging unit 12101 provided at the front nose and the imaging unit 12105 provided at the upper part of the windshield in the vehicle interior mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided at the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided at the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The imaging unit 12105 provided at the upper part of the windshield in the vehicle interior is mainly used to detect a preceding vehicle, a pedestrian, an obstacle, a traffic light, a traffic sign, a lane, or the like.

[0123] 13 shows an example of the imaging ranges of the imaging units 12101 to 12104. An imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and an imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, an overhead image of the vehicle 12100 viewed from above is obtained by superimposing the image data captured by the imaging units 12101 to 12104.

[0124] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera made up of a plurality of imaging elements, or may be an imaging element having pixels for detecting a phase difference.

[0125] For example, the microcomputer 12051 can extract, as a preceding vehicle, a three-dimensional object that is the closest three-dimensional object on the travel path of the vehicle 12100 and travels at a predetermined speed (for example, 0 km / h or more) in approximately the same direction as the vehicle 12100, by calculating the distance to each three-dimensional object in the imaging ranges 12111 to 12114 and the change over time of this distance (relative speed with respect to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104. Furthermore, the microcomputer 12051 can set a vehicle distance to be secured in advance in front of the preceding vehicle, and perform automatic brake control (including follow-up stop control) and automatic acceleration control (including follow-up start control). In this way, cooperative control can be performed for the purpose of automatic driving that travels autonomously without relying on the driver's operation.

[0126] For example, the microcomputer 12051 classifies and extracts three-dimensional object data on three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0127] At least one of the imaging units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether or not a pedestrian is present in the captured images of the imaging units 12101 to 12104. The recognition of such a pedestrian is performed, for example, by a procedure of extracting feature points in the captured images of the imaging units 12101 to 12104 as infrared cameras, and a procedure of performing pattern matching processing on a series of feature points that indicate the contour of an object to determine whether or not the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the captured images of the imaging units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular contour line for emphasis on the recognized pedestrian. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating a pedestrian at a desired position.

[0128] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the imaging unit 12031, etc., among the configurations described above. Specifically, the light detection device 1 according to each embodiment can be applied to the imaging unit 12031. By applying the technology according to the present disclosure to the imaging unit 12031, a captured image that is easier to see can be obtained, thereby reducing driver fatigue.

[0129] The present technology can be configured as follows.

[0130] (1) a plurality of pixels arranged in one direction, each having a photoelectric conversion element; a signal line for transmitting a plurality of pixel signals photoelectrically converted by the plurality of pixels; an illuminance determination unit that determines an illuminance of light incident on the plurality of pixels; a reset potential switch that switches a reset potential for initializing a potential of the signal line based on the illuminance determined by the illuminance determination unit. Imaging device. (2) The illuminance determination unit determines the illuminance in at least two stages. The imaging device described in (1). (3) the illuminance determination unit determines whether the illuminance is high or low, the reset potential switch sets the reset potential higher when the illuminance is determined to be low than when the illuminance is determined to be high; An imaging device as described in (1) or (2). (4) the reset potential switch sets the reset potential when the signal line is at a noise potential higher than the reset potential when the illuminance determination unit determines that the illuminance is low; The imaging device according to (3). (5) a pixel array section having the plurality of pixels arranged in a first direction and a second direction; a plurality of the signal lines each extending in the second direction and arranged in the first direction, transmitting two or more pixel signals photoelectrically converted by two or more of the pixels arranged in the second direction; the illuminance determination unit and the reset potential switch are provided for each of the plurality of signal lines, An imaging device according to any one of (1) to (4). (6) The reset potential switch selects one of a plurality of input potentials having different potential levels as a reset potential. An imaging device according to any one of (1) to (5). (7) The plurality of input potentials include at least three types of input potentials for setting a noise potential, a low illuminance reset potential, or a high illuminance reset potential to the signal line. The imaging device according to (6). (8) Each of the plurality of pixels has a transfer transistor and a floating diffusion; the illuminance determination unit determines an illuminance based on charges leaking from the photoelectric conversion element to the floating diffusion before starting charge transfer from the photoelectric conversion element to the floating diffusion via the transfer transistor due to photoelectric conversion. An imaging device according to any one of (1) to (7). (9) The illuminance determining unit determines an illuminance based on a signal potential of the pixel signal corresponding to an amount of light incident on the plurality of pixels. An imaging device according to any one of (1) to (7). (10) The plurality of pixels are capable of switching the photoelectric conversion efficiency between at least two stages; the illuminance determination unit determines the illuminance based on a signal potential of the pixel signal in a state where photoelectric conversion efficiency is maximum; The imaging device according to (9). (11) A signal processing unit that performs signal processing including generating a digital signal according to a potential of the signal line based on a result of comparing the potential of the signal line with a reference signal, the reset potential switch sets the reset potential corresponding to the noise potential on the signal line when the signal line is at a noise potential, and thereafter sets the reset potential corresponding to the illuminance determined by the illuminance determination unit on the signal line. An imaging device according to any one of (1) to (10). (12) Each of the plurality of pixels has a plurality of the photoelectric conversion elements having different sensitivities, the reset potential switcher, after determining the illuminance by the illuminance determination unit, sets the reset potential corresponding to a noise potential to the signal line to read out the noise potential, and then sets the reset potential corresponding to the illuminance determined by the illuminance determination unit to the signal line for each of the plurality of photoelectric conversion elements in turn to read out a signal potential; An imaging device according to any one of (1) to (10). (13) A reference signal generating circuit is provided for generating a reference signal for setting the signal line to a reference potential; the illuminance determination unit determines the illuminance based on a potential difference between the potential of the signal line and the reference potential. An imaging device according to any one of (1) to (12). (14) a constant current source that supplies a constant current to the signal line; a first switch that connects the constant current source to the signal line only when the signal line is set to a reference potential; An imaging device according to any one of (1) to (12). (15) The reset potential switch includes a plurality of reset potential setting circuits connected in parallel between the signal line and a reference potential node, Each of the plurality of reset potential setting circuits Voltage sources with different potential levels, and a second switch that switches whether or not to set the potential of the voltage source as the reset potential based on the illuminance determined by the illuminance determination unit. An imaging device according to any one of (1) to (14). (16) The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of reset potential setting circuits set, as the reset potential, a potential of the voltage source having a higher potential level than when the illuminance determination unit determines that the illuminance is high. The imaging device according to (15). (17) The reset potential switch includes a plurality of source follower circuits, a third switch, and a current source connected in series between the signal line and a reference potential node, Each of the plurality of source follower circuits comprises: A transistor having gates to which potentials of different potential levels are input; a fourth switch that switches whether or not the signal line is set to a reset potential according to a potential input to the gate of the transistor; the third switch is turned on when the signal line is set to a reference potential, and causes a constant current to flow through the signal line using the current source; after setting the signal line to the reference potential, turning on any one of the plurality of fourth switches based on the illuminance determined by the illuminance determination unit to set a reset potential of the signal line; An imaging device according to any one of (1) to (14). (18) The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of source follower circuits turn on the fourth switch connected to the transistor to which a higher potential is inputted than when the illuminance is determined to be high, to set a reset potential of the signal line. The imaging device according to (17). (19) The reset potential switch includes a single voltage source connected to the signal line, and a plurality of reset potential setting circuits connected in parallel between the signal line and the voltage source, Each of the plurality of reset potential setting circuits includes a third switch that switches whether or not to select the corresponding reset potential setting circuit, and a potential setting unit that is connected in series to the third switch; The potential setting unit has a different number of diodes or diode-connected transistors connected in series, or connects the third switch to the voltage source. An imaging device according to any one of (1) to (14). (20) The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of reset potential setting circuits set, as the reset potential, a potential of a greater number of diodes or diode-connected transistors connected in series than when the illuminance determination unit determines that the illuminance is high. The imaging device according to (19).

[0131] The aspects of the present disclosure are not limited to the above-mentioned individual embodiments, but include various modifications that may be conceived by a person skilled in the art, and the effects of the present disclosure are not limited to the above-mentioned contents. In other words, various additions, modifications, and partial deletions are possible within the scope of the conceptual idea and intent of the present disclosure derived from the contents defined in the claims and their equivalents. [Explanation of symbols]

[0132] 1 imaging device, 2 pixel array section, 3 vertical scanning circuit, 4 column readout circuit, 5 column signal processing circuit, 6 horizontal scanning circuit, 7 control circuit, 8 DAC, 10 pixel, 11 photoelectric conversion element, 12 transfer transistor, 12a first transfer transistor, 12b second transfer transistor, 13 stored charge reset transistor, 13 reset transistor, 14 amplification transistor, 15 selection transistor, 15 and selection transistor, 16 first substrate, 17 second substrate, 18 third substrate, 19 conversion efficiency switching transistor, 21 capacitor, 22 reset potential switch, 23 illuminance determination section, 24 reset potential setting circuit, 25 voltage source, 26 switch, 27 comparator, 28 charge holding section, 30 reference signal generating circuit, 31 transistor, 32 transistor, 33 switch, 34 current source, 35 source follower circuit, 36 switch, 37 Current source, 38 Transistor, 39 Switch, 41 Voltage source, 41 Single voltage source, 42 Potential setting unit, 43 Transistor

Claims

1. A plurality of pixels arranged in one direction, each having a photoelectric conversion element; a signal line for transmitting a plurality of pixel signals photoelectrically converted by the plurality of pixels; an illuminance determination unit that determines an illuminance of light incident on the plurality of pixels; a reset potential switch that switches a reset potential for initializing a potential of the signal line based on the illuminance determined by the illuminance determination unit. Imaging device.

2. The illuminance determination unit determines the illuminance in at least two stages. The imaging device according to claim 1 .

3. The illuminance determination unit determines whether the illuminance is high or low, the reset potential switch sets the reset potential higher when the illuminance is determined to be low than when the illuminance is determined to be high; The imaging device according to claim 1 .

4. the reset potential switch sets the reset potential when the signal line is at a noise potential higher than the reset potential when the illuminance determination unit determines that the illuminance is low. The imaging device according to claim 3 .

5. a pixel array section having the plurality of pixels arranged in a first direction and a second direction; a plurality of the signal lines each extending in the second direction and arranged in the first direction, transmitting two or more pixel signals photoelectrically converted by two or more of the pixels arranged in the second direction; the illuminance determination unit and the reset potential switch are provided for each of the plurality of signal lines, The imaging device according to claim 1 .

6. the reset potential switch selects one of a plurality of input potentials having different potential levels as a reset potential; The imaging device according to claim 1 .

7. the plurality of input potentials include at least three types of input potentials for setting a noise potential, a low illuminance reset potential, or a high illuminance reset potential to the signal line; The imaging device according to claim 6.

8. Each of the plurality of pixels includes a transfer transistor and a floating diffusion, the illuminance determination unit determines an illuminance based on charges leaking from the photoelectric conversion element to the floating diffusion before starting charge transfer from the photoelectric conversion element to the floating diffusion via the transfer transistor due to photoelectric conversion. The imaging device according to claim 1 .

9. the illuminance determination unit determines an illuminance based on a signal potential of the pixel signal corresponding to an amount of light incident on the plurality of pixels; The imaging device according to claim 1 .

10. The plurality of pixels are capable of switching photoelectric conversion efficiency between at least two stages, the illuminance determination unit determines the illuminance based on a signal potential of the pixel signal in a state where photoelectric conversion efficiency is maximum; The imaging device according to claim 9.

11. a signal processing unit that performs signal processing including generating a digital signal according to the potential of the signal line based on a result of comparing the potential of the signal line with a reference signal, the reset potential switch sets the reset potential corresponding to the noise potential on the signal line when the signal line is at a noise potential, and thereafter sets the reset potential corresponding to the illuminance determined by the illuminance determination unit on the signal line. The imaging device according to claim 1 .

12. Each of the plurality of pixels has a plurality of the photoelectric conversion elements having different sensitivities, the reset potential switcher, after determining the illuminance by the illuminance determination unit, sets the reset potential corresponding to a noise potential to the signal line to read out the noise potential, and then sets the reset potential corresponding to the illuminance determined by the illuminance determination unit to the signal line for each of the plurality of photoelectric conversion elements in turn to read out a signal potential; The imaging device according to claim 1 .

13. a reference signal generating circuit for generating a reference signal for setting the signal line to a reference potential; the illuminance determination unit determines the illuminance based on a potential difference between the potential of the signal line and the reference potential. The imaging device according to claim 1 .

14. a constant current source that supplies a constant current to the signal line; a first switch that connects the constant current source to the signal line only when the signal line is set to a reference potential; The imaging device according to claim 1 .

15. the reset potential switch includes a plurality of reset potential setting circuits connected in parallel between the signal line and a reference potential node; Each of the plurality of reset potential setting circuits Voltage sources with different potential levels, and a second switch that switches whether or not to set the potential of the voltage source as the reset potential based on the illuminance determined by the illuminance determination unit. The imaging device according to claim 1 .

16. The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of reset potential setting circuits set, as the reset potential, a potential of the voltage source having a higher potential level than when the illuminance determination unit determines that the illuminance is high. The imaging device according to claim 15.

17. the reset potential switch includes a plurality of source follower circuits, a third switch, and a current source, which are connected in series between the signal line and a reference potential node; Each of the plurality of source follower circuits comprises: A transistor having gates to which potentials of different potential levels are input; a fourth switch that switches whether or not the signal line is set to a reset potential according to a potential input to the gate of the transistor; the third switch is turned on when the signal line is set to a reference potential, and causes a constant current to flow through the signal line using the current source; after setting the signal line to the reference potential, turning on any one of the plurality of fourth switches based on the illuminance determined by the illuminance determination unit to set a reset potential of the signal line; The imaging device according to claim 1 .

18. The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of source follower circuits turn on the fourth switch connected to the transistor to which a higher potential is inputted than when the illuminance determination unit determines that the illuminance is high, to set a reset potential of the signal line. The imaging device according to claim 17.

19. the reset potential switch includes a single voltage source connected to the signal line, and a plurality of reset potential setting circuits connected in parallel between the signal line and the voltage source; Each of the plurality of reset potential setting circuits includes a third switch that switches whether or not to select the corresponding reset potential setting circuit, and a potential setting unit that is connected in series to the third switch; The potential setting unit has a different number of diodes or diode-connected transistors connected in series, or connects the third switch to the voltage source. The imaging device according to claim 1 .

20. The illuminance determination unit determines whether the illuminance is high or low, When the illuminance determination unit determines that the illuminance is low, the plurality of reset potential setting circuits set, as the reset potential, a potential of a greater number of diodes or diode-connected transistors connected in series than when the illuminance determination unit determines that the illuminance is high.

20. The imaging device according to claim 19.

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