Inference model generating apparatus and inference model generating method

Abstract

To obtain an inference model generation apparatus capable of increasing the inference speed while suppressing deterioration of the inference accuracy of an inference model.SOLUTION: An inference model generation apparatus comprises: an inference model generation unit 1 for generating a Posit type inference model 1d, which is an inference model including quantized Posit type weight parameters, by converting weight parameters of a floating point type inference model 1b, which is an inference model including floating point type weight parameters, into the quantized Posit type weight parameters; and a language conversion unit 2 for converting source code indicating an algorithm of the Posit type inference model 1d generated by the inference model generation unit 1 into source code expressed in a hardware description language.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to an inference model generating device and an inference model generating method. [Background technology]

[0002] There is an inference model generating device that converts source code indicating an algorithm of an inference model into source code expressed in a hardware description language. As such an inference model generating device, for example, Patent Document 1 discloses a device that converts a description language of a source code indicating an algorithm of a learning model from a program language such as C language to a hardware description language. By converting from a program language such as C language to a hardware description language, the inference speed of the learning model is increased. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2021-164971 A Summary of the Invention [Problem to be solved by the invention]

[0004] The device disclosed in Patent Document 1 has a problem in that it is not possible to further increase the inference speed apart from the increase in inference speed that accompanies the conversion of the description language.

[0005] The present disclosure has been made to solve the above-mentioned problems, and aims to provide an inference model generation device that can increase inference speed while suppressing deterioration of the inference accuracy of the inference model. [Means for solving the problem]

[0006] The inference model generation device of the present disclosure includes an inference model generation unit that generates a Posit-type inference model, which is an inference model including quantized Posit-type weight parameters, by converting the weight parameters of a floating-point inference model, which is an inference model including floating-point type weight parameters, into quantized Posit-type weight parameters, and a language conversion unit that converts source code indicating the algorithm of the Posit-type inference model generated by the inference model generation unit into source code expressed in a hardware description language. Effect of the Invention

[0007] According to the present disclosure, it is possible to increase the inference speed while suppressing deterioration of the inference accuracy of the inference model. [Brief description of the drawings]

[0008] [Figure 1] 1 is a configuration diagram showing an inference model generating device according to embodiment 1. [Diagram 2] 1 is a hardware configuration diagram showing the hardware of an inference model generating device according to embodiment 1. FIG. [Diagram 3] A hardware configuration diagram of a computer when the inference model generating device is realized by software, firmware, etc. [Figure 4] 1 is a flowchart showing an inference model generating method, which is a processing procedure of an inference model generating device. [Diagram 5] FIG. 1 is an explanatory diagram showing an example of generation of a floating-point inference model 1b by a deep learning framework 1a. [Figure 6] FIG. 1 is an explanatory diagram showing an expression format of Posit. [Figure 7] FIG. 11 is an explanatory diagram showing an inference model conversion algorithm by the description conversion tool 3a. [Figure 8] FIG. 11 is an explanatory diagram showing an example of a behavioral description showing a counter process, which is one of the processes included in high-level synthesis; [Figure 9]FIG. 1 is an explanatory diagram showing an example of an HDL description showing a counter process, which is one of the processes included in high-level synthesis; [Figure 10] FIG. 2 is an explanatory diagram showing high-level synthesis by a high-level synthesis tool 4a. [Figure 11] FIG. 11 is a configuration diagram showing an inference model generating device according to embodiment 2. [Figure 12] A hardware configuration diagram showing the hardware of an inference model generating device related to embodiment 2. [Figure 13] FIG. 1 is an explanatory diagram showing an example of generation of a Posit-type inference model 1d by a Posit-type deep learning framework 1e. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] In order to describe the present disclosure in more detail, embodiments of the present disclosure will be described below with reference to the accompanying drawings.

[0010] Embodiment 1 FIG. 1 is a configuration diagram showing an inference model generating device according to the first embodiment. FIG. 2 is a hardware configuration diagram showing the hardware of the inference model generating device according to the first embodiment. The inference model generating device shown in FIG. 1 includes an inference model generating unit 1 and a language conversion unit 2.

[0011] The inference model generation unit 1 is realized by, for example, an inference model generation circuit 11 shown in FIG. The inference model generation unit 1 provides the learning data described later to a floating-point deep learning framework 1a, and obtains a floating-point inference model 1b, which is an inference model including floating-point weight parameters, from the deep learning framework 1a. The inference model generation unit 1 generates a Posit type inference model 1d, which is an inference model containing quantized Posit type weight parameters, by, for example, referring to the quantization library 1c and converting the weight parameters of the floating-point type inference model 1b into quantized Posit type weight parameters. The inference model generation unit 1 outputs the Posit-type inference model 1 d to the language conversion unit 2 .

[0012] When learning data is given to the deep learning framework 1a, the deep learning framework 1a provides the learning data to the floating-point inference model 1b, and causes the floating-point inference model 1b to learn. The floating-point type inference model 1b is, for example, an inference model in ONNX (Open Neural Network Exchange) format. The weight parameters included in the floating-point inference model 1b are floating-point type weight parameters. The weight parameter is, for example, a parameter that indicates the degree of connectivity between multiple nodes in a deep learning network.

[0013] The quantization library 1c stores, for example, quantized Posit-type weight parameters corresponding to floating-point weight parameters. The quantized Posit-type weight parameters are, for example, weight parameters in which some bits of the Posit-type weight parameters have been deleted, or weight parameters in which the decimal points of the Posit-type weight parameters have been rounded off. The Posit-type inference model 1d is an inference model that includes quantized Posit-type weight parameters.

[0014] The language conversion unit 2 is realized by, for example, a language conversion circuit 12 shown in FIG. The language conversion unit 2 includes a first language conversion processing unit 3 and a second language conversion processing unit 4. The language conversion unit 2 acquires the Posit-type inference model 1d from the inference model generation unit 1. The language conversion unit 2 converts the source code indicating the algorithm of the Posit-type inference model 1d into source code expressed in a hardware description language. The language conversion unit 2 outputs the inference model 4b, in which the source code is expressed in a hardware description language, to, for example, a device (not shown) that implements the inference model 4b in hardware.

[0015] The first language conversion processing unit 3 acquires the Posit-type inference model 1 d from the inference model generation unit 1 . The first language conversion processing unit 3 converts the source code indicating the algorithm of the Posit-type inference model 1d into a source code expressed in a high-level synthesis language, for example, using a description conversion tool 3a. The high-level synthesis language is, for example, the C language, the C++ language, or the SystemC language. The first language conversion processing unit 3 outputs the inference model 3b after the source code conversion to the second language conversion processing unit 4.

[0016] The description conversion tool 3a is an application for converting source code indicating the algorithm of the Posit-type inference model 1d into source code expressed in a high-level synthesis language. The inference model 3b is an inference model in which the source code is expressed in a high-level synthesis language. In the inference model generating device shown in FIG. 1, an inference model 3b in which the high-level synthesis language is C++ is described as an example.

[0017] The second language conversion processing unit 4 acquires the inference model 3b after source code conversion from the first language conversion processing unit 3. The second language conversion processing unit 4 converts the source code indicating the algorithm of the inference model 3b into a source code expressed in a hardware description language, for example, using a high-level synthesis tool 4a. The hardware description language is, for example, HDL (Hardware Description Language). The second language conversion processing unit 4 outputs an inference model 4b, in which the source code is expressed in a hardware description language, to, for example, a device (not shown) that implements the inference model 4b in hardware.

[0018] The high-level synthesis tool 4a is an application for converting a source code indicating the algorithm of the inference model 3b into an inference model 4b expressed in a hardware description language. The inference model 4b is an inference model in which the source code is expressed in a hardware description language. In the inference model generating device shown in FIG. 1, an inference model 4b in which the hardware description language is HDL is described as an example.

[0019] In Fig. 1, it is assumed that each of the components of the inference model generation device, that is, an inference model generation unit 1 and a language conversion unit 2, is realized by dedicated hardware as shown in Fig. 2. That is, it is assumed that the inference model generation device is realized by an inference model generation circuit 11 and a language conversion circuit 12. Each of the inference model generation circuit 11 and the language conversion circuit 12 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field-Programmable Gate Array), or a combination of these.

[0020] The components of the inference model generating device are not limited to those realized by dedicated hardware, and the inference model generating device may be realized by software, firmware, or a combination of software and firmware. The software or firmware is stored as a program in the memory of a computer. The computer means hardware that executes the program, and includes, for example, a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), a central processing unit, a processing unit, an arithmetic unit, a microprocessor, a microcomputer, a processor, or a DSP (Digital Signal Processor).

[0021] FIG. 3 is a hardware configuration diagram of a computer when the inference model generating device is realized by software, firmware, etc. When the inference model generating device is realized by software, firmware, or the like, a program for causing a computer to execute the respective processing procedures in the inference model generating unit 1 and the language conversion unit 2 is stored in a memory 21. Then, a processor 22 of the computer executes the program stored in the memory 21.

[0022] 2 shows an example in which each of the components of the inference model generating device is realized by dedicated hardware, and Fig. 3 shows an example in which the inference model generating device is realized by software or firmware, etc. However, this is merely one example, and some of the components in the inference model generating device may be realized by dedicated hardware, and the remaining components may be realized by software or firmware, etc.

[0023] Next, the operation of the inference model generating device shown in FIG. 1 will be described. FIG. 4 is a flowchart showing an inference model generating method which is a processing procedure of the inference model generating device. The internal memory of the inference model generation unit 1 stores, for example, a deep learning framework 1a as shown in FIG. FIG. 5 is an explanatory diagram showing an example of generation of a floating-point inference model 1b by the deep learning framework 1a.

[0024] When the inference model generation unit 1 generates an inference model as a floating-point inference model 1b, for example, an inference model that classifies the types of animals contained in image data, the deep learning framework 1a is provided with the learning data, which are image data for learning and a correct answer tensor, which is teacher data indicating the types of animals contained in the image data. When the deep learning framework 1a is given training image data and a correct answer tensor, it trains a floating-point inference model 1b to learn the types of animals contained in the training image data, and outputs the trained floating-point inference model 1b. When learning the types of animals contained in the learning image data, the floating-point inference model 1b updates the floating-point weight parameters by performing floating-point calculations. In the deep learning framework 1a shown in FIG. 5, an example is shown in which a floating-point linear function is executed as a floating-point operation. In the deep learning framework 1a shown in FIG. 5, a loss calculation is performed, and the calculation result indicates a floating-point weight parameter. Since the loss calculation itself is a known technique, a detailed description is omitted. In the deep learning framework 1a shown in Fig. 5, the result of a floating-point calculation is converted into the ONNX format, and the result of the conversion is output as a floating-point inference model 1b. The ONNX format conversion process itself is a known technology, so a detailed description will be omitted.

[0025] The inference model generation unit 1 generates a Posit type inference model 1d by, for example, using a quantization library 1c to convert the floating-point type weight parameters contained in the floating-point type inference model 1b into quantized Posit type weight parameters (step ST1 in Figure 4). Specifically, the inference model generation unit 1 obtains, from the quantization library 1c, quantized Posit-type weight parameters corresponding to the floating-point type weight parameters included in the floating-point type inference model 1b. Then, the inference model generation unit 1 generates a Posit type inference model 1d by converting the floating-point type weight parameters contained in the floating-point type inference model 1b into the acquired quantized Posit type weight parameters. Incidentally, if the floating-point weight parameters included in the floating-point inference model 1b are quantized, the inference speed of the floating-point inference model 1b can be increased. As a process for quantizing the floating-point weight parameters, for example, there is a process for rounding off the decimal points of the weight parameters. However, quantizing the floating-point weight parameters may degrade the inference accuracy of the floating-point inference model 1b. The inference model generation unit 1 outputs the Posit-type inference model 1 d to the language conversion unit 2 .

[0026] The representation format of Posit differs from the representation format of floating-point numbers described in IEE754, which is one of the standards of the Institute of Electrical and Electronics Engineers (IEE). Posit includes four types of bit fields as shown in Figure 6. The four types of bit fields are "sign", "regime", "exponent" and "fraction". FIG. 6 is an explanatory diagram showing the expression format of Posit.

[0027] Posit differs from the floating-point numbers described in IEE754 in that the exponent part that scales a numerical value is represented by a "regime" bit field and an "exponent" bit field. Posit also differs from the floating-point notation described in IEE754 in that the length of each bit field is variable. When the number of bits of Posit and the number of bits of the floating point described in IEE754 are the same, the range of values ​​that can be expressed is inferior to that of the floating point described in IEE754, but the precision of values ​​near 0 is superior to that of the floating point described in IEE754. Therefore, Posit is capable of quantizing data while suppressing deterioration of the precision of the data to be expressed. The weight parameters included in the inference model are values ​​near 0. Therefore, the Posit-type weight parameters included in the Posit-type inference model 1d can be quantized without causing a loss of accuracy, as compared to quantizing floating-point weight parameters.

[0028] The first language conversion processing unit 3 acquires the Posit-type inference model 1 d from the inference model generation unit 1 . The first language conversion processing unit 3, for example, uses a description conversion tool 3a to convert source code indicating the algorithm of the Posit-type inference model 1d into source code expressed in a high-level synthesis language (step ST2 in FIG. 4). The first language conversion processing unit 3 outputs the inference model 3b after the source code conversion to the second language conversion processing unit 4.

[0029] The following describes the conversion algorithm of the inference model by the description conversion tool 3a. The description conversion tool 3a recognizes a plurality of operations performed by the Posit-type inference model 1d based on a neural network related to the Posit-type inference model 1d as shown in Fig. 7. The plurality of operations include, for example, convolution calculation, MAX pooling, and activation function calculation. FIG. 7 is an explanatory diagram showing the conversion of an inference model by the description conversion tool 3a.

[0030] The description conversion tool 3a calls a function corresponding to Posit for each operation, which converts a Posit type operation into a floating point operation. The description conversion tool 3a executes the function for each operation, thereby converting the Posit type operation into a floating point operation. The description conversion tool 3a converts the source code of the inference model, in which each operation is converted into a floating-point operation, into source code in a high-level synthesis language, thereby converting the Posit-type inference model 1d into an inference model 3b in which the source code is expressed in a high-level synthesis language. In the example of FIG. 7, the high-level synthesis language is C++.

[0031] Here, the description conversion tool 3a converts the Posit-type operations into floating-point operations, and converts the source code of the inference model converted into floating-point operations into source code in a high-level synthesis language. However, this is merely an example, and the description conversion tool 3a may directly convert the source code of the Posit-type inference model 1d into source code in a high-level synthesis language, thereby converting the Posit-type inference model 1d into an inference model 3b whose source code is expressed in a high-level synthesis language.

[0032] The second language conversion processing unit 4 acquires from the first language conversion processing unit 3 an inference model 3b in which the source code is expressed in a high-level synthesis language. The second language conversion processing unit 4 converts, for example, using a high-level synthesis tool 4a, a source code indicating the algorithm of the inference model 3b into a source code expressed in a hardware description language (step ST3 in FIG. 4). The second language conversion processing unit 4 outputs the inference model 4b after the source code conversion to, for example, a device (not shown) that implements the inference model 4b in hardware.

[0033] The conversion algorithm of the inference model by the high-level synthesis tool 4a will be described below. However, since the high-level synthesis tool 4a is a known tool, the conversion algorithm of the inference model by the high-level synthesis tool 4a will be described briefly. The high-level synthesis language is, for example, a behavioral description, and the hardware description language is, for example, an HDL description. Fig. 8 is an explanatory diagram showing an example of a behavioral description showing a counter process, which is one of the processes included in the high-level synthesis. Fig. 9 is an explanatory diagram showing an example of an HDL description showing a counter process, which is one of the processes included in the high-level synthesis. When the high-level synthesis tool 4a is given a behavioral description, it performs high-level synthesis as shown in FIG. 10, for example, to output an HDL description. FIG. 10 is an explanatory diagram showing high-level synthesis by the high-level synthesis tool 4a. In the example of Fig. 10, automatic architecture search, automatic generation of top-level description, generation of a library for high-level synthesis, scheduling, binding, and power optimization are performed as high-level synthesis. However, this is merely an example, and other high-level synthesis may be performed.

[0034] In the above-described first embodiment, the inference model generating device is configured to include an inference model generating unit 1 that generates a Posit-type inference model 1d, which is an inference model including quantized Posit-type weight parameters, by converting the weight parameters of a floating-point inference model 1b, which is an inference model including floating-point type weight parameters, into quantized Posit-type weight parameters, and a language conversion unit 2 that converts a source code indicating an algorithm of the Posit-type inference model 1d generated by the inference model generating unit 1 into a source code expressed in a hardware description language. Therefore, the inference model generating device can increase the inference speed while suppressing deterioration of the inference accuracy of the inference model.

[0035] Embodiment 2 In the second embodiment, an inference model generation device including an inference model generation unit 5 that acquires a Posit-type inference model 1d from a Posit-type deep learning framework 1e will be described.

[0036] Fig. 11 is a configuration diagram showing an inference model generating device according to embodiment 2. In Fig. 11, the same reference numerals as in Fig. 1 indicate the same or corresponding parts, and detailed explanations will be omitted. Fig. 12 is a hardware configuration diagram showing the hardware of the inference model generating device according to embodiment 1. In Fig. 12, the same reference numerals as in Fig. 2 indicate the same or corresponding parts, and therefore detailed description thereof will be omitted. The inference model generating device shown in FIG. 11 includes an inference model generating unit 5 and a language conversion unit 2.

[0037] The inference model generation unit 5 is realized by, for example, an inference model generation circuit 13 shown in FIG. The inference model generation unit 5 provides learning data to the Posit-type deep learning framework 1e, and obtains a Posit-type inference model 1d, which is an inference model including quantized Posit-type weight parameters, from the Posit-type deep learning framework 1e. The inference model generation unit 5 outputs the Posit-type inference model 1 d to the language conversion unit 2 .

[0038] When learning data is given to the Posit-type deep learning framework 1e, the learning data is given to the Posit-type inference model 1d, and the Posit-type inference model 1d is made to learn.

[0039] In Fig. 11, it is assumed that the inference model generation unit 5 and the language conversion unit 2, which are components of the inference model generation device, are each realized by dedicated hardware as shown in Fig. 12. That is, it is assumed that the inference model generation device is realized by an inference model generation circuit 13 and a language conversion circuit 12. Each of the inference model generation circuit 13 and the language conversion circuit 12 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC, an FPGA, or a combination of these.

[0040] The components of the inference model generating device are not limited to those realized by dedicated hardware, and the inference model generating device may be realized by software, firmware, or a combination of software and firmware. The software or firmware is stored as a program in the memory of a computer. The computer means hardware that executes the program, such as a CPU, a GPU, a central processing unit, a processing unit, an arithmetic unit, a microprocessor, a microcomputer, a processor, or a DSP.

[0041] When the inference model generating device is realized by software, firmware, or the like, a program for causing a computer to execute the respective processing procedures in the inference model generating unit 5 and the language conversion unit 2 is stored in a memory 21 shown in Fig. 3. Then, a processor 22 shown in Fig. 3 executes the program stored in the memory 21.

[0042] Also, Fig. 12 shows an example in which each of the components of the inference model generating device is realized by dedicated hardware, and Fig. 3 shows an example in which the inference model generating device is realized by software or firmware, etc. However, this is merely one example, and some of the components in the inference model generating device may be realized by dedicated hardware, and the remaining components may be realized by software or firmware, etc.

[0043] Next, a description will be given of the operation of the inference model generating device shown in Fig. 11. Since the components other than the inference model generating unit 5 are the same as those of the inference model generating device shown in Fig. 1, only the operation of the inference model generating unit 5 will be described here. The internal memory of the inference model generation unit 5 stores, for example, a Posit-type deep learning framework 1e as shown in FIG. FIG. 13 is an explanatory diagram showing an example of generation of a Posit-type inference model 1d by a Posit-type deep learning framework 1e.

[0044] When the inference model generation unit 5 generates an inference model as a Posit-type inference model 1d, for example, that classifies the types of animals contained in image data, the learning image data and a correct answer tensor, which is teacher data indicating the types of animals contained in the image data, are provided to the Posit-type deep learning framework 1e as learning data. When the Posit-type deep learning framework 1e is given training image data and a correct answer tensor, it trains the Posit-type inference model 1d to learn the types of animals contained in the training image data, and outputs the trained Posit-type inference model 1d. When learning the types of animals contained in the learning image data, the Posit-type inference model 1d performs Posit-type calculations to update the Posit-type weight parameters. In the Posit-type deep learning framework 1e shown in Fig. 13, an example is shown in which a Posit-type linear function is executed as a Posit-type operation. In the Posit-type deep learning framework 1e shown in Fig. 13, a loss calculation is performed, and the calculation result indicates a Posit-type weight parameter. Since the loss calculation itself is a known technique, a detailed description is omitted. In the Posit-type deep learning framework 1e shown in Fig. 13, the result of the Posit-type calculation is converted into the ONNX format, and the result of the conversion is output as a Posit-type inference model 1d. The ONNX format conversion process itself is a known technology, so a detailed description will be omitted.

[0045] The inference model generation unit 5 provides learning data to the Posit-type deep learning framework 1e, and obtains a Posit-type inference model 1d, which is an inference model including quantized Posit-type weight parameters, from the Posit-type deep learning framework 1e. The inference model generation unit 5 outputs the Posit-type inference model 1 d to the language conversion unit 2 .

[0046] In the above-described second embodiment, the inference model generation device is configured to include an inference model generation unit 5 that acquires a Posit-type inference model 1d, which is an inference model including quantized Posit-type weight parameters, from the Posit-type deep learning framework 1e by providing learning data to the Posit-type deep learning framework 1e, and a language conversion unit 2 that converts a source code indicating an algorithm of the Posit-type inference model 1d acquired by the inference model generation unit 5 into a source code expressed in a hardware description language. Therefore, the inference model generation device can increase the inference speed while suppressing deterioration of the inference accuracy of the inference model.

[0047] In addition, the present disclosure allows free combination of the respective embodiments, modification of any of the components of each embodiment, or omission of any of the components of each embodiment. [Explanation of symbols]

[0048] 1 inference model generation unit, 1a deep learning framework, 1b floating-point inference model, 1c quantization library, 1d Posit-type inference model, 1e Posit-type deep learning framework, 2 language conversion unit, 3 first language conversion processing unit, 3a description conversion tool, 3b inference model, 4 second language conversion processing unit, 4a high-level synthesis tool, 4b inference model, 5 inference model generation unit, 11 inference model generation circuit, 12 language conversion circuit, 13 inference model generation circuit, 21 memory, 22 processor.

Claims

1. an inference model generation unit that generates a posit-type inference model that is an inference model including quantized posit-type weight parameters by converting weight parameters of a floating-point inference model that is an inference model including floating-point type weight parameters into quantized posit-type weight parameters; a language conversion unit that converts a source code indicating an algorithm of the Posit-type inference model generated by the inference model generation unit into a source code expressed in a hardware description language; An inference model generating device comprising:

2. The inference model generation unit is The inference model generating device according to claim 1, characterized in that the floating-point inference model is obtained from a floating-point type deep learning framework by providing learning data to the deep learning framework.

3. an inference model generation unit that provides learning data to a Posit-type deep learning framework, and obtains, from the Posit-type deep learning framework, a Posit-type inference model that is an inference model including the quantized Posit-type weight parameters; a language conversion unit that converts a source code indicating an algorithm of the Posit-type inference model acquired by the inference model generation unit into a source code expressed in a hardware description language; An inference model generating device comprising:

4. The language conversion unit is a first language conversion processing unit that converts a source code indicating an algorithm of the Posit-type inference model into a source code expressed in a high-level synthesis language and outputs the inference model after the source code conversion; a second language conversion processing unit that converts a source code indicating an algorithm of the inference model output from the first language conversion processing unit into a source code expressed in a hardware description language; 4. An inference model generating device according to claim 1, further comprising:

5. an inference model generation unit converts weight parameters of a floating-point inference model, which is an inference model including floating-point weight parameters, into quantized posit-type weight parameters, thereby generating a posit-type inference model, which is an inference model including the quantized posit-type weight parameters; A language conversion unit converts a source code representing an algorithm of the Posit-type inference model generated by the inference model generation unit into a source code expressed in a hardware description language. Inference model generation method.

6. The inference model generation unit provides the learning data to a Posit-type deep learning framework to obtain a Posit-type inference model, which is an inference model including quantized Posit-type weight parameters, from the Posit-type deep learning framework; A language conversion unit converts the source code indicating the algorithm of the Posit-type inference model acquired by the inference model generation unit into a source code expressed in a hardware description language. Inference model generation method.

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