Method for manufacturing display device, and vapor deposition mask

Abstract

To provide a display device that is improved in manufacture yield.SOLUTION: A method for manufacturing a display device comprises forming an organic EL layer by heating a vapor deposition source and thus depositing an organic EL material on a substrate from the vapor deposition source through a vapor deposition mask, which comprises a plurality of thin-film regions and a holding frame, in which the plurality of thin-film regions each have a plurality of mask regions and a connection region and are each in a propeller shape, and the plurality of mask regions are each in a circular shape, each comprising a plurality of opening regions.SELECTED DRAWING: Figure 13

Description

[Technical field]

[0001] The present embodiment relates to a display device. [Background technology]

[0002] In the process of manufacturing an organic EL display device, a vacuum deposition method is used to form a layer composed of an organic EL material (an organic EL layer). In the vacuum deposition method, a deposition mask is brought close to the substrate to be processed, and the organic EL material is deposited on the substrate to be processed through the deposition mask. The deposition mask has multiple openings. The organic EL material passes through the multiple openings to reach the substrate to be processed, making it possible to selectively form an organic EL layer at positions corresponding to the multiple openings. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-6792 A [Patent Document 2] JP 2023-6754 A Summary of the Invention [Problem to be solved by the invention]

[0004] This embodiment provides a display device with improved manufacturing yield. [Means for solving the problem]

[0005] A method for manufacturing a display device according to an embodiment includes the steps of: placing a substrate having a plurality of panel regions on a substrate carrier; A deposition mask is disposed opposite the substrate; a magnet is disposed opposite the deposition mask with the substrate therebetween; The deposition mask is brought close to the substrate by the magnetic force of the magnet; A method for manufacturing a display device, comprising heating an evaporation source to evaporate an organic electroluminescent material from the evaporation source onto the substrate through the evaporation mask to form an organic electroluminescent layer, the deposition mask includes a plurality of thin film regions and a holding frame; Each of the thin film regions has a plurality of mask regions and a connection region; each of the thin film regions has a propeller shape; Each of the mask regions has a circular shape, Each of the plurality of mask regions includes a plurality of opening regions.

[0006] Moreover, the deposition mask according to one embodiment is A plurality of thin film regions and a holding frame, Each of the thin film regions has a plurality of mask regions and a connection region; each of the thin film regions has a propeller shape; Each of the mask regions has a circular shape, Each of the plurality of mask regions comprises a plurality of opening regions; Four of the mask regions are provided in one of the thin film regions, The thin film region includes four elliptical first regions corresponding to the four mask regions, a second region surrounded by the four first regions, and a third region provided between adjacent first regions. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is an overall perspective view of a display device according to an embodiment. [Diagram 2] FIG. 2 is a partial plan view showing an example of a schematic configuration of the display device. [Diagram 3] FIG. 3 is a cross-sectional view taken along line A1-A2 of the display device shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view showing a method for manufacturing a display device. [Diagram 5] FIG. 5 is a cross-sectional view showing a method for manufacturing a display device. [Figure 6] FIG. 6 is a cross-sectional view showing a method for manufacturing a display device. [Figure 7] FIG. 7 is a plan view showing the configuration of the deposition mask. [Figure 8] FIG. 8 is a plan view showing an example of a schematic configuration of a display device. [Figure 9] FIG. 9 is a cross-sectional view of the deposition mask and the mother substrate taken along line B1-B2 shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view of the deposition mask and the mother substrate taken along the line C1-C2 shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view showing the configurations of the deposition mask and the mother substrate after the deposition process is completed. [Figure 12] FIG. 12 is a plan view showing the configuration of the deposition mask. [Figure 13] FIG. 13 is a plan view showing the configuration of the deposition mask. [Figure 14] FIG. 14 is a cross-sectional view of the deposition mask and the mother substrate taken along the line D1-D2 shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 16] FIG. 16 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 17] FIG. 17 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 18] FIG. 18 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 20] FIG. 20 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. [Figure 21] FIG. 21 is a cross-sectional view showing a method for manufacturing a display device using the deposition mask shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that the disclosure is merely an example, and those who are skilled in the art can easily come up with appropriate modifications while maintaining the gist of the invention, which are naturally included in the scope of the present invention. In addition, in order to make the explanation clearer, the drawings may show the width, thickness, shape, etc. of each part in a schematic manner compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each figure, elements similar to those described above with respect to the previous figures may be given the same reference numerals, and detailed explanations may be omitted as appropriate.

[0009] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The embodiments described in this specification are not general, but are embodiments describing the same or corresponding special technical features of the present invention.

[0010] In this embodiment, the first direction X, the second direction Y, and the third direction Z are perpendicular to each other, but may intersect at an angle other than 90 degrees. The direction toward the tip of the arrow of the third direction Z is defined as up or upward, and the direction opposite to the direction toward the tip of the arrow of the third direction Z is defined as down or downward. The first direction X, the second direction Y, and the third direction Z may also be called the X direction, the Y direction, and the Z direction, respectively.

[0011] Furthermore, in the case of "a second member above the first member" and "a second member below the first member," the second member may be in contact with the first member or may be located away from the first member. In the latter case, a third member may be interposed between the first and second members. On the other hand, in the case of "a second member above the first member" and "a second member below the first member," the second member is in contact with the first member.

[0012] Also, it is assumed that an observation position for observing the display device is located at the tip side of the arrow in the third direction Z, and a planar view refers to a view from this observation position toward the XY plane defined by the first direction X and the second direction Y. A cross-sectional view refers to a view of a cross section of the display device in the XZ plane defined by the first direction X and the third direction Z, or in the YZ plane defined by the second direction Y and the third direction Z.

[0013] [Embodiment] 1 is an overall perspective view of a display device according to an embodiment. The display device DSP has a display area DA and a peripheral area FA provided around the display area DA on a substrate SUB1. The display device DSP has a plurality of pixels PX arranged within the display area DA. In the display device DSP, light LT from the back surface is transmitted to the front surface, and vice versa.

[0014] An area EA at an end of the substrate SUB1 is disposed outside the substrate SUB2. A wiring substrate PCS is provided in the area EA. The wiring substrate PCS is provided with a driving element DRV that outputs a video signal and a driving signal. Signals from the driving element DRV are input to the pixels PX in the display area DA via the wiring substrate PCS. The pixels PX emit light based on the video signal and various control signals.

[0015] 2 is a partial plan view showing an example of a schematic configuration of a display device. The pixels PX include a pixel PXR that emits red light, a pixel PXG that emits green light, and a pixel PXB that emits blue light. The pixels PXR, PXG, and PXB are also referred to as the first pixel, the second pixel, and the third pixel, respectively.

[0016] The pixel PXR is disposed adjacent to the pixel PXB in the first direction X. The pixel PXR is disposed adjacent to the pixel PXG in the second direction Y. The pixel PXG is disposed adjacent to the pixel PXB in the first direction X. The pixel PXG is disposed adjacent to the pixel PXR in the second direction Y. The pixel PXB is disposed adjacent to the pixels PXR and PXG in the first direction. The pixel PXB is disposed adjacent to another pixel PXB in the second direction Y.

[0017] FIG. 3 is a cross-sectional view taken along line A1-A2 of the display device shown in FIG. The base material BA1 may be, for example, a base material made of glass or a resin material. Examples of the resin material include acrylic, polyimide, polyethylene terephthalate, polyethylene naphthalate, etc., and may be formed as a single layer or a laminate of multiple layers.

[0018] An insulating layer UC1 is provided on the base material BA1. The insulating layer UC1 is formed of, for example, a single layer or a laminate of a silicon oxide film and a silicon nitride film.

[0019] A light-shielding layer BM may be provided on the insulating layer UC1 so as to overlap the transistor Tr. The light-shielding layer BM suppresses changes in transistor characteristics due to light intrusion from the back surface of the channel of the transistor Tr. When the light-shielding layer BM is formed of a conductive layer, it is also possible to provide a backgate effect to the transistor Tr by applying a predetermined potential.

[0020] An insulating layer UC2 is provided to cover the insulating layer UC1 and the light-shielding layer BM. The insulating layer UC2 may be made of the same material as the insulating layer UC1. The insulating layer UC2 may be made of a different material from the insulating layer UC1. For example, the insulating layer UC1 may be made of silicon oxide, and the insulating layer UC2 may be made of silicon nitride. The insulating layers UC1 and UC2 are collectively referred to as the insulating layer UC.

[0021] A transistor Tr is provided on the insulating layer UC. The transistor Tr has a semiconductor layer SC, an insulating layer GI, a gate electrode GE (scanning line), an insulating layer ILI, a source electrode SE (signal line), and a drain electrode DE.

[0022] The semiconductor layer SC is made of amorphous silicon, polysilicon, or an oxide semiconductor. The insulating layer GI is formed, for example, by using a single layer or a stack of silicon oxide or silicon nitride.

[0023] The gate electrode GE is made of, for example, a molybdenum tungsten alloy (MoW). The gate electrode GE may be formed integrally with the scanning line GL.

[0024] An insulating layer ILI is provided to cover the semiconductor layer SC and the gate electrode GE. The insulating layer ILI is formed of, for example, a single layer or a multilayer of silicon oxide layers or silicon nitride layers.

[0025] A source electrode SE and a drain electrode DE are provided on the insulating layer ILI. The source electrode SE and the drain electrode DE are connected to the source region and the drain region of the semiconductor layer SC via contact holes provided in the insulating layer ILI and the insulating layer GI, respectively. The source electrode SE may be formed integrally with the signal line.

[0026] An insulating layer PAS is provided covering the source electrode SE, the drain electrode DE, and the insulating layer ILI. An insulating layer PLL is provided covering the insulating layer PAS.

[0027] The insulating layer PAS is formed using an inorganic insulating material. Examples of the inorganic insulating material include a single layer or a multilayer of silicon oxide or silicon nitride. The insulating layer PLL is formed using an organic insulating material. Examples of the organic insulating material include organic materials such as photosensitive acrylic and polyimide. By providing the insulating layer PLL, the step caused by the transistor Tr can be flattened.

[0028] An anode AD is provided on the insulating layer PLL. The anode AD is connected to the drain electrode DE via a contact hole provided in the insulating layer PAS and PLL. The anode provided in the pixel PXR is referred to as the anode ADR, the anode provided in the pixel PXB is referred to as the anode ADB, and the anode provided in the pixel PXG is referred to as the anode ADG. When there is no need to distinguish between the anode ADR, anode ADG, and anode ADB, they are simply referred to as the anode AD.

[0029] The anode AD may be formed, for example, of a laminate of a reflective electrode and a transparent electrode. The reflective electrode is formed of a conductive material with high reflectivity, for example, silver (Ag) or molybdenum tungsten alloy (MoW). The transparent electrode is formed, for example, of indium tin oxide (ITO) or indium zinc oxide (IZO).

[0030] In this embodiment, the configuration from the base material BA1 to the insulating layer PLL is referred to as a backplane BPS, and the configuration from the insulating layer UC1 to the insulating layer PLL is referred to as a backplane layer BPL.

[0031] A bank BK (also called a protrusion or rib) is provided between adjacent anodes AD. The bank BK is made of an organic material similar to that of the insulating layer PLL. The bank BK is opened so as to expose a part of the anode AD.

[0032] The opening provided in pixel PXR is referred to as an opening OPR, the opening provided in pixel PXB is referred to as an opening OPB, and the opening provided in pixel PXG is referred to as an opening OPG. When there is no need to distinguish between the openings OPR, OPB, and OPG, they are simply referred to as openings OP.

[0033] The edge of the opening OP preferably has a gently tapered shape in cross section, since if the edge of the opening OP has a steep shape, poor coverage will occur in the organic EL layer ELY to be formed later.

[0034] The organic EL layer ELY is provided between the adjacent banks BK so as to overlap with the anode AD. The organic EL layer ELY includes a hole injection layer HIL, a hole transport layer HTL, an emission layer EML, an electron transport layer ETL, and an electron injection layer EIL, which will be described in detail later. The organic EL layer ELY may further include an electron blocking layer and a hole blocking layer, if necessary.

[0035] The organic EL layer provided in pixel PXR is referred to as organic EL layer ELYR, the organic EL layer provided in pixel PXB is referred to as organic EL layer ELYB, and the organic EL layer provided in pixel PXG is referred to as organic EL layer ELYG. When there is no need to distinguish between the organic EL layer ELYR, the organic EL layer ELYG, and the organic EL layer ELYB, they are simply referred to as the organic EL layer ELY.

[0036] A cathode CD is provided on the organic EL layer ELY. The cathode CD is formed using, for example, a magnesium-silver alloy (MgAg) film, a single layer film of silver (Ag), or a laminate film of silver (Ag) and a transparent conductive material. The transparent conductive material may be, for example, indium tin oxide (ITO), indium zinc oxide (IZO), or the like.

[0037] An insulating layer SEY is provided to cover the cathode CD. The insulating layer SEY has a function of preventing moisture from entering the organic EL layer ELY from the outside. The insulating layer SEY is preferably one having high gas barrier properties. As the insulating layer SEY, for example, an insulating layer in which an organic insulating layer is sandwiched between two inorganic insulating layers containing nitrogen can be mentioned. Examples of materials for the organic insulating layer include acrylic resin, epoxy resin, polyimide resin, etc. Examples of materials for the inorganic insulating layer containing nitrogen can include silicon nitride and aluminum nitride.

[0038] A base material BA2 is provided on the insulating layer SEY. The base material BA2 is formed of the same material as the base material BA1. A light-transmitting inorganic insulating layer or organic insulating layer may be provided between the base material BA2 and the insulating layer SEY. The organic insulating layer may have a function of bonding the insulating layer SEY and the base material BA2.

[0039] Light emitted from the organic EL layer ELY is extracted upward through the cathode CD, that is, the display device DSP of this embodiment has a top emission structure.

[0040] The configuration from the base material BA1 to the insulating layer SEY corresponds to the substrate SUB1 shown in Fig. 1. The base material BA2 corresponds to the substrate SUB2 shown in Fig. 1.

[0041] 4 to 6 are cross-sectional views showing a method for manufacturing a display device, which mainly explain the manufacturing method of the pixel electrode PE, the organic EL layer ELY, and the common electrode CE.

[0042] A backplane layer BPL is formed on a substrate BA1 to form a backplane BPS. After the backplane BPS is formed, a pixel electrode PE is formed. Although not shown, the pixel electrode PE is connected to the drain electrode DE of the transistor Tr. A bank BK is formed between adjacent pixel electrodes PE (see FIG. 4). An opening OP is provided between adjacent banks BK. The pixel electrode PE is exposed in the opening OP. A spacer SPC is provided on the bank BK.

[0043] In this embodiment, the anode AD is formed as the pixel electrode PE as described above. The pixel electrode PE is not limited to the anode AD, and may be the cathode CD. That is, the pixel electrode PE is either the anode AD or the cathode CD.

[0044] An organic EL layer ELY is formed on the pixel electrode PE and between adjacent banks BK (see FIG. 5). As described above, the organic EL layer ELY includes a hole injection layer HIL, a hole transport layer HTL, an emission layer EML, an electron transport layer ETL, and an electron injection layer EIL.

[0045] When the pixel electrode PE is an anode AD, the organic EL layer ELY is made up of a hole injection layer HIL, a hole transport layer HTL, an emission layer EML, an electron transport layer ETL, and an electron injection layer EIL, which are stacked in this order. On the other hand, when the pixel electrode PE is a cathode CD, the organic EL layer EIL, an electron transport layer ETL, an emission layer EML, a hole transport layer HTL, and a hole injection layer HIL, which are stacked in this order.

[0046] The organic EL layer ELY is formed by a deposition method using a deposition mask. In the deposition method, a laminate of the backplane BPS, the pixel electrodes PE, and the banks BK is disposed facing a deposition source containing an organic EL material. A deposition mask is disposed between the laminate and the deposition source. As will be described in detail later, the deposition mask has an opening region in an area corresponding to the opening OP. The organic EL material contained in the deposition source is heated and is deposited inside the opening OP through the opening region of the deposition mask. The organic EL material deposited in each opening OP forms the organic EL layer ELY.

[0047] 5 shows a method for forming the organic EL layer ELY in one display device DSP. However, for the purpose of improving yield, the organic EL layer is formed on a mother substrate MSB including a plurality of backplanes BPS.

[0048] A common electrode CE is formed on the organic EL layer ELY, the bank BK, and the spacer SPC (see FIG. 6). In this embodiment, the cathode CD is formed as the common electrode CE as described above. The pixel electrode PE is not limited to the cathode CD, and may be the anode AD. That is, the common electrode CE is the other of the anode AD or the cathode CD.

[0049] 7 is a plan view showing the configuration of the deposition mask. The deposition mask VMK includes a holding frame RMF, a connection region BMR, and a mask region GK. The connection region BMR and the mask region GK are collectively referred to as a thin film region ATR. The thin film region ATR has a substantially rectangular shape.

[0050] 7, eight thin film regions ATR are shown, but the number of thin film regions ATR is not limited to this. It is sufficient that a plurality of thin film regions ATR are provided in the deposition mask VMK. Although four mask regions GK are provided in each of the thin film regions ATR, the number of mask regions GK is not limited to this. It is sufficient that a plurality of mask regions GK are provided in each of the thin film regions ATR.

[0051] Fig. 8 is a plan view showing an example of a schematic configuration of a display device. Fig. 8 shows the relationship between the display area DA and the mask area GK in a plan view. As described above, the display area DA is provided with a plurality of pixels PX. The display area DA, the peripheral area FA, and the area EA are collectively referred to as the panel area PA. The mask area GK is provided so as to cover the panel area PA. In other words, the size of the mask area GK is larger than the size of the panel area PA.

[0052] 8, the pixels PX are shown arranged at equal intervals for ease of viewing, but the arrangement of the pixels PX in this embodiment is as shown in FIG.

[0053] 7, the mask region GK has a rectangular shape in a plan view. The rectangular mask region GK is also referred to as a mask region GKR.

[0054] The connection region BMR is provided between the holding frame RMF and the mask region GK (rectangular mask region GKR).

[0055] Fig. 9 is a cross-sectional view of the deposition mask and the mother substrate taken along the line B1-B2 shown in Fig. 7. Fig. 9 shows schematic configurations of the mother substrate MSB and the deposition mask VMK.

[0056] As described above, the motherboard MSB includes a plurality of backplanes BPS. The positions of the plurality of backplanes BPS are the same as the positions shown as the panel areas PA in Fig. 9. The area of ​​the motherboard MSB where the panel area PA is not provided is defined as an area NPA.

[0057] As described above, the deposition mask VMK includes the retaining frame RMF, the connection region BMR, and the mask region GK. The mask region GK is disposed opposite the panel region PA. The connection region BMR is disposed opposite the region NPA. As shown in FIG. 8, the mask region GK is larger than the panel region PA. However, in FIG. 9, the mask region GK and the panel region PA are depicted as having the same size in order to make the drawing easier to see.

[0058] Fig. 10 is a cross-sectional view of the deposition mask and the mother substrate along the line C1-C2 shown in Fig. 7. Fig. 10 shows detailed structures of the deposition mask VMK and the mother substrate MSB in the deposition process.

[0059] The mother substrate MSB has a mother substrate MBA, a backplane layer BPL, a bank BK, and a spacer SPC. The backplane layer BPL is provided on the mother substrate MBA. The mother substrate MSB is provided on a substrate carrier CAR. The substrate carrier CAR is disposed on a magnet MGN. The bank BK is provided between adjacent anodes AD (not shown) in the panel region PA. In the mask region GK, the bank BK may be provided uniformly, or may be provided in islands at regular intervals, similar to the panel region PA. The spacer SPC is provided on the bank BK.

[0060] As described above, the deposition mask VMK includes a holding frame RMF, a connection region BMR, and a mask region GK. The mask region GK includes a shielding region MLS and an opening region MOP. The opening region MOP is provided corresponding to the opening OP of each panel region PA (display device DSP). No opening region is provided in the connection region BMR. The connection region BMR is entirely a shielding region.

[0061] The retaining frame RMF, the connection region BMR, and the mask region GK may be made of the same material or different metal materials, or the retaining frame RMF may be made of a first metal material, and the connection region BMR and the mask region GK may be made of a second metal material.

[0062] The retaining frame RMF is made of an alloy such as invar, which has a small thermal expansion coefficient at room temperature and is therefore advantageous in that it does not easily apply stress to the connection region BMR and the mask region GK in an environment where temperature changes occur during the deposition process.

[0063] The length (thickness) of the retaining frame RMF along the third direction Z is defined as thickness tr. The length (thickness) of the connection region BMR along the third direction Z is defined as thickness tb. The length (thickness) of the mask region GK along the third direction Z is defined as thickness tg.

[0064] The thickness tr of the retaining frame RMF is thicker than the thickness tb of the connection region BMR and the thickness tg of the mask region GK (tr>tb, tg). The thickness tb of the connection region BMR and the thickness tg of the mask region GK may be the same (tb=tg). In other words, tr>tb=tg holds true.

[0065] The thickness tr of the holding frame RMF is, for example, 0.5 mm or more and 1.5 mm or less, preferably 0.8 mm or more and 1.2 mm or less. In this embodiment, the thickness tr of the holding frame RMF is 1 mm. The holding frame RMF may be formed of a single layer or may be formed of a laminate of thin plate materials.

[0066] The thickness tb of the connection region BMR and the thickness tg of the mask region GK, i.e., the thickness of the thin film region ATR, is, for example, 3 μm to 20 μm, preferably 5 μm to 10 μm. In this embodiment, the thickness tb of the connection region BMR and the thickness tg of the mask region GK are 5 μm.

[0067] The connection region BMR is a solid metal thin film having the above-mentioned thickness. The mask region can be said to be a metal thin film having the above-mentioned thickness and provided with a plurality of opening regions MOP.

[0068] When the organic EL material is evaporated, the mask region GK is placed close to the mother substrate MSB by the magnetic force of the magnet MGN. The organic EL material from the evaporation source is evaporated between the adjacent banks BK through the opening region MOP of the mask region GK to form the organic EL layer ELY.

[0069] 11 is a cross-sectional view showing the configuration of the deposition mask and the mother substrate after the deposition process is completed. After the deposition process is completed, the magnetic force of the magnet MGN is released, and the deposition mask VMK is separated from the mother substrate MSB. However, the charged mother substrate MSB may stick to the deposition mask VMK. This may cause the mother substrate MSB to fall off the substrate carrier CAR. If such a fall off occurs, it may adversely affect the subsequent manufacturing process, and the manufacturing yield of the display device may decrease.

[0070] 12 is a plan view showing a configuration of a deposition mask. In the deposition mask VMK shown in FIG. 12, the mask region GK has a circular shape in a plan view. The circular mask region GK is also called a mask region GKC.

[0071] The above-mentioned sticking of the mother substrate MSB to the deposition mask VMK is more likely to occur in the deposition mask VMK including the circular mask region GKC than in the deposition mask VMK including the rectangular mask region GKR.

[0072] The circular mask region GKC is smaller than the rectangular mask region GKR. The area of ​​the connection region BMR in the deposition mask VMK including the circular mask region GKC is larger than the area of ​​the connection region BMR in the deposition mask VMK including the rectangular mask region GKR. In other words, it can be said that when the area of ​​the connection region BMR is larger, the mother substrate MSB is more likely to adhere to the deposition mask VMK.

[0073] Fig. 13 is a plan view showing the configuration of a deposition mask. The deposition mask VMK shown in Fig. 13 includes a circular mask region GKC and a propeller-shaped thin film region ATP. In Fig. 13, four mask regions GK are arranged inside one connection region BMR.

[0074] The thin film region ATP includes elliptical regions EPa, EPb, EPc, and EPd, each surrounding one of the four mask regions GKC. Points located at equal intervals from the four mask regions GKC are defined as imaginary points CP. Imaginary lines extending the major axes of the elliptical regions EPa, EPb, EPc, and EPd pass through the imaginary point CP. The imaginary lines extending the major axes of the elliptical regions EPa and EPd form a straight line Lad. The imaginary lines extending the major axes of the elliptical regions EPb and EPc form a straight line Lbc.

[0075] The regions EPa and EPb are positioned line-symmetrically with respect to the first direction X. The regions EPc and EPd are positioned line-symmetrically with respect to the first direction X. The regions EPa and EPc are positioned line-symmetrically with respect to the second direction Y. The regions EPb and EPd are positioned line-symmetrically with respect to the second direction Y.

[0076] The area surrounded by areas EPa, EPb, EPc, and EPd is area EPm. The areas between areas EPa and EPb, between areas EPa and EPc, between areas EPc and EPd, and between areas EPb and EPd are area Bab, area Bac, area Bcd, and area Bbd, respectively. Area EPm has a rhombus shape with curved sides. Areas Bab, Bac, Bcd, and Bbd each have a triangular shape with curved sides.

[0077] From the above, it can be said that the propeller-shaped thin film region ATP includes the regions EPa, EPb, EPc, EPd, EPm, Bab, Bac, Bcd, and Bbd. One connection region BMR is one thin film region ATP minus four mask regions GKC.

[0078] By forming the thin film region ATP in a propeller shape, the area of ​​the connection region BMR can be reduced even if the mask region GKC is circular. This makes it possible to prevent the mother substrate MSB from sticking to the deposition mask VMK.

[0079] Fig. 14 is a cross-sectional view of the deposition mask and the mother substrate along the line D1-D2 shown in Fig. 13. In the deposition mask VMK shown in Fig. 14, the area of ​​the connection region BMR is small, so that the mother substrate MSB does not stick to the deposition mask VMK.

[0080] In the deposition mask VMK shown in FIG. 14, the thickness tr of the holding frame RMF, the thickness tb of the connection region BMR, and the thickness tg of the mask region GK are similar to those described in FIG.

[0081] 15 to 21 are cross-sectional views showing a method for manufacturing a display device using the deposition mask shown in FIG.

[0082] First, a mother substrate MSB having a panel area PA and an area NPA is manufactured (see FIG. 15). As described above, a backplane BPS is provided in each panel area PA. The enlarged view of the mother substrate MSB shown in FIG. 15 corresponds to FIG. 4.

[0083] The mother substrate MSB is placed on a substrate carrier CAR in a deposition apparatus (not shown). A magnet MGN is provided below the substrate carrier CAR. A deposition mask VMK is placed on the mother substrate MSB (see FIG. 16). That is, the substrate carrier CAR and the mother substrate MSB are placed between the magnet MGN and the deposition mask VMK.

[0084] A magnetic force is generated in the magnet MGN. The deposition mask VMK is disposed close to the mother substrate MSB by the magnetic force (see FIG. 17). The deposition source (not shown) is heated, and the organic EL material is deposited from the deposition source onto the mother substrate MSB. FIG. 5 shows an enlarged view of the mother substrate MSB on which the organic EL material has been deposited.

[0085] The magnetic force of the magnet MGN is released to separate the deposition mask VMK from the mother substrate MSB (see FIG. 18). As shown in FIG. 18, the organic EL layer ELY is formed on the mother substrate MSB. Since the connection region BMR is small, the deposition mask VMK does not stick to the mother substrate MSB.

[0086] The mother substrate MSB on which the organic EL layer ELY is formed is removed from the deposition apparatus (see FIG. 19). A common electrode CEM, an insulating layer SEM, and a substrate MCB are provided on the organic EL layer ELY (see FIG. 20). The common electrode CEM, the insulating layer SEM, and the substrate MCB are made of the same materials as the common electrode CE, the insulating layer SEY, and the substrate BA2, respectively.

[0087] The laminate of the mother substrate MSB, the organic EL layer ELY, the common electrode CEM, the insulating layer SEM, and the substrate MCB is divided into each panel region PA, thereby obtaining individual display devices DSP each having a backplane BPS, the organic EL layer ELY, the common electrode CE, the insulating layer SEY, and the substrate BA2 (see FIG. 21).

[0088] The deposition mask VMK of this embodiment has a propeller-shaped thin film region ATP. Each thin film region ATP is provided with a plurality of circular mask regions GKC. Each circular mask region GKC is provided with a plurality of opening regions MOP.

[0089] In the deposition process, the organic EL material from the deposition source is deposited in each of the openings OP of the pixels PX in the display area DA through the opening region MOP, thereby forming the organic EL layer ELY of the display device DSP.

[0090] In the deposition mask VMK of this embodiment, the area of ​​the connection region BMR can be reduced. Therefore, it is possible to suppress the mother substrate MSB from sticking to the deposition mask VMK even after the deposition process. It is possible to prevent the mother substrate MSB from falling off the substrate carrier. By preventing the mother substrate MSB from falling off, it is possible to improve the manufacturing yield of the display device.

[0091] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0092] ATP...thin film region, ATR...thin film region, BMR...connection region, Bab...region, Bac...region, Bbd...region, Bcd...region, CAR...substrate carrier, DSP...display device, ELY...organic EL layer, EPa...region, EPb...region, EPc...region, EPd...region, EPm...region, GK...mask region, GKC...mask region, GKR...mask region, MGN...magnet, MLS...shielding region, MOP...opening region, PA...panel region, PX...pixel, VMK...deposition mask.

Claims

1. placing a substrate having a plurality of panel regions on a substrate carrier; A deposition mask is disposed opposite the substrate; a magnet is disposed opposite the deposition mask with the substrate therebetween; The deposition mask is brought close to the substrate by the magnetic force of the magnet; A method for manufacturing a display device, comprising heating an evaporation source to evaporate an organic electroluminescent material from the evaporation source onto the substrate through the evaporation mask to form an organic electroluminescent layer, the deposition mask includes a plurality of thin film regions and a holding frame; Each of the thin film regions has a plurality of mask regions and a connection region; each of the thin film regions has a propeller shape; Each of the mask regions has a circular shape, A method for manufacturing a display device, wherein each of the plurality of mask regions has a plurality of opening regions.

2. Four of the mask regions are provided in one of the thin film regions, 2. The display device manufacturing method of claim 1, wherein the thin film region comprises four elliptical first regions surrounding the four mask regions, a second region surrounded by the four first regions, and a third region provided between adjacent first regions.

3. the second region has a diamond shape with curved sides; The method for manufacturing a display device according to claim 2 , wherein each of the third regions has a triangular shape with curved sides.

4. Points located at equal intervals from the four mask regions are defined as virtual points, The method for manufacturing a display device according to claim 1 , wherein an imaginary line extending from a major axis of each of the four first regions passes through the imaginary point.

5. A plurality of thin film regions and a holding frame, Each of the thin film regions has a plurality of mask regions and a connection region; each of the thin film regions has a propeller shape; Each of the mask regions has a circular shape, Each of the plurality of mask regions comprises a plurality of opening regions; Four of the mask regions are provided in one of the thin film regions, the thin film region includes four elliptical first regions surrounding the four mask regions, a second region surrounded by the four first regions, and a third region provided between adjacent first regions.

6. the second region has a diamond shape with curved sides; The deposition mask according to claim 5 , wherein each of the third regions has a triangular shape with curved sides.

7. Points located at equal intervals from the four mask regions are defined as virtual points, The deposition mask according to claim 5 , wherein an imaginary line extending from a major axis of each of the four first regions passes through the imaginary point.

8. The deposition mask according to claim 5 , wherein a thickness of the holding frame is greater than a thickness of the thin film region.

9. The thickness of the holding frame is 0.5 mm or more and 1.5 mm or less, The deposition mask according to claim 8 , wherein the thin film region has a thickness of 3 μm or more and 20 μm or less.

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