Living body stimulation device

Abstract

To provide a living body stimulation device that instantaneously changes a magnitude of a stimulation signal.SOLUTION: Provided is a living body stimulation device that outputs a stimulation signal to a living body via a pair of electrodes. The living body stimulation device includes: a first terminal connected to one of the pair of electrodes; a second terminal connected to the other of the pair of electrodes; a first power circuit that generates a first power supply voltage; a second power circuit that generates a second power supply voltage lower than the first power supply voltage; a first high pressure circuit that is applied with the first power supply voltage and outputs a first high voltage corresponding to the first power supply voltage as the stimulation signal; a first low pressure circuit that is applied with the second power supply voltage and outputs a first low voltage corresponding to the second power supply voltage as the stimulation signal; a first switch provided between the second terminal and the ground; and a control circuit that controls on and off of the first switch and controls the first high pressure circuit and the first low pressure circuit such that the first high voltage or the first low voltage is output to the first terminal as the stimulation signal.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a biostimulator. [Background technology]

[0002] There is known a biostimulation device that outputs a stimulation signal (pulse signal) to a living body via a pair of electrodes (see, for example, Patent Document 1). In general, the strength of the stimulation depends on the voltage level (pulse amplitude) of the stimulation signal to be output, and the higher the voltage of the stimulation signal, the stronger the stimulation, and the lower the voltage, the weaker the stimulation. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 3-77562 Summary of the Invention [Problem to be solved by the invention]

[0004] The biostimulation device in Patent Document 1 uses a boost circuit equipped with a coil, a capacitor, and a transistor as a power supply circuit for generating a power supply voltage for a stimulation signal. In such a biostimulation device, the time constant for charging and discharging the capacitor is large, making it difficult to instantaneously change the magnitude (voltage level) of the stimulation signal.

[0005] The present invention aims to instantaneously change the magnitude of a stimulation signal. [Means for solving the problem]

[0006] A main invention for achieving the above object is a biostimulation device that outputs a stimulation signal to a living body via a pair of electrodes, the biostimulation device comprising: a first terminal connected to one of the pair of electrodes; a second terminal connected to the other of the pair of electrodes; a first power supply circuit that generates a first power supply voltage; a second power supply circuit that generates a second power supply voltage lower than the first power supply voltage; a first high-voltage circuit to which the first power supply voltage is applied and that outputs a first high-voltage voltage corresponding to the first power supply voltage as the stimulation signal; a first low-voltage circuit to which the second power supply voltage is applied and that outputs a first low-voltage voltage corresponding to the second power supply voltage as the stimulation signal; a first switch provided between the second terminal and ground; and a control circuit that controls the on / off of the first switch and controls the first high-voltage circuit and the first low-voltage circuit so that the first high-voltage voltage or the first low-voltage voltage is output to the first terminal as the stimulation signal.

[0007] Other features of the present invention will become apparent from the following specification and drawings. Effect of the Invention

[0008] According to the present invention, the magnitude of the stimulation signal can be changed instantaneously. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is an explanatory diagram showing the configuration of a biostimulation device 1. [Diagram 2] 2 is a diagram showing an example of the configuration of a proportional step-down power supply circuit 20. FIG. [Figure 3A] FIG. 4 is a diagram showing an example of a pulse waveform. [Figure 3B] FIG. 4 is a diagram showing an example of a pulse waveform. [Figure 3C] FIG. 4 is a diagram showing an example of a pulse waveform. [Figure 3D] FIG. 4 is a diagram showing an example of a pulse waveform. [Figure 4A] FIG. 13 is a diagram showing an example of a pulse waveform for adjusting the ion balance. [Figure 4B]FIG. 13 is a diagram showing an example of a pulse waveform for adjusting the ion balance. [Figure 4C] FIG. 13 is a diagram showing an example of a pulse waveform for adjusting the ion balance. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] At least the following points will become apparent from the following specification and drawings.

[0011] In this embodiment, "connection" refers to a state in which two components are electrically connected unless otherwise specified. Therefore, "connection" includes cases in which two components are connected not only through wiring but also through, for example, a resistor.

[0012] =====This embodiment===== <<Configuration of biostimulation device 1>> FIG. 1 is an explanatory diagram showing the configuration of a biostimulation device 1 according to one embodiment of the present invention.

[0013] The biostimulation device 1 is a device that outputs a stimulation signal to a living organism (e.g., the human body) such as a human being or an animal, to impart an electrical stimulation to the living organism. When an electric current caused by the stimulation signal flows through the living organism, nerves are stimulated and muscles are contracted and relaxed, thereby imparting stimulation to the living organism. The biostimulation device 1 of this embodiment outputs, for example, a low-frequency pulse signal of several tens of Hz as the stimulation signal.

[0014] Generally, the higher the frequency of the stimulation signal, the less the sensation of muscle stimulation will be, whereas the lower the frequency of the stimulation signal, the more intense the sensation of stimulation will be.

[0015] Generally, the higher the voltage (pulse amplitude) of the stimulation signal, the stronger the stimulation, and the lower the voltage, the weaker the stimulation.

[0016] In the biostimulation device 1 of this embodiment, in addition to being able to change the frequency and pulse width of the output pulse, as described later, it is also able to instantaneously change the amplitude (voltage) of the pulse, making it possible to apply a variety of stimuli.

[0017] The biostimulation device 1 includes a switch circuit 3, a display unit 5, a CPU 7, an output unit 8, a boost power supply circuit 10, a proportional step-down power supply circuit 20, a high-voltage positive-side control circuit 30A, a low-voltage positive-side control circuit 30B, a negative pulse control circuit 40, a high-voltage negative-side control circuit 50A, a low-voltage negative-side control circuit 50B, and a positive pulse control circuit 60.

[0018] The switch circuit 3 has a plurality of switches (not shown), such as switches for selecting the type (stimulation mode) and strength (level) of stimulation. For example, when a switch is turned on by the operation of the user of the biostimulation device 1, the switch circuit 3 outputs a signal indicating that a mode or level has been selected to the CPU 7.

[0019] The display unit 5 displays the mode, level, etc. selected by the switch circuit 3. The display unit 5 has, for example, a plurality of light-emitting diodes (LEDs), and performs display by appropriately emitting light from the LEDs in response to an instruction from the CPU .

[0020] The output unit 8 has a plurality of terminals (terminals 81, 83) for outputting stimulation signals. The terminal 83 is connected to one (electrode 100a) of a pair of electrodes 100 placed on a living body, and corresponds to a "first terminal." The terminal 81 is connected to the other (electrode 100b) of the pair of electrodes 100, and corresponds to a "second terminal." The pair of electrodes 100 (electrodes 100a, 100b) are built into a conductor (for example, an adhesive pad, a suction pad, or a conductor in the form of a metal rod or a glove) that is to be brought into contact with the living body. However, the pair of electrodes 100 may be brought into direct contact with the living body.

[0021] In this embodiment, the terminal 83 has a higher voltage (than the terminal 81) when a positive pulse (described later) is output. The terminal 81 has a higher voltage (than the terminal 83) when a negative pulse (described later) is output.

[0022] CPU 7 is a processing device (central processing unit) that controls the entire biostimulation device 1, and corresponds to a "control circuit." CPU 7 operates by receiving a main power supply (e.g., 5 V) from an AC adapter, a battery, or the like. CPU 7 also controls each circuit (such as boost power supply circuit 10) described later so as to generate a pulse waveform of the mode and level selected by switch circuit 3.

[0023] Below, we will explain the boost power supply circuit 10, the proportional step-down power supply circuit 20, the high voltage positive side control circuit 30A, the low voltage positive side control circuit 30B, the negative pulse control circuit 40, the high voltage negative side control circuit 50A, the low voltage negative side control circuit 50B, and the positive pulse control circuit 60, which are controlled by the CPU 7.

[0024] <Boost power supply circuit 10> The boost power supply circuit 10 boosts a main power supply (e.g., 5V) to generate a power supply voltage HV (e.g., 35V) higher than the main power supply. The boost power supply circuit 10 corresponds to a "first power supply circuit," and the power supply voltage HV corresponds to a "first power supply voltage." The boost power supply circuit 10 of this embodiment includes a coil L1, an NPN transistor Q1, a resistor R1, a Schottky barrier diode D1, and a capacitor C3.

[0025] One end of the coil L1 is connected to a power supply line through which the main power is supplied, and the other end of the coil L1 is connected to the collector electrode of the NPN transistor Q1. A voltage stabilizing capacitor C1 (electrolytic capacitor) is connected between the power supply line and ground.

[0026] The emitter electrode of the NPN transistor Q1 is grounded, and the base electrode receives an output control signal S1 from the CPU 7 via a resistor R1. The CPU 7 switches the output control signal S1 to a high level (hereinafter, H level) or a low level (hereinafter, L level) so that the output (power supply voltage HV) of the boost power supply circuit 10 becomes a predetermined voltage (e.g., 35 V), thereby controlling the on / off of the NPN transistor Q1.

[0027] The Schottky barrier diode D1 is a rectifying diode. The anode of the Schottky barrier diode D1 is connected to the connection point between the coil L1 and the NPN transistor Q1 (collector electrode). A voltage smoothing capacitor C3 is connected between the cathode of the Schottky barrier diode D1 and the ground. The voltage at the connection point between the cathode of the Schottky barrier diode D1 and the capacitor C3 (the charging voltage of the capacitor C3) becomes the output voltage (power supply voltage HV) of the boost power supply circuit 10. An electrolytic capacitor with a large capacitance is used for the capacitor C3.

[0028] Next, the operation of the boost power supply circuit 10 will be described.

[0029] When the output control signal S1 is at H level, the NPN transistor Q1 is turned on, and energy from the main power supply is stored in the coil L1. After that, when the output control signal S1 becomes L level, the NPN transistor Q1 is turned off, and a counter electromotive force is generated in the coil L1. Due to this counter electromotive force, a voltage equivalent to the energy stored in the coil L1 is applied to the capacitor C3 via the Schottky barrier diode D1 (superimposed on the voltage of the capacitor C3). By repeating the switching of this NPN transistor Q1, the output voltage (power supply voltage HV) of the boost power supply circuit 10 becomes higher than the voltage of the main power supply (up to several tens of times). The output voltage (power supply voltage HV) of the boost power supply circuit 10 depends on the duty ratio of the output control signal S1. For example, when the duty ratio becomes higher, the power supply voltage HV also becomes higher. In this embodiment, the CPU 7 determines the duty ratio of the output control signal S1 so that the power supply voltage HV is 35V.

[0030] <Proportional step-down power supply circuit 20> The proportional step-down power supply circuit 20 steps down the power supply voltage HV to generate a power supply voltage LV that is lower than the power supply voltage HV. The proportional step-down power supply circuit 20 of this embodiment steps down the power supply voltage HV to generate the power supply voltage LV so that it is proportional to (linked with) the power supply voltage HV. The proportional step-down power supply circuit 20 corresponds to a "second power supply circuit", and the power supply voltage LV corresponds to a "second power supply voltage".

[0031] Fig. 2 is a diagram showing an example of the configuration of the proportional step-down power supply circuit 20. As shown in Fig. 2, the proportional step-down power supply circuit 20 includes resistors R5 and R6, and an operational amplifier OP1.

[0032] Resistors R5 and R6 are connected in series, a power supply voltage HV is applied to resistor R5, and resistor R6 is grounded.

[0033] The non-inverting input terminal (+ terminal) of the operational amplifier OP1 is connected to the connection point between resistors R5 and R6, and the inverting input terminal (- terminal) is connected to the output of the operational amplifier OP1. A voltage smoothing capacitor C5 is connected between the output of the operational amplifier OP1 and the ground. An electrolytic capacitor having a smaller capacity than the capacitor C3 is used for the capacitor C5. The output of the operational amplifier OP1 (the charging voltage of the capacitor C5) becomes the output of the proportional step-down power supply circuit 20 (the power supply voltage LV).

[0034] With the above configuration, the operational amplifier OP1 of the proportional step-down power supply circuit 20 becomes a voltage follower with an amplification factor (gain) of 1, and the voltage at the + terminal (the divided voltage of the power supply voltage HV by resistors R5 and R6) is output as is. In other words, since the output of the operational amplifier OP1 is returned as is to the - terminal, feedback is applied to lower the output when the output becomes higher than the voltage at the + terminal, and feedback is applied to raise the output when the output becomes lower than the voltage at the + terminal. As a result, the output of the operational amplifier OP1 becomes equal to the voltage at the + terminal.

[0035] Therefore, for example, if resistors R5 and R6 have the same resistance value, power supply voltage LV will be 1 / 2 of power supply voltage HV. By changing the ratio (voltage division ratio) of the resistance values ​​of resistors R5 and R6, the magnitude of power supply voltage LV can be changed.

[0036] In addition to resistors R5 and R6, resistors and switches may be provided and the desired divided voltage may be obtained by switching the switches according to the voltage division ratio setting signal S2 from the CPU 7. Alternatively, a digital potentiometer capable of digitally changing resistance may be used to change the divided voltage according to the voltage division ratio setting signal S2. This allows the level of the power supply voltage LV to be changed, further increasing the number of types and patterns of stimulation.

[0037] Furthermore, the proportional step-down power supply circuit 20 is not limited to one that uses the operational amplifier OP1. For example, a transistor emitter follower may be used to generate the power supply voltage LV from the power supply voltage HV.

[0038] In this embodiment, the proportional step-down power supply circuit 20 generates the power supply voltage LV by stepping down the power supply voltage HV, but this is not limiting. For example, the power supply voltage LV lower than the power supply voltage HV may be generated by using (stepping up or stepping down) the main power supply. Also, the power supply voltage LV does not have to be proportional to the power supply voltage HV.

[0039] <High voltage positive side control circuit 30A> High voltage positive side control circuit 30A is a circuit to which power supply voltage HV is applied, and which outputs a voltage corresponding to power supply voltage HV (hereinafter, voltage HV1) as a stimulation signal to terminal 83 of output unit 8. Note that high voltage positive side control circuit 30A corresponds to the "first high voltage circuit", and the output of high voltage positive side control circuit 30A (voltage HV1) corresponds to the "first high voltage voltage".

[0040] The high voltage positive side control circuit 30A includes resistors R11, R13, and R14, an NPN transistor Q11, a PNP transistor Q12, a Schottky barrier diode D13, and a capacitor C11.

[0041] The base electrode of the NPN transistor Q11 is connected to the CPU 7 via a resistor R11, and receives a high voltage positive side control signal S3A from the CPU 7. The emitter electrode of the NPN transistor Q11 is grounded, and the power supply voltage HV is applied to the collector electrode via resistors R13 and R14 connected in series.

[0042] The base electrode of the PNP transistor Q12 is connected to the connection point of the resistors R13 and R14 connected in series. A power supply voltage HV is applied to the emitter electrode of the PNP transistor Q12, and the collector electrode of the PNP transistor Q12 is connected to the anode of the Schottky barrier diode D13. The PNP transistor Q12 corresponds to a "first transistor", the emitter electrode corresponds to an "electrode on the power supply side", and the collector electrode corresponds to an "electrode on the output side". Although the PNP transistor Q12 is used in this embodiment, other types of transistors such as a PMOS transistor may be used. For example, in the case of a PMOS transistor, the source electrode corresponds to the "electrode on the power supply side", and the drain electrode corresponds to the "electrode on the ground side".

[0043] The Schottky barrier diode D13 is a diode for preventing reverse current. The cathode of the Schottky barrier diode D13 is connected to the collector electrode of the NPN transistor Q15 of the negative pulse control circuit 40, the cathode of the Schottky barrier diode D14 of the low voltage positive side control circuit 30B, and the terminal 83 of the output unit 8. The Schottky barrier diode D13 corresponds to the "first diode."

[0044] The capacitor C11 is a voltage stabilizing capacitor, with the power supply voltage HV applied to one end and the other end grounded.

[0045] With the above configuration, when the high voltage positive side control signal S3A output from the CPU 7 is at H level, the NPN transistor Q11 turns on, and a divided voltage of the power supply voltage HV by resistors R13 and R14 is applied to the base electrode of the PNP transistor Q12. This makes the base potential of the PNP transistor Q12 lower than the emitter potential, and the PNP transistor Q12 also turns on. Therefore, in this case, a voltage (voltage HV1) according to the power supply voltage HV is output to the terminal 83 via the Schottky barrier diode D13. Ignoring the on-resistance of the PNP transistor Q12, the voltage HV1 is a voltage lower than the power supply voltage HV by the forward voltage of the Schottky barrier diode D13.

[0046] On the other hand, when the high voltage positive side control signal S3A is at the L level, the NPN transistor Q11 is turned off. As a result, the base and emitter of the PNP transistor Q12 are at the same potential, so the PNP transistor Q12 is also turned off. Therefore, in this case, the voltage HV1 is not output from the high voltage positive side control circuit 30A.

[0047] In this embodiment, a two-stage configuration is used, consisting of an NPN transistor Q11 and a PNP transistor Q12. This allows the PNP transistor Q12, to which the power supply voltage HV is applied, to be driven by controlling the NPN transistor Q11. In addition, by providing the NPN transistor Q11, when the PNP transistor Q12 is turned on, it is possible to prevent a voltage based on the power supply voltage HV (the base voltage of the PNP transistor Q12) from being input to the CPU 7, thereby protecting the CPU 7.

[0048] <Low voltage positive side control circuit 30B> The low-voltage positive-side control circuit 30B is a circuit to which a power supply voltage LV is applied, and which outputs a voltage according to the power supply voltage LV (hereinafter, voltage LV1) as a stimulation signal to terminal 83 of output unit 8. Note that the low-voltage positive-side control circuit 30B corresponds to the "first low-voltage circuit", and the output of the low-voltage positive-side control circuit 30B (voltage LV1) corresponds to the "first low-voltage voltage".

[0049] The low-voltage positive-side control circuit 30B includes resistors R15, R17, and R18, an NPN transistor Q13, a PNP transistor Q14, a Schottky barrier diode D14, and a capacitor C12. In this embodiment, the PNP transistor Q14 corresponds to the "second transistor," and the Schottky barrier diode D14 corresponds to the "second diode."

[0050] The configuration of the low voltage positive side control circuit 30B is similar to that of the high voltage positive side control circuit 30A, and detailed description thereof will be omitted. The base electrode of the NPN transistor Q13 is connected to the CPU 7 via a resistor R15, and receives the low voltage positive side control signal S3B from the CPU 7.

[0051] When low-voltage positive-side control signal S3B is at H level, NPN transistor Q13 turns on, PNP transistor Q14 also turns on, and voltage LV1 corresponding to power supply voltage LV is output to terminal 83 via Schottky barrier diode D14. Ignoring the on-resistance of PNP transistor Q14, voltage LV1 is a voltage lower than power supply voltage LV by the forward voltage of Schottky barrier diode D14.

[0052] On the other hand, when the low voltage positive side control signal S3B is at L level, the NPN transistor Q13 is turned off and the PNP transistor Q14 is also turned off. Therefore, in this case, the voltage LV1 is not output from the low voltage positive side control circuit 30B.

[0053] <Negative pulse control circuit 40> The negative pulse control circuit 40 is a circuit for grounding terminal 83 when generating a pulse waveform (negative pulse) that falls to the negative side. In the case of a negative pulse, terminal 81 is positive for the pulse and terminal 83 is grounded. In the case of a positive pulse, terminal 83 is positive for the pulse and terminal 81 is grounded. The negative pulse control circuit 40 includes resistor R19 and NPN transistor Q15. NPN transistor Q15 corresponds to the "second switch." In addition, the negative pulse corresponds to the "second pulse."

[0054] The base electrode of the NPN transistor Q15 is connected to the CPU 7 via a resistor R19, and a negative pulse generating signal S4 is input from the CPU 7. The collector electrode of the NPN transistor Q15 is connected to a terminal 83, and the emitter electrode is grounded. The CPU 7 switches the negative pulse generating signal S4 to an H level or an L level to control the on / off of the NPN transistor Q15.

[0055] When the negative pulse generating signal S4 is at H level, the NPN transistor Q15 turns on and the terminal 83 is grounded. On the other hand, when the negative pulse generating signal S4 is at L level, the NPN transistor Q15 turns off and the terminal 83 is not grounded. As will be described in detail later, when either the PNP transistors Q12 or Q14 is on, the NPN transistor Q15 turns off. Conversely, when the NPN transistor Q15 is on, both the PNP transistors Q12 and Q14 turn off. In this way, the PNP transistors Q12 and Q14 and the NPN transistor Q12 operate complementarily.

[0056] <High voltage negative side control circuit 50A> High voltage negative side control circuit 50A is a circuit to which power supply voltage HV is applied, and which outputs a voltage corresponding to power supply voltage HV (hereinafter, voltage HV2) as a stimulation signal to terminal 81 of output unit 8. Note that high voltage negative side control circuit 50A corresponds to the "second high voltage circuit", and the output of high voltage negative side control circuit 50A (voltage HV2) corresponds to the "second high voltage voltage".

[0057] The high voltage negative-side control circuit 50A includes resistors R21, R23, and R24, an NPN transistor Q21, a PNP transistor Q22, a Schottky barrier diode D23, and a capacitor C21.

[0058] The configuration of high voltage negative side control circuit 50A is similar to that of high voltage positive side control circuit 30A, and detailed description thereof will be omitted. The base electrode of NPN transistor Q21 is connected to CPU 7 via resistor R21, and receives high voltage negative side control signal S5A from CPU 7.

[0059] When high voltage negative-side control signal S5A is at H level, NPN transistor Q21 turns on, PNP transistor Q22 also turns on, and a voltage HV2 corresponding to power supply voltage HV is output to terminal 81 via Schottky barrier diode D23. Ignoring the on-resistance of PNP transistor Q22, voltage HV2 is a voltage lower than power supply voltage HV by the forward voltage of Schottky barrier diode D23.

[0060] On the other hand, when high voltage negative side control signal S5A is at L level, NPN transistor Q21 is turned off and PNP transistor Q22 is also turned off. Therefore, in this case, voltage HV2 is not output from high voltage positive side control circuit 30A.

[0061] <Low voltage negative side control circuit 50B> The low-voltage negative-side control circuit 50B is a circuit to which the power supply voltage LV is applied, and which outputs a voltage corresponding to the power supply voltage LV (hereinafter, voltage LV2) as a stimulation signal to terminal 81 of output unit 8. Note that the low-voltage negative-side control circuit 50B corresponds to a "second low-voltage circuit", and the output of the low-voltage negative-side control circuit 50B (voltage LV2) corresponds to a "second low-voltage voltage".

[0062] The low voltage negative side control circuit 50B includes resistors R25, R27, and R28, an NPN transistor Q23, a PNP transistor Q24, a Schottky barrier diode D24, and a capacitor C22.

[0063] The configuration of low-voltage negative-side control circuit 50B is similar to that of high-voltage negative-side control circuit 50A, and detailed description thereof will be omitted. The base electrode of NPN transistor Q23 is connected to CPU 7 via resistor R25, and receives low-voltage negative-side control signal S5B from CPU 7.

[0064] When low-voltage negative-side control signal S5B is at H level, NPN transistor Q23 turns on, PNP transistor Q24 also turns on, and voltage LV2 corresponding to power supply voltage LV is output to terminal 81 via Schottky barrier diode D24. Ignoring the on-resistance of PNP transistor Q24, voltage LV2 is a voltage lower than power supply voltage LV by the forward voltage of Schottky barrier diode D24.

[0065] On the other hand, when low voltage negative side control signal S5B is at L level, NPN transistor Q23 is turned off and PNP transistor Q24 is also turned off. Therefore, in this case, voltage LV2 is not output from high voltage positive side control circuit 30A.

[0066] <Positive pulse control circuit 60> The positive pulse control circuit 60 is a circuit for grounding the terminal 81 when generating a pulse waveform (positive pulse) that rises to the positive side, and includes a resistor R29 and an NPN transistor Q25. The NPN transistor Q25 corresponds to the "first switch." The positive pulse corresponds to the "first pulse."

[0067] The base electrode of NPN transistor Q25 is connected to the CPU 7 via resistor R29, and a positive pulse generating signal S6 is input from the CPU 7. The collector electrode of NPN transistor Q25 is connected to terminal 81, and the emitter electrode is grounded. The CPU 7 switches the positive pulse generating signal S6 to H level or L level to control the on / off of NPN transistor Q25.

[0068] When the positive pulse generating signal S6 is at H level, the NPN transistor Q25 turns on and the terminal 81 is grounded. On the other hand, when the positive pulse generating signal S6 is at L level, the NPN transistor Q25 turns off and the terminal 81 is not grounded. As will be described in detail later, when either the PNP transistors Q22 or Q24 is on, the NPN transistor Q25 turns off. Conversely, when the NPN transistor Q25 is on, both the PNP transistors Q22 and Q24 turn off. In this way, the PNP transistors Q22 and Q24 and the NPN transistor Q22 operate complementarily.

[0069] <<Pulse Generation Operation of Biostimulator 1>> <About positive pulse> When generating a pulse (positive pulse) rising to the positive side, the CPU 7 sets the positive pulse generating signal S6 to H level and turns on the NPN transistor Q25 of the positive pulse control circuit 60. The CPU 7 also controls the high voltage positive side control circuit 30A and the low voltage positive side control circuit 30B so that the voltage HV1 or the voltage LV1 is output to the terminal 83 as a stimulation signal at approximately the same timing as the CPU 7 turns on the NPN transistor Q25.

[0070] For example, when outputting voltage HV1 to terminal 83, CPU 7 sets high voltage positive side control signal S3A to H level and low voltage positive side control signal S3B to L level. In this case, current flows through the path of power supply voltage HV → high voltage positive side control circuit 30A (voltage HV1) → terminal 83 → electrode 100a → bioresistance (not shown) → electrode 100b → terminal 81 → positive pulse control circuit 60 (NPN transistor Q25) → ground. Then, after a time equivalent to the pulse width (for example, 200 μs) has elapsed, CPU 7 sets high voltage positive side control signal S3A (and positive pulse generation signal S6) to L level. As a result, a positive pulse with a pulse width of 200 μs and an amplitude of voltage HV1 is generated between terminal 83 and terminal 81.

[0071] Moreover, when outputting the voltage LV1 to the terminal 83, the CPU 7 sets the high voltage positive side control signal S3A to the L level and the low voltage positive side control signal S3B to the H level. In this case, a current flows through the path of the power supply voltage LV → low voltage positive side control circuit 30B (voltage LV1) → terminal 83 → electrode 100a → bioresistance (not shown) → electrode 100b → terminal 81 → positive pulse control circuit 60 (NPN transistor Q25) → ground. Then, after a time equivalent to the pulse width (for example, 200 μs) has elapsed, the CPU 7 sets the low voltage positive side control signal S3B (and the positive pulse generation signal S6) to the L level. As a result, a positive pulse with a pulse width of 200 μs and an amplitude of voltage LV1 (<voltage HV1) is generated between the terminals 83 and 81.

[0072] If the proportional step-down power supply circuit 20 is not provided and the power supply voltage HV is changed to a lower level in the boost power supply circuit 10, the capacitance of the capacitor C3 is large, so the voltage change response speed is slow even if the duty ratio of the output control signal S1 is changed. For this reason, the amplitude of the pulse (the magnitude of the stimulation signal) cannot be changed instantaneously. Here, "instantaneous" refers to a period that is sufficiently shorter than the period in which the level of the power supply voltage HV of the boost power supply circuit 10 is changed from, for example, 35V to the level of the power supply voltage LV (for example, 10V).

[0073] In contrast, in the biostimulation device 1 of this embodiment, a proportional step-down power supply circuit 20 is provided to generate the power supply voltage LV, so that the pulse amplitude can be instantly changed by switching the voltage output to terminal 83 under the control of CPU 7.

[0074] Furthermore, if the high voltage positive side control circuit 30A and the low voltage positive side control circuit 30B were not provided with Schottky barrier diodes D13 and D14, respectively, current would flow between the collector and base of the PNP transistor on the side that does not output voltage (the side that is controlled to be off), which could distort the pulse waveform. Furthermore, if a MOS transistor (PMOS transistor) is used instead of a PNP transistor, there is a risk of current flowing backwards through a parasitic diode.

[0075] In contrast, in this embodiment, a Schottky barrier diode D13 for preventing reverse current is provided in the high voltage positive side control circuit 30A, and a Schottky barrier diode D14 for preventing reverse current is provided in the low voltage positive side control circuit 30B. This makes it possible to reliably prevent reverse current flow. The same applies to the negative side configuration (configuration for forming a negative pulse) described later.

[0076] <Negative pulse> When generating a pulse (negative pulse) that falls to the negative side, the CPU 7 sets the negative pulse generating signal S4 to H level and turns on the NPN transistor Q15 of the negative pulse control circuit 40. The CPU 7 also controls the high voltage negative side control circuit 50A and the low voltage negative side control circuit 50B so that the voltage HV2 or the voltage LV3 is output to the terminal 81 as a stimulation signal at approximately the same timing as the CPU 7 turns on the NPN transistor Q15.

[0077] For example, when outputting a voltage HV2 to the terminal 81, the CPU 7 sets the high voltage negative control signal S5A to an H level and the low voltage negative control signal S5B to an L level. In this case, a current flows through the path of the power supply voltage HV → high voltage negative control circuit 50A (voltage HV2) → terminal 81 → electrode 100b → bioresistance (not shown) → electrode 100a → terminal 83 → negative pulse control circuit 40 (NPN transistor Q15) → ground. Then, after a time equivalent to the pulse width (for example, 200 μs) has elapsed, the CPU 7 sets the high voltage negative control signal S5A (and the negative pulse generation signal S4) to an L level. As a result, a negative pulse with a pulse width of 200 μs and an amplitude of the voltage HV2 is generated between the terminals 83 and 81.

[0078] When outputting voltage LV2 to terminal 81, CPU 7 sets high voltage negative control signal S5A to L level and low voltage negative control signal S5B to H level. In this case, current flows through the path of power supply voltage LV → low voltage negative control circuit 50B (voltage LV2) → terminal 81 → electrode 100b → bioresistance (not shown) → electrode 100a → terminal 83 → negative pulse control circuit 40 (NPN transistor Q15) → ground. Then, after a time equivalent to the pulse width (for example, 200 μs) has elapsed, CPU 7 sets low voltage negative control signal S5B (and negative pulse generation signal S4) to L level. As a result, a negative pulse with a pulse width of 200 μs and an amplitude of voltage LV2 (<voltage HV2) is generated between terminal 83 and terminal 81.

[0079] In the case of a negative pulse, the pulse amplitude (the magnitude of the stimulation signal) can be changed instantly, just as in the case of a positive pulse. Furthermore, in the biostimulation device 1 of this embodiment, as will be described later, the pulse amplitude can be switched instantly even when pulses of both polarities (positive and negative pulses) are output consecutively.

[0080] <Pulse waveform example> Figures 3A to 3D are diagrams showing examples of pulse waveforms, where Figure 3A shows a case where there is no bias on the positive and negative sides, and Figures 3B to 3D show a case where there is a bias on the positive and negative sides.

[0081] In FIG. 3A, a combination of a negative pulse and a positive pulse is formed at a predetermined cycle (every 20 ms), and the amplitudes of the negative pulse and the positive pulse are the same (positive / negative voltage ratio 1). In the case of FIG. 3A, CPU 7 outputs voltage HV2 from high voltage negative side control circuit 50A to generate a negative pulse, and then outputs voltage HV1 from high voltage positive side control circuit 30A to generate a positive pulse. This makes the amplitudes of the positive pulse and the negative pulse almost the same (about 35V). The pulse width of the negative pulse and the positive pulse is, for example, 0.2 ms (200 μs).

[0082] In Fig. 3B, the amplitude of the negative pulse is 1 / 2 of the amplitude of the positive pulse (positive / negative voltage ratio 1 / 2). In the case of Fig. 3B, CPU 7 outputs voltage LV2 from low voltage negative side control circuit 50B to generate a negative pulse, and then outputs voltage HV1 from high voltage positive side control circuit 30A to generate a positive pulse. As a result, when voltage LV2 is 1 / 2 of voltage HV1, the amplitude of the negative pulse is 1 / 2 of the amplitude of the positive pulse.

[0083] In Fig. 3C, the amplitude of the negative pulse is 1 / 4 of the amplitude of the positive pulse (positive / negative voltage ratio 1 / 4). For example, the CPU 7 sets the voltage division ratio of the power supply voltage HV in the proportional step-down power supply circuit 20 to 1 / 4 using the voltage division ratio setting signal S2. As a result, the power supply voltage LV generated by the proportional step-down power supply circuit 20 becomes 1 / 4 of the power supply voltage HV. Then, the CPU 7 performs control in the same manner as in Fig. 3B, thereby obtaining the pulse waveform of Fig. 3C.

[0084] 3D, a pulse (positive pulse) is generated only on the positive side. In this case, CPU 7 causes high voltage positive side control circuit 30A to output voltage HV1 to generate only a positive pulse (no negative pulse is generated).

[0085] In Figures 3B to 3D, the polarity balance (pulse balance) is disrupted. By disrupting the polarity balance in this way, it is possible to improve the therapeutic effect. However, when the positive and negative pulse balance is disrupted as in Figures 3B to 3D, charges (ions) of the polarity with the greater balance are accumulated in the living body, disrupting the ion balance in the living body. Therefore, in the following, an attempt is made to adjust the ion balance.

[0086] <Ion balance adjustment> 4A to 4C are diagrams showing examples of pulse waveforms for adjusting the ion balance.

[0087] In FIG. 4A, multiple negative pulses with small amplitude are generated for one positive pulse. The small negative pulses are pulses with a magnitude that cannot be felt by the living body (human body). In this way, the ion balance of the living body can be adjusted (e.g., neutralized), and for example, unnecessary burden on the living body can be prevented.

[0088] In Fig. 4B, the pulse width of the negative pulse with a small amplitude is made longer than the pulse width of the positive pulse. In this case, the same effect as in Fig. 4A can be obtained. In addition, in the case of Fig. 4B, since it is not necessary to generate multiple negative pulses, the control is simpler than in the case of Fig. 4A, and the load on the CPU 7 is reduced.

[0089] FIG. 4C shows a period (500 ms to 610 ms: hereinafter also referred to as the "second period") following the period (390 ms to 500 ms: hereinafter also referred to as the "first period") shown in FIGS. 3A to 3D, 4A and 4B.

[0090] In the second period shown in FIG. 4C, the amplitude of the positive pulse is lowered than that of the positive pulse in the first period (for example, a positive pulse is generated using the voltage LV1 output from the low-voltage positive-side control circuit 30B). Similarly, on the negative side, a negative pulse is formed using, for example, the voltage LV2 output from the low-voltage negative-side control circuit 50B. Thus, in FIG. 4C, in the second period following the first period, bipolar pulses (positive pulse, negative pulse) with smaller amplitude than the positive pulse in the first period are formed. This allows the ion balance to be adjusted in the second period even if the balance of the pulse polarities is lost in the first period.

[0091] =====Summary===== The biostimulation device 1 of the present embodiment has been described above. The biostimulation device 1 is a device that outputs a stimulation signal to a living body via a pair of electrodes 100, and includes a terminal 83, a terminal 81, a boost power supply circuit 10, a proportional step-down power supply circuit 20, a high-voltage positive-side control circuit 30A, a low-voltage positive-side control circuit 30B, an NPN transistor Q25, and a CPU 7. The terminal 83 is connected to the electrode 100a of the pair of electrodes 100, and the terminal 81 is connected to the electrode 100b. The boost power supply circuit 10 generates a power supply voltage HV, and the proportional step-down power supply circuit 20 generates a power supply voltage LV lower than the power supply voltage HV. The high-voltage positive-side control circuit 30A outputs a voltage HV1 according to the power supply voltage HV, and the low-voltage positive-side control circuit 30B outputs a voltage LV1 according to the power supply voltage LV. The NPN transistor Q25 is provided between the terminal 81 and the ground, and the CPU 7 controls the on / off of the NPN transistor Q25, and also controls the high voltage positive side control circuit 30A and the low voltage positive side control circuit 30B so that the voltage HV1 or the voltage LV1 is output as a stimulation signal to the terminal 83. This makes it possible to instantaneously change the voltage (amplitude) of the stimulation signal (here, a positive pulse).

[0092] The biostimulation device 1 of this embodiment also includes a high-voltage negative-side control circuit 50A that outputs a voltage HV2 corresponding to the power supply voltage HV, a low-voltage negative-side control circuit 50B that outputs a voltage LV2 corresponding to the power supply voltage LV, and an NPN transistor Q15 provided between a terminal 83 and the ground. The CPU 7 controls the on / off of the NPN transistor Q15, and controls the high-voltage negative-side control circuit 50A and the low-voltage negative-side control circuit 50B so that HV2 or voltage LV2 is output to the terminal 81. This makes it possible to instantaneously change the voltage (amplitude) of the stimulation signal (here, a negative pulse). Also, when bipolar pulses (positive and negative pulses) are output in succession, the voltage of the pulses can be instantaneously changed (see FIG. 3B and FIG. 3C).

[0093] The proportional step-down power supply circuit 20 generates the power supply voltage LV based on the divided voltage of the power supply voltage HV, and the level of the power supply voltage can be changed by, for example, changing the voltage division ratio, which allows the number of types and patterns of stimulation to be increased.

[0094] Moreover, the high voltage positive side control circuit 30A has a PNP transistor Q12 to which the power supply voltage HV is applied to the emitter electrode, and a Schottky barrier diode D13 whose anode is connected to the collector electrode of the PNP transistor Q12 and whose cathode is connected to the terminal 83. Moreover, the low voltage positive side control circuit 30B has a PNP transistor Q14 to which the power supply voltage LV is applied to the emitter electrode, and a Schottky barrier diode D14 whose anode is connected to the collector electrode of the PNP transistor Q14 and whose cathode is connected to the terminal 83. This makes it possible to prevent current from flowing (reverse flowing) into the other side when driving one of the high voltage positive side control circuit 30A and the low voltage positive side control circuit 30B.

[0095] 3B and 3C, CPU 7 controls high voltage positive side control circuit 30A and high voltage negative side control circuit 50A, low voltage positive side control circuit 30B and low voltage negative side control circuit 50B, positive pulse control circuit 60 (NPN transistor Q25) and negative pulse control circuit 40 (NPN transistor Q15) so that a positive pulse and a negative pulse with an amplitude smaller than that of the positive pulse are generated as a stimulation signal between terminal 83 and terminal 81. In this way, the effect of the treatment can be improved by destroying the balance of polarity.

[0096] 4A, the CPU 7 controls each of the above circuits so that multiple negative pulses are generated for one positive pulse. This makes it possible to adjust (e.g., neutralize) the ion balance, and to prevent, for example, unnecessary burden on the living body.

[0097] In the case of Fig. 4B, the CPU 7 controls each of the above circuits so that the pulse width of the negative pulse is longer than the pulse width of the positive pulse. This allows the ion balance to be adjusted (e.g., neutralized). In addition, the control of the CPU 7 is simplified (the load on the CPU 7 is reduced) compared to the case of Fig. 4A.

[0098] 4C shows a second period following the period (first period) in Fig. 3A to Fig. 3D and Fig. 4A and Fig. 4B, and in this second period in Fig. 4C, the amplitude of the positive pulse is reduced compared to the first period to generate bipolar pulses (positive pulses and negative pulses). In particular, by adding a bipolar pulse as in Fig. 4C after the pulse balance is lost (after Fig. 3B to Fig. 3D), the ion balance can be adjusted.

[0099] ===Other=== The above-mentioned embodiment is for the purpose of facilitating understanding of the present invention, and is not intended to limit the present invention. The present invention can be modified or improved without departing from the spirit of the present invention, and it goes without saying that the present invention includes equivalents thereof.

[0100] In the above embodiment, there is one proportional step-down power supply circuit 20, but multiple proportional step-down power supply circuits 20 may be provided, each generating a different value of the power supply voltage LV. Then, for example, the CPU 7 may selectively apply the output (different power supply voltage LV) of each proportional step-down power supply circuit 20 to the low-voltage positive-side control circuit 30B and the low-voltage negative-side control circuit 50B. This allows the number of types and patterns of stimulation to be further increased.

[0101] In the above embodiment, Schottky barrier diodes (D1, D13, D14, D23, D24) are used as the diodes, but they are not limited to Schottky barrier diodes. For example, general rectifier diodes may be used. However, when Schottky barrier diodes are used, the forward voltage is low, so that the voltage drop can be suppressed. [Explanation of symbols]

[0102] 1. Biostimulator 3 Switch Circuit 5 Display section 7 CPU 8 Output section 10 Boost power supply circuit 20 Proportional step-down power supply circuit 30A High voltage positive control circuit 30B Low voltage positive control circuit 40 Negative pulse control circuit 50A High voltage negative control circuit 50B Low voltage negative control circuit 60 Positive pulse control circuit 81,83 Terminal 100a Electrode 100b electrode C1, C3, C5 capacitors D1, D13, D14, D23, D24 Schottky barrier diodes Q1, Q11, Q13, Q21, Q23, Q25 NPN transistors Q12, Q14, Q22, Q24 PNP transistors R1,R5,R6,R11,R13,R14,R15,R17,R18,R19,R21,R23,R24,R25,R27,R28,R29 Resistor L1 coil OP1 Operational Amplifier

Claims

1. A biostimulation device that outputs a stimulation signal to a living body via a pair of electrodes, A first terminal connected to one of the pair of electrodes; A second terminal connected to the other of the pair of electrodes; a first power supply circuit that generates a first power supply voltage; a second power supply circuit that generates a second power supply voltage lower than the first power supply voltage; a first high voltage circuit to which the first power supply voltage is applied and which outputs a first high voltage corresponding to the first power supply voltage as the stimulus signal; a first low-voltage circuit to which the second power supply voltage is applied and which outputs a first low-voltage voltage corresponding to the second power supply voltage as the stimulus signal; a first switch provided between the second terminal and ground; a control circuit that controls the first switch to be turned on and off and that controls the first high voltage circuit and the first low voltage circuit so that the first high voltage or the first low voltage is output to the first terminal as the stimulation signal; A biostimulation device comprising:

2. 2. The biostimulation device of claim 1, a second high voltage circuit to which the first power supply voltage is applied and which outputs a second high voltage corresponding to the first power supply voltage as the stimulus signal; a second low-voltage circuit to which the second power supply voltage is applied and which outputs a second low-voltage voltage corresponding to the second power supply voltage as the stimulus signal; a second switch provided between the first terminal and ground; Equipped with The control circuit includes: controlling the on / off of the second switch and controlling the second high-voltage circuit and the second low-voltage circuit so that the second high-voltage voltage or the second low-voltage voltage is output to the second terminal as the stimulation signal; Biostimulator.

3. 3. The biostimulation device according to claim 1, the second power supply circuit is capable of changing the level of the second power supply voltage; Biostimulator.

4. 3. The biostimulation device according to claim 1, The first high voltage circuit is a first transistor having an electrode on a power supply side to which the first power supply voltage is applied; a first diode having an anode connected to the output electrode of the first transistor and a cathode connected to the first terminal; Equipped with The first low-voltage circuit is a second transistor having an electrode on a power supply side to which the second power supply voltage is applied; a second diode having an anode connected to the output electrode of the second transistor and a cathode connected to the first terminal; A biostimulation device comprising:

5. 3. The biostimulation device of claim 2, the control circuit controls the first and second high-voltage circuits, the first and second low-voltage circuits, and the first and second switches, respectively, so that a first pulse and a second pulse having an opposite polarity to the first pulse and an amplitude smaller than that of the first pulse are generated between the first and second terminals as the stimulation signal; Biostimulator.

6. 6. The biostimulation device of claim 5, the control circuit controls the first and second high-voltage circuits, the first and second low-voltage circuits, and the first and second switches, respectively, so that a plurality of the second pulses are generated in response to one of the first pulses. Biostimulator.

7. 6. The biostimulation device of claim 5, the control circuit controls the first and second high-voltage circuits, the first and second low-voltage circuits, and the first and second switches, respectively, so that a pulse width of the second pulse is longer than a pulse width of the first pulse. Biostimulator.

8. A biostimulation device according to any one of claims 5 to 7, the control circuit generates the first and second pulses for a first period, and then reduces the amplitude of the first pulse for the first period and generates the first and second pulses for a second period, Biostimulator.

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