Video encoding device

Abstract

To provide a video encoding device and a video encoding method capable of compressing 8K video with high efficiency when split-screen encoding is used.SOLUTION: A video encoding device that applies prediction and transformation to CUs divided by a quadtree or a multi-type tree includes division means that divides a slice, which is made up of a plurality of CTUs that make up an image, grouped together in scanning order, into a plurality of slices, and control means that controls the division position of the screen by the division means such that the vertical position value of the boundary when each slice is divided is a multiple of the maximum CTU size used.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a video encoding device suitable for highly efficient compression of 8K video. [Background technology]

[0002] Non-Patent Document 1 discloses a video coding method called VVC (Versatile Video Coding).

[0003] In the video coding method described in Non-Patent Document 1, each frame of a digitized video is divided into coding tree units (CTUs), and each CTU is coded.

[0004] Each CTU is divided into coding units (CUs) using a quad-tree (QT) structure or a multi-type tree (MMT) structure and coded. In division using a quad-tree structure, a block is divided equally horizontally and vertically. In division using a multi-type tree structure, a block is divided horizontally or vertically into two or three.

[0005] Each CU is predictively coded. The predictive coding includes intra prediction and motion compensation prediction. The prediction error of each CU is transform coded based on frequency transformation.

[0006] Intra prediction is a prediction that generates a predicted image from a reconstructed image that has the same display time as the encoding target frame. Non-Patent Document 1 defines 65 types of angular intra prediction as shown in FIG. 11. In angular intra prediction, an intra prediction signal is generated by extrapolating reconstructed pixels around the encoding target block in one of 65 directions. In addition to angular intra prediction, Non-Patent Document 1 defines DC intra prediction that averages reconstructed pixels around the encoding target block, and planar intra prediction that linearly interpolates reconstructed pixels around the encoding target block. Hereinafter, a CU coded based on intra prediction is called an intra CU.

[0007] The motion compensation prediction is a prediction in which a predicted image is generated from a reconstructed image (reference picture) that has a different display time from the frame to be coded. Hereinafter, the motion compensation prediction is also referred to as inter prediction.

[0008] FIG. 12 is an explanatory diagram showing an example of motion compensation prediction. x , mv y ) indicates the translation amount of the reconstructed image block of the reference picture relative to the block to be coded. In inter prediction, an inter prediction signal is generated based on the reconstructed image block of the reference picture (using pixel interpolation if necessary). Hereinafter, a CU coded based on motion compensation prediction is called an inter CU.

[0009] A frame coded only with intra CUs is called an I frame (or an I picture). A frame coded not only with intra CUs but also with inter CUs is called a P frame (or a P picture). A frame coded with inter CUs that use not only one reference picture but two reference pictures at the same time for inter prediction of a block is called a B frame (or a B picture).

[0010] Note that inter prediction using one reference picture is called unidirectional prediction, and inter prediction using two reference pictures at the same time is called bidirectional prediction.

[0011] FIG. 13 is an explanatory diagram showing an example of CTU division of frame t when the number of pixels of the frame is CIF (Common Intermediate Format) and the CTU size is 64, and an example of division of the eighth CTU (CTU8) included in frame t.

[0012] Fig. 13 shows a case where all CUs are square. However, as shown in Fig. 14, CUs may be divided into rectangles in a multi-type tree structure. In Non-Patent Document 1, when the split_qt_flag syntax value is 0, a multi-type tree structure is used. Also, the direction of division (horizontal, vertical) is specified by the mtt_split_cu_vertical_flag syntax value and the mtt_split_cu_binary_flag syntax value.

[0013] Figure 14(a) shows four split shapes (split modes) used in the multi-type tree structure. SPLIT_BT_HOR and SPLIT_BT_VER are binary tree splits. SPLIT_TT_HOR and SPLIT_TT_VER are ternary tree splits. Figure 14(b) shows the relationship between split shapes and syntax values.

[0014] In the VVC standard, tiles, slices, and subpictures are defined as spatial divisions of a picture.

[0015] A picture is divided into one or more tiles. A tile is a rectangular region whose component unit is a CTU. References across tile boundaries are restricted.

[0016] A slice is a rectangular area whose constituent unit is a tile. There are two scan orders for slices: Raster-Scan Slice mode and Rectangular Slice mode. Raster-Scan Slice mode arranges slices in raster scan order. Rectangular Slice mode arranges slices in raster scan order. Rectangular Slice mode arranges slices in rectangular area whose unit is a tile or a CTU line in a tile. In Rectangular Slice mode, slices do not have to be arranged in raster scan order under the constraint that slices adjacent to the upper and left sides of a slice are processed first.

[0017] A sub-picture is composed of one or more slices. In motion compensated prediction, the boundaries of the sub-pictures may be considered as picture boundaries.

[0018] Section 4.8 of Part 1, Appendix 5 of Non-Patent Document 2 discloses screen division coding using slices with respect to coding of 8K video using High Efficiency Video Coding (HEVC) as shown in FIG. 15.

[0019] Below, we will explain screen splitting encoding of 8K video using HEVC.

[0020] In each frame (screen) constituting an 8K video, the vertical position of each division boundary (vertical position: 1088, 2176, 3264) is a multiple of 64, which is the maximum CTU size of HEVC. Therefore, encoding at the maximum CTU size is possible. In 8K video, the larger the CTU size, the higher the compression efficiency. Therefore, the screen division encoding described in Non-Patent Document 2 can improve the balance between compression efficiency and implementation cost. [Prior art documents] [Non-patent literature]

[0021] [Non-Patent Document 1] Benjamin Bross, et al., "Versatile Video Coding (Draft 10)", JVET-S2001-v7, Joint Video Experts Team (JVET) of ITU-T SG16 WP3 and ISO / IEC JTC1 / SC29 / WG11 19th Meeting: by teleconference, 22 June - 1 July 2020 [Non-Patent Document 2] "Video Coding, Audio Coding and Multiplexing Methods for Digital Broadcasting", ARIB (Association of Radio Industries and Businesses) Standard STD-B32 Version 3.3, July 3, 2015, Association of Radio Industries and Businesses Summary of the Invention [Problem to be solved by the invention]

[0022] However, when using the screen division coding described in Non-Patent Document 2 in VVC instead of HEVC, the compression efficiency decreases. This is because the vertical positions of each division boundary (1088, 2176, 3264) are not multiples of 128, which is the maximum CTU size of VVC, and therefore cannot be coded with the maximum CTU size of VVC.

[0023] The present invention aims to provide a video encoding device that can compress 8K video with high efficiency when screen split encoding is used. [Means for solving the problem]

[0024] The video coding device according to the present invention is a video coding device that applies prediction and transformation to CUs divided by a quadtree or a multi-type tree, and includes a division means for dividing a slice into a plurality of slices, each slice being made up of a plurality of CTUs that make up an image, arranged in scanning order, and a control means for controlling the division position of the screen by the division means so that the vertical position value of the boundary when each slice is divided is a multiple of the maximum CTU size used. Effect of the Invention

[0025] According to the present invention, 8K video can be compressed with high efficiency when split screen coding is used. [Brief description of the drawings]

[0026] [Figure 1] 1 is a block diagram showing a video encoding device according to a first embodiment. [Diagram 2]4 is a flowchart showing the operation of a controller and a slice divider. [Diagram 3] 10 is a flowchart illustrating an example of the operation of a controller and a slice divider. [Figure 4] FIG. 1 is an explanatory diagram showing an example of screen division in VVC. [Diagram 5] FIG. 2 is a block diagram showing a video decoding device according to the first embodiment. [Figure 6] FIG. 11 is an explanatory diagram showing another example of screen division in VVC. [Figure 7] FIG. 1 is a block diagram illustrating an example of a video system. [Figure 8] 1 is a block diagram showing an example configuration of an information processing system capable of implementing the functions of a video encoding device and a video decoding device. [Figure 9] 1 is a block diagram showing a main part of a video encoding device; [Figure 10] FIG. 2 is a block diagram showing the main parts of a video decoding device. [Figure 11] FIG. 1 is an explanatory diagram showing an example of 65 types of angular intra prediction. [Figure 12] FIG. 1 is an explanatory diagram showing an example of inter-frame prediction. [Figure 13] 1 is an explanatory diagram showing an example of CTU division of frame t and an example of CU division of CTU8 of frame t. FIG. [Figure 14] FIG. 11 is an explanatory diagram showing an example of CU division using a multi-type tree structure. [Figure 15] FIG. 1 is an explanatory diagram showing an example of screen division in HEVC. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0028] Embodiment 1. 1 is a block diagram showing an embodiment (first embodiment) of a video encoding device. The video encoding device 100 of this embodiment includes a transformer / quantizer 101, an entropy encoder 102, an inverse quantizer / inverse transformer 103, a buffer 104, a predictor 105, a multiplexer 106, a slicer 107, and a controller 108. The transformer / quantizer 101, the entropy encoder 102, the inverse quantizer / inverse transformer 103, and the predictor 105 each have a function of applying prediction and transformation to a CU divided by a quadtree or a multi-type tree as specified in the VVC standard, for example.

[0029] The controller 108 monitors the video encoding method used and controls the screen division so that the vertical position value of each division boundary is a multiple of the maximum CTU size of the video encoding method used. The controller 108 supplies screen division information corresponding to the screen division to the slice divider 107 and the multiplexer 106. The screen division information includes information (data) capable of identifying the division positions of the screen.

[0030] The slice divider 107 divides the screen according to the control of the controller 108 .

[0031] The predictor 105 determines, for each CTU, a split_cu_flag syntax value, a split_qt_flag syntax value, an mtt_split_cu_vertical_flag syntax value, and an mtt_split_cu_binary_flag syntax value that determine the CU shape. The CU shape is, for example, a shape that minimizes the coding cost.

[0032] Furthermore, the predictor 105 determines, for each CU, a pred_mode_flag syntax value that determines intra prediction / inter prediction, an intra prediction direction, and a motion vector. These values ​​are, for example, values ​​that minimize the coding cost.

[0033] Furthermore, the predictor 105 generates a prediction signal for the input image signal of each CU based on the determined split_cu_flag syntax value, split_qt_flag syntax value, mtt_split_cu_vertical_flag syntax value, mtt_split_cu_binary_flag syntax value, pred_mode_flag syntax value, intra prediction direction, motion vector, etc. The prediction signal is generated based on the above-mentioned intra prediction or inter prediction.

[0034] The transformer / quantizer 101 frequency-transforms a prediction error image obtained by subtracting a prediction signal from an input image signal by the subtractor. Furthermore, the transformer / quantizer 101 quantizes the frequency-transformed prediction error image (frequency transform coefficient). Hereinafter, the quantized frequency transform coefficient is referred to as a transform quantization value.

[0035] The entropy encoder 102 entropy encodes the split_cu_flag syntax value, split_qt_flag syntax value, mtt_split_cu_vertical_flag syntax value, mtt_split_cu_binary_flag syntax value, pred_mode_flag syntax value, intra prediction direction, motion vector difference information, and transformed quantized value determined by the predictor 105.

[0036] The inverse quantization / inverse transformer 103 inversely quantizes the transformed quantized values. Furthermore, the inverse quantization / inverse transformer 103 inversely frequency transforms the inverse quantized frequency transform coefficients. The inverse frequency transformed reconstructed prediction error image is supplied to a buffer 104 after a prediction signal is added by an adder. The buffer 104 stores the reconstructed image.

[0037] The multiplexer 106 multiplexes and outputs the entropy-encoded data supplied from the entropy encoder 102 as a bit stream. However, the multiplexer 106 causes the entropy encoder 102 to terminate entropy encoding at the last CTU of each slice (divided area: area obtained by division) based on screen division information supplied from the controller 108.

[0038] Through the above-described operations, the video encoding device 100 of this embodiment generates and outputs a bitstream.

[0039] Next, the operations of the controller 108 and the slice divider 107 will be described with reference to the flowchart in Fig. 2. Below, a case where an 8K video is divided into four slices and a bitstream is generated will be taken as an example.

[0040] The controller 108 determines the video encoding method to be used (step S101). The video encoding method to be used is specified from outside the video encoding device 100, for example.

[0041] Controller 108 controls screen division by slice divider 107 so that the vertical position value of each division boundary is a multiple of the maximum CTU size of the video encoding method used (step S102). That is, controller 108 determines the vertical position of each division boundary in each screen so that the vertical position value is a multiple of the maximum CTU size of the video encoding method used. Controller 108 then supplies screen division information including information capable of identifying the vertical position of each division boundary to slice divider 107. Slice divider 107 divides each frame (screen) in the input video according to the screen division information. The screen division information is also supplied to multiplexer 106.

[0042] 3 is a flowchart showing a more specific example of the operation of the controller and the slice divider. In the example shown in FIG. 3, the available video encoding formats are VCC and HEVC.

[0043] In step S1001, the controller 108 determines whether the video encoding method to be used is VCC or HEVC. If it is VCC, the controller 108 proceeds to step S1002. If not, the controller 108 proceeds to step S1003.

[0044] In step S1002, the controller 108 creates screen division information corresponding to the VCC, and supplies the screen division information to the slice divider 107 and the multiplexer 106. The slice divider 107 divides the screen in accordance with the screen division information.

[0045] Fig. 4 is an explanatory diagram showing an example of screen division in VVC. In the example shown in Fig. 4, the vertical position values ​​of each division boundary are (1152, 2304, 3456). That is, the vertical position of each division boundary is a multiple of 128. Because the vertical position value of each division boundary is a multiple of 128, which is the maximum CTU size of VVC, the encoding processing unit (transformer / quantizer 101, inverse quantizer / inverse transformer 103, and predictor 105) can perform encoding processing with the maximum CTU size of VVC.

[0046] In step S1003, the controller 108 creates screen division information corresponding to HEVC, and supplies the screen division information to the slice divider 107 and the multiplexer 106. The slice divider 107 divides the screen in accordance with the screen division information.

[0047] When the video encoding method used is HEVC, the maximum CTU size is 64. The controller 108 supplies screen division information corresponding to the screen division illustrated in Fig. 15 to the slice divider 107 and the multiplexer 106. Since the vertical position values ​​of each division boundary (1088, 2176, 3264) are multiples of 64, which is the maximum CTU size of HEVC, the encoding processing unit can perform encoding processing with the maximum CTU size of HEVC.

[0048] 4 and 15, in the video encoding device 100 of this embodiment, the vertical position value of each division boundary is a multiple of the maximum CTU size of the video encoding method used. The video encoding device 100 can suitably perform highly efficient compression of 8K video by performing encoding at the maximum CTU size of each video encoding method.

[0049] 5 is a block diagram showing an embodiment of a video decoder 200. The video decoder 200 of this embodiment includes a demultiplexer 201, an entropy decoder 202, an inverse quantizer / inverse transformer 203, a predictor 204, and a buffer 205. The video decoder 200 is a video decoder that applies prediction and transformation to CUs divided by a quadtree or a multi-type tree as specified in the VVC standard, for example.

[0050] The demultiplexer 201 demultiplexes the input bitstream to extract entropy-encoded data. The video decoding device 200 can receive, for example, a bitstream from the video encoding device 100 illustrated in Fig. 1. When receiving a bitstream from the video encoding device 100 illustrated in Fig. 1, the demultiplexer 201 can extract, from the bitstream, encoded data created in a plurality of slices obtained by dividing a screen in a video at a plurality of division boundaries indicated by values ​​that are multiples of the maximum CTU size used.

[0051] The entropy decoder 202 entropy-decodes the entropy-encoded data. The entropy decoder 202 supplies the entropy-decoded transformed and quantized values ​​to the inverse quantization / inverse transformer 203. The entropy decoder 202 also supplies the split_cu_flag, split_qt_flag, mtt_split_cu_vertical_flag, mtt_split_cu_binary_flag, pred_mode_flag, the intra prediction direction, and difference information of the motion vector to the predictor 204.

[0052] The inverse quantization / inverse transformer 203 inversely quantizes the transformed quantized values ​​using the quantization step width, and further inversely transforms the inverse quantized frequency transform coefficients.

[0053] The predictor 204 generates a prediction signal for each sub-block based on split_cu_flag, split_qt_flag, mtt_split_cu_vertical_flag, mtt_split_cu_binary_flag, pred_mode_flag, the intra prediction direction, and the motion vector difference information. The prediction signal is generated based on the above-mentioned intra prediction or motion compensation prediction.

[0054] The reconstructed prediction error image that has been inversely frequency transformed by the inverse quantization / inverse transformer 203 is added by an adder to a prediction signal supplied from a predictor 204, and then supplied as a reconstructed picture to a buffer 205. The buffer 205 stores the reconstructed picture. The reconstructed picture stored in the buffer 205 is output as a decoded image.

[0055] Through the above-described operations, the video decoding device 200 of this embodiment generates and outputs a decoded image.

[0056] Embodiment 2. In the first embodiment, the controller 108 controls so as to divide the 8K video (specifically, each screen constituting the 8K video) into four slices. In the second embodiment, the controller 108 controls so as to divide into five slices as shown in Fig. 6. That is, the slice divider 107 divides the 8K video into five slices.

[0057] The configuration of the video encoding device of the second embodiment is the same as the configuration of the video encoding device 100 of the first embodiment. The configuration and operation of the video decoding device of the second embodiment are the same as the configuration and operation of the video decoding device 200 of the first embodiment.

[0058] In the example shown in FIG. 6, the vertical positions (1024, 2048, 3072, 4096) of each division boundary are multiples of 128, which is the maximum CTU size of VVC. Therefore, the encoding processing unit can perform encoding at the maximum CTU size of VVC. Compared with the example shown in FIG. 4, the maximum number of pixels included in each slice in FIG. 6 is equal to or less than the maximum number of pixels in the case of HEVC illustrated in FIG. 15. As a result, the maximum amount of processing per slice can be suppressed to the same level as in the case of HEVC illustrated in FIG. 15.

[0059] The operations of the video encoding device other than the operations of the controller 108 and the slice divider 107 are the same as those of the video encoding device 100 of the first embodiment.

[0060] [Variations] In each of the above embodiments, the controller 108 may control the multiplexer 106 so that the entropy-encoded data of each divided region is output in order from top to bottom of the screen. Such control ensures that video decoding can be performed in order from top to bottom of the screen. As a result, video decoding processing using multiple cores can be simply realized.

[0061] Furthermore, in each of the above embodiments, the controller 108 may control the vertical component of the motion vector determined by the predictor 105 so as to limit the range of the vertical component of the motion vector. For example, the controller 108 may prohibit the selection of a motion vector that references pixels other than those within, for example, 256 lines from the partition boundary in inter prediction across the partition boundary, thereby making it possible to reduce the size of the shared memory of a video decoding device using multiple cores.

[0062] The motion vectors in the VVC standard have a resolution of 1 / 16 pixels. The range of values ​​is -2 17 From 2 17 When converted to integer pixel precision, the range is -2 13 (-8096) to 2 13(8096). By constraining it to 256 lines rather than the 8096 required by the VVC standard, the size of the shared memory can be made much smaller.

[0063] In the above embodiments, slice division is used. However, when slice division is not used, the controller 108 may control the multiplexer 106 so that each CTU of the picture is output in order from top to bottom of the screen, and may control the vertical component of the motion vector determined by the predictor 105. By such control, it is guaranteed that the video can be decoded in order from top to bottom of the screen, and the size of the shared memory is also suppressed to be small, so that the video decoding process using multiple cores can be simply realized.

[0064] Fig. 7 is a block diagram showing an example of a video system. The video system shown in Fig. 7 is a system in which a video encoding device 100 and a video decoding device 200 of each of the above-mentioned embodiments are connected via a transmission path (wireless transmission path or wired transmission path) 300. The video encoding device 100 is the video encoding device 100 of any of the above-mentioned embodiments. The video decoding device 200 is the video decoding device 200 of each of the above-mentioned embodiments.

[0065] In the video system, the video encoding device 100 can generate a bitstream having the characteristics described in each of the above embodiments, and the video decoding device 200 can decode the bitstream having the characteristics described in each of the above embodiments.

[0066] Furthermore, each of the above embodiments can be configured using hardware, but can also be realized using a computer program.

[0067] The information processing system shown in Fig. 8 includes a processor 1001 such as a CPU (Central Processing Unit), a program memory 1002, a storage medium 1003 for storing video data, and a storage medium 1004 for storing a bit stream. The storage medium 1003 and the storage medium 1004 may be separate storage media, or may be storage areas of the same storage medium. A magnetic storage medium such as a hard disk can be used as the storage medium.

[0068] In the information processing system, a program (video encoding program or video decoding program) for implementing the functions of each block (except for the buffer block) shown in each of the above embodiments is stored in a program memory 1002. A processor 1001 executes processing in accordance with the program stored in the program memory 1002, thereby implementing the functions of the video encoding device 100 or the video decoding device 200 shown in each of the above embodiments.

[0069] At least the program memory 1002 is a non-transitory computer readable medium. However, the program may be stored in various types of transitory computer readable medium. The transitory computer readable medium is supplied with the program via, for example, a wired communication path or a wireless communication path, that is, via an electrical signal, an optical signal, or an electromagnetic wave.

[0070] Fig. 9 is a block diagram showing the main parts of a video encoding device. The video encoding device 10 shown in Fig. 9 includes a control unit (control means) 11 (implemented by a controller 108 in the embodiment) that controls the division positions of a screen so that the vertical position value of each division boundary of a screen in a video becomes a multiple of the maximum CTU size used (for example, the maximum CTU size of a video encoding method used). The control unit 11 supplies screen division information capable of identifying the division positions of the screen to at least the encoding processing unit.

[0071] Fig. 10 is a block diagram showing the main parts of a video decoding device. The video decoding device 20 shown in Fig. 10 includes an extraction unit (extraction means) 21 (realized by a demultiplexer 201 in the embodiment) that extracts, from a bitstream, coded data created in a plurality of divided regions obtained by dividing a screen in a video at a plurality of division boundaries indicated by values ​​that are multiples of the maximum CTU size used. The extraction unit 21 supplies the coded data to a decoding processing unit (an inverse quantization / inverse transformer 203 and a predictor 204).

[0072] Some or all of the above embodiments may be described as follows, but are not limited to the following:

[0073] (Supplementary Note 1) A video encoding device that applies prediction and transformation to CUs divided by a quadtree or a multi-type tree, A control means is provided for controlling the division positions of the screen so that the vertical position value of each division boundary of the screen in the video becomes a multiple of the maximum CTU size used. Video encoding device.

[0074] (Supplementary Note 2) The control means controls the division position based on the maximum available CTU size. 2. A video encoding apparatus according to claim 1.

[0075] (Additional Note 3) The control means also controls the output order of the entropy-encoded data of each CTU. 3. A video coding apparatus according to claim 1 or 2.

[0076] (Additional Note 4) The control means also controls the motion vector of each CU. 3. A video coding apparatus according to claim 1 or 2.

[0077] (Supplementary Note 5) A video decoding device that applies prediction and transformation to a CU divided by a quadtree or a multi-type tree, The apparatus includes an extracting means for extracting, from the bitstream, coded data created in a plurality of divided regions obtained by dividing a screen in a video at a plurality of division boundaries indicated by values ​​that are multiples of the maximum CTU size used. Video decoder.

[0078] (Supplementary Note 6) A video encoding device according to any one of Supplementary Note 1 to Supplementary Note 4, The video decoder of Appendix 5 A video system comprising:

[0079] (Supplementary Note 7) A video coding method for applying prediction and transformation to a CU divided by a quadtree or a multi-type tree, comprising: Control the screen division positions so that the vertical position value of each screen division boundary in the video is a multiple of the maximum CTU size used. Video coding method.

[0080] (Appendix 8) Controlling the division position based on the maximum available CTU size 8. The video encoding method of claim 7.

[0081] (Appendix 9) The output order of the entropy-encoded data of each CTU is also controlled. 9. A video coding method according to claim 7 or 8.

[0082] (Appendix 10) Control the motion vector of each CU 9. A video coding method according to claim 7 or 8.

[0083] (Supplementary Note 11) A video decoding method for applying prediction and transformation to a CU divided by a quadtree or a multi-type tree, comprising: Extracting from the bitstream coded data created in a plurality of divided regions obtained by dividing a screen in a video at a plurality of division boundaries indicated by values ​​that are multiples of the maximum CTU size used Video decoding method.

[0084] (Appendix 12) To the computer, A process for controlling the division positions of a screen so that the vertical position value of each division boundary of the screen in the video is a multiple of the maximum CTU size used A computer-readable recording medium storing a video encoding program for executing the above.

[0085] (Appendix 13) To the computer, Controlling the split location based on the maximum available CTU size 13. The computer-readable recording medium of claim 12, storing a video encoding program for executing the above.

[0086] (Appendix 14) To the computer, The output order of the entropy-encoded data of each CTU is also controlled. 14. The computer-readable recording medium of claim 12 or 13, having a video encoding program stored therein.

[0087] (Appendix 15) To the computer, Control the motion vector of each CU 14. The computer-readable recording medium of claim 12 or 13, having a video encoding program stored therein.

[0088] (Appendix 16) To the computer, A process of extracting from the bitstream coded data created in a plurality of partitioned regions obtained by dividing a screen of a video at a plurality of partition boundaries indicated by values ​​that are multiples of the maximum CTU size used A computer-readable recording medium storing a video decoding program for executing the above.

[0089] (Appendix 17) To the computer, A process for controlling the division positions of a screen so that the vertical position value of each division boundary of the screen in the video is a multiple of the maximum CTU size used A video encoding program for executing the above.

[0090] (Appendix 18) To the computer, Controlling the split location based on the maximum available CTU size 18. The video encoding program of claim 17,

[0091] (Appendix 19) To the computer, The output order of the entropy-encoded data of each CTU is also controlled. 17. A video encoding program according to claim 18.

[0092] (Appendix 20) To the computer, Control the motion vector of each CU 17. A video encoding program according to claim 18.

[0093] (Appendix 21) To the computer, A process of extracting from the bitstream coded data created in a plurality of partitioned regions obtained by dividing a screen of a video at a plurality of partition boundaries indicated by values ​​that are multiples of the maximum CTU size used A video decoding program for executing the above.

[0094] Although the present invention has been described above with reference to the embodiments, the present invention is not limited to the above-mentioned embodiments. Various modifications that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention. [Explanation of symbols]

[0095] 10 Video Encoding Device 11 Control section 20 Video Decoding Device 21 Extraction part 100 Video Encoding Device 101 Transform / Quantizer 102 Entropy Encoder 103 Inverse quantization / inverse transform 104 Buffer 105 Predictor 106 Multiplexer 107 Slice Divider 108 Controller 200 Video Decoding Device 201 Demultiplexer 202 Entropy Decoder 203 Inverse quantization / inverse transform 204 Predictor 205 Buffer 300 Transmission Line 1001 Processor 1002 Program Memory 1003,1004 Storage medium

Claims

1. A video encoding device that applies prediction and transformation to a CU divided by a quadtree or a multi-type tree, comprising: A division means for dividing a slice, which is formed by grouping together a plurality of CTUs constituting an image in a scanning order, into a plurality of slices; a control means for controlling a division position of the screen by the division means so that a vertical position value of a boundary when each slice is divided becomes a multiple of a maximum CTU size to be used. Video encoding device.

2. The control means also controls the output order of the entropy-encoded data of each CTU.

2. The video encoding device according to claim 1.

3. The control means also controls the motion vector of each CU.

2. The video encoding device according to claim 1.

4. The control means controls a position at which the screen is divided by the division means when the control means acquires information indicating that the video encoding method is a predetermined video encoding method.

2. The video encoding device according to claim 1.

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