Circuit board, and image forming apparatus

Abstract

To provide a circuit board that can prevent a reduction in yield due to flow of solder into a through via.SOLUTION: A circuit board 1 has a first surface 100 provided with a mounting area 41 for a first IC package 2 to be mounted, and a second surface 200 provided with a mounting area 42 for a second IC package 3 to be mounted. The circuit board 1 is provided with a plurality of thermal vias each penetrating the circuit board 1. The circuit board 1 includes an overlapping area where the mounting area 41 and the mounting area 42 overlap each other when seen in a direction perpendicular to the first surface 100. The plurality of thermal vias include a thermal via 17 arranged in the overlapping area, and a thermal via 16 having an aperture area different from the thermal via 17.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a circuit board on which electronic components are mounted, and to an image forming apparatus on which such a circuit board is mounted. [Background technology]

[0002] Integrated circuits (hereinafter referred to as "ICs") tend to generate more heat as their density and integration increase. For this reason, surface-mount IC packages compatible with reflow mounting on a circuit board are provided with a heat sink (thermal pad) for the purpose of dissipating heat from the IC. The heat generated by the IC is conducted to a heat transfer pattern (thermal land) on the circuit board that is provided opposite the heat sink. Through vias (thermal vias) for heat dissipation are provided in the heat transfer pattern. The heat conducted from the heat sink is dissipated to other layers of the circuit board through the through vias. Patent Document 1 discloses a circuit board provided with a plurality of such through vias. This circuit board is configured to have a resist opening on the back surface, so that the solder that melts and flows into the through vias during reflow mounting is absorbed by the resist opening. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2008-78271 A Summary of the Invention [Problem to be solved by the invention]

[0004] When a circuit board has multiple through vias for heat dissipation, a large amount of solder may flow into the through vias depending on the position of the through vias. This leads to a reduction in the amount of solder required to mount an IC package, causing the IC package to be mounted on the circuit board with insufficient strength. If the IC package is not mounted on the circuit board with sufficient strength, the yield of the circuit board will decrease, and ultimately the yield of the device to which the circuit board is attached will decrease.

[0005] In view of the above-mentioned problems, a main object of the present invention is to provide a circuit board capable of suppressing a decrease in yield due to solder flow into a through via. [Means for solving the problem]

[0006] The circuit board of the present invention has a first surface having a first mounting area for mounting a first electronic component, and a second surface, different from the first surface, having a second mounting area for mounting a second electronic component, wherein the circuit board has a plurality of through vias, each of which penetrates the circuit board, and when viewed in a direction perpendicular to the first surface, the circuit board includes an overlapping area where the first mounting area and the second mounting area overlap, and the plurality of through vias include a first through via arranged in the overlapping area and a second through via having an opening area different from that of the first through via. Effect of the Invention

[0007] According to the present invention, by suppressing the inflow of solder into the through vias, a decrease in yield can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] FIG. [Diagram 2] FIG. 3 is a diagram illustrating a wiring pattern on a first surface side of a circuit board. [Diagram 3] FIG. 4 is an exemplary diagram of a wiring pattern on a second surface side of the circuit board. [Figure 4] FIG. [Diagram 5] FIG. 13 is an example of a reflow temperature profile. [Figure 6] An explanatory diagram of the process in which cream solder flows into thermal vias. [Figure 7] An explanatory diagram of the process in which cream solder flows into thermal vias. [Figure 8] An explanatory diagram of the process in which cream solder flows into thermal vias. [Figure 9] FIG. 4 is an example of a wiring pattern on the second surface side. [Figure 10] FIG. 4 is an example of a wiring pattern on the second surface side. [Figure 11] FIG. 4 is an example of a wiring pattern on the second surface side. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

[0010] The circuit board of this embodiment is a printed wiring board on which a plurality of electronic components are mounted and connected by printed wiring. This circuit board is manufactured by mounting a large number of electronic components. The electronic components have a heat sink and are configured to dissipate heat to the circuit board. Below, an IC package having a heat sink and incorporating an IC will be described as an example of an electronic component. The circuit board has thermal vias, which are through vias for heat dissipation, and dissipates heat from the electronic components to the inside through the thermal vias.

[0011] There is a possibility that it may become difficult to procure electronic components mounted on circuit boards for various reasons, including distribution, the environment, and accidents. For example, a supply shortage of ICs has become an issue in recent years. To avoid such a situation, it is necessary to investigate in advance for each electronic component whether there are substitute electronic components (alternatives) that have the same functions and the same or similar shapes and specifications. If a problem occurs in procuring genuine parts, the production of circuit boards can be continued by procuring alternative parts.

[0012] On the circuit board, IC packages are mounted exclusively on a first surface (top surface) and a second surface (bottom surface) different from the first surface. In the mounting area of ​​the IC package on the first surface (hereinafter referred to as the "first IC package"), a heat transfer pattern is formed through which heat is conducted from a heat sink. In the mounting area of ​​the IC package on the second surface (hereinafter referred to as the "second IC package"), a heat transfer pattern is formed through which heat is conducted from a heat sink. For example, the first IC package is a genuine product and the second IC package is a substitute product.

[0013] In this embodiment, a case where the size of the first IC package is larger than that of the second IC package will be described. Therefore, the mounting area (heat transfer pattern) of the first IC package provided on the first surface is larger than the mounting area (heat transfer pattern) of the second IC package provided on the second surface. When the circuit board is viewed from the first surface direction (direction perpendicular to the first surface), the mounting area (heat transfer pattern) of the second IC package is included in the mounting area (heat transfer pattern) of the first IC package. Thermal vias are provided in the heat transfer pattern. A part of the multiple thermal vias is provided in an overlapping area (overlap area) of the mounting area (heat transfer pattern) of the first IC package and the mounting area (heat transfer pattern) of the second IC package when viewed from the first surface direction (direction perpendicular to the first surface). This reduces the board area, and some of the thermal vias are shared by the first IC package and the second IC package.

[0014] (First embodiment) Fig. 1 is a diagram illustrating the configuration of a circuit board according to a first embodiment. In Fig. 1, a first surface 100 of a circuit board 1 is on the upper side. A first IC package 2 on the first surface 100 and a second IC package 3 on the second surface 200 are mounted exclusively on the circuit board 1. Here, the state in which the first IC package 2 is mounted is shown, and the second IC package 3 is represented by a dotted line. The first IC package 2 includes a heat sink 21, and the second IC package 3 includes a heat sink 31.

[0015] The first IC package 2 and the second IC package 3 contain ICs with the same functions. For example, the first IC package 2 and the second IC package 3 contain ICs that generate a lot of heat, such as a DC-DC converter or a motor driver. For this reason, the first IC package 2 and the second IC package 3 are packages with heat sinks 21 and 31, providing high heat dissipation properties.

[0016] In this embodiment, from the viewpoint of parts procurement, the first IC package 2 and the second IC package 3 are different sizes. Here, a case will be described where the first IC package 2 is larger. The size of the heat sink corresponds to the size of the IC package. Therefore, here, the heat sink 21 is larger than the heat sink 31. For example, the first IC package 2 is a TSSOP (Thin-Shrink Small Outline Package)-14 package. The second IC package 3 is a SOP (Small Outline Package)-8 package. Note that the IC package may be another type of IC package as long as it has a heat sink.

[0017] The circuit board 1 is a board with a multi-layer structure. In this embodiment, the circuit board 1 has a typical four-layer structure of flame retardant (FR material) with a thickness of 1.6 [mm], but the number of layers is not limited to this. Fig. 2 is an example of a wiring pattern on the first surface side of the circuit board 1 on which the first IC package 2 is mounted. Fig. 3 is an example of a wiring pattern on the second surface side of the circuit board 1 on which the second IC package 3 is mounted. Fig. 4 is an example of the configuration of the circuit board 1, with the second surface side facing up.

[0018] A solder resist 10 is applied to each of the first surface 100 and the second surface 200. On the solder resist 10 on the first surface 100, there are provided lead connection lands 11a to which the lead electrodes 22 of the first IC package 2 can be connected, and a heat transfer pattern 12 to which the heat sink 21 of the first IC package 2 can be attached. The area where the lead connection lands 11a and the heat transfer pattern 12 are formed becomes the mounting area 41 of the first IC package 2. On the solder resist 10 on the second surface 200, there are provided lead connection lands 11b to which the lead electrodes 32 of the second IC package 3 can be connected, and a heat transfer pattern 13 to which the heat sink 31 of the second IC package 3 can be attached. The area where the lead connection lands 11b and the heat transfer pattern 13 are formed becomes the mounting area 42 of the second IC package 3.

[0019] The lead connection land 11a is connected (soldered) to the lead electrode 22 of the first IC package 2 by the solder 14 as the cream solder melts during reflow. Similarly, the lead connection land 11b is connected (soldered) to the lead electrode 32 of the second IC package 3 by the solder 14 as the cream solder melts during reflow.

[0020] The heat transfer patterns 12 and 13 are rectangular and are formed to have sizes corresponding to the sizes of the first IC package 2 and the second IC package 3 to be mounted, respectively. In the first embodiment, the first IC package 2 is larger than the second IC package 3, and therefore the heat transfer pattern 12 is larger than the heat transfer pattern 13. The first IC package 2 and the second IC package 3 are provided with mounting regions 41 and 42 at positions facing each other with the circuit board 1 in between. Therefore, when viewed from the first surface side (direction perpendicular to the first surface), the region of the heat transfer pattern 13 is included in the region of the heat transfer pattern 12.

[0021] The heat transfer pattern 12 is provided with a plurality of thermal vias 16, 17. The heat transfer pattern 13 is provided with a plurality of thermal vias 17. The plurality of thermal vias 17 are provided at the four corners of the heat transfer pattern 13 in a rectangle. The plurality of thermal vias 16 are provided at the four corners of the heat transfer pattern 12 in a rectangle. That is, the plurality of thermal vias 17 are formed in an overlapping region where the heat transfer pattern 13 and the heat transfer pattern 12 overlap when viewed from the first surface side (direction perpendicular to the first surface), and are used in common for heat dissipation of the first IC package 2 and the second IC package 3. The thermal via 16 is formed in an area where the heat transfer pattern 13 and the heat transfer pattern 12 do not overlap when viewed from the first surface side (direction perpendicular to the first surface), and is used for heat dissipation of the first IC package 2. In this configuration, the thermal via 17 penetrates the heat transfer pattern 12 and the heat transfer pattern 13. The thermal via 16 penetrates the heat transfer pattern 12 and the second surface 200 on the outside of the heat transfer pattern 13 .

[0022] In this way, when a plurality of thermal vias 16, 17 are provided, depending on the arrangement of the thermal vias 16, 17, a large amount of solder may flow into the thermal vias 16, 17 due to the heat treatment during mounting of the IC package. In that case, even if a resist opening is provided on the back surface as disclosed in Patent Document 1, it may be difficult to reduce the flow of solder into the thermal vias 16, 17. Such flow of solder into the thermal vias 16, 17 leads to a reduction in the amount of solder used to mount the IC package. The reduction in the amount of solder may cause the IC package to peel off from the circuit board 1. This leads to a decrease in the manufacturing yield of the circuit board 1. For this reason, in this embodiment, the following configuration is proposed.

[0023] When the cream solder applied to the heat transfer pattern 12 melts during reflow, the molten solder 15 flows into the thermal vias 16, 17 (see FIG. 1). At this time, the gap (standoff) between the first IC package 2 (heat sink 21) and the heat transfer pattern 12 is determined by the package standard. In this embodiment, for example, the gap between the first IC package 2 (heat sink 21) and the heat transfer pattern 12 is 0 mm minimum and 0.150 mm maximum. Similarly, the gap between the second IC package 3 (heat sink 31) and the heat transfer pattern 13 is 0 mm minimum and 0.152 mm maximum.

[0024] The thermal vias 16 and 17 have different sizes. That is, the thermal vias 16 and 17 have different opening areas. In this embodiment, the thermal vias 17 are formed to have a size (opening area) smaller than the size of the thermal vias 16. For example, the thermal vias 16 are through vias with a diameter of 0.3 [mm], and the thermal vias 17 are through vias with a diameter of 0.25 [mm]. The thermal vias 16 and 17 are both plated with a thickness of 15 [μm] on the inside. That is, when viewed from the first surface side (direction perpendicular to the first surface), the thermal vias 16 with a relatively large diameter are provided in the region that does not overlap with the heat transfer pattern 13, and the thermal vias 17 with a relatively small diameter are provided in the overlapping region that overlaps with the heat transfer pattern 13.

[0025] 1 and 4, the second layer of the circuit board 1 is a ground layer, on which copper foil 18 is provided for supplying a ground voltage. The third layer is a power supply layer, on which a power supply pattern 19 is provided for supplying a power supply voltage. The heat conducted to the thermal vias 16 and 17 is dissipated to the other layers (the second layer and the third layer).

[0026] Generally, in double-sided reflow mounting on a circuit board 1, small electronic components such as chip resistors and chip capacitors are mounted in the first reflow process. Larger electronic components such as IC packages and tall electrolytic capacitors are mounted in the second reflow process. This is to prevent the electronic components mounted in the first reflow process from falling under their own weight when the solder melts due to heating in the second reflow process. The surface on which electronic components are mounted in the first reflow process is called the "primary surface" and the surface on which electronic components are mounted in the second reflow process is called the "secondary surface."

[0027] The method of mounting the IC packages on the primary and secondary surfaces will be described in detail below. In this embodiment, the first IC package 2 is larger in size than the second IC package 3, and therefore is heavier. For this reason, in the first reflow process, reflow is performed with the second surface 200 as the primary surface, and in the second reflow process, reflow is performed with the first surface 100 as the secondary surface.

[0028] <When the first IC package 2 is mounted on the secondary surface and the second IC package 3 is not mounted> As described above, the first IC package 2 is mounted on the secondary surface (first surface 100) in the second reflow process.

[0029] 5 is an example diagram of a typical reflow temperature profile used in a reflow process. The horizontal axis represents the heating time in the reflow process, and the vertical axis represents the temperature corresponding to the heating time. The preheat period is when the temperature is between 150[°C] and 180[°C], and the main heating period is when the temperature is 180[°C] or higher. Generally, in a reflow furnace, a temperature difference occurs between the surface and the inner layer of the circuit board 1. For example, even if the surface of the circuit board 1 reaches 240[°C] during the main heating period, the inner layer (inside) may be 220[°C].

[0030] This is because even if hot air is blown from the upper and lower heaters of the reflow oven, the heat is absorbed by the inner layer of the circuit board 1, making it difficult for the temperature to rise. In this situation, the temperature inside the thermal via differs between the surface side and the inner layer side of the circuit board 1. Even if the molten solder flowing into the thermal via is 240°C on the surface side, if the GND pattern on the inner layer side is 220°C, heat will be absorbed by the inner layer side.

[0031] The first IC package 2 is mounted in the second reflow process. Therefore, even if solder protrudes from the thermal vias 16 and 17 to the primary surface side, the protruding solder does not cause a problem because the mounting on the primary surface side is completed. However, since the thermal vias 17 are disposed inside the heat transfer pattern 13 more than the thermal vias 16, the solder is likely to protrude during reflow mounting.

[0032] In this embodiment, the thermal vias 17, which have a smaller diameter than the thermal vias 16, are arranged inside the heat transfer pattern 12 to suppress protrusion of solder from the thermal vias 17 during reflow mounting. Specifically, as described above, the thermal vias 16 have a normal diameter of 0.3 mm, and the thermal vias 17 have a small diameter of 0.25 mm. The thermal vias 17 are provided inside the heat transfer pattern 13.

[0033] Generally, the diameter of a thermal via is about 0.3 [mm]. However, according to the findings of the inventors, even if a thermal via has a diameter of 0.3 [mm], when the thermal via is provided inside a heat transfer pattern such as the center of the heat transfer pattern, a large solder protrusion occurs at the bottom of the thermal via depending on the reflow profile. This is presumably because the cream solder in the center of the heat transfer pattern is in an amount greater than the capacity to fill the inside of the thermal via, and even if the thermal via has a diameter of 0.3 [mm], the suction of the molten solder occurs due to the capillary phenomenon. In addition, according to another finding, when a thermal via has a diameter of 0.25 [mm], there is no solder protrusion during reflow even inside the heat transfer pattern.

[0034] The inventors presume that the reason why solder does not flow in or protrude when the diameter of the thermal via is smaller than usual is due to the following three points. 1. The smaller the diameter of the thermal via, the smaller the force that draws up the solder due to capillary action (surface tension). 2. The smaller the diameter of the thermal via, the greater the piping resistance of the molten solder as a viscous fluid. 3. The smaller the diameter of the thermal via, the smaller the amount of heat that the molten solder that flows in has, and the easier it is for the temperature to drop. When the temperature drops, the surface tension becomes even smaller, and the viscosity also increases, which has the secondary effect of making the piping resistance even greater.

[0035] Due to the above three points, it is believed that there is solder protrusion in the thermal via with a diameter of 0.3 [mm], but there is less solder protrusion in the thermal via with a diameter of 0.25 [mm]. Below, the mechanical grounds for the above three points are explained respectively.

[0036] 1. The smaller the diameter of the thermal via, the smaller the capillary action (surface tension) If the diameter is d, the contact angle is θ, and the surface tension is S, the vertical component F of the surface tension due to capillary action is expressed by the following (Equation 1). F = πdScosθ ... (Equation 1)

[0037] The vertical component of surface tension, F, acts as a force to accelerate the molten solder of mass m flowing inside the thermal via. From (Equation 1), we can see that the vertical component of surface tension, F, is proportional to the diameter d of the thermal via. Therefore, if the diameter of the thermal via is small, the wicking force of the solder is small.

[0038] 2. The smaller the diameter of the thermal via, the greater the piping resistance of the molten solder as a viscous fluid. If the molten solder flowing into the thermal via is considered to be a viscous fluid (viscous liquid), then piping resistance will occur with the thermal via as a pipe. The piping resistance acts as a force that slows down the molten solder flowing inside the thermal via. If the viscosity of the molten solder is μ, the specific gravity is ρ, the thermal via is a pipe with diameter d and length L, and the molten solder is considered to be a Newtonian fluid, then the piping resistance P when the pipe friction coefficient is λ, the density of the molten solder is ρ, and the flow velocity inside the pipe is v is expressed by the following (Equation 2). P = λ (L / d) (pv 2 ) …(Formula 2)

[0039] Here, the relationship between the pipe friction coefficient λ and the Reynolds number Re is expressed by the following (Equation 3). λ=64 / Re…(Formula 3)

[0040] The relationship between the Reynolds number Re, the kinetic viscosity ν, the viscosity μ, the density ρ, and the diameter d of the thermal via is expressed by the following (Equation 4). Re = (v d ρ) / (μ×10 -3 ) …(Formula 4)

[0041] From the above (Equations 2) to (Equation 4), the pipe resistance P is expressed by the following (Equation 5). P = (64 / (v d ρ) / (μ×10 -3 ))·(L / d)·(pv 2 / 2) =(32·μ×10 -3 ·L·v) / d 2 …(Formula 5) From (Equation 5), it can be seen that the piping resistance P is inversely proportional to the square of the thermal via diameter d. In other words, the smaller the thermal via diameter d, the larger the piping resistance P.

[0042] 3. The smaller the diameter of the thermal via, the smaller the amount of heat held by the molten solder that flows in, making it easier for the temperature to drop. As the molten solder flows into the thermal via, heat is transferred to the second layer (GND layer) to which the thermal via is connected, which has a high specific heat, causing the temperature to drop. If we assume that the amount of heat is held by the molten solder with diameter d and unit height ΔL that has flowed into the thermal via, then the amount of heat is simply proportional to the volume of the solder. The amount of heat Q is expressed by the following (Equation 6). Q = π(d 2) 2 ·ΔL…(Formula 6)

[0043] Therefore, the amount of heat Q is proportional to the square of the diameter d of the thermal via. In other words, the smaller the diameter of the thermal via, the smaller the amount of heat the molten solder has. This amount of heat Q is conducted to the copper foil 18 of the second layer (GND layer) while flowing through the thermal via. It is assumed that the temperature of the molten solder will gradually decrease as a result.

[0044] A decrease in the temperature of molten solder affects the contact angle θ of the surface tension. For example, when the solder is Sn-3Ag-0.5Cu and the temperature is 238°C, the surface tension T is 0.44 N / m and the contact angle θ is 65°. Surface tension tends to decrease as the temperature increases. The change in the contact angle θ is smaller at higher temperatures. When the solder temperature is 258°C, the contact angle θ is 59°. In other words, the lower the temperature, the larger the contact angle θ. Therefore, as the molten solder cools and the temperature decreases while it flows through the thermal via, the contact angle θ increases and the vertical component F of the surface tension decreases.

[0045] In addition, a decrease in temperature affects the viscosity μ of molten solder with respect to the pipe resistance P. For example, in the case of Sn-3Ag-0.5Cu solder, the viscosity μ of molten solder is as follows when the temperature ranges from 490[K] to approximately 560[K]: At 495K (=220.85℃), viscosity μ = 1.65mPa s At 520K (=246.85℃), viscosity μ = 1.62mPa s At 550K (=276.85℃), viscosity μ = 1.5mPa s

[0046] In other words, the lower the temperature of solder, the higher the viscosity. According to the above (Equation 5), the piping resistance P is proportional to the viscosity μ, so the lower the temperature of the solder, the higher the piping resistance P. Therefore, as the molten solder cools and its temperature drops while flowing through the thermal via, the viscosity μ of the solder increases, and the piping resistance P increases.

[0047] From the above, it is estimated that when the temperature rises due to reflow, the cream solder near the thermal via flows into the thermal via in the following manner: Figures 6 to 8 are explanatory diagrams showing the process in which the cream solder flows into thermal via 17.

[0048] 1) At room temperature (25°C), lead-free solder cream (general Sn-3.0Ag-0.5Cu solder cream) is applied to the heat transfer pattern 12. 2) Start reflow and during the preheat period (150℃~180℃), the flux in the solder paste (the main component is abietic acid (C 19 H 29 COOH), melting point 174[℃]. 3) The melted flux flows into the thermal vias 17 by capillary action and penetrates into the plating layer inside the thermal vias 17, thereby reducing the contact angle θ inside the thermal vias. Also, a part of the flux vaporizes. 4) During the main heating period (180°C to 220°C), the solder on the upper reflow surface exceeds its liquidus temperature (219°C) and melts. When the contact angle θ0 is greater than or equal to 90°, the molten solder does not flow into thermal vias 17 due to the vertical component of surface tension F0 (Figure 6). When the temperature of the solder rises due to heating and the contact angle θ1 becomes less than 90°, the solder begins to flow into thermal vias 17 due to capillary action due to the vertical component of surface tension F1 (Figure 7). 5) The molten solder that has flowed into the thermal via 17 has a heat quantity Q, but its temperature drops as the heat is conducted to the second layer (GND layer) connected to the thermal via in the inner layer of the circuit board 1. As the temperature of the flowing solder drops, the contact angle θ increases (θ1 → θ2) and the surface tension decreases (Figure 8). Furthermore, when the molten solder is viewed as a viscous fluid, piping resistance P is generated in the molten solder that flows into the tube of thermal via 17. As the temperature of the molten solder drops, the viscosity also increases, further increasing the piping resistance. When the surface tension and piping resistance are balanced, the acceleration becomes zero (uniform motion) and it does not accelerate any further. As the solder flows further in and the temperature drops, and the surface tension becomes smaller than the piping resistance, the acceleration becomes negative and the inflow speed decreases. When the inflow speed v reaches zero, the inflow stops. Furthermore, when the temperature drops below the solidus temperature (217°C), the molten solder solidifies and loses its fluidity.

[0049] In the above 5), if the inflow speed v is positive even at the bottom of the thermal via 17, the molten solder will protrude from the bottom of the thermal via 17. On the other hand, in 5), if the inflow speed v becomes 0 inside the thermal via 17 before it reaches the bottom, the solder will not protrude from the bottom of the thermal via 17.

[0050] The condition for solder not protruding from thermal via 17 is that the inflow velocity v of molten solder becomes 0 before it reaches the bottom inside thermal via 17. The inventors discovered the condition for solder not protruding as described above by making the diameter of the thermal via smaller than usual, 0.25 mm or less, without changing the reflow temperature profile from the conventional one.

[0051] <When the second IC package 3 is mounted on the primary surface and the first IC package 2 is not mounted> The second IC package 3 is mounted on the primary surface (second surface 200) in the first reflow process (see FIG. 4). If solder protrudes from the thermal vias 17 to the secondary surface in the first reflow process, the squeegee may get caught in the process of applying cream solder to the secondary surface, which may degrade the quality of the surface to which the cream solder is applied. However, in this embodiment, the diameter of the thermal vias 17 is set to 0.25 mm or less, which is smaller than usual, so that the protrusion of solder to the secondary surface is suppressed. As a result, the quality of the surface to which the cream solder is applied does not degrade, and it is possible to suppress a decrease in the yield of the circuit board due to solder flowing into the thermal vias 17.

[0052] Second embodiment In the first embodiment, an example was described in which the diameter of the thermal vias 17 inside the heat transfer pattern 13 of the second IC package 3 is made smaller than that of normal through vias. However, making the diameter of the thermal vias 17 smaller also leads to a decrease in the efficiency of heat dissipation. For this reason, in the second embodiment, the number of thermal vias 17 provided in the heat transfer pattern 13 is increased. FIG. 9 is an exemplary diagram of the wiring pattern on the second surface side in the case where the number of thermal vias 17 having a smaller diameter than normal is increased by two along two sides of the heat transfer pattern 13 compared to the case of FIG. 3. By increasing the number of thermal vias 17, it is possible to improve the heat dissipation efficiency that has been reduced by reducing the diameter.

[0053] Third embodiment In the third embodiment, the second IC package 3 also uses thermal vias 16 formed in a normal size for heat dissipation. Fig. 10 is an example diagram of the wiring pattern on the second surface side when the thermal vias 16 and the heat transfer pattern 13 are connected. The thermal vias 16 and the heat transfer pattern 13 are connected by a heat dissipation path 20. The thermal vias 16 are located away from the heat transfer pattern 13, so their heat dissipation performance is low, but they can be used to dissipate the heat conducted through the heat dissipation path 20.

[0054] Simply providing the heat dissipation path 20 may cause molten solder to flow into the thermal vias 16 via the heat dissipation path 20, resulting in the solder protruding to the secondary surface side. For this reason, the heat dissipation path 20 may be covered with a solder resist 10. The solder resist 10 should cover the entire second surface 200 except for the heat transfer pattern 13 and the lead connection lands 11b.

[0055] (Fourth embodiment) In the first to third embodiments, there are four thermal vias 16. When the thermal vias 17 are provided inside the heat transfer pattern 12, the thermal vias 17 also dissipate heat, so if there are four thermal vias 16, the amount of heat dissipation may be large compared to the amount of heat generated. For this reason, the number of thermal vias 16 may be reduced to achieve an amount of heat dissipation that corresponds to the amount of heat generated. FIG. 11 is an example diagram of the wiring pattern on the second surface side when the number of thermal vias 16 is reduced. In FIG. 11, the number of thermal vias 16 is reduced by two, leaving two at the two corners of the heat transfer pattern 12.

[0056] As described above, the first to fourth embodiments are characterized by the through vias (thermal vias 16, 17) provided in the heat transfer patterns 12, 13 to which the electronic components (first IC package 2 and second IC package 3) are attached. Specifically, the two electronic components mounted exclusively on the front and back surfaces of the circuit board 1 are different in size. The size of the through via (thermal via 17) provided in the mounting area (heat transfer pattern 13) of the smaller sized electronic component is configured to be smaller than the size of the through via (thermal via 16) provided outside the mounting area (heat transfer pattern 13).

[0057] This configuration prevents the molten solder from flowing into the through vias and reaching the opposite surface when mounting the electronic components. This ensures that there is a sufficient amount of solder to mount the electronic components, and the electronic components can be mounted with sufficient strength. This prevents a decrease in the yield of the circuit board 1.

[0058] The circuit board 1 described in each of the above embodiments is mounted, for example, on an image forming apparatus. The image forming apparatus includes components that are controlled by either the first IC package 2 or the second IC package 3 mounted on the circuit board 1 to form an image on a predetermined sheet.

[0059] In the above embodiments, examples have been described in which the first IC package 2 and the second IC package 3 are alternative components. However, the effects obtained by the present embodiment are not limited to such examples. For example, the circuit board 1 may be designed as a common platform for a plurality of devices. In this case, in one model, a first electronic component having a first function is mounted on the first surface, while in another model, a second electronic component different from the first electronic component is mounted on the second surface. Even in such a case, the effects described in the present embodiment can be obtained.

Claims

1. A circuit board having a first surface provided with a first mounting area for mounting a first electronic component, and a second surface different from the first surface provided with a second mounting area for mounting a second electronic component, The circuit board is provided with a plurality of through vias each penetrating the circuit board; the circuit board includes an overlapping region where the first mounting region and the second mounting region overlap when viewed in a direction perpendicular to the first surface, The plurality of through vias include a first through via arranged in the overlapping region and a second through via having an opening area different from that of the first through via. Circuit board.

2. a first heat transfer pattern provided on the first surface to which the first electronic component can be attached; a second heat transfer pattern provided on the second surface to which the second electronic component can be attached; The first through via connects the first heat transfer pattern and the second heat transfer pattern. The circuit board according to claim 1.

3. The size of the first heat transfer pattern is larger than the size of the second heat transfer pattern. The circuit board according to claim 2.

4. The first through via is provided in a region where the first heat transfer pattern and the second heat transfer pattern overlap when viewed from the above direction. The circuit board according to claim 2.

5. the second through via is provided in a region where the first mounting region and the second mounting region do not overlap when viewed from the direction. The circuit board according to claim 1.

6. The second through via and the second heat transfer pattern are connected to each other, and the heat dissipation path is covered with a solder resist. The circuit board according to claim 2.

7. The number of the first through vias is greater than the number of the second through vias. The circuit board according to claim 5.

8. the first heat transfer pattern and the second heat transfer pattern are rectangular, The first through vias are provided at four corners of the second heat transfer pattern, The second through vias are provided at four corners of the first heat transfer pattern. The circuit board according to claim 2.

9. the first heat transfer pattern and the second heat transfer pattern are rectangular, the first through vias are provided at positions along four corners and two sides of the second heat transfer pattern, The second through vias are provided at four corners of the first heat transfer pattern. The circuit board according to claim 2.

10. the first heat transfer pattern and the second heat transfer pattern are rectangular, The first through vias are provided at four corners of the second heat transfer pattern, The second through vias are provided at two corners of the first heat transfer pattern. The circuit board according to claim 2.

11. The circuit board has a multi-layer structure, the first through via and the second through via dissipate heat from the first electronic component to another layer; The first through via dissipates heat from the second electronic component to another layer. The circuit board according to claim 1.

12. the first electronic component and the second electronic component each include a heat sink; a heat sink of the first electronic component can be attached to the first heat transfer pattern; The second heat transfer pattern is capable of adhering a heat sink of the second electronic component. The circuit board according to claim 2.

13. The first through via has a diameter of 0.25 mm or less, The second through via has a diameter of 0.3 mm. The circuit board according to claim 1.

14. A circuit board according to claim 1; a component that forms an image under the control of either the first electronic component or the second electronic component mounted on the circuit board, Image forming device.

Images