Cryptographic hash digests from quantum information

Abstract

To provide methods, systems and apparatus for generating cryptographic hash digests from quantum information.SOLUTION: A method includes: obtaining data representing a quantum circuit; generating an initial quantum state vector, which comprises an input quantum state vector for the quantum circuit; generating, using the initial quantum state vector, one or more evolved quantum state vectors by applying respective portions of the quantum circuit to the initial quantum state vector; iteratively applying logical operations to floating point binary representations of the initial and evolved quantum state vectors so as to generate a binary character string; and applying a hash function to the binary character string to obtain a cryptographic hash digest of the quantum circuit.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] This specification relates to cryptography, computer security, and quantum computing. [Background technology]

[0002] A hash function is a function that can be used to project data of any size and type into a fixed-length string. The value returned by a hash function is called a hash digest, hash value, hash code, or hash. Hash functions act as one-way functions, being easy and fast to compute in the forward direction, but difficult to reverse. Hash functions are commonly deployed as a security mechanism for most forms of digital communication and have a variety of use cases, including password storage, digital signatures, file management, and authentication.

[0003] Existing hash functions for generating hash digests from quantum information are based on random walks or other non-deterministic functions, are reversible, and do not exhibit traditional hash qualities (e.g., they are not universal, one-way, deterministic, fast to compute, or collision-resistant). Summary of the Invention [Problem to be solved by the invention]

[0004] This specification describes systems, methods, apparatus, and other techniques for generating hash digests from quantum information. [Means for solving the problem]

[0005] In general, innovative aspects of the subject matter described in this specification can be implemented in a method that includes obtaining data representing a quantum circuit; generating an initial quantum state vector, where the initial quantum state vector includes an input quantum state vector for the quantum circuit; generating one or more evolved quantum state vectors using the initial quantum state vector, where each evolved quantum state vector is generated by applying a respective portion of the quantum circuit to the initial quantum state vector; iteratively applying logical operations to floating-point binary representations of the initial and evolved quantum state vectors to obtain a binary string; and applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit.

[0006] Other implementations of this aspect include corresponding computer systems, devices, and computer programs stored on one or more computer storage devices, each configured to perform the operations of the method. One or more classical computer systems can be configured to perform specific operations or actions by virtue of software, firmware, hardware, or a combination thereof embedded in the system that, when operated, performs the operations or causes the system to perform the operations. One or more computer programs can be configured to perform specific operations or actions by virtue of including instructions that, when executed by a data processing device, cause the device to perform the operations.

[0007] Each of the above and other implementations can optionally include one or more of the following features, alone or in combination: In some implementations, iteratively applying logical operations to the floating-point binary representations of the quantum state vector to obtain a binary string includes, in a first iteration, applying a first logical operation between the floating-point binary representation of the initial quantum state vector and a floating-point binary representation of the first evolved quantum state vector, and, in each iteration after the first iteration, applying a logical operation between an output of a previous iteration and a floating-point binary representation of the current evolved quantum state vector for that iteration.

[0008] In some implementations, the logic includes an XOR operation.

[0009] In some implementations, the method further includes, for each quantum state vector, identifying a real part and an imaginary part of the quantum state vector, and generating a floating-point binary representation of the real part of the quantum state vector and a floating-point binary representation of the imaginary part of the quantum state vector.

[0010] In some implementations, identifying the real and imaginary parts of the quantum state vector includes analyzing a complex number associated with the quantum state vector and providing a split operation that splits the complex number into a real part and an imaginary part.

[0011] In some implementations, the method further includes, for each quantum state vector, concatenating a floating-point binary representation of the real part of the quantum state vector and a floating-point binary representation of the imaginary part of the quantum state vector, and iteratively applying logical operations to the floating-point binary representations of the quantum state vector to obtain a binary string includes iteratively applying logical operations to the concatenated floating-point binary representations of the quantum state vector.

[0012] In some implementations, the method further includes, for each quantum state vector, interleaving a floating-point binary representation of a real part of the quantum state vector with a floating-point binary representation of an imaginary part of the quantum state vector, and iteratively applying logical operations to the floating-point binary representations of the quantum state vector to obtain a binary string includes iteratively applying logical operations to the interleaved floating-point binary representations.

[0013] In some implementations, the method further includes encrypting the floating-point binary representation of the quantum state vector before applying the logical operation.

[0014] In some implementations, the method further includes dividing the quantum circuit in time into one or more portions, each evolution quantum state vector corresponding to an evolution of the initial quantum state vector under each portion of the quantum circuit.

[0015] In some implementations, the quantum circuit implements a quantum algorithm or prepares a target quantum state.

[0016] In some implementations, the method further includes receiving a classical data input and encoding the classical data input as a quantum circuit.

[0017] In some implementations, generating the one or more evolved quantum state vectors includes performing classical computation.

[0018] In some implementations, the method further includes sending a request to a quantum computing server instructing the quantum computing server to execute the quantum circuit with an initial quantum state corresponding to the initial quantum state vector and to calculate a cryptographic hash digest of the quantum circuit using the measured evolved quantum state vector; receiving from the quantum computing server a result of the execution of the quantum circuit and the cryptographic hash digest; and verifying the result of the execution of the quantum circuit using the cryptographic hash digest calculated by the quantum computing server.

[0019] In general, another innovative aspect of the subject matter described herein can be implemented in a method performed by a quantum computer, the method including obtaining data specifying a quantum computation, the data including data representing a quantum circuit, an initial quantum state of a quantum system, and instructions for computing a cryptographic hash digest of the quantum circuit, applying the quantum circuit to the initial quantum state of the quantum system to perform the quantum computation, the method including generating one or more evolved quantum state vectors according to the instructions for computing a cryptographic hash digest of the quantum circuit, generating each evolved quantum state vector including applying a respective portion of the quantum circuit to the initial quantum state, iteratively applying logical operations to a floating point binary representation of the initial quantum state and the one or more evolved quantum state vectors to obtain a binary string, and applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit.

[0020] Other implementations of this aspect include corresponding classical and quantum computer systems, devices, and computer programs stored on one or more computer storage devices, each configured to perform the operations of the method. The one or more classical and quantum computer systems can be configured to perform specific operations or actions by software, firmware, hardware, or a combination thereof that is incorporated into the system and performs or causes the system to perform the operations when the system is operated. The one or more computer programs can be configured to perform specific operations or actions by including instructions that, when executed by a data processing device, cause the device to perform the operations.

[0021] Each of the above implementations, as well as other implementations, can optionally include one or more of the following features, either alone or in combination: In some implementations, the data specifying the quantum computation is received from a client device, and the method further includes transmitting a result of the quantum computation and a cryptographic hash digest of the quantum circuit to the client device.

[0022] The subject matter described herein can be implemented in a particular manner to realize one or more of the following advantages.

[0023] Current solutions for generating hash digests from quantum information provide quantum information stored as binary in computer memory as input to a hash function. However, the problem with accessing quantum information in memory to perform a simple binary transformation is that it is not secure against attacks on classical hash algorithms. For example, it has been shown that an adversary can reverse some of these one-way hash calculations to recover the original information from the hash digest.

[0024] A system implementing the currently described hashing technique can address this issue and achieve improved security and robustness against adversarial attacks. The quantum information in memory is efficiently converted into an irreversible binary string before being provided as input for the hash function. Thus, even if an adversary manages to reverse the hash digest of the quantum information, the resulting string is still chopped and unreadable. Moreover, the parameters of the currently described hashing technique can be adjusted to further improve security and robustness against adversarial attacks. For example, by increasing the number of quantum state vectors used in generating the irreversible binary string, the search space of the brute force attack is increased and the avalanche effect of the hash digest generation is improved. Moreover, this increase can be implemented efficiently because the computational overhead for the increase in the number of quantum state vectors is based on classical logic calculations, e.g., XOR calculations, which can be performed quickly at the classical computation gate level.

[0025] In addition, the hashing techniques described herein exhibit traditional hashing properties. For example, the hashing techniques described herein are deterministic and therefore capable of verifying the same information or evolution every time. Furthermore, the hashing techniques described herein are one-way functions and therefore cannot be reversed (unlike classical quantum hash functions). Furthermore, the hashing techniques described herein serve as a way to encode quantum information, such as quantum algorithms, quantum states, or quantum circuits, as intermediate lookup tables, which provides a hash digest that can be used in subsequent applications.

[0026] Furthermore, while the hashing techniques described herein are inspired by quantum computing and can be used to generate hashes of quantum information, the techniques are based on classical computation and do not require special purpose hardware.

[0027] The details of one or more implementations of the subject matter of this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. [Brief description of the drawings]

[0028] [Figure 1] FIG. 1 is a conceptual block diagram of an example system for generating a cryptographic hash digest of quantum information. [Diagram 2] 1 is a flow chart of an example process for generating a cryptographic hash digest of quantum information. [Figure 3A] FIG. 1 illustrates an example of a quantum circuit. [Figure 3B] 3B shows an example of an initial quantum state vector and a first evolved quantum state vector for the example quantum circuit shown in FIG. 3A. [Figure 3C] FIG. 3B shows examples of second, third and final evolved quantum state vectors for the quantum circuit shown in FIG. 3A. [Figure 4] FIG. 13 is a diagram illustrating an example of application of a division operation to a quantum state vector. [Diagram 5]FIG. 13 is a diagram showing an example of interleaving of floating-point binary representation of the real and imaginary parts of a quantum state vector. [Figure 6] FIG. 13 is a diagram illustrating an example sequence of an iterative XOR operation. [Figure 7] FIG. 1 is a conceptual block diagram of an example process for using a hash digest of quantum information to verify an implementation of a quantum circuit. [Figure 8] FIG. 1 is a schematic diagram of an exemplary general-purpose classical processor system. [Figure 9] FIGURE 1 is a block diagram of an example quantum computing device. Like reference numbers and designations in the various drawings indicate like elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] This specification describes a method and system for generating a cryptographic hash digest from quantum information. As summarized here and detailed in the following description, the techniques described herein facilitate efficient conversion of quantum information in memory to an irreversible binary string by partitioning the quantum information into groups and generating a quantum state vector for each group. The quantum state vectors are iteratively combined using logical operations, such as an XOR operation, to generate an irreversible binary string. The irreversible binary string is then provided as input to a hash function, which generates a hash digest.

[0030] 1 is a conceptual block diagram of an exemplary system 100 for generating a cryptographic hash digest of quantum information. The exemplary system 100 includes a quantum information transformation engine 102 and a hash engine 104. The quantum information transformation engine 102 and the hash engine 104 may exchange electronic communications over one or more networks or may otherwise exchange communications, such as via one or more wired or wireless connections. As used herein, the term "engine" refers to a set of computing / program instructions that, when executed on a data processing device (e.g., a processor), results in the performance of a particular operation associated with the underlying component (e.g., the quantum information transformation engine or the hash engine).

[0031] The quantum information transformation engine 102 is configured to receive quantum information as an input 106. The quantum information may include data representing quantum objects, e.g., quantum circuits. The term "quantum circuit" is used herein to refer to a set of quantum logical operations that can be applied to a quantum system, e.g., a qubit register, prepared to a selected initial quantum state to perform a respective computation. The quantum circuit may represent a quantum algorithm, e.g., execution of the quantum circuit implements the quantum algorithm. Alternatively, the quantum circuit may represent a quantum state, e.g., execution of the quantum circuit evolves a selected initial quantum state to a particular quantum state. Alternatively, the quantum circuit may encode classical data.

[0032] The quantum information transformation engine 102 processes the quantum information input 106 to generate as output an irreversible binary string 110, which represents the quantum information input 106. For example, the quantum information transformation engine 102 can generate an initial quantum state vector, which represents the input quantum state to the quantum circuit. The quantum information transformation engine 102 can then use the initial quantum state vector to generate one or more evolved quantum state vectors, each evolved quantum state vector generated through application of a respective portion of the quantum circuit to the initial quantum state vector. In some implementations, the operations performed by the quantum information transformation engine 102 to generate the quantum state vectors can include only classical operations, as described below with reference to FIG. 2. In other implementations, the operations performed by the quantum information transformation engine 102 to generate the quantum state vectors can include classical operations and quantum computing operations, as described below with reference to FIG. 7.

[0033] The quantum information transformation engine 102 then repeatedly applies logical operations, such as XOR operations or other non-reversible operations, to the floating-point binary representations of the generated quantum state vectors to generate an irreversible binary string 110. Example operations performed by the quantum information transformation engine 102 are described in more detail below with reference to Figures 2-7.

[0034] The hash engine 104 is configured to receive the irreversible binary string 110 from the quantum information transformation engine 102 and apply a hash function to the irreversible binary string 110 to calculate a cryptographic hash digest 112 of the quantum information input 106. Example operations performed by the quantum hash engine 104 are described in more detail below with reference to Figures 2-7.

[0035] 2 is a flow chart of an example process 200 for generating a cryptographic hash digest of quantum information. For convenience, process 200 is described as being performed by a system that includes one or more classical computing devices located in one or more locations. For example, system 100 of FIG. 1, suitably programmed in accordance with this specification, can perform process 200.

[0036] The system obtains data representing a quantum circuit (step 202). As described above with reference to FIG. 1, in some implementations, the quantum circuit implements a quantum algorithm or prepares a target quantum state. In other implementations, the quantum circuit can encode a classical data input, such as any classical data that can be represented as a binary string. For example, the system can receive a classical data input and apply a quantum encoding technique to encode the classical data input as a quantum circuit, such as a quantum circuit with parameters determined by the classical data input. Exemplary quantum encoding techniques include basis encoding, amplitude encoding, angle encoding, instantaneous quantum polynomial (IQP) encoding, and Hamiltonian evolution ansatz encoding.

[0037] An example of a quantum circuit (quantum circuit 300) is shown in FIG. 3A and described below. In this example, quantum circuit 300 operates on three qubits (labeled q0, q1, and q2). However, this is for illustrative purposes only and quantum circuits can operate on fewer or more qubits. In general, the number of qubits on which a quantum circuit operates will depend on the complexity and / or size of the underlying data it represents, e.g., the underlying quantum algorithm and quantum states. Additionally, in this example, quantum circuit 300 includes four quantum logic gates: a first Hadamard gate 304 applied to a second qubit, q1; a first CNOT gate 306 applied to a third qubit, q2, and a second qubit, q1 (with the second qubit, q1, acting as a control); a second first CNOT gate 308 applied to the second qubit, q1, and a first qubit, q0; and a second Hadamard gate 310 applied to the first qubit, q0. However, this is for illustrative purposes only and a quantum circuit may include fewer or more quantum logic gates and may include different types of quantum logic gates. In general, the number of quantum logic gates and the types of quantum logic gates included in a quantum circuit will depend on the underlying data that the quantum circuit represents.

[0038] Returning to Figure 2, the system uses the data representing the quantum circuit (as received in step 202) to generate a number of quantum state vectors (step 204). A quantum state vector is a classical data object that represents a quantum state. Since the mathematical formalism of quantum mechanics is expressed by complex numbers, each quantum state vector is associated with a respective complex number (which includes a real part and an imaginary part).

[0039] The multiple quantum state vectors can include an initial quantum state vector and one or more evolved quantum state vectors. The initial quantum state vector can correspond to an input quantum state vector of the quantum circuit. That is, the data representing the quantum circuit can include data specifying input quantity states to the quantum circuit, which can be used as the initial quantum state vector. For example, the quantum state vector can have a length equal to the number of qubits on which the quantum circuit operates, and can include any initialized values, e.g., corresponding to qubits that have been reset or otherwise initialized.

[0040] Each evolved quantum state vector is defined as a quantum state vector generated by applying a respective portion of the quantum circuit to the initial quantum state vector. For example, the system can partition the quantum circuit into one or more portions in time using data representing the quantum circuit. Each evolved quantum state vector can then correspond to the evolution of the initial quantum state vector under each portion of the quantum circuit. The initial state vector and evolved state vector are now described with reference to Figures 3B and 3C.

[0041] Figure 3B illustrates an example initial quantum state vector 312 for the example quantum circuit 300 shown in Figure 3A. As discussed above, the initial quantum state vector 312 can represent the input quantum state vector ψ to the quantum circuit, and thus corresponds to a timestamp of t=0 (represented by the vertical dashed line 314).

[0042] Figure 3B also illustrates an example first evolved quantum state vector 316 for the example quantum circuit 300 shown in Figure 3A. The first evolved quantum state vector 316 corresponds to the evolution of the initial quantum state vector 312 by a first portion of the quantum circuit 300. In this example, the first portion of the quantum circuit includes a first Hadamard gate 304. The first evolved quantum state vector 316 of the quantum circuit corresponds to a time stamp of time t=1 (represented by the dashed vertical line 318) and is therefore labeled and referenced herein as ψ1.

[0043] 3C illustrates an example second evolved quantum state vector 320 for the example quantum circuit 300 shown in FIG. 3A. The second evolved quantum state vector 320 corresponds to the evolution of the initial quantum state vector ψ0 through a second portion of the quantum circuit 300, where in this example the second portion of the quantum circuit includes the first Hadamard gate 304 and the first CNOT gate 306 (i.e., the second portion of the quantum circuit includes the first portion of the quantum circuit). In other words, the second evolved quantum state vector 320 corresponds to the evolution of the first evolved quantum state vector ψ1 under the first CNOT gate 306. The second evolved quantum state vector 320 of the quantum circuit corresponds to a time stamp of time t=2 (represented by the vertical dashed line 322) and is therefore labeled and referred to herein as ψ2.

[0044] 3C also illustrates an example third evolved quantum state vector 324 for the example quantum circuit 300 illustrated in FIG. 3A. The third evolved quantum state vector 324 corresponds to the evolution of the initial quantum state vector ψ0 through a third portion of the quantum circuit 300, where in this example the third portion of the quantum circuit includes the first Hadamard gate 304, the first CNOT gate 306, and the second CNOT gate 308 (i.e., the third portion of the quantum circuit includes the second portion of the quantum circuit). In other words, the third evolved quantum state vector 324 corresponds to the evolution of the second evolved quantum state vector ψ2 under the second CNOT gate 308. The third evolved quantum state vector 322 of the quantum circuit corresponds to a time stamp of time t=3 (represented by the vertical dashed line 326), and is therefore labeled and referenced herein as ψ3.

[0045] 3C also illustrates an example final evolved quantum state vector 328 for the example quantum circuit 300 shown in FIG. 3A. The final evolved quantum state vector 328 corresponds to the evolution of the initial quantum state vector ψ0 through a fourth portion of the quantum circuit 300, where in this example the fourth portion of the quantum circuit corresponds to the entire quantum circuit (i.e., the fourth portion of the quantum circuit includes the third portion of the quantum circuit). In other words, the final evolved quantum state vector 328 corresponds to the evolution of the third evolved quantum state vector ψ3 under the second Hadamard gate 310. The final evolved quantum state vector 328 of the quantum circuit corresponds to a final timestamp at time t=f (represented by the vertical dashed line 330), and is thus referred to herein as ψ f Label and refer to it as .

[0046] In the example shown in Figures 3B and 3C, four evolution state vectors 316, 320, 324, and 328 are generated. However, this is for illustrative purposes only, and fewer or more evolution quantum state vectors can be generated. In general, increasing the number of evolution quantum state vectors generated at this stage of the process increases the search space of the brute force attack and improves the avalanche effect of the hash digest generation. Furthermore, in the example shown in Figures 3B and 3C, the quantum circuit is partitioned (e.g., using timestamps represented by vertical dashed lines 314, 318, 322, 326, and 330) such that each partition contains one quantum logic gate. However, this is for illustrative purposes only, and generally each partition may contain multiple quantum logic gates (where quantum logic gates do not span different partitions).

[0047] Returning to Figure 2, the system applies a split operation to the initial quantum state vector and each evolved quantum state vector (step 206). For example, for each quantum state vector in the plurality of quantum state vectors, the real and imaginary parts of the quantum state vector may be identified, for example, by analyzing a complex number associated with the quantum state vector and applying a split operation that splits the complex number into a real part and an imaginary part. Further details of the split operation are described with reference to Figure 4 below. The system may then generate a floating point binary representation of the real part of the quantum state vector and a floating point binary representation of the imaginary part of the quantum state vector.

[0048] FIG. 4 illustrates an example of the application of a split operation to a quantum state vector (which may be used, for example, to split a quantum state vector into a real and an imaginary part, as described in step 206 of FIG. 2). In this example, the split operation is applied to the initial quantum state vector ψ0 shown in FIG. 3B, which is assumed to correspond to an input quantum state ψ0=|000〉. The initial quantum state vector |000〉 is split into a real part 402, which in this example has value 1.0, and an imaginary part 404, which in this example has value 0.0. The real and imaginary parts correspond to the weights of the real and imaginary parts of the quantum state vector. As another example, if the quantum state vector is JPEG2025022770000002.jpg1495 then both the real and imaginary parts are equal to 1 / √2.

[0049] The real part 402 and the imaginary part 404 are then converted to floating point binary to obtain a floating point binary representation of the real part 406 and a floating point binary representation of the imaginary part 408. In the example shown in Figure 4, the real part 402 and the imaginary part 404 of the quantum state vector were converted to double precision 64 bit IEEE 754 floating point, although other conversions, such as 32 bit conversions, could also be used.

[0050] Returning to Figure 2, the floating point binary representation of the real part of the quantum state vector and the floating point binary representation of the imaginary part of the quantum state vector are combined (step 208). For example, in some implementations, the floating point binary representation of the real part of the quantum state vector and the floating point binary representation of the imaginary part of the quantum state vector generated in step 206 may be concatenated to obtain a final floating point binary representation of the quantum state. In other implementations, the floating point binary representation of the real part of the quantum state vector generated in step 206 may be interleaved with the floating point binary representation of the imaginary part of the quantum state vector (as described and illustrated in connection with Figure 5) to obtain a final floating point binary representation of the quantum state vector.

[0051] Figure 5 illustrates an example of interleaving the floating point binary representation of the real part 406 and the floating point binary representation of the imaginary part 408 shown in Figure 4. In this example, individual bits of the floating point binary representations of the real part 406 and the imaginary part 408 are alternated to generate the final floating point binary representation of the quantum state vector 502. However, other interleaving strategies can be implemented, such as iteratively interleaving groups of bits from the floating point binary representations of the real part and the imaginary part to generate the final floating point binary representation of the quantum state vector.

[0052] Returning to Figure 2, the system iteratively applies a logical operation, e.g., an XOR operation, to the floating-point binary representations of the initial quantum state vector and the evolved quantum state vector to obtain a binary string (step 210). For example, in some implementations, the system may perform step 210 directly after step 204, e.g., to directly generate a floating-point binary representation of each quantum state and apply the XOR operation accordingly. In other implementations, the system may perform steps 206 and 208 to generate concatenated, i.e., interleaved, floating-point binary representations of the quantum state vectors and apply the XOR operation accordingly.

[0053] In a first iteration, the system may apply a first XOR operation between a floating point binary representation of the initial quantum state vector and a floating point binary representation of the first evolved quantum state vector. Then, in each subsequent iteration, the system may apply an XOR logical operation between the output of the previous iteration and a floating point binary representation of the current evolved quantum state vector for the previous iteration. In other words, the system may: JPEG2025022770000003.jpg1362 can be calculated iteratively, where X i is the binary string obtained at iteration i, and ψ i denotes the i-th quantum state vector, and X0 is set equal to ψ0. In some implementations, before applying the XOR operation, the floating-point binary representation of the quantum state vector can be encrypted, e.g., to enhance cyber-security.

[0054] An example sequence of iterative XOR operations 602 of the example electronic circuit 300 of FIG. 3A is described and illustrated with reference to FIG. 6. As shown in FIG. 6, before a first iteration, an initial binary string X0 is set equal to a floating-point binary representation of the initial quantum state vector ψ0 (e.g., a concatenated floating-point binary representation of the real and imaginary parts of the initial quantum state vector, or an interleaved floating-point binary representation of the real and imaginary parts of the initial quantum state vector). In the first iteration, a binary string for iteration X1 is calculated via application of an XOR operation to the initial binary string X0 and the first evolved quantum state vector ψ1 (e.g., a concatenated floating-point binary representation of the real and imaginary parts of the initial quantum state vector, or an interleaved floating-point binary representation of the real and imaginary parts of the initial quantum state vector). In the second iteration, the binary string for iteration X2 is computed via application of an XOR operation to the initial binary string X1 and the second evolved quantum state vector ψ2 (e.g., a concatenated floating-point binary representation of the real and imaginary parts of the initial quantum state vector, or an interleaved floating-point binary representation of the real and imaginary parts of the initial quantum state vector). This iterative application of the XOR operation computes the binary string X2 obtained in the previous iteration. (f-1) and the final evolution quantum state vector ψ f (e.g., the concatenated floating-point binary representations of the real and imaginary parts of the initial quantum state vector, or the interleaved floating-point binary representations of the real and imaginary parts of the initial quantum state vector) to produce a final binary string X f This is repeated until 604 is calculated.

[0055] Returning to Figure 2, the system applies a hash function to the binary string (obtained in step 210) to generate a cryptographic hash digest of the quantum circuit (step 212). The system can provide the hash digest for use in a variety of applications, such as verification and data identification. A process for generating a hash digest of quantum information and using the hash digest to verify an implementation of a quantum circuit is described below with reference to Figure 7. Examples of hash functions include the SHA family of functions, e.g., SHA-224, SHA-256, SHA-384, SHA-512, the BLAKE family of functions, Whirlpool functions, or weaker functions such as SHA-1 or MD-5.

[0056] In some implementations, the system may perform additional operations on the generated hash digest to enhance the security of the hash digest, for example by applying quantum fingerprinting techniques described in U.S. patent application Ser. No. 18 / 229,930, the entire contents of which are incorporated by reference.

[0057] 7 is a conceptual block diagram of an example process for using a hash digest of quantum information to verify an implementation of a quantum circuit. The example process 700 is performed between a client 702 and a quantum computing server 704. The client 702 includes a client classical processor 702a configured to perform classical computations to generate a cryptographic hash digest of the quantum information, for example, according to the example process 200 of FIG.

[0058] For example, client 702 may be designing a quantum circuit 702b, e.g., to implement a particular quantum algorithm, prepare a particular quantum state, or encode hermetic classical or quantum data. In some implementations, client 702 may not have direct access to a quantum computer or may not have direct access to a quantum computer with the processing capabilities to execute quantum circuit 702b. Thus, client 702 may require the use of a separate quantum computing server / computer / platform, quantum computing server 704, to execute quantum circuit 702b.

[0059] As shown in FIG. 7, in some implementations, the quantum computing server 704 includes a server classical processor 704a in data communication with a server quantum computing device 704b. For convenience, the server classical processor 704a and the server quantum computing device 704b are illustrated as separate entities. However, in some implementations, the classical processor 704a can be included in the quantum computing device 604b. That is, the quantum computing device 704b can include components that perform classical computing operations. The client classical processor 702a and the server classical processor 704a or the server quantum computing device 704b can exchange electronic communications over one or more networks, or can exchange communications in another form, such as one or more wired or wireless connections.

[0060] The server quantum computing device 704b is configured to perform quantum computations. Quantum computations can proceed by initializing a system of physical qubits to a selected initial quantum state and applying a quantum circuit, such as a sequence of quantum logic gates, to the initial state. The quantum logic gates can be implemented by applying control signals generated by a control and measurement system to the qubits and couplers that allow interaction between the qubits. The quantum computation can be completed by measuring the states of the qubits using the respective control signals, e.g., quantum measurables. The server classical processor 704a is configured to perform classical operations, including, e.g., processing instructions to execute within the control and measurement system of the quantum computing device 704b, and post-processing the measured qubit states to determine the quantum computation result.

[0061] In stage (A) of an example process 700 for using a hash digest of quantum information to verify an implementation of a quantum circuit, a client 702 calculates a cryptographic hash digest 702c of its quantum circuit 702b. For example, the client 702 can use the client's classical processor 702a to implement operations according to the example process 200 of FIG. 2 to calculate the cryptographic hash digest 702c.

[0062] In stage (B) of the example process 700, the client sends a request to the quantum computing server 704. The request includes data representing the quantum circuit 702b and instructs the quantum computing server 704 to perform a quantum computation by executing the quantum circuit 702b on a particular initial quantum state of the quantum system. The request may also instruct the quantum computing server 704 to implement a variation of the example process of FIG. 2 to implement a cryptographic hash digest of the quantum circuit 702b. For example, one or more evolving quantum state vectors are generated via physical measurements of the quantum system rather than classical computation. The request may also instruct the quantum computing server 704 to return the computed hash digest to the client 702 along with the results of the performed quantum computation.

[0063] At stage (C) of the example process 700, the quantum computing server 704 receives the request sent by the client 702 at stage (B) and performs the requested quantum computation. In performing the requested quantum computation, the quantum computing server 704 may perform additional quantum computations, e.g., measurements, to generate and store an evolved quantum state vector according to the request sent by the client 702 at stage (B). At stage (D) of the example process 700, the quantum computing server 704 sends the quantum computation result to the client 702.

[0064] At stage (E) of the example process 700, the quantum computing server 704 implements a variation of the example process 200 of FIG. 2 to calculate a cryptographic hash digest of the quantum circuit implemented at stage (C). That is, the quantum computing server 704 may perform steps 206-212 of the example process 200 using the evolved quantum state vector measured and stored at stage (C) to generate the hash digest. At stage (F) of the example process 700, the quantum computing server 704 sends the hash digest to the client 702.

[0065] In stage (G) of the example process 700, the client 702 verifies the quantum computation result by comparing the hash digest 702c generated in stage (A) with the hash digest sent from the quantum computing server 704 in stage (F). The client 702 can determine whether the hash digests match. In response to determining that the hash digests match, the client 702 can verify that the quantum computation was performed as intended, e.g., without any modification or tampering (which may be performed by the quantum computing server 704 or an adversary third party). In response to determining that the hash digests do not match, the client 702 can discard the quantum computation result received in stage (D).

[0066] The example process 700 is applicable in a variety of settings. For example, the client 702 may be a pharmaceutical company that designs quantum algorithms and / or circuits for improved (e.g., optimal) drug discovery. In this case, the client 702 seeks to ensure that the quantum computing server 704 correctly implements the quantum algorithms and / or circuits, because otherwise the results of the computations will be compromised, e.g., suboptimal.

[0067] 8 is a schematic diagram of an exemplary general-purpose classical processor system 800. System 800 can be used for classical computing in accordance with some implementations described herein. System 800 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, mobile devices, and other suitable computers. The components, their connections and relationships, and functions illustrated herein are merely exemplary and are not intended to limit the implementation of the invention(s) described and / or claimed herein.

[0068] The system 800 includes a processor 810, a memory 820, a storage device 830, and an input / output device 840. The components 810, 820, 830, and 820 are interconnected using a system bus 850. The processor 810 enables the processing of instructions within the system 800. In one implementation, the processor 810 is a single-threaded processor. In another implementation, the processor 810 is a multi-threaded processor. The processor 810 may be capable of processing instructions stored in the memory 820 or the storage device 830 to display graphical information for a user interface on the input / output device 840.

[0069] The memory 820 stores information within the system 800. In one implementation, the memory 820 is a computer-readable medium. In one implementation, the memory 820 is a volatile memory unit. In another implementation, the memory 820 is a non-volatile memory unit.

[0070] The storage device 830 may be capable of providing mass storage to the system 800. In one implementation, the storage device 830 is a computer-readable medium. In various different implementations, the storage device 830 may be a floppy disk device, a hard disk device, an optical disk device, or a tape device.

[0071] The I / O device 840 provides input and output operations to the system. In one implementation, the I / O device 840 includes a keyboard and / or a pointing device. In another implementation, the I / O device 840 includes a display unit for displaying a graphical user interface.

[0072] 9 is a block diagram of an example quantum computing device 900. The quantum computing device 900 can be used to perform quantum computing operations according to some implementations described herein. The quantum computing device 900 is intended to represent various forms of quantum computing devices. The components, their connections and relationships, and their functions shown herein are merely exemplary and are not intended to limit the implementation of the invention(s) described and / or claimed herein.

[0073] Quantum computing device 900 includes a qubit assembly 910 and a control and measurement system 920. The qubit assembly includes a plurality of qubits, e.g., qubits 912, that are used in algorithmic operations or quantum computations. The qubits shown in FIG. 9 are arranged in a rectangular array, which is a schematic representation and is not intended to be limiting. The qubit assembly 910 also includes adjustable coupling elements, e.g., couplers 914, that allow for interaction between the coupled qubits. In the schematic diagram of FIG. 9, each qubit is adjustably coupled to four neighboring qubits by respective coupling elements. However, this is an example arrangement of qubits and couplers, and other arrangements are possible, including non-rectangular arrangements, arrangements that allow coupling between non-adjacent qubits, and arrangements that include adjustable coupling between three or more qubits.

[0074] Each qubit may be a two-level quantum system or device, with levels representing a logical value of 0 and a logical value of 1. The specific physical implementation of the qubits and how they interact will depend on a variety of factors, including the type of quantum computing device 900 or the type of quantum computation performed by the quantum computing device 900. For example, in an atomic quantum computer, the qubits may be implemented via atoms, molecules, or solid-state quantum systems, such as hyperfine atomic states. As another example, in a superconducting quantum computer, the qubits may be implemented via superconducting qubits or semiconductor qubits, such as superconducting transmon states. As another example, in an NMR quantum computer, the qubits may be implemented via nuclear spin states.

[0075] In some implementations, a quantum computation can proceed by initializing the qubits to selected initial states and applying a sequence of quantum logic gates to the qubits. Examples of quantum logic gates include one-qubit gates, e.g., Pauli-X, Pauli-Y, Pauli-Z (also referred to as X, Y, Z), Hadamard gates, S gates, two-qubit gates, e.g., control-X, control-Y, control-Z (also referred to as CX, CY, CZ), gates containing three or more qubits, e.g., Toffoli gates, etc. The quantum logic gates can be implemented by applying control signals 932 generated by the control and measurement system 920 to the qubits and couplers.

[0076] For example, in some implementations, the qubits of the qubit assembly 910 are frequency tunable. In these examples, each qubit can have an associated operating frequency that is tunable by applying a voltage pulse through one or more drive lines coupled to the qubit. Examples of operating frequencies include a qubit idle frequency, a qubit interaction frequency, and a qubit readout frequency. Different frequencies correspond to different operations that the qubit can perform. For example, a qubit can be placed in a state where it does not strongly interact with other qubits by setting the operating frequency to a corresponding idle frequency, where it can be used to perform single qubit gates. As another example, when the qubits interact through fixed-coupled couplers, the qubits can be configured to interact with each other by setting their respective operating frequencies to several gate-dependent frequencies that are detuned from the common interaction frequency. In other cases, for example, when the qubits interact through tunable couplers, the qubits can be configured to interact with each other by setting the parameters of the individual couplers to allow interaction between the qubits, and then setting each of the qubits' operating frequencies to several gate-dependent frequencies that are detuned from the common interaction frequency. Such interactions can be performed to implement multi-qubit gates.

[0077] The type of control signal 932 used depends on the physical implementation of the qubit, for example, the control signal may include an RF or microwave pulse in an NMR or superconducting quantum computer system, or an optical pulse in an atomic quantum computer system.

[0078] A quantum computation can be completed by measuring the state of the qubit using a quantum measurable, such as Z, using a respective control signal 934. The measurement causes a readout signal 934 representing the measurement result to be sent back to the measurement and control system 920. The readout signal 934 may include an RF, microwave, or optical signal, depending on the physics of the quantum computing device 900 and / or the qubits. For convenience, the control signals 932 and readout signals 934 shown in FIG. 9 are shown as addressing only selected elements of the qubit assembly (i.e., the top and bottom rows), however, in operation, the control signals 932 and readout signals 934 may be addressable to each element of the qubit assembly 910.

[0079] As discussed above, control and measurement system 920 is one example of a classical computer system that may be used to perform various operations on qubit assembly 910. Control and measurement system 920 includes one or more classical processors, such as classical processor 922, one or more memories, such as memory 924, and one or more I / O units, such as I / O unit 926, connected by one or more data buses, such as bus 926. Control and measurement system 920 may be programmed to send sequences of control signals 932 to the qubit assembly, e.g., to perform a selected sequence of quantum gate operations, and to receive sequences of read signals 934 from the qubit assembly, e.g., as part of performing a measurement operation.

[0080] The processor 922 is configured to process instructions for execution within the control and measurement system 920. In some implementations, the processor 922 is a single-threaded processor. In other implementations, the processor 922 is a multi-threaded processor. The processor 922 is capable of processing instructions stored in the memory 924.

[0081] The memory 924 stores information within the control and measurement system 920. In some implementations, the memory 924 includes a computer-readable medium, a volatile memory unit, and / or a non-volatile memory unit. In some cases, the memory 924 can include a storage device capable of providing mass storage for the system 920, such as a hard disk drive, an optical disk drive, a storage device shared by multiple computing devices over a network (e.g., cloud storage), and / or some other mass storage device.

[0082] The input / output devices 926 provide input and output operations to the control and measurement system. The input / output devices 926 can include D / A converters, A / D converters, and RF / microwave / optical signal generators, transmitters, and receivers to send control signals 932 to and receive read signals 934 from the qubit assemblies as appropriate for the physics of the quantum computer. In some implementations, the input / output devices 926 can also include one or more network interface devices, such as an Ethernet card, serial communication devices, such as an RS-232 port, and / or wireless interface devices, such as an 802.11 card. In some implementations, the input / output devices 926 can also include driver devices configured to receive input data and send output data to other external devices, such as a keyboard, printer, display device, etc.

[0083] Although an exemplary control and measurement system 920 is shown in FIG. 9, implementations of the subject matter and functional operations described herein can be implemented in other types of digital electronic circuitry, or computer software, firmware, or hardware, including the structures disclosed herein and their structural equivalents, or any combination of one or more of them.

[0084] The implementation of the digital and / or quantum subject matter and digital functional and quantum operations described herein may be implemented in digital electronic circuitry, suitable quantum circuitry, or more generally in a quantum computing system, physically embodied digital and / or quantum computer software or firmware, digital and / or quantum computer hardware including the structures disclosed herein and their structural equivalents, or any combination of one or more thereof. The term "quantum computing device" may include, but is not limited to, a quantum computer, a quantum information processing system, a quantum cryptography system, or a quantum simulator.

[0085] Implementations of the digital and / or quantum subject matter described herein may be implemented as one or more digital and / or quantum computer programs, i.e., one or more modules (or engines) of digital and / or quantum computer program instructions encoded on a tangible, non-transitory storage medium for execution by or for controlling the operation of a data processing device. The digital and / or quantum computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory device, one or more quantum bits, or one or more combinations thereof. Alternatively or additionally, the program instructions may be encoded into an artificially generated propagated signal capable of encoding digital and / or quantum information, such as, for example, a machine-generated electrical, optical, or electromagnetic signal generated to encode digital and / or quantum information for transmission to a suitable receiving device for execution by a data processing device.

[0086] The terms quantum information and quantum data refer to information or data carried, held, or stored by a quantum system. Here, the smallest non-trivial system is a qubit, a system that defines a quantum information unit. The term "qubit" encompasses all quantum systems that can be appropriately approximated as a two-level system in the corresponding context. Such quantum systems may include multi-level systems, for example having more than two levels. By way of example, such systems may include atoms, electrons, photons, ions, or superconducting qubits. In many implementations, the states underlying the computation are identified as a ground state and a first excited state, although it will be appreciated that other configurations are possible in which the computational states are identified as excited states of higher levels.

[0087] The term "data processing apparatus" refers to hardware for digital and / or quantum data processing and encompasses any type of apparatus, device, and machine for processing digital and / or quantum data. Examples include programmable digital processors, programmable quantum processors, digital computers, quantum computers, multiple digital and quantum processors or computers, and combinations thereof. The apparatus may be or may further include special purpose logic circuits, such as field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), or quantum simulators, which are quantum data processing apparatus designed to simulate or generate information about specific quantum systems. In particular, quantum simulators are special purpose quantum computers that do not have general quantum computing capabilities. In addition to hardware, the apparatus may optionally include code that creates an execution environment for digital and / or quantum computer programs, such as processor firmware, protocol stacks, database management systems, code that constitutes an operating system, or one or more combinations thereof.

[0088] A digital computer program, also referred to as a program, software, software application, module, software module, script, or code, can be written in any type of programming language, including compiled or interpreted, or declarative or procedural, and can be deployed in any form, whether as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a digital computing environment. A quantum computer program, also referred to as or described as a program, software, software application, module, software module, script, or code, can be written in any type of programming language, including compiled or interpreted, or declarative or procedural, and can be translated into a suitable quantum programming language or written in a quantum programming language, such as QCL, Quipper, etc.

[0089] The digital and / or quantum computer program may, but need not, correspond to a file in a file system. The program may be stored as part of a file containing other programs and data, such as one or more scripts stored in a markup language document, a single file dedicated to the program in question, or multiple associated files, such as files storing one or more modules, subprograms, or code portions. The digital and / or quantum computer program may be deployed to run on one digital computer, or on one quantum computer, or on multiple digital and / or quantum computers located at one site or distributed across multiple sites and interconnected by a digital and / or quantum data communication network. A quantum data communication network is understood to be a network capable of transmitting quantum data using quantum systems such as qubits. Generally, digital data communication networks cannot transmit quantum data, but quantum data communication networks can transmit both quantum data and digital data.

[0090] The processes and logic flows described herein may be performed by one or more programmable digital and / or quantum computers operating on one or more digital and / or quantum processors that execute one or more digital and / or quantum computer programs, as appropriate, to perform functions by manipulating input digital and quantum data to generate output. The processes and logic flows may also be performed by, and apparatus may be so implemented as, special purpose logic circuitry, such as an FPGA or ASIC, or a quantum simulator, or a combination of special purpose logic circuitry or quantum simulators with one or more programmed digital and / or quantum computers.

[0091] When one or more digital and / or quantum computer systems are "configured" to perform a particular operation or action, it means that the system has software, hardware, or a combination thereof installed thereon that, when operated, causes the system to perform the operation or action. When one or more digital and / or quantum computer programs are configured to perform a particular operation or action, it means that one or more programs contain instructions that, when executed on a digital and / or quantum data processing device, cause the device to perform the operation or action. A quantum computer can also receive instructions from a digital computer that, when executed on the quantum computing device, causes the device to perform the operation or action.

[0092] A digital and / or quantum computer suitable for executing a digital and / or quantum computer program can be based on general purpose or application specific digital and / or quantum processors, or both, or on any kind of central digital and / or quantum processing unit. In general, the central digital and / or quantum processing unit receives instructions and digital and / or quantum data from a read-only memory, a random access memory, or a quantum system suitable for transmitting quantum data such as photons, or a combination thereof.

[0093] The essential elements of a digital and / or quantum computer are a central processing unit for carrying out or executing instructions and one or more memory devices for storing instructions and digital and / or quantum data. The central processing unit and memory may be supplemented by or incorporated in special purpose logic circuits or quantum simulators. Typically, a digital and / or quantum computer also includes or is operatively coupled to one or more mass storage devices, e.g., magnetic disks, magneto-optical disks, optical disks, for storing digital and / or quantum data, or a quantum system suitable for storing quantum information, for receiving digital and / or quantum data therefrom, transferring digital and / or quantum data thereto, or both. However, it is not necessary for a digital and / or quantum computer to have such devices.

[0094] Digital and / or quantum computer readable media suitable for storing digital and / or quantum computer program instructions and / or digital and / or quantum data include all forms of non-volatile digital and / or quantum memories, media, and / or memory devices, examples of which include semiconductor memory devices such as EPROMs, EEPROMs, flash memory devices, magnetic disks such as internal hard disks or removable disks, magneto-optical disks, CD-ROM and DVD-ROM disks, and quantum systems such as trapped atoms and electrons. Quantum memory is understood to be a device capable of storing quantum data with high fidelity and efficiency for long periods of time, such as a light-matter interface where light is used for transmission and matter is used to store and preserve the quantum characteristics of the quantum data, such as superposition and quantum coherence.

[0095] Control of the various systems described herein, or portions thereof, may be implemented in a digital and / or quantum computer program product stored on one or more non-transitory machine-readable storage media and including instructions executable on one or more digital and / or quantum processing devices. The systems described herein, or portions thereof, may each be implemented as an apparatus, method, or system, which may include one or more digital and / or quantum processing devices, and a memory storing executable instructions for performing the operations described herein.

[0096] Although the present specification contains many details of specific implementations, these should not be considered as limiting the scope of the claims, but rather as a description of features specific to a particular implementation. Certain features described in the present specification in the context of separate implementations can also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation can also be implemented in multiple implementations separately or in any suitable subcombination. Furthermore, even if features are described above as acting in a particular combination and are initially claimed as such, one or more features from a claimed combination can be excluded from the combination in some cases, and the claimed combination can also be directed to a subcombination or a variation of the subcombination.

[0097] Similarly, although operations are shown in a particular order in the figures, this should not be construed as requiring that such operations be performed in the particular order or hierarchy shown, or that all of the illustrated operations be performed, to achieve desired results. In certain circumstances, multitasking and parallel processing may also be advantageous. Moreover, it should be understood that the separation of various system modules and components in the above implementations should not be understood as requiring such separation in all implementations, and that the described program elements and systems may generally be integrated into a single software product or packaged into multiple software products.

[0098] Particular implementations of the present subject matter have been described. Other implementations are within the scope of the following claims. For example, the actions recited in the claims can be performed in a different order to achieve desirable results. By way of example, the processes depicted in the accompanying figures do not necessarily require the particular order or hierarchy shown to achieve desirable results. In some cases, multitasking and parallel processing may also be advantageous.

Claims

1. obtaining data representative of a quantum circuit; generating an initial quantum state vector, the initial quantum state vector comprising an input quantum state vector for the quantum circuit; generating one or more evolved quantum state vectors using the initial quantum state vector, each evolved quantum state vector being generated by applying a respective portion of the quantum circuit to the initial quantum state vector; applying logical operations iteratively to the floating point binary representations of the initial and evolved quantum state vectors to obtain a binary string; applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit; 4. A computer-implemented method comprising:

2. applying logical operations iteratively to a floating point binary representation of the quantum state vector to obtain a binary string, applying, in a first iteration, a first logical operation between a floating point binary representation of the initial quantum state vector and a floating point binary representation of a first evolved quantum state vector; at each iteration after the first iteration, applying a logical operation between an output of a previous iteration and a floating point binary representation of a current evolved quantum state vector for that iteration; The method of claim 1 , comprising:

3. The method of claim 1 , wherein the logical operation comprises an XOR operation.

4. For each quantum state vector, identifying a real part and an imaginary part of the quantum state vector; generating a floating point binary representation of the real part of the quantum state vector and a floating point binary representation of the imaginary part of the quantum state vector; The method of claim 1 further comprising:

5. 4. The method of claim 3, wherein identifying the real and imaginary parts of the quantum state vector comprises: analyzing a complex number associated with the quantum state vector; and applying a divide operation to divide the complex number into a real part and an imaginary part.

6. For each quantum state vector, concatenating the floating point binary representation of the real part of the quantum state vector and the floating point binary representation of the imaginary part of the quantum state vector; 3. The method of claim 2 , wherein iteratively applying the logical operations to the floating-point binary representations of the quantum state vectors to obtain the binary string comprises iteratively applying the logical operations to concatenated floating-point binary representations of the quantum state vectors.

7. For each quantum state vector, interleaving the floating point binary representation of the real part of the quantum state vector and the floating point binary representation of the imaginary part of the quantum state vector; 3. The method of claim 2 , wherein iteratively applying the logical operations to the floating point binary representations of the quantum state vectors to obtain the binary string comprises iteratively applying the logical operations to the interleaved floating point binary representations of the quantum state vectors.

8. 2. The method of claim 1, further comprising encrypting the floating point binary representation of the quantum state vector prior to applying the logical operation.

9. 2. The method of claim 1, further comprising dividing the quantum circuit in time into one or more portions, each evolved quantum state vector corresponding to an evolution of the initial quantum state vector under a respective portion of the quantum circuit.

10. The method of claim 1 , wherein the quantum circuit implements a quantum algorithm or prepares a target quantum state.

11. receiving a classical data input; encoding said classical data input as a quantum circuit; The method of claim 1 further comprising:

12. The method of claim 1 , wherein generating the one or more evolved quantum state vectors comprises performing classical computation.

13. For quantum computing servers, executing the quantum circuit with an initial quantum state corresponding to the initial quantum state vector; computing a cryptographic hash digest of the quantum circuit using the measured evolved quantum state vector; sending a request to the quantum computing server instructing the server to: receiving, from the quantum computing server, a result of the quantum circuit execution and the cryptographic hash digest; verifying the result of execution of the quantum circuit using the cryptographic hash digest computed by the quantum computing server; The method of claim 1 further comprising:

14. A system comprising one or more computers and one or more storage devices, The storage device, when executed by the one or more computers, causes the one or more computers to obtaining data representative of a quantum circuit; generating an initial quantum state vector, said initial quantum state vector comprising an input quantum state vector for said quantum circuit; generating one or more evolved quantum state vectors using the initial quantum state vector, each evolved quantum state vector being generated by applying a respective portion of the quantum circuit to the initial quantum state vector; applying logical operations iteratively to the floating point binary representations of the initial and evolved quantum state vectors to obtain a binary string; applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit; 4. A system comprising: a computer-implemented programmable controller configured to:

15. A computer-readable storage medium having stored thereon instructions, comprising: The instructions are executable by a processor and, when executed, cause the processor to: obtaining data representative of a quantum circuit; generating an initial quantum state vector, said initial quantum state vector comprising an input quantum state vector for said quantum circuit; generating one or more evolved quantum state vectors using the initial quantum state vector, each evolved quantum state vector being generated by applying a respective portion of the quantum circuit to the initial quantum state vector; applying logical operations iteratively to the floating point binary representations of the initial and evolved quantum state vectors to obtain a binary string; applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit; 2. A computer-readable storage medium operable to cause a computer to perform the operations comprising:

16. 1. A method performed by a quantum computing device, comprising: obtaining data specifying a quantum computation, the data including data representing a quantum circuit, an initial quantum state of a quantum system, and instructions for computing a cryptographic hash digest of the quantum circuit; applying the quantum circuit to the initial quantum state of the quantum system to perform the quantum computation, the quantum computation comprising generating one or more evolved quantum state vectors in accordance with instructions for computing the cryptographic hash digest of the quantum circuit, wherein generating each evolved quantum state vector comprises applying a respective portion of the quantum circuit to the initial quantum state; iteratively applying logical operations to a floating point binary representation of the initial quantum state and the one or more evolved quantum state vectors to obtain a binary string; applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit; A method comprising:

17. 17. The method of claim 16, wherein the data specifying a quantum computation is received from a client device, the method further comprising transmitting a result of the quantum computation and the cryptographic hash digest of the quantum circuit to the client device.

18. One or more classical processors; Quantum computing hardware and A system comprising: obtaining data specifying a quantum computation, the data including data representing a quantum circuit, an initial quantum state of a quantum system, and instructions for computing a cryptographic hash digest of the quantum circuit; applying the quantum circuit to the initial quantum state of the quantum system to perform the quantum computation, the quantum computation comprising generating one or more evolved quantum state vectors in accordance with instructions for computing the cryptographic hash digest of the quantum circuit, wherein generating each evolved quantum state vector comprises applying a respective portion of the quantum circuit to the initial quantum state; iteratively applying logical operations to a floating point binary representation of the initial quantum state and the one or more evolved quantum state vectors to obtain a binary string; applying a hash function to the binary string to obtain a cryptographic hash digest of the quantum circuit; 23. A system configured to perform operations including:

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