Semiconductor device, electronic equipment and method for manufacturing semiconductor device
Patent Information
- Application Number
- JP2023140242
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-30
- Publication Date
- 2025-03-13
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Figure 2025034080000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device, an electronic device, and a method for manufacturing a semiconductor device. [Background technology]
[0002] In a typical semiconductor device, for example, a guard ring is formed outside a design area where a designer designs a chip (see, for example, Patent Document 1). The guard ring has the role of suppressing moisture absorption inside the chip. Therefore, in addition to the design area, the guard ring width (the length from the inner circumferential surface to the outer circumferential surface of the guard ring) contributes to the chip size (the size of the semiconductor device). [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2015-216334 A Summary of the Invention [Problem to be solved by the invention]
[0004] As mentioned above, the width of the guard ring contributes to the chip size. In addition, when a semiconductor device has pads, the designer must design the pads while taking into consideration various design rules, which limits the chip size. For these reasons, it is difficult to reduce the chip size while suppressing moisture absorption.
[0005] In view of this, the present disclosure proposes a semiconductor device, an electronic device, and a method for manufacturing a semiconductor device that can achieve miniaturization while suppressing moisture absorption. [Means for solving the problem]
[0006] A semiconductor device according to one embodiment of the present disclosure comprises a substrate, a pad provided outside a predetermined region of the substrate in a planar view, and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, the guard ring preventing moisture from entering.
[0007] An electronic device according to one embodiment of the present disclosure includes a semiconductor device having a substrate, a pad provided outside a predetermined region of the substrate in a planar view, and a guard ring provided on the substrate positioned directly below the pad in a planar view and surrounding the predetermined region, the guard ring preventing moisture from entering.
[0008] A manufacturing method for a semiconductor device according to one embodiment of the present disclosure includes providing a pad outside a predetermined region of the substrate in a planar view, and providing a guard ring on the substrate to prevent moisture from entering, positioned directly below the pad and surrounding the predetermined region in a planar view. [Brief description of the drawings]
[0009] [Figure 1] FIG. 1 is a diagram illustrating an example of the configuration of an imaging device according to an embodiment of the present disclosure. [Diagram 2] 1 is a plan view illustrating a configuration example of an imaging device according to Example 1 of an embodiment of the present disclosure. [Diagram 3] 1 is a cross-sectional view showing a configuration example of an imaging device according to Example 1 of an embodiment of the present disclosure. [Figure 4] 1 is a plan view showing a configuration example of an imaging device according to a first comparative example of the embodiment of the present disclosure. [Diagram 5] 1 is a cross-sectional view showing a configuration example of an imaging device according to a first comparative example of the embodiment of the present disclosure. [Figure 6] FIG. 11 is a plan view illustrating a configuration example of an imaging device according to Example 2 of the embodiment of the present disclosure. [Figure 7] FIG. 11 is a cross-sectional view showing a configuration example of an imaging device according to Example 2 of the embodiment of the present disclosure. [Figure 8] FIG. 11 is a cross-sectional view showing a configuration example of an imaging device according to Example 3 of the embodiment of the present disclosure. [Figure 9] 1A to 1C are diagrams for explaining a manufacturing method of an imaging device according to an embodiment of the present disclosure. [Figure 10] 1A to 1C are diagrams for explaining a manufacturing method of an imaging device according to an embodiment of the present disclosure. [Figure 11] 1A to 1C are diagrams for explaining a manufacturing method of an imaging device according to an embodiment of the present disclosure. [Figure 12] 1A to 1C are diagrams illustrating an application example in which an imaging device according to any one of Examples 1 to 3 of an embodiment of the present disclosure is used. [Figure 13] FIG. 13 is a diagram illustrating a configuration example of an imaging device according to an application example. [Figure 14] FIG. 13 is a diagram illustrating a configuration example of a distance measuring device according to an application example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the embodiments do not limit the devices, equipment, methods, etc. related to the present disclosure. In addition, in the following embodiments, the same reference numerals are used to basically designate the same parts, and redundant explanations will be omitted. The following embodiments also include examples and modified examples.
[0011] One or more of the following embodiments can be implemented independently. On the other hand, at least a part of the following embodiments may be implemented in appropriate combination with at least a part of other embodiments. These embodiments may include novel features different from each other. Therefore, each embodiment may contribute to solving different purposes or problems, and may have different effects. Note that the effects in each embodiment are merely examples and are not limited to the above, and other effects may also be provided.
[0012] The present disclosure will be described in the following order. 1. Embodiment 1-1. Example of imaging device configuration 1-2. Example of imaging device 1-2-1. Example 1 1-2-2. Comparative Example 1 Example 2 Example 3 1-3. Example of manufacturing method for imaging device 1-4. Actions and Effects 2. Other embodiments 3. Application Examples 3-1. Imaging device 3-2. Distance measuring device 4. Notes
[0013] <1. Embodiment> <1-1. Configuration example of imaging device> An example of the configuration of an imaging device 10 according to this embodiment will be described with reference to Fig. 1. Fig. 1 is a diagram showing an example of the configuration of an imaging device 10 according to this embodiment. The imaging device 10 is an example of a semiconductor device.
[0014] 1, the imaging device 10 includes a pixel array section 11, a vertical drive section 12, a column signal processing section 13, and a control section 14. The imaging device 10 is, for example, a solid-state imaging device that generates image data of a subject.
[0015] The pixel array section 11 is configured by arranging a plurality of pixels 100. In the example of Fig. 1, the pixels 100 are arranged in a two-dimensional matrix. The pixels 100 include a photoelectric conversion section that performs photoelectric conversion of incident light, and generate an image signal of a subject based on the irradiated incident light. For example, a photodiode can be used as the photoelectric conversion section.
[0016] A signal line 15 and a signal line 16 are connected to each pixel 100. The pixel 100 generates an image signal under the control of a control signal transmitted by the signal line 15, and outputs the generated image signal to the column signal processing unit 13 via the signal line 16. The signal line 15 is arranged for each row of the two-dimensional matrix, and is commonly connected to the multiple pixels 100 arranged in one row. The signal line 16 is arranged for each column of the two-dimensional matrix, and is commonly connected to the multiple pixels 100 arranged in one column.
[0017] The vertical driving unit 12 generates a control signal for the pixel 100. The vertical driving unit 12 generates a control signal for each row of the two-dimensional matrix of the pixel array unit 11, and outputs the generated control signal to each pixel 100 via each signal line 15.
[0018] The column signal processing unit 13 processes image signals generated by the pixels 100. The column signal processing unit 13 simultaneously processes image signals transmitted from each of the pixels 100 arranged in one row of the pixel array unit 11 via the signal lines 16. Examples of this processing include analog-to-digital conversion for converting analog image signals generated by the pixels 100 into digital image signals, and correlated double sampling (CDS) for removing offset errors in the image signals. The processed image signals are output to an external circuit of the imaging device 10.
[0019] The control unit 14 controls the vertical drive unit 12 and the column signal processing unit 13. The control unit 14 generates control signals for controlling the vertical drive unit 12 and the column signal processing unit 13 based on data instructing a clock, an operation mode, and the like input from an external circuit, etc. The control unit 14 outputs a control signal to the vertical drive unit 12 via a signal line 17, and also outputs a control signal to the column signal processing unit 13 via a signal line 18, thereby controlling the vertical drive unit 12 and the column signal processing unit 13.
[0020] <1-2. Examples of imaging devices> The imaging devices 10 according to examples 1 to 3 of this embodiment will be described, and each of the imaging devices 10 according to examples 1 to 3 has the above-described configuration.
[0021] <1-2-1. Example 1> A configuration example of the imaging device 10 according to Example 1 of this embodiment will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a plan view showing the configuration example of the imaging device 10 according to Example 1 of this embodiment. Fig. 3 is a cross-sectional view (cross-sectional view along line Y1-Y1 in Fig. 2) showing the configuration example of the imaging device 10 according to Example 1 of this embodiment.
[0022] 2, the imaging device 10 has a substrate 20. The substrate 20 includes a pixel array section 11, a plurality of pads 30, and a guard ring 40. The substrate 20 may be, for example, a silicon substrate.
[0023] The pixel array section 11 is provided in the central region of the substrate 20 in a planar view. The central region is a predetermined region that is set in advance, for example, at the time of design, and includes the pixel array section 11 in a planar view. This predetermined region may be provided in a region other than the central region of the substrate 20 in a planar view. In the example of FIG. 2, the planar shape of the pixel array section 11 is rectangular. Note that the planar shape of the pixel array section 11 may be a shape other than a rectangle, and may be, for example, a square, an ellipse, a circle, or the like.
[0024] Each of the pads 30 functions as, for example, an electrode. These pads 30 are provided on the outer side of the substrate 20 than the pixel array section 11 in a plan view. In the example of FIG. 2, the pads 30 are arranged in a rectangular ring shape in a plan view so as to surround the pixel array section 11. In addition, in the example of FIG. 2, the planar shape of each of the pads 30 is, for example, rectangular. Note that the planar shape of each of the pads 30 may be a shape other than a rectangle, and may be, for example, a square, an ellipse, a circle, or the like. Each of the pads 30 is formed of, for example, a metal material such as aluminum.
[0025] The guard ring 40 prevents moisture from entering and prevents moisture absorption in the imaging device 10. The guard ring 40 prevents moisture from entering the pixel array section 11 of the substrate 20 from the outer peripheral surface of the substrate 20 in a plan view. In the example of FIG. 2, the guard ring 40 is positioned so as to pass directly under each pad 30 in a plan view and is provided so as to surround the pixel array section 11. The guard ring 40 has a rectangular ring shape in plan view. The guard ring 40 may have a ring shape other than a rectangle, for example, a square, elliptical, or circular ring shape. The guard ring 40 is made of a metal material such as copper. The metal material is an example of a material having moisture resistance.
[0026] 3, the substrate 20 has a first substrate layer 21 and a second substrate layer 22. The first substrate layer 21 includes a guard ring 40 and a wiring portion 50. The second substrate layer 22 includes each pad 30, a silicon layer 22a, and an oxide layer 22b. The substrate 20 is also called a wafer.
[0027] The substrate 20 includes a design area A1, a guard ring area A2, and a scribe area A3. The design area A1 is an area of the substrate 20 where a designer designs circuits, wiring, and the like (an area where a designer designs a chip). The design area A1 includes the central area described above. The guard ring area A2 is an area of the substrate 20 where a guard ring 40 is installed. The scribe area A3 is an area of the substrate 20 where the substrate 20 is cut by scribing. Scribing is a process of forming grooves for cutting in the substrate 20 using a diamond tool, a laser, or the like. In the example of FIG. 3, the substrate 20 in the scribe area A3 is indicated by a dotted line, and is actually removed by scribing (the same applies to other figures).
[0028] The substrate 20 also includes a pad opening region B1 and a silicon opening region B2. The pad opening region B1 is a region in the second substrate layer 22 where the oxide layer 22b does not exist in a planar view, i.e., a region of the exposed surface of the pad 30. The silicon opening region B2 is a region in the first substrate layer 21 where the silicon layer 22a does not exist in a planar view. The pad opening region B1 exists for each pad 30, and the silicon opening region B2 is a region having a rectangular ring shape in a planar view.
[0029] Each of the pads 30 has a connection via portion 30a. The connection via portion 30a connects the pad 30 and the wiring portion 50. The connection via portion 30a is formed of, for example, the same metal material as the pad 30. The silicon layer 22a includes the pixel array portion 11 and the like. The oxide layer 22b covers each of the pads 30 while exposing a portion of each of the pads 30.
[0030] The guard ring 40 is composed of multiple ring layers 40n (n=1, 2, 3, ...), where n is a positive integer. These ring layers 40n are stacked directly below the pad 30, and the guard ring 40, i.e., the guard ring region A2, is located directly below the pad 30. The guard ring region A2 is set within the design region A1, the silicon opening region B2, and further within the pad opening region B1.
[0031] Each ring layer 40n includes a plurality of dummy wiring layers 40m (m=1, 3, 5,...) and a plurality of wall layers 40p (p=2, 3, 6,...). m is a positive odd number, and p is a positive even number. The dummy wiring layers 40m are dummy wirings that are not used for transmitting signals. The dummy wiring layers 40m and the wall layers 40p are alternately stacked. The wall layers 40p function as via portions that connect the lower dummy wiring layer 40m and the upper dummy wiring layer 40m.
[0032] The dummy wiring layer 40m and the wall layer 40p each have a rectangular ring shape in plan view. The dummy wiring layer 40m and the wall layer 40p each may have a ring shape other than a rectangle, such as a square, ellipse, or circle. The dummy wiring layer 40m and the wall layer 40p each are formed of a metal material such as copper. The dummy wiring layer 40m and the wall layer 40p each may be formed of the same material or different materials.
[0033] Here, for example, the width from the inner peripheral surface to the outer peripheral surface of the guard ring 40 (the length in the left-right direction in FIG. 3) is smaller than the length from the inner end face to the outer end face of the pad 30 (the length in the left-right direction in FIG. 3), and is also smaller than the length from the inner side to the outer side of the exposed surface (the upper surface in FIG. 3) of the pad 30 (the length in the left-right direction in FIG. 3). The left-right direction is the planar direction of the substrate 20. The inner end face of the pad 30 is the inner end face of the substrate 20 in the pad 30, and the outer end face of the pad 30 is the outer end face of the substrate 20 in the pad 30. The inner side of the exposed surface of the pad 30 is the inner side of the substrate 20 in the exposed surface of the pad 30, and the outer side of the exposed surface of the pad 30 is the outer side of the substrate 20 in the exposed surface of the pad 30.
[0034] Between the ring layer 40n (dummy wiring layer 40m) which is the top layer of each ring layer 40n of the guard ring 40 and the pad 30, a via portion 40a for preventing moisture intrusion is provided. The planar shape of the via portion 40a is, for example, the same shape as each ring layer 40n (each dummy wiring layer 40m and each wall layer 40p) and is formed in a rectangular ring shape. The planar shape of the via portion 40a may be a ring shape other than a rectangle, for example, a square, ellipse, circle, or other ring shape.
[0035] The via portion 40a is formed of, for example, a metal material such as copper, or an oxide layer (oxide film) such as silicon oxide (silica). The oxide layer may be formed by, for example, BDTI (backside deep trench isolation). The via portion 40a may be formed of the same material as each ring layer 40n (each dummy wiring layer 40m and each wall layer 40p), or may be formed of a different material.
[0036] The wiring section 50 is composed of a plurality of wiring layers 50n (n=1, 2, 3, . . .). In the example of Fig. 3, the wiring section 50 is provided only directly below the pad 30, but in reality, wiring layers constituting the wiring section 50 are also provided in other locations within the design area A1 (for example, locations corresponding to the pixel array section 11, the vertical drive section 12, the column signal processing section 13, the control section 14, etc.).
[0037] The wiring layer 50n includes wiring and vias used for transmitting signals. The wiring layer 50n may also include various circuits. The wiring layer 50n is formed of a metal material such as copper, aluminum, or tungsten. The wiring layer 50n and the ring layer 40n may be formed in the same manufacturing process. When the wiring layer 50n and the ring layer 40n are formed in the same manufacturing process, the ring layer 40n is formed of the same material as the wiring layer 50n.
[0038] <1-2-2. Comparative Example 1> A configuration example of an imaging device 10A according to Comparative Example 1 of this embodiment will be described with reference to Fig. 4 and Fig. 5. Fig. 4 is a plan view showing the configuration example of the imaging device 10A according to Comparative Example 1 of this embodiment. Fig. 5 is a cross-sectional view (cross-sectional view along line Y2-Y2 in Fig. 4) showing the configuration example of the imaging device 10A according to Comparative Example 1 of this embodiment.
[0039] 4, in the imaging device 10A according to Comparative Example 1, the guard ring 40 is provided to surround the pads 30 arranged in a rectangular ring shape in a plan view. The planar shape of the guard ring 40 is formed in a rectangular ring shape.
[0040] The guard ring region A2 of Comparative Example 1 is not set within the design region A1, but is set outside the design region A1 of the substrate 20. Therefore, the size of the substrate 20 (imaging device 10) of Comparative Example 1 is larger than that of the substrate 20 (imaging device 10) of Example 1.
[0041] That is, according to the above-described first embodiment, the guard ring region A2 is set within the design region A1, and the guard ring region A2, i.e., the guard ring 40, is located directly below the pad 30. This allows the substrate 20 (imaging device 10) of the first embodiment to be made smaller than the substrate 20 (imaging device 10) of the first comparative example.
[0042] The imaging device 10 is, for example, a back-illuminated sensor. In this case, the designer needs to design the pad 30 while taking into consideration the design rules (distance a1, distance a2, and distance a3 below). This becomes a factor that restricts the size (chip size) of the imaging device 10.
[0043] Distance a1 is the length from the outer peripheral surface of substrate 20 (the outer periphery of design area A1) to the outer edge of silicon opening area B2. Distance a2 is the length from the outer edge (or inner edge) of silicon opening area B2 to the outer edge (or inner edge) of pad 30. Distance a3 is the length from the outer edge (or inner edge) of pad 30 to the outer edge (or inner edge) of pad opening area B1.
[0044] A second embodiment for reducing the chip size constraints imposed by such design rules (distance a1, distance a2, distance a3) will be described below.
[0045] <1-2-3. Example 2> A configuration example of the imaging device 10 according to Example 2 of this embodiment will be described with reference to Fig. 6 and Fig. 7. Fig. 6 is a plan view showing the configuration example of the imaging device 10 according to Example 2 of this embodiment. Fig. 7 is a cross-sectional view (cross-sectional view along line Y3-Y3 in Fig. 6) showing the configuration example of the imaging device 10 according to Example 2 of this embodiment.
[0046] 6 and 7, in Example 2, the outer peripheral surface of the substrate 20 (the end surface on the left side in FIG. 7) and the outer end surfaces of each of the pads 30 (the end surfaces on the left side in FIG. 7) are flush with each other. The outer peripheral surface of the substrate 20 is a scribed end surface formed by scribing. The outer end surfaces of each of the pads 30 are exposed surfaces exposed from the outer peripheral surface of the substrate 20.
[0047] Before scribing, a part of the pad 30 and a part of the oxide layer 22b are present in the scribe area A3. During scribing, the substrate 20 in the scribe area A3 is scribed together with a part of the pad 30 and a part of the oxide layer 22b in the scribe area A3. This causes the scribed end face of the substrate 20 and the outer end face of the pad 30 to be flush with each other.
[0048] According to Example 2, the imaging device 10 can be made smaller, similarly to the above-described Example 1. Furthermore, according to Example 2, it is not necessary to consider the distance a1, one side of the distance a2 (the left side in FIG. 7), and one side of the distance a3 (the left side in FIG. 7) of the above-described Comparative Example 1, so that restrictions on the size (chip size) of the imaging device 10 can be reduced, and the imaging device 10 can be made even smaller.
[0049] <1-2-4. Example 3> A configuration example of the imaging device 10 according to Example 3 of this embodiment will be described with reference to Fig. 8. Fig. 8 is a cross-sectional view showing a configuration example of the imaging device 10 according to Example 3 of this embodiment.
[0050] As shown in FIG. 8, in the third embodiment, the imaging device 10 includes a plurality of substrates 20 and 20A. The substrates 20 and 20A are connected by, for example, Cu-Cu connection (CCC) and function as an integrated substrate 20B. The substrate 20 has a connection portion 60, and the substrate 20A has a connection portion 60A. The substrates 20 and 20A are connected by, for example, joining the connection portions 60 and 60A. In the example of FIG. 8, two substrates 20 and 20A are shown, but the number of substrates may be three or more. The substrate 20 corresponds to the first substrate, and the substrate 20A corresponds to the second substrate. The connection portion 60 corresponds to the first connection portion, and the connection portion 60A corresponds to the second connection portion.
[0051] The substrate 20A has a guard ring 40A and a wiring portion 50A, similar to the substrate 20. The substrate 20 is laminated on the substrate 20A, and the pads 30 are provided on the substrate 20 located in the uppermost layer.
[0052] Guard ring 40A has, for example, a similar configuration to guard ring 40, and is provided directly below pad 30. Guard ring 40A and guard ring 40 are connected via connection portion 60 and connection portion 60A, and function as an integrated guard ring 40B. Guard ring 40 corresponds to the first guard ring, and guard ring 40A corresponds to the second guard ring.
[0053] The wiring section 50A has, for example, the same configuration as the wiring section 50, and is provided directly below the pad 30. The wiring section 50A and the wiring section 50 are also connected via the connection section 60 and the connection section 60A. In the example of FIG. 8, the wiring section 50A is provided directly below the pad 30, but in reality, wiring layers constituting the wiring section 50A are also provided in other locations within the design area A1 (for example, locations corresponding to the vertical drive section 12, the column signal processing section 13, the control section 14, etc.).
[0054] The wiring section 50A may include, for example, a logic circuit. In this case, for example, the substrate 20A is called a logic substrate, and the substrate 20 is called a pixel substrate. The substrate 20A and the substrate 20 are stacked to form the imaging device 10.
[0055] According to the third embodiment, the imaging device 10 can be made smaller, similar to the above-described first or second embodiment. Furthermore, according to the third embodiment, similar to the above-described second embodiment, restrictions on the size (chip size) of the imaging device 10 can be reduced, and the imaging device 10 can be made even smaller.
[0056] <1-3. Example of manufacturing method for imaging device> An example of steps in a method for manufacturing the imaging device 10 according to this embodiment will be described with reference to Fig. 9 to Fig. 11. Each of Fig. 9 to Fig. 11 is a cross-sectional view showing an example of steps in a method for manufacturing the imaging device 10 according to this embodiment. In the example of Fig. 9 to Fig. 11, the manufacturing steps of the imaging device 10 according to the above-mentioned Example 3 are shown.
[0057] 9, the laminated substrate 20 and substrate 20A are prepared, and then etching is performed on the silicon layer 22a on the substrate 20. As a result, a silicon opening region B2 without the silicon layer 22a is formed in the substrate 20. Next, a via portion 40a connected to the guard ring 40 is formed in the substrate 20. This via portion 40a may be formed of a metal layer such as copper, or may be formed of an oxide layer (oxide film) such as silicon oxide.
[0058] 10, an oxide layer 22b is provided on the silicon opening region B2 of the substrate 20. Next, a hole H1 (a plurality of holes H1) extending to the wiring portion 50 is formed in the oxide layer 22b. Next, a pad 30 (a plurality of pads 30) is provided on the oxide layer 22b. At this time, a connection via portion 30a connected to the wiring portion 50 is formed in the hole H1.
[0059] As shown in FIG. 11, an oxide layer 22b is embedded on the silicon opening region B2 of the substrate 20 so as to cover the pad 30 (the pads 30) on the silicon opening region B2. Next, etching is performed on the oxide layer 22b. As a result, a pad opening region B1 without the oxide layer 22b is formed on the substrate 20. Next, scribing is performed on the substrate 20 and the substrate 20A. As a result, the substrate 20 and the substrate 20A in the scribe region A3 are shaved, and the imaging device 10 is completed.
[0060] As a method for manufacturing the imaging device 10 according to the above embodiment, a method, device, and conditions used in manufacturing a general semiconductor device can be used. In other words, the imaging device 10 according to this embodiment can be manufactured using an existing method for manufacturing a semiconductor device.
[0061] As the manufacturing method, for example, a CVD (Chemical Vapor Deposition) method, an ALD (Atomic Layer Deposition) method, a PVD (Physical Vapor Deposition) method, etc. can be used. As the PVD method, for example, a vacuum deposition method, an EB (Electron Beam) deposition method, various sputtering methods (magnetron sputtering method, RF (Radio Frequency)-DC (Direct Current) combined bias sputtering method, ECR (Electron Cyclotron Resonance) sputtering method, facing target sputtering method, high frequency sputtering method, etc.), an ion plating method, a laser ablation method, an MBE (Molecular Beam Epitaxy) method, and a laser transfer method can be mentioned. In addition, as the CVD method, for example, a plasma CVD method, a thermal CVD method, an organic metal (MO) CVD method, and a photo CVD method can be mentioned. Furthermore, as other methods, for example, an electrolytic plating method, an electroless plating method, various printing methods, various coating methods, etc. can be used. Furthermore, examples of the patterning method include chemical etching such as shadow mask, laser transfer, and photolithography, and physical etching using ultraviolet light or laser.
[0062] <1-4. Actions and Effects> As described above, the imaging device 10, which is an example of the semiconductor device according to this embodiment, includes the substrate 20, the pad 30 provided on the substrate 20 outside a predetermined region (for example, a central region) of the substrate 20 in a plan view, and the guard ring 40 provided on the substrate 20 so as to surround the predetermined region and be positioned directly below the pad 30 in a plan view, and suppresses the intrusion of moisture (see FIG. 2, FIG. 3, etc.). As a result, the guard ring 40 is located directly below the pad 30, and the guard ring region A2 is within the design region A1 in a plan view. Therefore, the imaging device 10 can be made smaller than the case where the guard ring region A2 is set outside the substrate 20 from the design region A1 as in Comparative Example 1 (see FIG. 4 and FIG. 5). As a result, the imaging device 10 can be made smaller while suppressing moisture absorption in the imaging device 10.
[0063] Furthermore, a plurality of pads 30 may be provided, the plurality of pads 30 being arranged to surround a predetermined region in a plan view, and the guard ring 40 may be provided to pass directly below the plurality of pads 30 in a plan view (see FIG. 2, FIG. 3, etc.). This makes it possible to realize a miniaturized imaging device 10 while suppressing moisture absorption inside the imaging device 10, even when the plurality of pads 30 are arranged to surround a predetermined region in a plan view.
[0064] In addition, the outer peripheral surface of the substrate 20 and the outer end surface of the pad 30 may be flush with each other (see FIGS. 6 and 7, etc.). This reduces restrictions on the size of the imaging device 10, allowing the imaging device 10 to be made even smaller.
[0065] Furthermore, the width from the inner peripheral surface to the outer peripheral surface of the guard ring 40 may be smaller than the length from the inner end face to the outer end face of the pad 30 (see FIGS. 2 and 3, etc.). This ensures that the imaging device 10 can be made compact.
[0066] Furthermore, the width from the inner peripheral surface to the outer peripheral surface of the guard ring 40 may be smaller than the length from the inner side to the outer side of the exposed surface of the pad 30 (see FIGS. 2 and 3, etc.). This ensures that the imaging device 10 can be made compact.
[0067] Moreover, the guard ring 40 is composed of a plurality of ring layers 40n (n=1, 2, 3, . . .), and the imaging device 10 may further include a via portion 40a that is provided between the pad 30 and the uppermost ring layer 40n (n=1, 2, 3, . . .) of the plurality of ring layers 40n (n=1, 2, 3, . . .) and that suppresses the intrusion of moisture (see FIG. 2, FIG. 3, etc.). This makes it possible to reliably suppress moisture absorption within the imaging device 10, thereby realizing a miniaturization of the imaging device 10 while reliably suppressing moisture absorption within the imaging device 10.
[0068] Moreover, the ring layer 40n may be a metal layer (see FIG. 2, FIG. 3, etc.). This can reliably suppress moisture absorption inside the imaging device 10.
[0069] Also, the via portion 40a may be formed of a metal layer (see FIG. 2, FIG. 3, etc.). This can reliably suppress moisture absorption inside the imaging device 10. Also, for example, the via portion 40a can be formed in the same manufacturing process as that for forming the wiring portion 50.
[0070] Also, the via portion 40a may be formed of an oxide layer (see FIG. 2, FIG. 3, etc.). This can reliably suppress moisture absorption inside the imaging device 10. Also, for example, the via portion 40a can be formed in the same manufacturing process as the formation of the oxide layer 22b.
[0071] Furthermore, the substrate 20B may be composed of a plurality of substrates 20, 20A (see FIG. 8). Even in this case, it is possible to realize a reduction in the size of the imaging device 10 while suppressing moisture absorption inside the imaging device 10.
[0072] Furthermore, the pad 30 may be provided on the uppermost substrate 20 of the multiple substrates 20, 20A (see FIG. 8). Even in this case, it is possible to reduce the size of the imaging device 10 while suppressing moisture absorption inside the imaging device 10.
[0073] Furthermore, substrate 20B may have substrate 20 and substrate 20A, and guard ring 40B may have guard ring 40 disposed on substrate 20 so as to surround a predetermined region positioned directly below pad 30 in plan view and prevent moisture from entering, and guard ring 40A disposed on substrate 20A so as to surround a predetermined region positioned directly below pad 30 in plan view and prevent moisture from entering (see FIG. 8). As a result, even when substrate 20B is composed of substrate 20 and substrate 20A, it is possible to realize a miniaturized imaging device 10 while suppressing moisture absorption within the imaging device 10.
[0074] In addition, guard ring 40 may have a connection portion 60, guard ring 40A may have a connection portion 60A, and guard ring 40 and guard ring 40A may be connected via connection portion 60 and connection portion 60A (see FIG. 8). This can reliably suppress moisture absorption inside imaging device 10.
[0075] Furthermore, the imaging device 10 may further include a pixel array section 11 provided in a predetermined region. Even in this case, it is possible to realize a reduction in the size of the imaging device 10 while suppressing moisture absorption by the pixel array section 11 in the imaging device 10.
[0076] <2. Other embodiments> The configurations according to the above-mentioned embodiments (examples, modifications) may be implemented in various different forms other than the above-mentioned embodiments. For example, the configurations are not limited to the above-mentioned examples, and may be in various forms. In addition, for example, the information including the configurations, processing procedures, specific names, various data, and parameters shown in the above documents and drawings may be changed arbitrarily unless otherwise specified.
[0077] In addition, each component of each device shown in the figure is a functional concept, and does not necessarily have to be physically configured as shown in the figure. In other words, the specific form of distribution and integration of each device is not limited to that shown in the figure, and all or part of them can be functionally or physically distributed and integrated in any unit according to various loads, usage conditions, etc.
[0078] In addition, the above-mentioned embodiments (examples, modifications) can be appropriately combined within a range that does not cause contradictions in the processing contents. In addition, the effects described in this specification are merely examples and are not limited to the present invention, and other effects may also be obtained.
[0079] <3. Application Examples> An application example of the imaging device 10 according to any one of Examples 1 to 3 of this embodiment will be described with reference to Fig. 12. Fig. 12 is a diagram showing an application example using the imaging device 10 according to any one of Examples 1 to 3 of this embodiment.
[0080] The imaging device 10 according to any one of the above-mentioned first to third embodiments can be used in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as described below. For example, as shown in FIG. 12 , the imaging device 10 according to any one of the above-mentioned first to third embodiments is used in "devices for capturing images for viewing, such as digital cameras and mobile devices with a camera function", "devices for traffic use, such as in-vehicle sensors for capturing images of the front, rear, surroundings, and interior of a vehicle for safe driving such as automatic stopping and recognition of the driver's state, surveillance cameras for monitoring moving vehicles and roads, and distance measuring sensors for measuring distances between vehicles, etc.", "devices for home appliances such as TVs, refrigerators, and air conditioners for capturing images of user gestures and operating devices according to the gestures", "devices for medical and healthcare use, such as endoscopes and devices for capturing images of blood vessels by receiving infrared light", "devices for security use, such as surveillance cameras for crime prevention and cameras for person authentication", "devices for beauty use, such as skin measuring devices for capturing images of the skin and microscopes for capturing images of the scalp", "devices for sports use, such as action cameras and wearable cameras for sports use, etc.", and "devices for agriculture use, such as cameras for monitoring the state of fields and crops".
[0081] The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be realized as an electronic device mounted on any type of moving object such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, a robot, a construction machine, an agricultural machine (tractor), etc. Also, for example, the technology according to the present disclosure may be realized as an electronic device mounted on an endoscopic surgery system, a microsurgery system, etc.
[0082] <3-1. Imaging device> An imaging device 300 according to an application example will be described with reference to Fig. 13. Fig. 13 is a diagram showing a configuration example of the imaging device 300 according to an application example. The imaging device 300 is an example of an electronic device to which the imaging device 10 according to any one of the above-mentioned embodiments 1 to 3 is applied. Examples of the imaging device 300 include electronic devices such as digital still cameras, video cameras, and smartphones and mobile phones having imaging functions.
[0083] 13, the imaging device 300 includes an optical system 301, a shutter device 302, an imaging element (solid-state imaging device) 303, a control circuit (drive circuit) 304, a signal processing circuit 305, a monitor 306, and a memory 307. The imaging device 300 is capable of capturing still images and moving images.
[0084] The optical system 301 includes one or more lenses. The optical system 301 guides light from a subject (incident light) to the image sensor 303, and forms an image on the light receiving surface of the image sensor 303.
[0085] The shutter device 302 is disposed between the optical system 301 and the image sensor 303. The shutter device 302 controls the light irradiation period and the light blocking period for the image sensor 303 under the control of the control circuit 304.
[0086] The image sensor 303 accumulates signal charges for a certain period of time in response to light that is imaged on the light receiving surface via the optical system 301 and the shutter device 302. The signal charges accumulated in the image sensor 303 are transferred in accordance with a drive signal (timing signal) supplied from a control circuit 304. As the image sensor 303, for example, the image sensor 10 according to any one of the above-mentioned embodiments 1 to 3 is used.
[0087] The control circuit 304 outputs drive signals that control the transfer operation of the image sensor 303 and the shutter operation of the shutter device 302 , thereby driving the image sensor 303 and the shutter device 302 .
[0088] The signal processing circuit 305 performs various signal processing on the signal charges output from the image sensor 303. An image (image data) obtained by the signal processing performed by the signal processing circuit 305 is supplied to a monitor 306 and also to a memory 307.
[0089] The monitor 306 displays a moving image or a still image captured by the image sensor 303 based on the image data supplied from the signal processing circuit 305. As the monitor 306, for example, a panel-type display device such as a liquid crystal panel or an organic EL (Electro Luminescence) panel is used.
[0090] The memory 307 stores image data supplied from the signal processing circuit 305 , that is, image data of a moving image or a still image captured by the imaging element 303 .
[0091] Even in the imaging device 300 configured in this way, by applying the imaging device 10 according to any one of the above-described first to third embodiments to the imaging element 303, it is possible to realize miniaturization.
[0092] <3-2. Distance measuring device> A distance measuring device 400 according to an application example will be described with reference to Fig. 14. Fig. 14 is a diagram showing a configuration example of the distance measuring device 400 according to an application example. This distance measuring device 400 is an example of an electronic device to which the imaging device 10 according to any one of the above-mentioned embodiments 1 to 3 is applied.
[0093] 14, a distance measuring device (distance image sensor) 400 includes a light source unit 401, an optical system 402, an image sensor (solid-state image sensor) 403, a control circuit (drive circuit) 404, a signal processing circuit 405, a monitor 406, and a memory 407. This distance measuring device 400 projects light from the light source unit 401 toward an object and receives light (modulated light or pulsed light) reflected from the surface of the object, thereby obtaining a distance image according to the distance to the object.
[0094] The light source unit 401 projects light toward the subject. For example, a vertical cavity surface emitting laser (VCSEL) array that emits laser light as a surface light source or a laser diode array in which laser diodes are arranged in a line is used as the light source unit 401. The laser diode array is supported by a predetermined driving unit (not shown) and is scanned in a direction perpendicular to the direction in which the laser diodes are arranged.
[0095] The optical system 402 includes one or more lenses. The optical system 402 guides light from a subject (incident light) to the image sensor 403, and forms an image on the light receiving surface (sensor section) of the image sensor 403.
[0096] The image sensor 403 accumulates signal charges in response to light that is imaged on the light receiving surface via the optical system 402. A distance signal indicating a distance determined from a light receiving signal (APD OUT) output from the image sensor 403 is supplied to a signal processing circuit 405. As the image sensor 403, for example, the image sensor 10 according to any one of the above-mentioned embodiments 1 to 3 is used.
[0097] The control circuit 404 outputs a drive signal (control signal) for controlling the operation of the light source unit 401, the image sensor 403, etc., and drives the light source unit 401, the image sensor 403, etc.
[0098] The signal processing circuit 405 performs various signal processing on the distance signal supplied from the imaging element 403. For example, the signal processing circuit 405 performs image processing (e.g., histogram processing, peak detection processing, etc.) to construct a distance image based on the distance signal. The image (image data) obtained by the signal processing performed by the signal processing circuit 405 is supplied to a monitor 406 and also to a memory 407.
[0099] The monitor 406 displays the distance image captured by the image sensor 303 based on the image data supplied from the signal processing circuit 405. As the monitor 406, for example, a panel type display device such as a liquid crystal panel or an organic EL panel is used.
[0100] The memory 407 stores image data supplied from the signal processing circuit 405 , that is, image data of the distance image captured by the image sensor 303 .
[0101] In the distance measuring device 400 configured as above, by applying the imaging device 10 according to any one of the above-described first to third embodiments to the imaging element 403, it is possible to realize miniaturization.
[0102] As described above, the imaging device 10 according to any one of Examples 1 to 3 of this embodiment can be implemented in various electronic devices. For example, the imaging device 10 according to any one of Examples 1 to 3 described above may be mounted on various electronic devices such as an HDD (hard disk drive), a notebook PC (personal computer), a mobile device (e.g., a smartphone, a tablet PC, etc.), a PDA (personal digital assistant), a wearable device, a game device, a music device, etc., in addition to the imaging device 300 and the distance measuring device 400.
[0103] <4. Notes> The present technology can also be configured as follows. (1) A substrate; a pad provided outside the substrate relative to a predetermined region of the substrate in a plan view; a guard ring provided on the substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the guard ring preventing moisture from entering; A semiconductor device comprising: (2) The pad is provided in plurality, The pads are arranged to surround the predetermined region in a plan view, The guard ring is provided so as to pass directly below the plurality of pads in a plan view. The semiconductor device according to (1) above. (3) The outer peripheral surface of the substrate and the outer end surface of the pad are on the same plane. The semiconductor device according to (1) or (2). (4) a width from an inner peripheral surface to an outer peripheral surface of the guard ring is smaller than a length from an inner end surface to an outer end surface of the pad; The semiconductor device according to any one of (1) to (3). (5) a width from an inner peripheral surface to an outer peripheral surface of the guard ring is smaller than a length from an inner side to an outer side of the exposed surface of the pad; The semiconductor device according to (4) above. (6) the guard ring is composed of a plurality of ring layers, a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers to prevent moisture from entering; The semiconductor device according to any one of (1) to (5). (7) The ring layer is a metal layer. The semiconductor device according to (6) above. (8) The via portion is formed of a metal layer. The semiconductor device according to (6) or (7). (9) the via portion is formed of an oxide layer; The semiconductor device according to (6) or (7). (10) The substrate is composed of a plurality of substrates. The semiconductor device according to any one of (1) to (5). (11) The pad is provided on the substrate that is the uppermost layer of the plurality of substrates. The semiconductor device according to (10) above. (12) the guard ring is composed of a plurality of ring layers, a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers to prevent moisture from entering; The semiconductor device according to (11) above. (13) The ring layer is a metal layer. The semiconductor device according to (12) above. (14) The via portion is formed of a metal layer. The semiconductor device according to (12) or (13). (15) the via portion is formed of an oxide layer; The semiconductor device according to (12) or (13). (16) The substrate includes a first substrate and a second substrate, The guard ring is a first guard ring provided on the first substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the first guard ring preventing moisture from entering; a second guard ring provided on the second substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the second guard ring preventing moisture from entering; having The semiconductor device according to any one of (10) to (15). (17) the first guard ring has a first connection portion; the second guard ring has a second connection portion; the first guard ring and the second guard ring are connected via the first connection portion and the second connection portion; The semiconductor device according to (16) above. (18) Further comprising a pixel array section provided in the predetermined region. The semiconductor device according to any one of (1) to (17). (19) A semiconductor device is provided, The semiconductor device includes: A substrate; a pad provided outside the substrate relative to a predetermined region of the substrate in a plan view; a guard ring provided on the substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the guard ring preventing moisture from entering; having electronic equipment. (20) providing a pad on an outer side of a predetermined region of the substrate in a plan view; providing a guard ring on the substrate to prevent moisture from entering the substrate, the guard ring being positioned immediately below the pad in a plan view and surrounding the predetermined region; Including, A method for manufacturing a semiconductor device. (twenty one) A semiconductor device according to any one of (1) to (18), electronic equipment. (twenty two) Manufacturing a semiconductor device according to any one of (1) to (18), A method for manufacturing a semiconductor device. [Explanation of symbols]
[0104] 10. Imaging device 10A Imaging device 11 Pixel array section 12 Vertical drive unit 13 Column signal processing section 14 Control section 15 Signal Line 16 Signal Line 17 Signal Line 18 Signal Line 20 Substrate 20A board 20B board 21 First substrate layer 22a Silicon layer 22 Second Board Layer 22b Oxide layer 30 Pads 30a Connection via 40 Guard Ring 40A Guard Ring 40B Guard Ring 40a via section 40m dummy wiring layer 40n ring layer 40p wall layer 50 Wiring section 50A Wiring section 50n wiring layer 100 pixels A1 Design area A2 Guard ring area A3 scribe area B1 Pad Opening Area B2 Silicon opening area
Claims
1. A substrate; a pad provided outside the substrate relative to a predetermined region of the substrate in a plan view; a guard ring provided on the substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the guard ring preventing moisture from entering; A semiconductor device comprising:
2. The pad is provided in plurality, The pads are arranged to surround the predetermined region in a plan view, The guard ring is provided so as to pass directly below the plurality of pads in a plan view. The semiconductor device according to claim 1 .
3. The outer peripheral surface of the substrate and the outer end surface of the pad are on the same plane. The semiconductor device according to claim 1 .
4. a width from an inner peripheral surface to an outer peripheral surface of the guard ring is smaller than a length from an inner end surface to an outer end surface of the pad; The semiconductor device according to claim 1 .
5. a width from an inner peripheral surface to an outer peripheral surface of the guard ring is smaller than a length from an inner side to an outer side of the exposed surface of the pad; The semiconductor device according to claim 4.
6. the guard ring is composed of a plurality of ring layers, a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers to prevent moisture from entering; The semiconductor device according to claim 1 .
7. The ring layer is a metal layer. The semiconductor device according to claim 6.
8. The via portion is formed of a metal layer. The semiconductor device according to claim 6.
9. the via portion is formed of an oxide layer; The semiconductor device according to claim 6.
10. The substrate is composed of a plurality of substrates. The semiconductor device according to claim 1 .
11. The pad is provided on the substrate that is the uppermost layer of the plurality of substrates. The semiconductor device according to claim 10.
12. the guard ring is composed of a plurality of ring layers, a via portion provided between the pad and the uppermost ring layer of the plurality of ring layers to prevent moisture from entering; The semiconductor device according to claim 11.
13. The ring layer is a metal layer. The semiconductor device according to claim 12.
14. The via portion is formed of a metal layer. The semiconductor device according to claim 12.
15. the via portion is formed of an oxide layer; The semiconductor device according to claim 12.
16. The substrate includes a first substrate and a second substrate, The guard ring is a first guard ring provided on the first substrate so as to be positioned immediately below the pad in a plan view and to surround the predetermined region, the first guard ring preventing moisture from entering; a second guard ring provided on the second substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the second guard ring preventing moisture from entering; having The semiconductor device according to claim 10.
17. the first guard ring has a first connection portion; the second guard ring has a second connection portion; the first guard ring and the second guard ring are connected via the first connection portion and the second connection portion. The semiconductor device according to claim 16.
18. Further comprising a pixel array section provided in the predetermined region. The semiconductor device according to claim 1 .
19. A semiconductor device is provided, The semiconductor device includes: A substrate; a pad provided outside the substrate relative to a predetermined region of the substrate in a plan view; a guard ring provided on the substrate so as to be positioned directly below the pad in a plan view and to surround the predetermined region, the guard ring preventing moisture from entering; having electronic equipment.
20. providing a pad on an outer side of a predetermined region of the substrate in a plan view; providing a guard ring on the substrate to prevent moisture from entering the substrate, the guard ring being positioned immediately below the pad in a plan view and surrounding the predetermined region; Including, A method for manufacturing a semiconductor device.
Citation Information
Patent Citations
Solid state image pickup device, manufacturing method of solid state image pickup device, and electronic apparatus
JP2015216334A