Circuitry, enclosure, and method for manufacturing enclosure

Abstract

To provide a filter comprising enclosures, the inside of which is microfabricated by means of semiconductor manufacturing.SOLUTION: An exemplary semiconductor technology implemented microwave filter includes a dielectric substrate with metal traces on one surface that function as frequency selective circuits and reference ground. Other metal traces on another surface of the substrate also provide the reference ground. Bottom and top enclosures that enclose the substrate have respective interior recesses with deposited continuous metal coatings. A plurality of metal bonding bumps or a bonding wall extends outwardly from projecting walls of the bottom and top enclosures. The bonding bumps on the bottom and top enclosures engage reference ground metal traces on respective surfaces of the substrate. As a result of applied pressure, the bonding bumps and respective reference ground metal traces together with the through-substrate vias form a metal-to-metal singly-connected ground reference structure for the entire circuitry.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] Embodiments of the present invention relate to filters made using semiconductor manufacturing techniques having housings comprised of micro-machined interiors that improve filter performance and provide manufacturability with repeatable performance results.

[0002] High frequency filters, i.e., frequencies above 1 GHz, are constructed using a variety of materials and techniques. However, it is difficult to produce filters with high Q and low input loss that are stable over extreme temperatures. It is even more difficult to design such high frequency filters so that they can be manufactured to repeatedly achieve nearly identical performance characteristics. There is a need for filters and methods of making such filters that substantially overcome these challenges. Summary of the Invention [Problem to be solved by the invention]

[0003] It is an object of an embodiment of the present invention to provide a filter that substantially meets these objectives. [Means for solving the problem]

[0004] An exemplary semiconductor technology for implementing a high frequency filter includes a dielectric substrate having metal traces on one surface that function as frequency selective circuits, and a reference ground. Other metal traces on the other surface of the substrate also provide the reference ground. Bottom and top housings surrounding the substrate have respective internal recesses having a continuous metal coating deposited thereon. A plurality of metal bonding bumps extend outwardly from the protruding walls of the bottom and top housings. The bonding bumps on the bottom and top housings engage with reference ground metal traces on the respective surfaces of the substrate. As a result of the applied pressure, the bonding bumps and the respective reference ground metal traces, together with the through-substrate vias, form metal-metal conductive bonds that establish a common reference ground between the reference ground metal traces and the deposited metal internal coatings of the bottom and top housings.

[0005] An exemplary method is provided for manufacturing an enclosure for a high frequency filter implemented in semiconductor technology having a frequency selective circuit disposed on a substrate including a reference ground metal wiring on each major surface. The substrate is sandwiched and accommodated between two enclosures so manufactured. A first pattern of dots of photoresist is applied onto the silicon wafer in the areas where the ends of the walls of the enclosure are to be formed. The silicon layer not protected by the first pattern of photoresist is etched away leaving a plurality of extended bumps, and then the first pattern of photoresist covering the bumps is removed. An oxide coating is deposited to cover the surface of the silicon wafer including the extended bumps. A second pattern of photoresist is applied onto the oxide coating in the areas where the ends of the walls extend from the enclosure, i.e., in the areas defining the extended bumps present in the second pattern. The deposited oxide coating not protected by the second pattern of photoresist is etched away and the second pattern of photoresist covering the areas defining the walls is removed. The silicon wafer layer is etched away except in the areas having the oxide coating defining the ends of the walls to form at least one internal recess in the silicon wafer. The oxide coating is removed from the areas defining the ends of the walls and bumps. The entire exposed surface of the silicon wafer is sputtered with gold so that the sputtered gold coats the ends of the walls, the bumps on the ends of the walls, all internal recesses of the silicon wafer, and the inside of the walls. The areas covered with the sputtered gold are gold plated.

[0006] Features of exemplary embodiments of the invention will become apparent from the description, the claims, and the accompanying drawings. [Brief description of the drawings]

[0007] [Figure 1] FIG. 2 is an exploded perspective view of a filter according to an embodiment of the present invention. [Diagram 2] 1 illustrates an exploded view of a filter according to an embodiment of the present invention showing the relationship of elements and layers. [Diagram 3] 1 shows a top view of the metallization disposed on the top surface of the substrate relative to the bottom metallization. [Figure 4] 1 shows a bottom view of the metallization disposed on the bottom surface of the substrate relative to the top surface metallization. [Diagram 5] 1 shows a representative cross-sectional view of an assembled filter according to an embodiment of the present invention. [Figure 6] 1 illustrates a close-up view of a corner of an exemplary housing in accordance with an embodiment of the present invention. [Figure 7] 13 shows enlarged detail of the top metallization associated with coupling of signals to and from the filter. [Figure 8] 1 shows an exploded detailed view of a structure supporting a high performance transition between an external microstrip transmission line and a suspended stripline in an embodiment of the present invention. [Figure 9A] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9B] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9C] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9D] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9E] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9F] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 9G] 5 illustrates process steps for manufacturing an exemplary housing. [Figure 10] 4 shows a graph illustrating performance characteristics of an example filter over a range of frequencies, in accordance with an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] One aspect of the present invention is the recognition of the difficulties associated with repeatably manufacturing a conductive strip enclosure for enclosing a substrate, which enclosure can provide an effective ground structure for currents along the entire perimeter of the interface as well as at the interior walls of the recess. Recognizing such difficulties results in an enclosure design that can be reliably and repeatably manufactured to provide an effective continuous ground structure around the perimeter of the assembled enclosure, as well as to connect the top and bottom metallized ground traces. Details regarding overcoming these difficulties will be recognized by those skilled in the art in view of the following description.

[0009] An exemplary embodiment of a diplexer is used as an example to communicate features and improvements associated with embodiments of the present invention. A diplexer functions as a type of filter that separates an input signal at a single input into two separate outputs, one output containing an input signal having a frequency within a first frequency range and the other output containing an input signal having a frequency within a second frequency range, the first and second frequency ranges being different. As used herein, a "filter" is utilized to refer to any type of frequency selective circuit in RF, microwave, or millimeter wave format suitable for placement on a substrate that may be placed within an enclosure. For example, filters may include, but are not limited to, diplexers, low pass filters, high pass filters, band pass filters, multifunction filters, multiband filters, power dividers / combiners, resonators, couplers, spiral / coil / toroid inductors, metal-insulator-metal (MIM) capacitors, interdigitated capacitors, vertical (i.e., via-to-via) capacitors, balances, attenuators, phase shifters, any interlayer transitions, transitions from the same interlayer type to line type, and the like.

[0010] FIG. 1 illustrates an exemplary embodiment 100 of a filter or diplexer having a two-piece housing consisting of a bottom housing 105 and a top housing 110. A substantially planar substrate 115 is sized to be sandwiched and enclosed between the bottom housing 105 and the top housing 110 in a ready-to-operate assembly. The substrate 115 has a top surface 120 supporting an upper metallization 125 and a bottom surface 130 supporting a lower metallization 135. An input port 140 receives an input signal with a frequency selection circuit that routes signals in one frequency range to an output port 145, and frequencies in another frequency range are routed to an output port 150. The bottom housing 105 includes an interior recessed area that is divided in part by a longitudinal central peninsula 155 that separates a recessed area 160 associated with the output port 145 and a recessed area 165 associated with the output port 150. The upper perimeter of both the bottom housing 105 and the top surface of the peninsula 155 represent a reference ground (electric potential). The top housing 110 is substantially similar to the bottom housing, except for a cut-out portion 170 located adjacent to the input port 140 in the assembled position. The cut-out portion 170 provides mechanical support to the input port 140 on the substrate 115, thereby facilitating coupling of an input signal by an external probe or line. Similarly, the cut-out portions of the top housing opposite the output ports 145 and 150 facilitate clearance for connections to these ports. When assembled, the peninsula 155 engages the substrate 115 on one surface, and a corresponding peninsula on the top housing engages the substrate 115 on the other surface opposite the peninsula 155, forming two parallel recesses separated by two opposing peninsulas when interconnected by through-substrate vias. The ground structure formed by the two peninsulas and the through-substrate vias serves as a microwave separation wall between the two recessed recesses ("channels") in this exemplary filter. Note that the peninsula is the inner wall of the cover. The cover can also have "islands" in addition to the peninsulas. When the inner and protruding surfaces of the cover are metallized, the islands and peninsulas are metallized at the same time as well, which typically provide an "inner" inner wall for purposes of insulation, demodeling, field shaping, and impedance control.Note that the interior walls, recessed surfaces, protruding surfaces, including those contributed by the islands and peninsulas, and the bond bumps of both covers and through-substrate vias are all part of the ground reference structure. When assembled, they form a single connected ground structure, or "Faraday cage," for the enclosed stripline circuitry. The islands and peninsulas can have any different contoured perimeter, and this presents no difficulty to the manufacturing technique.

[0011] The exemplary splitter 100 is designed to route input signals at an input port 140 having frequencies between 0.5 GHz and 10 GHz along a first path to a first output 145, while splitting input signals between 11 GHz and 20 GHz along a second path to a second output 150. The circuitry associated with the first and second paths provides low insertion loss for signals that are to be coupled to the respective first and second outputs, while providing a substantially high impedance to other signals that are not desired to be coupled through the respective paths. At such frequencies, the exemplary circuitry is implemented with respective metallization traces that function as the equivalent of capacitors, inductors, and transmission lines to provide frequency selection.

[0012] FIG. 2 shows a representative exploded view of an exemplary filter (diplexer) 200, where elements described in FIG. 1 are shown and identified by the same reference numerals. The bottom layer 205 and the top layer 210 represent conductive metal layers deposited on the inner surfaces of the bottom housing 105 and the top housing 110, respectively. The longitudinal perimeter 215 of the bottom layer 205 and the longitudinal perimeter 220 of the top layer 210 extend to the longitudinal ends of the inner surfaces of the bottom housing 105 and the top housing 110, respectively. Similarly, the longitudinal perimeter 225 of the bottom metallization 135 and the longitudinal perimeter 230 of the top metallization 125 extend to the longitudinal ends of the inner surfaces of the bottom housing 105 and the top housing 110, respectively. The perimeters 225 and 230 of the bottom and top metallization layers 135 and 125 on the substrate represent metallizations where a reference ground is desired. The top metallization layer also includes signal traces 126 that carry input signals relative to a reference ground. A plurality of metallized through vias 240 along the longitudinal periphery of the substrate 120 provide effective ground connections between mating regions of the mating bottom and top metallization layers 135 and 125, respectively. To establish an effective ground, the vias 240 should be appropriately spaced for the electromagnetic frequency under consideration to prevent undesirable electromagnetic resonance moderating that occurs in the empty space ("recess") formed by the surrounding vias when energy at the resonant frequency of that recess is coupled into the recess. Typically, the via spacing is selected to be a small fraction, e.g., 1 / 5 to 1 / 10, of a quarter wavelength (1 / 4 of a wavelength) of the highest frequency under consideration or less. For example, spacings of 750 μm to 375 μm are sufficient to prevent moderating at frequencies below 20 GHz. To enhance effective grounding, vias 240 are disposed within the substrate 120 and engage near the inner edge of the ground metallization of the bottom metal layer 135 and also engage the opposing ground area on the top metal layer 125. The bottom deposited metal layer 205 is continuous within the interior surface of the bottom housing 105. That is, a continuously deposited metal layer is present on the top surface 106, the top 107 of the interior recess that defines the interior space, and the substantially vertical sidewalls 108 between the surfaces 106 and 107. The top deposited metal layer 210 is also continuous as similarly described for the bottom deposited metal layer.The bottom housing 105 includes two longitudinal side walls 104 perpendicular to the side walls and two end walls 103. The top housing 110 includes two longitudinal side walls 111 perpendicular to the side walls 111 and two end walls 112. In the example diplexer shown, an opening 113 in the end wall 112 extends substantially vertically back inward from the outer end of the end wall such that it is adjacent to the main interior recess.

[0013] 3 and 4 show views of the top 300 and bottom 400 of the metallization disposed on the top and bottom of the substrate, respectively. When assembled, the peninsula 155 engages with the ground metallization on the substrate 115 on one surface, and the corresponding peninsula on the top housing engages with the ground metallization on the substrate 115 on the other surface, facing the peninsula 155, forming two parallel recesses separated by two opposing peninsulas when interconnected by through-substrate vias. The view as seen in FIG. 4 shows a bottom view of the metallization on the bottom surface of the substrate, with the view as shown in FIG. 3 rotated 180° longitudinally. The ground potential semi-insulator 305 is located on the top metal layer directly above the ground potential semi-insulator 405 on the bottom metal layer. A number of through vias 310 in the top metal layer correspond to and are substantially identical to the through vias 410 in the bottom metal layer, establishing a connection through the substrate between the top and bottom metal layers. A plurality of vias extend all along the width and length of the upper and lower metal peninsulas to establish a common ground potential between the upper and lower metal peninsula layers. A U-shaped metal loop 315 at ground potential extends around and completely surrounds the input port 140. Similarly, U-shaped metal loops 320 and 325 at ground potential surround the output ports 145 and 150, respectively. This U-shaped loop is a feature in the probe-microstrip-stripline transition of the exemplary filter that helps minimize wave leakage in the space between the probe and the substrate in the opposite direction (to the suspended stripline) from the desired direction. It should be noted that in other transition designs, e.g., ribbon junctions or dual purpose (probing and ribbon junctions), it may not be necessary or preferable to utilize such a ground loop. This ground loop enhances high performance wideband transitions for probe measurements, but is not a necessary feature of current suspended stripline technology.

[0014] A general description of the circuitry implemented by the wiring as shown in FIG. 3 is provided. However, one skilled in the art will appreciate that this description applies to the particular exemplary diplexer and that various other types of filter elements can be deployed on the substrate to provide frequency selective circuits including transmission lines, inductive components, capacitive components, dispersive components, and coupling components. Such components can be designed to provide various functions, such as low pass filters, high pass filters, band pass filters, and notch filters, and can include multiple input and / or output ports. In addition, active circuit elements, such as transistors, ICs, and the like, can also be disposed on the support substrate housed within the enclosure. The input transition 350 facilitates wide bandwidth adaptation between the microstrip included between the probe and the stripline 355 as shown in FIG. 7. A typical microstrip has a centerline conductor width of about 3 mils, while the suspended stripline 355 is 60 mils, when both the microstrip and the stripline have a transfer impedance of 50 ohms. In addition, the electromagnetic field in the microstrip is primarily contained under the microstrip line, while the electromagnetic field in the suspended stripline 355 spreads in all directions transverse to the propagation direction, from the signal metal trace to the inner wall of the cover. The transition 350 uses a wedge-shaped metallization on the bottom of the substrate and a contoured metal lining in the adjacent cover to help fan out the field from the narrowly confined microstrip mode, over a short distance, to the substantially larger recess of the suspended stripline. The taper of the housing from the regular channel width to the size of the aperture 113 is designed to work with the wedge-shaped metallization for the same purpose of helping to spread out the field for a high performance wideband transition. The neck-down matching section (see the narrowed section in FIG. 7) and the tail end section behind the probe pad also help achieve wideband performance up to 40 GHz. Region 360 represents the common signal junction, where the input signal is coupled by the transmission line 355 to two transmission lines that are respectively coupled to the upper and lower frequency selective circuits.Elements 360, 365 similarly function as open stub transmission lines associated with tuning to provide a notch frequency response. Element 370 represents a connecting transmission line. The circuit elements present above transmission line 355 and peninsula 305 combine to provide a frequency response of a low pass filter, e.g., signals between 0.5 GHz and 10 GHz are passed with low attenuation, while signals having higher frequencies are substantially attenuated, i.e., blocked / reflected at the beginning of the channel due to high impedance. Element 375 represents a coupling line providing a band pass frequency response. The circuit elements present below transmission line 355 and peninsula 305 combine to provide a frequency response of a band pass filter, e.g., signals within 11 GHz to 20 GHz fall within the band pass frequency range and are coupled with low attenuation, while signals with frequencies outside the range, i.e., between 0.5 GHz and 10 GHz, are substantially attenuated, i.e., blocked / reflected at the beginning of the channel due to high impedance.

[0015] As seen in FIG. 4, the vias in the bottom metallization connect to a U-shaped ground loop to enhance the effective ground between the two metal layers. The top recess 330 includes a plurality of metal traces 126 disposed in the top metal layer that function as a selective frequency circuit to the output port 145, the selective frequency circuit providing low attenuation for signals between 0.5 GHz and 10 GHz while providing high impedance and substantial rejection for signals between 11 GHz and 20 GHz. Similarly, the bottom recess 335 includes a plurality of metal traces 126 disposed in the top metal layer that function to form a selective frequency circuit to the output port 150, the selective frequency circuit providing high impedance and substantial attenuation for signals between 0.5 GHz and 10 GHz while providing low attenuation for signals between 11 GHz and 20 GHz. Preferably, the substrate core is silicon carbide on which the precision metallization is disposed, and through-wafer vias that can be fabricated using the same fabrication used for gallium nitride (GaN) high electron mobility transistor (HEMT) fabrication.

[0016] FIG. 5 shows a representative cross-section of an assembled filter according to an embodiment of the invention, the cross-section being taken at a location on the assembled filter where the peninsula 155 is not present. The bottom housing 105 and the top housing 110 may be made of silicon with gold linings plated on the inner surfaces 205 and 210. The gold plated surfaces of the bottom and top housings engage the bottom metallization 135 and the top metallization 125, respectively. Conductive vias 240 through the substrate provide continuous ground connections interconnecting the gold plated recesses of the bottom and top housings with the top and bottom metal layers that should be at ground potential. The substrate 120 is preferably silicon carbide or another material with properties that change very little with temperature to minimize frequency response variations with temperature. A suspended stripline circuit with a large cross-section filled with low loss material (air, silicon carbide) facilitates a very high Q, allowing for a low loss filter with sharp band edges and rejection roll-off.

[0017] FIG. 6 shows a representative enlarged corner of the bottom housing 105 with metal plating 205 disposed on the vertical sidewalls, as well as the upwardly facing plane. Bonding bumps 605 extend generally vertically outward from the upwardly facing plane along the periphery and along the interior peninsula. Bonding bumps 605 are spaced along the entire circumference of the bottom housing, and engage with bottom metallization 135 in the assembled position. Bonding bumps also extend along peninsula 155 of the bottom housing, and engage with bottom metallization 405 in the assembled position. Similarly, bonding bumps extend vertically outward from the downwardly facing plane of the top housing, and engage with ground metallization 125 and ground peninsula metallization 305. Although in this example the bonding bumps are formed on the housing and not on the substrate (or metallization on the substrate), bonding bumps could be formed on both sides of the substrate 115. The bonding process preferably uses high precision thermo-compression bonding using a tool such as the FC-300 manufactured by SET to bond gold plated bonding bumps to a gold plated metallization surface on the substrate. When the bonding bumps are placed on the substrate, the second side to be bonded will have a much higher density of bumps, so that the opposing bonding bumps on the other side of the substrate used for the other of the bottom and top housings will not be crushed during the process of applying pressure to bond the first housing to the substrate.

[0018] FIG. 7 shows an enlarged detail 700 of the top surface metallization associated with ports 140, 145, and 150 used to couple signals to and from the filter. These three ports are designed for probe measurements. As an example, port 140 is a ground signal ground port used to couple an input signal. As seen in this detail, the U-shaped ground metallization 315 provides a continuous 270° enclosure of the input port center conductor 140. In this example, an external probe or interconnect 705 includes a central metal conductor (finger) 710 positioned to engage the input port center conductor 140, and includes two opposing metal fingers 715 on either side of the central finger 710 positioned to engage opposing legs of the U-shaped ground metallization 315. This structure of the port provides the necessary compensation features, such as nearby inductance and capacitance, which allows a smooth transition of the fields in the probe to the fields on the signal-carrying wiring on the substrate, thus forming a "transition" from the probe to a short microstrip (i.e., a transmission line with ground metallization on the backside of the substrate) and the suspended stripline.

[0019] FIG. 8 shows an exploded detailed view of a structure supporting a compact, high performance, wideband transition between an external microstrip line and a suspended stripline in an embodiment of the invention. The magnetic field at the probe tip is horizontal between the signal and ground pins. To receive pressure from the probe landing, the bottom cover must not have excavations in this area, and therefore a microstrip type transmission line, i.e., one with metallization (ground) on the backside of the substrate, must be used near the probe landing area. The vias 240 and ground loop 315 help to "fold" or "bend" the essentially horizontal magnetic field at the probe tip relative to the essentially vertical magnetic field below the microstrip trace. The neckdown 805 next to the probe pad 140 and tail end piece 810 are both features that help with impedance matching for wideband performance. The junction between the microstrip and the stripline, and the essentially vertical magnetic field concentrated below the microstrip trace, must then fan out in all directions (down, up, sideways, etc.) in the suspended stripline, which has a cross section an order of magnitude larger than the microstrip. This field fan-out is aided by the following features: The wedge-shaped metallization 815 on the backside of the substrate can be considered as a "diving board" that allows the concentrated microstrip field to gradually loosen and form a connection to the much larger ground structure within the stripline. The tapers on both the top and bottom covers provide a close landing surface for the magnetic field lines near the microstrip stripline junction, gradually expanding the landing field to a larger cross section until it fills the full channel dimensions. Note that due to the small distance and therefore strong interaction between the probe to microstrip and microstrip to stripline transitions, these should be viewed and designed as a single transition, i.e., probe to microstrip-stripline transition. Other transitions have also been designed for practical purposes such as ribbon junctions or ribbon junctions and probing. These transitions may have different dimensions or may have ground via configurations.However, the essential field bending / expanding features such as the wedge and tapered ground are still highly effective.

[0020] 9A-9G illustrate process steps for fabricating an exemplary housing associated with a filter, according to an embodiment of the present invention. In this example, an exemplary cross section of the bottom housing 105 is shown with the peninsula wall 155 visible. In FIG. 9A, the process begins with a relatively thick silicon wafer 900, e.g., 1 mm. In the next step, shown in FIG. 9B, the top surface of the silicon wafer 900 is patterned with photoresist and reactive ion etching (RIE) is used to micromachine the areas of silicon to be removed, i.e., leaving outwardly extending bonding bumps 905. "Micromachining" refers to the creation of a dimensionally precise and smooth surface by semiconductor etching followed by deposition of a metal layer. In the next step, shown in FIG. 9C, the photoresist is removed and an oxide layer 910 is deposited with a thickness sufficient to withstand complete erosion during the silicon etch. Then, as shown in FIG. 9D, a photoresist pattern 915 is applied to create what will become the three walls 917, and RIE is used to etch away the oxide 910 not protected by the photoresist. As shown in FIG. 9E, the photoresist 915 shown in FIG. 9D is removed and a deep RIE etch is used to remove the areas of silicon that form an internal recess 918 in the housing. In FIG. 9F, the oxide 910 is removed to reveal two longitudinal walls 920 along the longitudinal ends and a central longitudinal peninsula wall 925 that forms two isolated longitudinal recesses 932, 933. The recesses may be up to about 40 mils deep, etched to a depth of 15 mils in an exemplary diplexer embodiment. This is followed by sputtering a relatively thin layer of gold 930 over all of the exposed upward facing surfaces, including the associated ends of the walls, the bonding bumps, the vertical walls, and the planar recesses. Thus, the exposed ends of the walls 920 and 925, as well as the bonding bumps and recess areas, are all sputtered with gold. In a final step as shown in FIG. 9G, all of the areas previously sputtered with gold are now plated with a thicker layer of gold. In this example, the bonding bumps have a diameter of 25 μm, a bump height of 1.6 μm, and are preferably spaced apart by a distance of 200 μm.Typically the maximum spacing is about a quarter wavelength, but preferably a tenth wavelength if feasible.

[0021] The excellent dimensional accuracy and surface smoothness of the housing's internal recesses and surfaces achieved by micromachining are critical to the ability to manufacture filters with highly repeatable properties and performance and low electrical losses. Housings manufactured by conventional mechanical manufacturing techniques such as machining, EDM, and electroforming have tolerances in the range of 0.2 mils to 1 mil, which is one to two orders of magnitude greater than the accuracy provided by the semiconductor techniques described herein. In addition, the surface roughness from machining can typically be five times the roughness achieved by semiconductor techniques, which results in additional RF signal loss. For example, the micromachined inner surfaces in an exemplary housing have a peak-valley roughness of less than 2 μm, or 1.3 μm, compared to a machined copper housing that has a peak-valley roughness of approximately 9.4 μm. This provides more than a seven-fold improvement in smoothness.

[0022] Conductive epoxy pastes can be utilized to achieve silicon-SiC assembly, but conductive pastes offer a more difficult technique to control in terms of bleeding, thickness variations, voids, and poor electrical contacts, as well as placement accuracy.

[0023] Regarding vias, 50 μm diameter metallized through-wafer vias that connect ground metallization on opposing surfaces on the substrate are used to form a high-isolation electromagnetic via fence. Simulations have shown that the vias can be used to provide high isolation up to 100 GHz when spaced at a minimum of 100 μm pitch. The via fence and gold-plated silicon housing walls allow the individual elements of the two isolated frequency circuits to be effectively encased in their own electromagnetically shielded recesses to minimize cross-coupling. The through-wafer vias facilitate substantially continuous ground continuity for RF return currents between the top and bottom housings, allowing for probe testing of the filter after fabrication. It should be noted that the "walls" formed by the gold-plated silicon housing walls and the via fence can be used not only to separate channels, but also to separate individual filter elements. Traditional open-face printed filter designs often result in long design cycles as close coupling between filter elements makes guesswork and unavoidable repeated simulation cycles when fine-tuning the filter geometry. The separation between the individual filter elements eliminates such undesirable cross-coupling, thus allowing for rapid development and compact layout.

[0024] As can be seen in Table 1, tight manufacturing tolerances are important for designing first-pass success and manufacturing repeatability, especially for filters that have tight cutoff specifications, high isolation requirements, and require highly repeatable performance. [Table 1]

[0025] FIG. 10 shows a graph illustrating the performance characteristics over a frequency range of an exemplary filter (diplexer). The graph is plotted as dB versus exemplary frequencies of interest, i.e., 0.5 GHz to 25 GHz. Line 1005 represents the output characteristic associated with the signal from output port 145, which shows very low loss for input signals between 0.5 GHz and 10 GHz, with a sharp increase in attenuation at about 11 GHz resulting in approximately 50 dB of attenuation from about 12 GHz to 24 GHz. Line 1010 represents the projected characteristic of the signal at output port 145 using ANSYS, Inc.'s finite element frequency domain analysis tool "HFSS." It will be apparent that there is a very close correspondence between the projected characteristic and the actual measured characteristic. This is due to the tight manufacturing tolerances mentioned above. Line 1015 represents the output characteristic associated with the signal from output port 150, which shows very low loss for signals between 11 GHz and 20 GHz, resulting in attenuation of at least 30 dB (and more at decreasing frequencies) from about 10 GHz to 0.5 GHz, with a sharp increase at about 11 GHz. Line 1020 represents the projected characteristic of the signal at output port 150 using the same HFSS model as above. Again, it is clear that there is a very close correspondence between the planned characteristics and the actual measured characteristics. The close correspondence between the characteristics planned by the model analysis and the actual measured characteristics of the fabricated diplexer on the first pass of fabrication is indicative of superior design and fabrication techniques. The unit-to-unit variation of the diplexer fabricated on the first pass was also excellent, with seven out of eight fabricated units exhibiting nearly identical performance.

[0026] Although exemplary implementations of the present invention have been shown and described in detail herein, it will be apparent to those skilled in the art that various modifications, additions, substitutions, etc., can be made without departing from the spirit of the present invention. For example, other microwave circuits, including those described in paragraph

[0018] , can be realized. The silicon recesses can be of different heights, and the bonding bumps can be made using various chip and wafer bonding techniques, including eutectic bonding, such as indium-gold or gold-tin, or copper pillar bonding. The bonding bumps can be made on the substrate 115 instead of silicon, and the assembly can be bonded as a whole wafer, rather than a block of smaller filter size. The height of the recesses is limited only by the manufacturing capabilities of the silicon etching tool. Silicon recesses with two different etch depths are possible and can be used in terahertz waveguide devices and can be used in filters of the type described herein. The substrate 115 can be made of another material, such as 5 mil thick alumina, as long as there are conductive vias through the wafer.

[0027] The scope of the invention is defined in the following claims.

Claims

[Claim 1] a substantially flat dielectric substrate; Metal wiring that functions as a frequency selection circuit and a reference ground and is disposed on at least one of the two main surfaces of the substrate; another metal trace disposed on at least one of the two main surfaces of the substrate, which serves as the reference ground; a bottom housing having at least one internal recess and an outwardly extending peripheral wall including a substantially planar first end region parallel to the substrate, wherein all internal surfaces of the bottom housing including the substantially planar end region and the at least one internal recess have a metal coating deposited thereon, the substantially planar first end region being aligned with metal traces on one major surface of the substrate that serves as the reference ground; an upper housing having an outwardly extending peripheral wall including at least one internal recess and a substantially planar second end region parallel to the substrate, the substantially planar second end region being aligned with a metal trace on one major surface of the substrate that serves as an electrical ground, the upper housing having all interior surfaces including the substantially planar end region of the upper housing and the at least one internal recess having a metal coating deposited thereon; a plurality of metal bond bumps extending outwardly from the substantially planar first and second end regions, the plurality of metal bond bumps on the bottom and top housings engaging respective reference ground metal traces on the one and other major surfaces to form metal-to-metal conductive bonds to establish a common reference ground with the deposited metal coatings of the bottom and top housings; 1. A microwave and millimeter wave filter implemented using semiconductor technology, comprising:

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