Electronic component package

The electronic component package addresses the issue of static electricity-induced damage by using a metal foil to short conductor patterns, thereby preventing potential differences and ensuring the reliability of semiconductor devices with substrates of lower pressure resistance.

JP2025038701APending Publication Date: 2025-03-19ROHM CO LTD
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Patent Information

Application Number
JP2023145469
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-09-07
Publication Date
2025-03-19

AI Technical Summary

Technical Problem

Existing semiconductor devices are susceptible to destruction due to potential differences generated by static electricity between conductor patterns, which can lead to damage of the semiconductor chip, especially when the chip has a substrate with lower pressure resistance than silicon.

Method used

The electronic component package includes a substrate with conductor patterns on both main surfaces, an electronic component, and a metal foil that shorts the conductor patterns, preventing potential differences and thus protecting the electronic component from static electricity-induced damage.

Benefits of technology

The implementation of the metal foil in the electronic component package effectively suppresses the destruction of the electronic component caused by static electricity, ensuring the reliability and longevity of the semiconductor device.

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Abstract

To provide an electronic component package capable of suppressing destruction of an electronic component when being charged with static electricity.SOLUTION: An electronic component package includes a substrate, an electronic component, and metallic foil.The substrate has a base material, and a first conductor pattern, a second conductor pattern, a third conductor pattern and a fourth conductor pattern. The base material has a first principal surface and a second principal surface opposite the first principal surface. The first conductor pattern and the second conductor pattern are arranged on the first principal surface so as to be separated from each other in a first direction. The third conductor pattern and the fourth conductor pattern are arranged on the second principal surface so as to be separated from each other in the first direction. The first conductor pattern and the second conductor pattern are electrically connected to the third conductor pattern and the fourth conductor pattern, respectively. The electronic component is arranged on the first conductor pattern so as to be electrically connected to the first conductor pattern and is electrically connected to the second conductor pattern.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present disclosure relates to electronic component packages. [Background technology]

[0002] For example, Japanese Patent Application Laid-Open No. 2023-091924 (Patent Document 1) describes a semiconductor device. The semiconductor device described in Patent Document 1 has a substrate, a semiconductor chip, and a sealing resin. The substrate has a base material, a first conductor pattern, a second conductor pattern, a third conductor pattern, and a fourth conductor pattern. The base material has a first main surface and a second main surface. The first main surface and the second main surface form both end surfaces in the thickness direction of the base material. The first conductor pattern and the second conductor pattern are arranged on the first main surface. The first conductor pattern and the second conductor pattern are spaced apart in the longitudinal direction of the base material. The third conductor pattern and the fourth conductor pattern are arranged on the second main surface. The third conductor pattern and the fourth conductor pattern are spaced apart in the longitudinal direction of the base material. The third conductor pattern and the fourth conductor pattern are electrically connected to the first conductor pattern and the second conductor pattern, respectively.

[0003] The semiconductor chip is, for example, an LED (Light Emitting Diode). The semiconductor chip is disposed on a first conductor pattern. The semiconductor chip is electrically connected to the first conductor pattern and the second conductor pattern by, for example, a bonding wire. The sealing resin is, for example, a transparent resin. The sealing resin is disposed on the substrate so as to cover the semiconductor chip. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent Document 1: JP 2023-091924 A [Summary] In the semiconductor device described in Patent Document 1, a potential difference may occur between the third conductor pattern and the fourth conductor pattern due to static electricity, and this potential difference may destroy the semiconductor chip.

[0005] The electronic component package of the present disclosure includes a substrate, an electronic component, and a metal foil. The substrate has a base material, a first conductor pattern, a second conductor pattern, a third conductor pattern, and a fourth conductor pattern. The base material has a first main surface and a second main surface opposite to the first main surface. The first conductor pattern and the second conductor pattern are arranged on the first main surface so as to be spaced apart from each other in a first direction. The third conductor pattern and the fourth conductor pattern are arranged on the second main surface so as to be spaced apart from each other in the first direction. The first conductor pattern and the second conductor pattern are electrically connected to the third conductor pattern and the fourth conductor pattern, respectively. The electronic component is arranged on the first conductor pattern so as to be electrically connected to the first conductor pattern, and is electrically connected to the second conductor pattern. The metal foil is arranged across the third conductor pattern and the fourth conductor pattern. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a plan view of an electronic component package 100. [Diagram 2] FIG. 2 is a cross-sectional view taken along line II-II in FIG. [Diagram 3] FIG. 2 is a bottom view of the electronic component package 100. [Figure 4] 1A to 1C are diagrams illustrating the manufacturing process of the electronic component package 100. [Diagram 5] 1 is a first cross-sectional view illustrating a mounting method for the electronic component package 100. FIG. [Figure 6] 2 is a second cross-sectional view showing a mounting method of the electronic component package 100. FIG. [Figure 7] FIG. 2 is a bottom view of the electronic component package 100A.

[0007] [Detailed Description] The details of the embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, the same or corresponding parts are designated by the same reference numerals, and redundant description will not be repeated.

[0008] (First embodiment) The electronic component package according to the first embodiment will be described below. The electronic component package according to the first embodiment is designated as electronic component package 100.

[0009] <Configuration of Electronic Component Package 100> Fig. 1 is a plan view of the electronic component package 100. Fig. 2 is a cross-sectional view taken along line II-II in Fig. 1. Fig. 3 is a bottom view of the electronic component package 100. As shown in Figs. 1 to 3, the electronic component package 100 has a substrate 10, an electronic component 20, a sealing resin 30, and a metal foil 40.

[0010] The substrate 10 has a base material 11, a conductor pattern 12, a conductor pattern 13, a conductor pattern 14, a conductor pattern 15, a conductor pattern 16, and a conductor pattern 17. In a plan view, for example, a direction along the longitudinal direction of the base material 11 is defined as a first direction DR1. In a plan view, a direction perpendicular to the first direction DR1 is defined as a second direction DR2.

[0011] The substrate 11 has a main surface 11a and a main surface 11b. The main surface 11a and the main surface 11b are both end surfaces of the substrate 11 in the thickness direction. The main surface 11b is the opposite surface to the main surface 11a. The substrate 11 is made of an insulating material. A specific example of the material of the substrate 11 is glass epoxy. The substrate 11 has a side surface 11c and a side surface 11d. The side surface 11c and the side surface 11d are both end surfaces of the substrate 11 in the first direction DR1. The side surface 11d is the opposite surface to the side surface 11c.

[0012] The conductor pattern 12 and the conductor pattern 13 are disposed on the main surface 11a. One end of the conductor pattern 12 in the first direction DR1 (the end on the right side in FIG. 2) and one end of the conductor pattern 13 in the first direction DR1 (the end on the left side in FIG. 2) are spaced apart from each other. The conductor pattern 12 extends so that the other end in the first direction DR1 reaches the end of the main surface 11a that is continuous with the side surface 11c. The conductor pattern 13 extends so that the other end in the first direction DR1 reaches the end of the main surface 11a that is continuous with the side surface 11d. The end of the conductor pattern 12 on the one end side in the first direction DR1 forms a die pad 12a.

[0013] The conductor pattern 14 and the conductor pattern 15 are disposed on the principal surface 11b. One end of the conductor pattern 14 in the first direction DR1 (the end on the right side in FIG. 2) and one end of the conductor pattern 15 in the first direction DR1 (the end on the left side in FIG. 2) are spaced apart from each other. The conductor pattern 14 extends such that its other end in the first direction DR1 reaches the end of the principal surface 11b that is continuous with the side surface 11c. The conductor pattern 15 extends such that its other end in the first direction DR1 reaches the end of the principal surface 11b that is continuous with the side surface 11d.

[0014] Conductive pattern 16 is disposed on side surface 11c. Conductive pattern 16 is connected to conductor pattern 12 and conductor pattern 14. As a result, conductor pattern 12 and conductor pattern 14 are electrically connected to each other. Conductive pattern 17 is disposed on side surface 11d. Conductive pattern 17 is connected to conductor pattern 13 and conductor pattern 15. As a result, conductor pattern 13 and conductor pattern 15 are electrically connected to each other.

[0015] The constituent materials of the conductor patterns 12, 13, 14, 15, 16, and 17 are conductors. Specific examples of the constituent materials of the conductor patterns 12, 13, 14, 15, 16, and 17 include copper and copper alloys.

[0016] The electronic component 20 is, for example, an LED. However, the electronic component 20 is not limited to this. When the electronic component 20 is an LED, the LED has a substrate. The substrate material of the LED is preferably a material with a lower withstand voltage than silicon. A specific example of a substrate made of a material with a lower withstand voltage than silicon is a sapphire substrate. An LED using a sapphire substrate is, for example, an LED that generates blue light.

[0017] The electronic component 20 has a first surface 20a and a second surface 20b in the thickness direction of the electronic component 20. The second surface 20b is the surface opposite to the first surface 20a. The electronic component 20 has an electrode 21 and an electrode 22. The electrode 21 and the electrode 22 are on the first surface 20a and the second surface 20b, respectively. The electronic component 20 is disposed on the die pad 12a such that the electrode 21 faces the die pad 12a.

[0018] A connection layer 23 is interposed between the electronic component 20 (electrode 21) and the die pad 12a. The connection layer 23 is made of, for example, a conductive adhesive. The electronic component 20 is electrically connected to the conductor pattern 12 (die pad 12a) by the connection layer 23. One end of the bonding wire 24 is connected to the conductor pattern 13, and the other end is connected to the electrode 22. This electrically connects the electronic component 20 to the conductor pattern 13. As described above, the conductor patterns 12 and 13 are electrically connected to the conductor patterns 14 and 15, respectively. Therefore, the conductor patterns 14 and 15 are electrically connected to the electronic component 20.

[0019] The sealing resin 30 is disposed on the substrate 10 so as to cover the electronic component 20. In addition to the electronic component 20, the sealing resin 30 also covers a part of the conductor pattern 12 including the die pad 12a, a part of the conductor pattern 13, the connection layer 23, and the bonding wires 24. When the electronic component 20 is an LED, the sealing resin 30 is made of a transparent resin that transmits light generated by the LED.

[0020] The metal foil 40 has a first portion 40a, a second portion 40b, and a connection portion 40c. The first portion 40a is disposed on the conductor pattern 14. The second portion 40b is disposed on the conductor pattern 15. The connection portion 40c connects the first portion 40a and the second portion 40b. The connection portion 40c faces the main surface 11b between the conductor pattern 14 and the conductor pattern 15 with a gap therebetween. That is, the metal foil 40 is disposed across the conductor pattern 14 and the conductor pattern 15. The conductor pattern 14 and the conductor pattern 15 are short-circuited by the metal foil 40. The constituent material of the metal foil 40 is a metal material. A specific example of the constituent material of the metal foil 40 is a solder alloy. The solder alloy is, for example, a tin-based alloy such as a tin-silver alloy, a tin-silver-copper alloy, or a tin-copper alloy. Although not shown, a flux may be applied to the surface of the metal foil 40.

[0021] <Method of Manufacturing Electronic Component Package 100> A method for manufacturing the electronic component package 100 will now be described.

[0022] Fig. 4 is a manufacturing process diagram of the electronic component package 100. As shown in Fig. 4, the manufacturing method of the electronic component package 100 includes a preparation step S1 and a metal foil attachment step S2. The metal foil attachment step S2 is performed after the preparation step S1.

[0023] In the preparation step S1, an electronic component package 100 is prepared without the metal foil 40 attached thereto. In the metal foil attachment step S2, the metal foil 40 is attached. The metal foil 40 is attached by placing the metal foil 40 so as to straddle the conductor patterns 14 and 15, and applying pressure to the metal foil 40 toward the substrate 10. By applying pressure in this manner, the metal foil 40 is crimped to the conductor patterns 14 and 15. In other words, it is sufficient that the metal foil 40 is physically attached to the conductor patterns 14 and 15, and it is not necessary that the metal foil 40 is metallically bonded to the conductor patterns 14 and 15.

[0024] <Method of mounting electronic component package 100> A method for mounting the electronic component package 100 will be described below.

[0025] Fig. 5 is a first cross-sectional view illustrating a mounting method of the electronic component package 100. As shown in Fig. 5, the electronic component package 100 is mounted on a substrate 200. The substrate 200 has a base material 201, and lands 202 and 203. The lands 202 and 203 are disposed on a main surface of the base material 201.

[0026] In the mounting method of the electronic component package 100, first, the electronic component package 100 is placed on the substrate 200. At this time, the conductor patterns 14 and 15 face the lands 202 and 203 with the metal foil 40 interposed therebetween. FIG. 6 is a second cross-sectional view showing the mounting method of the electronic component package 100. As shown in FIG. 6, in the mounting method of the electronic component package 100, second, the substrate 200 on which the electronic component package 100 is placed is reflowed. As a result, the metal foil 40 melts.

[0027] A part of the molten connection portion 40c is attracted to the molten first portion 40a by surface tension. The remaining part of the molten connection portion 40c is attracted to the molten second portion 40b by surface tension. The part of the molten connection portion 40c and the molten first portion 40a are cooled and solidified to become a connection layer 41, and a connection between the conductive pattern 14 and the land 202 is achieved. Similarly, the remaining part of the molten connection portion 40c and the molten second portion 40b are cooled and solidified to become a connection layer 42, and a connection between the conductive pattern 15 and the land 203 is achieved.

[0028] <Effects of Electronic Component Package 100> The effects of the electronic component package 100 will be described below.

[0029] The electronic component package 100 may be charged with static electricity. If the electronic component package 100 does not have the metal foil 40, a potential difference may occur between the conductor patterns 14 and 15 due to the static electricity. Since the electronic component 20 is electrically connected to the conductor patterns 14 and 15, the potential difference may also be applied to the electronic component 20, resulting in destruction of the electronic component 20. This effect becomes more noticeable when the electronic component 20 is an LED having a substrate made of a material having a lower withstand voltage than silicon.

[0030] The electronic component package 100 has a metal foil 40, and the metal foil 40 shorts between the conductor patterns 14 and 15. Therefore, even if the electronic component package 100 is charged with static electricity, no potential difference occurs between the conductor patterns 14 and 15, and the potential difference is not applied to the electronic component 20. Therefore, the electronic component package 100 can prevent damage to the electronic component 20 caused by static electricity.

[0031] In the electronic component package 100, by melting the metal foil 40 when mounting on the substrate 200, a part of the molten connection portion 40c is attracted to the molten first portion 40a and the remaining part of the molten connection portion 40c is attracted to the molten second portion 40b, and the connection layers 41 and 42 are separated. Therefore, a short circuit between the conductor pattern 14 and the conductor pattern 15 is eliminated by mounting the electronic component package 100 on the substrate 200. In addition, in the electronic component package 100, the metal foil 40 functions as a connection material that connects the conductor pattern 14 and the conductor pattern 15 to the lands 202 and 203, respectively, so that it is not necessary to separately supply a connection material such as a solder paste onto the lands 202 and 203.

[0032] Second embodiment An electronic component package according to the second embodiment will be described. The electronic component package according to the second embodiment is designated as electronic component package 100A. Here, differences from electronic component package 100 will be mainly described, and overlapping descriptions will not be repeated.

[0033] <Configuration of electronic component package 100A> The configuration of the electronic component package 100A will be described below.

[0034] The electronic component package 100A includes a substrate 10, an electronic component 20, a sealing resin 30, and a metal foil 40. In this respect, the configuration of the electronic component package 100A is common to the configuration of the electronic component package 100.

[0035] 7 is a bottom view of the electronic component package 100A. As shown in FIG. 7, in the electronic component package 100A, the width of the connection portion 40c in the second direction DR2 is smaller than the width of the first portion 40a in the second direction DR2 and the width of the second portion 40b in the second direction DR2. More specifically, the width of the connection portion 40c in the second direction DR2 decreases as it moves away from the first portion 40a in the first direction DR1. After the width of the connection portion 40c in the second direction DR2 becomes minimum, the width of the connection portion 40c in the second direction DR2 increases as it moves away from the first portion 40a in the first direction DR1 (as it moves closer to the second portion 40b). In these respects, the configuration of the electronic component package 100A is different from the configuration of the electronic component package 100.

[0036] <Effects of 100A Electronic Component Package> The effects of the electronic component package 100A will be described below.

[0037] In the electronic component package 100A, the first portion 40a and the second portion 40b are connected to each other via the connection portion 40c, so that the conductor pattern 14 and the conductor pattern 15 are short-circuited, similarly to the electronic component package 100, and damage to the electronic component 20 due to static electricity is suppressed.

[0038] In addition, in the electronic component package 100A, the width of the connection portion 40c in the second direction DR2 is smaller than the width of the first portion 40a in the second direction DR2 and the width of the second portion 40b in the second direction DR2, so that the molten connection portion 40c is easily separated into a portion attracted to the molten first portion 40a and a remaining portion attracted to the molten second portion 40b when mounted on the substrate 200. Therefore, the electronic component package 100A can prevent the conductor pattern 14 and the conductor pattern 15 from remaining short-circuited after mounting on the substrate 200.

[0039] (Additional Note) Configurations included in the embodiments of the present disclosure are listed below.

[0040] <Appendix 1> A substrate; Electronic components, A metal foil. the substrate includes a base material, a first conductor pattern, a second conductor pattern, a third conductor pattern, and a fourth conductor pattern; The substrate has a first main surface and a second main surface opposite the first main surface, the first conductor pattern and the second conductor pattern are arranged on the first principal surface so as to be spaced apart from each other in a first direction; the third conductor pattern and the fourth conductor pattern are disposed on the second principal surface so as to be spaced apart from each other in the first direction, the first conductor pattern and the second conductor pattern are electrically connected to the third conductor pattern and the fourth conductor pattern, respectively; the electronic component is disposed on the first conductor pattern so as to be electrically connected to the first conductor pattern, and is electrically connected to the second conductor pattern; The metal foil is disposed across the third conductor pattern and the fourth conductor pattern.

[0041] <Appendix 2> 2. The electronic component package according to claim 1, wherein the metal foil is made of a solder alloy.

[0042] <Appendix 3> the metal foil has, in the first direction, a first portion on the third conductor pattern, a second portion on the fourth conductor pattern, and a connection portion connecting the first portion and the second portion; The electronic component package of claim 1 or 2, wherein in a second direction perpendicular to the first direction, a width of the connection portion is smaller than a width of the first portion and a width of the second portion.

[0043] <Appendix 4> 4. The electronic component package of claim 1, wherein the electronic component is an LED.

[0044] <Appendix 5> 5. The electronic component package of claim 4, wherein the LED has a substrate made of a material that has a lower breakdown voltage than silicon.

[0045] Although the embodiment of the present disclosure has been described above, the above-mentioned embodiment can be modified in various ways. The scope of the present invention is not limited to the above-mentioned embodiment. The scope of the present invention is defined by the claims, and is intended to include all modifications within the meaning and scope equivalent to the claims. [Explanation of symbols]

[0046] 10 substrate, 11 base material, 11a, 11b main surface, 11c, 11d side surface, 12 conductive pattern, 12a die pad, 13, 14, 15, 16, 17 conductive pattern, 20 electronic component, 20a first surface, 20b second surface, 21, 22 electrode, 23 connection layer, 24 bonding wire, 30 sealing resin, 40 metal foil, 40a first portion, 40b second portion, 40c connection portion, 41, 42 connection layer, 50, 51 electrode, 100, 100A electronic component package, 200 substrate, 201 base material, 202, 203 land, DR1 first direction, DR2 second direction, S1 preparation step, S2 metal foil attachment step.

Claims

1. A substrate; Electronic components, A metal foil. the substrate includes a base material, a first conductor pattern, a second conductor pattern, a third conductor pattern, and a fourth conductor pattern; The substrate has a first main surface and a second main surface opposite to the first main surface, the first conductor pattern and the second conductor pattern are arranged on the first principal surface so as to be spaced apart from each other in a first direction; the third conductor pattern and the fourth conductor pattern are arranged on the second principal surface so as to be spaced apart from each other in the first direction, the first conductor pattern and the second conductor pattern are electrically connected to the third conductor pattern and the fourth conductor pattern, respectively; the electronic component is disposed on the first conductor pattern so as to be electrically connected to the first conductor pattern, and is electrically connected to the second conductor pattern; The metal foil is disposed across the third conductor pattern and the fourth conductor pattern.

2. 2. The electronic component package according to claim 1, wherein the metal foil is made of a solder alloy.

3. the metal foil has, in the first direction, a first portion on the third conductor pattern, a second portion on the fourth conductor pattern, and a connection portion connecting the first portion and the second portion; The electronic component package according to claim 1 , wherein in a second direction perpendicular to the first direction, a width of the connection portion is smaller than a width of the first portion and a width of the second portion.

4. The electronic component package according to claim 1 , wherein the electronic component is an LED.

5. 5. The electronic component package of claim 4, wherein the LED has a substrate made of a material having a lower breakdown voltage than silicon.

Citation Information

Patent Citations

  • Semiconductor device

    JP2023091924A