Wiring board and manufacturing method of the wiring board

Abstract

To provide a wiring board and a manufacturing method of the wiring board, capable of suppressing deterioration of reliability of a signal.SOLUTION: A wiring board 1 includes: a first wiring layer 210 that includes a first surface having a first region 211 and a second region 212; an adhesion increment film 270 that covers the second region 212; an insulation layer 220 that is formed onto the adhesion increment film 270; a vie hole 221 that is formed onto the insulation layer 220 and the adhesion increment film 270, and is reached to the first region 211; and a second wiring layer 230 that is formed onto the insulation layer 220, and is contacted to the first region 211 via the via hole 221. A roughness in the first region 211 is higher than roughness in the second region 212.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a wiring board and a method for manufacturing a wiring board. [Background technology]

[0002] A wiring board has been proposed in which the top and side surfaces of a wiring layer are roughened. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-164074 A [Patent Document 2] JP 2022-165329 A Summary of the Invention [Problem to be solved by the invention]

[0004] In a conventional wiring board, when the frequency of a signal transmitted through a wiring layer increases, there is a risk that the reliability of the signal may decrease.

[0005] An object of the present disclosure is to provide a wiring board capable of suppressing a decrease in signal reliability and a method for manufacturing the wiring board. [Means for solving the problem]

[0006] According to one embodiment of the present disclosure, a wiring substrate is provided that includes a first wiring layer having a first surface with a first region and a second region, an adhesion-enhancing film covering the second region, an insulating layer formed on the adhesion-enhancing film, a via hole formed in the insulating layer and the adhesion-enhancing film and reaching the first region, and a second wiring layer formed on the insulating layer and contacting the first region through the via hole, wherein the roughness in the first region is higher than the roughness in the second region. Effect of the Invention

[0007] According to the disclosed technology, deterioration of signal reliability can be suppressed. [Brief description of the drawings]

[0008] [Figure 1] 1 is a cross-sectional view illustrating a wiring board according to an embodiment; [Diagram 2] 1A to 1C are cross-sectional views (part 1) illustrating a method for manufacturing a wiring board according to an embodiment. [Diagram 3] 6A to 6C are cross-sectional views (part 2) illustrating the method for manufacturing a wiring board according to the embodiment. [Figure 4] 6A to 6C are cross-sectional views (part 3) illustrating the method for manufacturing a wiring board according to the embodiment. [Diagram 5] 1A to 1C are cross-sectional views illustrating a method for forming a via hole and a wiring layer (part 1). [Figure 6] 6A to 6C are cross-sectional views (part 2) illustrating a method for forming a via hole and a wiring layer. [Figure 7] 11A and 11B are diagrams illustrating changes in the inside of an opening caused by plasma processing; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. In this specification and the drawings, components having substantially the same functional configurations are denoted by the same reference numerals, and redundant description may be omitted.

[0010] [Structure of wiring board according to embodiment] First, the structure of the wiring board according to the embodiment will be described. Fig. 1 is a cross-sectional view illustrating the wiring board according to the embodiment.

[0011] 1(a), a wiring board 1 according to the embodiment has, for example, a core layer 100, a build-up layer 200 provided on one surface of the core layer 100, and a build-up layer 300 provided on the other surface of the core layer 100. The wiring board 1 may be a coreless board that does not include a core layer.

[0012] In this embodiment, for convenience, the buildup layer 200 side is referred to as the upper side or one side, and the buildup layer 300 side is referred to as the lower side or the other side, with the core layer 100 as the reference. The upper surface of each part is referred to as the one side or top surface, and the lower surface is referred to as the other side or bottom surface. However, the wiring board 1 can be used upside down or placed at any angle. In addition, a planar view refers to viewing an object from the normal direction of one surface of the core layer 100, and a planar shape refers to the shape of an object viewed from the normal direction of one surface of the core layer 100.

[0013] The core layer 100 has an insulating base material 111 in which a plurality of through holes 112 are formed, and a conductive layer 113 formed on the inner wall surface of the through holes 112. For example, the base material is glass epoxy or the like, and the conductive layer 113 is made of copper (Cu) or the like. The core layer 100 may have a filler filled inside the conductive layer 113.

[0014] The build-up layer 200 includes wiring layers 210, 230, and 250, insulating layers 220 and 240, a solder resist layer 260, and adhesion enhancing films 270 and 280. The build-up layer 300 includes wiring layers 310, 330, and 350, insulating layers 320 and 340, a solder resist layer 360, and adhesion enhancing films 370 and 380. The insulating layer 220 is provided between the wiring layer 210 and the wiring layer 230 adjacent to each other in the thickness direction, and the insulating layer 240 is provided between the wiring layer 230 and the wiring layer 250 adjacent to each other in the thickness direction. The insulating layer 320 is provided between the wiring layer 310 and the wiring layer 330 adjacent to each other in the thickness direction, and the insulating layer 340 is provided between the wiring layer 330 and the wiring layer 350 adjacent to each other in the thickness direction.

[0015] The wiring layer 210 is formed on one surface of the core layer 100. The wiring layer 310 is formed on the other surface of the core layer 100. The wiring layers 210 and 310 are electrically connected to each other by the conductive layer 113. The wiring layers 210 and 310 and the conductive layer 113 are made of a material such as copper (Cu). The thickness of the wiring layers 210 and 310 is, for example, about 10 μm to 30 μm.

[0016] The adhesion enhancing film 270 is formed on one surface and a side surface of the wiring layer 210. The adhesion enhancing film 270 covers one surface and a side surface of the wiring layer 210. The adhesion enhancing film 270 is formed from a material having two types of functional groups with different reactivity in one molecule. The material of the adhesion enhancing film 270 is, for example, a silane coupling agent or a titanium coupling agent. The thickness of the adhesion enhancing film 270 is, for example, about 3 nm to 8 nm.

[0017] In the silane coupling agent, the functional group that chemically bonds with an organic material such as a resin preferably contains an amino group, an epoxy group, a mercapto group, an isocyanate group, a methacryloxy group, an acryloxy group, a ureido group, or a sulfide group. The optimal functional group is selected depending on the type of resin that chemically bonds with the silane coupling agent.

[0018] In the silane coupling agent, the functional group that chemically bonds with an inorganic material such as a metal preferably contains an azole group, a silanol group, a methoxy group, or an ethoxy group. The optimal functional group is selected depending on the type of metal that chemically bonds with the silane coupling agent.

[0019] The insulating layer 220 is formed on one surface of the core layer 100 so as to cover the wiring layer 210 and the adhesion enhancing film 270. The material of the insulating layer 220 is, for example, an insulating resin mainly composed of an epoxy resin or a polyimide resin. The thickness of the insulating layer 220 is, for example, about 30 μm to 40 μm. The insulating layer 220 may contain a filler such as silica (SiO2). The content of the filler in the insulating layer 220 can be appropriately set according to the required coefficient of thermal expansion (CTE). The adhesion enhancing film 270 improves the adhesion between the wiring layer 210 and the insulating layer 220. That is, when the adhesion enhancing film 270 is provided, higher adhesion can be obtained between the wiring layer 210 and the insulating layer 220 than when the wiring layer 210 and the insulating layer 220 are in direct contact with each other.

[0020] A via hole 221 is formed in the insulating layer 220 and the adhesion enhancing film 270. The via hole 221 penetrates the insulating layer 220 and the adhesion enhancing film 270. The via hole 221 overlaps the wiring layer 210 in a plan view and reaches the wiring layer 210. The via hole 221 may be a recess in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the via hole 221 may be larger than the opening diameter at the lower end.

[0021] The wiring layer 230 is formed on one surface of the insulating layer 220. The wiring layer 230 includes a via conductor in the via hole 221 and a wiring pattern on one surface of the insulating layer 220. The wiring pattern of the wiring layer 230 is electrically connected to the wiring layer 210 through the via conductor. The material and thickness of the wiring layer 230 are the same as those of the wiring layer 210, for example.

[0022] The adhesion enhancing film 280 is formed on one surface and a side surface of the wiring layer 230. The adhesion enhancing film 280 covers one surface and a side surface of the wiring layer 230. The material and thickness of the adhesion enhancing film 280 are the same as those of the adhesion enhancing film 270, for example.

[0023] The insulating layer 240 is formed on one side of the insulating layer 220 so as to cover the wiring layer 230 and the adhesion enhancing film 280. The material and thickness of the insulating layer 240 are, for example, the same as those of the insulating layer 220. The insulating layer 240 may contain a filler such as silica (SiO2). The content of the filler in the insulating layer 240 is, for example, the same as that of the insulating layer 220. The adhesion enhancing film 280 improves the adhesion between the wiring layer 230 and the insulating layer 240. That is, when the adhesion enhancing film 280 is provided, higher adhesion is obtained between the wiring layer 230 and the insulating layer 240 than when the wiring layer 230 and the insulating layer 240 are in direct contact with each other.

[0024] A via hole 241 is formed in the insulating layer 240 and the adhesion enhancing film 280. The via hole 241 penetrates the insulating layer 240 and the adhesion enhancing film 280. The via hole 241 overlaps the wiring layer 230 in a plan view and reaches the wiring layer 230. The via hole 241 may be a recess in the shape of an inverted truncated cone. That is, the opening diameter at the upper end of the via hole 241 may be larger than the opening diameter at the lower end.

[0025] The wiring layer 250 is formed on one surface of the insulating layer 240. The wiring layer 250 includes a via conductor in the via hole 241 and a wiring pattern on one surface of the insulating layer 240. The wiring pattern of the wiring layer 250 is electrically connected to the wiring layer 230 through the via conductor. The material and thickness of the wiring layer 250 are, for example, similar to those of the wiring layer 210. An adhesion enhancing film (not shown) may be formed on one surface and side surfaces of the wiring layer 250.

[0026] The solder resist layer 260 is formed on one surface of the insulating layer 240 so as to cover the wiring layer 250. An opening 261 is formed in the solder resist layer 260. The opening 261 penetrates the solder resist layer 260. The opening 261 overlaps with an electrode pad, which is a part of the wiring layer 250, in a plan view, and reaches the electrode pad.

[0027] The adhesion enhancing film 370 is formed on the other surface and side surface of the wiring layer 310. The adhesion enhancing film 370 covers the other surface and side surface of the wiring layer 310. The material and thickness of the adhesion enhancing film 370 are the same as those of the adhesion enhancing film 270, for example.

[0028] The insulating layer 320 is formed on the other surface of the core layer 100 so as to cover the wiring layer 310 and the adhesion enhancing film 370. The material and thickness of the insulating layer 320 are, for example, the same as those of the insulating layer 220. The insulating layer 320 may contain a filler such as silica (SiO2). The content of the filler in the insulating layer 320 is, for example, the same as that of the insulating layer 220. The adhesion enhancing film 370 improves the adhesion between the wiring layer 310 and the insulating layer 320. That is, when the adhesion enhancing film 370 is provided, higher adhesion is obtained between the wiring layer 310 and the insulating layer 320 than when the wiring layer 310 and the insulating layer 320 are in direct contact with each other.

[0029] A via hole 321 is formed in the insulating layer 320 and the adhesion enhancing film 370. The via hole 321 penetrates the insulating layer 320 and the adhesion enhancing film 370. The via hole 321 overlaps the wiring layer 310 in a plan view and reaches the wiring layer 310. The via hole 321 may be a truncated cone-shaped recess. That is, the opening diameter at the lower end of the via hole 321 may be larger than the opening diameter at the upper end.

[0030] The wiring layer 330 is formed on the other surface of the insulating layer 320. The wiring layer 330 includes via conductors in the via holes 321 and a wiring pattern on the other surface of the insulating layer 320. The wiring pattern of the wiring layer 330 is electrically connected to the wiring layer 310 through the via conductors. The material and thickness of the wiring layer 330 are similar to those of the wiring layer 210, for example.

[0031] The adhesion enhancing film 380 is formed on the other surface and side surface of the wiring layer 330. The adhesion enhancing film 380 covers the other surface and side surface of the wiring layer 330. The material and thickness of the adhesion enhancing film 380 are the same as those of the adhesion enhancing film 270, for example.

[0032] The insulating layer 340 is formed on the other surface of the insulating layer 320 so as to cover the wiring layer 330 and the adhesion enhancing film 380. The material and thickness of the insulating layer 340 are, for example, the same as those of the insulating layer 220. The insulating layer 340 may contain a filler such as silica (SiO2). The content of the filler in the insulating layer 340 is, for example, the same as that of the insulating layer 220. The adhesion enhancing film 380 improves the adhesion between the wiring layer 330 and the insulating layer 340. That is, when the adhesion enhancing film 380 is provided, higher adhesion is obtained between the wiring layer 330 and the insulating layer 340 than when the wiring layer 330 and the insulating layer 340 are in direct contact with each other.

[0033] A via hole 341 is formed in the insulating layer 340 and the adhesion enhancing film 380. The via hole 341 penetrates the insulating layer 340 and the adhesion enhancing film 380. The via hole 341 overlaps the wiring layer 330 in a plan view and reaches the wiring layer 330. The via hole 341 may be a truncated cone-shaped recess. That is, the opening diameter at the lower end of the via hole 341 may be larger than the opening diameter at the upper end.

[0034] The wiring layer 350 is formed on one surface of the insulating layer 340. The wiring layer 350 includes via conductors in the via holes 341 and a wiring pattern on the other surface of the insulating layer 340. The wiring pattern of the wiring layer 350 is electrically connected to the wiring layer 330 through the via conductors. The material and thickness of the wiring layer 350 are, for example, similar to those of the wiring layer 210. An adhesion enhancing film (not shown) may be formed on the other surface and side surfaces of the wiring layer 350.

[0035] The solder resist layer 360 is formed on one surface of the insulating layer 340 so as to cover the wiring layer 350. An opening 361 is formed in the solder resist layer 360. The opening 361 penetrates the solder resist layer 360. The opening 361 overlaps with an electrode pad, which is a part of the wiring layer 350, in a plan view, and reaches the electrode pad.

[0036] Here, the wiring layer 210, the adhesion enhancing film 270, the insulating layer 220 and the wiring layer 230 will be described in more detail.

[0037] As shown in FIG. 1(b), the upper surface 215 of the wiring layer 210 includes a first region 211 and a second region 212. For example, the first region 211 is surrounded by the second region 212. The via hole 221 reaches the first region 211. The second region 212 is covered with the adhesion enhancing film 270, and the first region 211 is not covered with the adhesion enhancing film 270. The roughness in the first region 211 is higher than the roughness in the second region 212. For example, the first arithmetic mean roughness Ra in the first region 211 is higher than the second arithmetic mean roughness Ra in the second region 212. For example, the first arithmetic mean roughness Ra is 80 nm or more and 250 nm or less, and the second arithmetic mean roughness is 10 nm or more and 100 nm or less. Preferably, the first arithmetic mean roughness Ra is 90 nm or more and 150 nm or less, and the second arithmetic mean roughness is 20 nm or more and 60 nm or less.

[0038] The wiring layer 230 contacts the first region 211, the inner wall surface of the via hole 221, and one surface of the insulating layer 220. The wiring layer 230 does not contact the second region 212. Looking at it from the other way around, the region of the upper surface 215 with which the wiring layer 230 contacts is the first region 211, and the region with which the wiring layer 230 does not contact is the second region 212. The wiring layer 230 has a seed layer 226 and a plating layer 227. The plating layer 227 contacts one surface of the seed layer 226.

[0039] The wiring layer 230, the adhesion enhancing film 280, the insulating layer 240, and the wiring layer 250 are also stacked on one another, similar to the wiring layer 210, the adhesion enhancing film 270, the insulating layer 220, and the wiring layer 230. The wiring layer 310, the adhesion enhancing film 370, the insulating layer 320, and the wiring layer 330 are also stacked on one another, similar to the wiring layer 210, the adhesion enhancing film 270, the insulating layer 220, and the wiring layer 230. The wiring layer 330, the adhesion enhancing film 380, the insulating layer 340, and the wiring layer 350 are also stacked on one another, similar to the wiring layer 210, the adhesion enhancing film 270, the insulating layer 220, and the wiring layer 230.

[0040] [Method of Manufacturing a Wiring Board According to an Embodiment] Next, a method for manufacturing the wiring board 1 according to the embodiment will be described. Figures 2 to 4 are cross-sectional views illustrating the method for manufacturing the wiring board according to the embodiment.

[0041] 2(a), a laminate is prepared of a core layer 100, a wiring layer 210, and a wiring layer 310. The core layer 100 has an insulating base material 111 having a through hole 112 formed therein, and a conductive layer 113.

[0042] 2(b), an adhesion enhancing film 270 is formed on the upper surface and side surfaces of the wiring layer 210, and an adhesion enhancing film 370 is formed on the lower surface and side surfaces of the wiring layer 310. The adhesion enhancing films 270 and 370 are formed using, for example, a silane coupling agent.

[0043] To form the adhesion enhancing films 270 and 370 using a silane coupling agent, for example, the structure of FIG. 2(a) may be immersed in a diluted solution of the silane coupling agent. The diluted solution of the silane coupling agent may be sprayed onto the upper surface and side surface of the wiring layer 210 of the structure of FIG. 2(a) to form the adhesion enhancing film 270, and the diluted solution of the silane coupling agent may be sprayed onto the lower surface and side surface of the wiring layer 310 to form the adhesion enhancing film 370. The concentration of the diluted solution of the silane coupling agent is 0.1% to 10%, preferably 0.5% to 5%. At this stage, the thickness of the adhesion enhancing films 270 and 370 may be, for example, about 20 nm to 30 nm at the thickest part. Then, washing with water, partial removal of the adhesion enhancing films 270 and 370 using a removal treatment liquid such as an acidic solution, and drying are performed in this order. As a result, the adhesion enhancing films 270 and 370 having a thickness of about 3 nm to 8 nm are obtained.

[0044] After the adhesion enhancing films 270 and 370 are formed, as shown in FIG. 2(c), an uncured resin film is attached to one surface of the core layer 100 so as to cover the wiring layer 210 and the adhesion enhancing film 270, and an uncured resin film is attached to the other surface of the core layer 100 so as to cover the wiring layer 310 and the adhesion enhancing film 370. Next, these resin films are heat-treated and cured to form the insulating layers 220 and 320. The insulating layers 220 and 320 are formed from an insulating resin such as an epoxy resin or a polyimide resin. The insulating layers 220 and 320 may be formed by applying a liquid resin.

[0045] Thereafter, as shown in FIG. 3( a ), a via hole 221 reaching the wiring layer 210 is formed in the insulating layer 220 and the adhesion enhancing film 270 , and a via hole 321 reaching the wiring layer 310 is formed in the insulating layer 320 and the adhesion enhancing film 370 .

[0046] Next, as shown in FIG. 3(b), a wiring layer 230 is formed including a via conductor in the via hole 221 and a wiring pattern on one side of the insulating layer 220, and a wiring layer 330 is formed including a via conductor in the via hole 321 and a wiring pattern on the other side of the insulating layer 320.

[0047] Here, a method for forming the via holes 221 and the wiring layer 230 will be described. Figures 5 and 6 are cross-sectional views illustrating an example of a method for forming the via holes and the wiring layer.

[0048] First, as shown in FIG. 5(a), the insulating layer 220 is processed with a laser to form an opening 222 in the insulating layer 220, and the adhesion enhancing film 270 is exposed from the insulating layer 220. The insulating layer 220 may be processed using a drill. After the opening 222 is formed, a desmear process is preferably performed. As a result of the formation of the opening 222, the adhesion enhancing film 270 includes an exposed portion 272 exposed from the opening 222.

[0049] Next, as shown in FIG. 5(b), the exposed portion 272 is roughened. In roughening the exposed portion 272, for example, oxygen plasma is irradiated to the exposed portion 272. As a result, fine irregularities are formed in the exposed portion 272. In other words, the portion of the adhesion enhancing film 270 exposed from the opening 222 becomes fibrous. FIG. 7 is a diagram illustrating the change inside the opening caused by plasma treatment. FIG. 7(a) shows an example of a state before irradiation with oxygen plasma, and FIG. 7(b) shows an example of a state after irradiation with oxygen plasma. FIG. 7 shows an SEM image observed with a scanning electron microscope (SEM).

[0050] After roughening the exposed portion 272, a reverse sputtering process is performed on the upper surface 215 of the wiring layer 210 through the roughened exposed portion 272, thereby forming a via hole 221 that includes the opening 222 and reaches the upper surface 215, as shown in Fig. 5(c). In this reverse sputtering process, the removal of the exposed portion 272 and the removal of the wiring layer 210 proceed simultaneously, so that the upper surface 215 of the wiring layer 210 has a shape similar to that of the roughened exposed portion 272. In the reverse sputtering process, for example, argon ions are used.

[0051] The opening 222 is formed so that the via hole 221 reaches the first region 211 of the upper surface 215 .

[0052] 5(d), a seed layer 226 made of copper or the like is formed by sputtering on the upper surface of the insulating layer 220, the inner wall surface of the via hole 221, and the first region 211. The seed layer 226 may be formed by electroless plating.

[0053] 6(a), a plating resist layer 228 is formed on the seed layer 226. Thereafter, the plating resist layer 228 is exposed to light and developed to form an opening 229 in the plating resist layer 228.

[0054] Subsequently, as shown in FIG. 6(b), a plating layer 227 made of copper or the like is formed in the openings 229 of the plating resist layer 228 by electrolytic plating using the seed layer 226 as a plating power supply path.

[0055] 6(c), the plating resist layer 228 is removed. Furthermore, the seed layer 226 is removed by flash etching using the plating layer 227 as a mask. In this manner, the wiring layer 230 including the seed layer 226 and the plating layer 227 is formed.

[0056] The via hole 321 and the wiring layer 330 can be formed in a similar manner to the via hole 221 and the wiring layer 230.

[0057] After the wiring layers 230 and 330 are formed, as shown in FIG. 3(c), an adhesion enhancing film 280 is formed on the upper surface and side surface of the wiring layer 230, and an adhesion enhancing film 380 is formed on the lower surface and side surface of the wiring layer 330. The adhesion enhancing films 280 and 380 can be formed in the same manner as the adhesion enhancing films 270 and 370. Next, an insulating layer 240 is formed on the insulating layer 220 so as to cover the wiring layer 230 and the adhesion enhancing film 280. In addition, an insulating layer 340 is formed under the insulating layer 320 so as to cover the wiring layer 330 and the adhesion enhancing film 380. The insulating layers 240 and 340 can be formed in the same manner as the insulating layers 220 and 320.

[0058] 4(a), a via hole 241 reaching the wiring layer 230 is formed in the insulating layer 240 and the adhesion enhancing film 280, and a via hole 341 reaching the wiring layer 330 is formed in the insulating layer 340 and the adhesion enhancing film 380. Next, a wiring layer 250 including a via conductor in the via hole 241 and a wiring pattern on one side of the insulating layer 240 is formed, and a wiring layer 350 including a via conductor in the via hole 341 and a wiring pattern on the other side of the insulating layer 340 is formed.

[0059] 4(b), a solder resist layer 260 is formed on the insulating layer 240, and a solder resist layer 360 is formed under the insulating layer 340. Thereafter, an opening 261 is formed in the solder resist layer 260, and an opening 361 is formed in the solder resist layer 360.

[0060] In this manner, the wiring board 1 according to the embodiment can be manufactured.

[0061] In the wiring board 1, the via conductor of the wiring layer 230 contacts the first region 211 having a high roughness, and therefore, excellent adhesion can be obtained between the wiring layer 210 and the wiring layer 230 due to the anchor effect. In addition, an adhesion enhancing film 270 exists between the second region 212 and the insulating layer 220. Therefore, even if the roughness of the second region 212 is not as high as that of the first region 211, excellent adhesion can be obtained between the wiring layer 210 and the insulating layer 220. If the roughness of the second region 212 is high, there is a risk that the reliability of the signal will decrease due to disturbance such as signal reflection in the second region 212. However, in this embodiment, the roughness of the second region 212 may be low, and therefore the decrease in the reliability of the signal can be suppressed. In the wiring layers 230, 310, and 330, as in the wiring layer 210, the decrease in the reliability of the signal can be suppressed while obtaining excellent adhesion. The effect of suppressing the decrease in the reliability of the signal is particularly remarkable as the frequency of the signal increases.

[0062] Moreover, according to the above manufacturing method, first region 211 and second region 212 having different roughnesses can be easily provided on upper surface 215 of wiring layer 210. Similar to upper surface 215 of wiring layer 210, first regions and second regions having different roughnesses can also be easily provided on the upper surface of wiring layer 230, the lower surface of wiring layer 310, and the lower surface of wiring layer 330.

[0063] Although preferred embodiments have been described in detail above, the present disclosure is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims. [Explanation of symbols]

[0064] 1. Wiring board 210, 230, 250, 310, 330, 350 wiring layer 211 First area 212 Second area 215 Top surface 220, 240, 320, 340 Insulation layer 221, 241, 321, 341 Beer Hall 222 Opening 270, 280, 370, 380 Adhesion enhancing film 272 Exposed part

Claims

1. a first wiring layer having a first surface including a first region and a second region; an adhesion enhancing film covering the second region; an insulating layer formed on the adhesion enhancing film; a via hole formed in the insulating layer and the adhesion enhancing film and reaching the first region; a second wiring layer formed on the insulating layer and in contact with the first region through the via hole; having A wiring substrate, wherein the roughness in the first region is higher than the roughness in the second region.

2. The wiring board according to claim 1 , wherein the adhesion enhancing film contains a silane coupling agent.

3. The arithmetic mean roughness in the first region is 80 nm or more and 250 nm or less, 3. The wiring board according to claim 1, wherein the arithmetic mean roughness in the second region is 10 nm or more and 100 nm or less.

4. forming a first wiring layer having a first surface; forming an adhesion enhancing film overlying the first surface; forming an insulating layer on the adhesion enhancing film; forming an opening in the insulating layer that reaches the adhesion enhancing film; roughening an exposed portion of the adhesion enhancing film exposed through the opening; performing a reverse sputtering process on the first surface through the roughened exposed portion to form a via hole including the opening and reaching the first surface; forming a second wiring layer on the insulating layer, the second wiring layer contacting the first surface through the via hole; A method for manufacturing a wiring board having the above structure.

5. The method for manufacturing a wiring board according to claim 4 , wherein the step of roughening the exposed portion includes a step of irradiating the exposed portion with oxygen plasma.

6. 6. The method for manufacturing a wiring board according to claim 4, wherein argon ions are used in the reverse sputtering process.

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