Wiring board

Abstract

To improve a quality of a wiring board.SOLUTION: A wiring board 1 of an embodiment contains: an insulation layer 2 having a plurality of penetration holes 5; two conductive layers 31 and 32 that are opposite to each other via the insulation layer 2; and a plurality of inter-layer conductors 4 that are formed in a cylinder shape into the plurality of penetration holes 5, and connect the two conductive layers 31 and 32. The wiring board 1 includes: a first region A1 in which one part of the plurality of inter-layer conductors 4 is formed; and a second region A2 in which one part of the plurality of inter-layer conductors 4 is formed with a density that is higher than that of the first region A1. The plurality of penetration holes 5 contain: a first penetration hole 51 that is formed in the first region A1; and a second penetration hole 52 that is formed in the second region A2 with a density that is higher than the density of the first penetration hole 51 in the first region A1. A thickness of a first inter-layer conductor 41 formed in the first penetration hole 51 is larger than the thickness of a second inter-layer conductor 42 formed in the second penetration hole 52, and an inner diameter of the first penetration hole 51 is larger than an inner diameter of the second penetration hole 52.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a wiring board. [Background technology]

[0002] Patent Document 1 discloses a method for manufacturing a printed wiring board having high-density and low-density regions of through holes formed in an insulating layer. After electrolytic plating films are formed on both sides of a double-sided copper-clad laminate and in the through holes, the electrolytic plating film formed in the low-density regions is reduced by etching while the high-density regions are masked. Then, the cavities in the through holes are filled with a filling material. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-20516 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the method of manufacturing a printed wiring board disclosed in Patent Document 1, depending on the conditions of electrolytic plating and etching, unfilled portions may occur in the cavities in the through holes. For example, it may be difficult to properly fill the cavities in the through holes in both high-density and low-density regions. If the cavities are not properly filled and unfilled portions remain, swelling, conductor peeling, and the like may occur, which may hinder improvement in the quality of the printed wiring board. [Means for solving the problem]

[0005] The wiring board of the present invention includes an insulating layer having a plurality of through holes, two conductor layers facing each other with the insulating layer interposed therebetween, and a plurality of interlayer conductors formed in a cylindrical shape in the plurality of through holes and connecting the two conductor layers together, the wiring board has a first region in which some of the plurality of interlayer conductors are formed, and a second region in which some of the plurality of interlayer conductors are formed at a higher density than in the first region, the plurality of through holes include first through holes formed in the first region and second through holes formed in the second region at a higher density than the density of the first through holes in the first region, the thickness of the first interlayer conductor formed in the first through hole among the plurality of interlayer conductors is greater than the thickness of the second interlayer conductor formed in the second through hole among the plurality of interlayer conductors, and the inner diameter of the first through hole is greater than the inner diameter of the second through hole.

[0006] According to an embodiment of the present invention, it is believed that the inside of the interlayer conductors connecting conductor layers is appropriately filled in each of the regions where the placement density of the interlayer conductors differs, which may improve the quality of the wiring board. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a cross-sectional view showing an example of a wiring board according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a plan view of the wiring board of FIG. [Figure 3A] An enlarged view of part IIIA in Fig. 1 . [Figure 3B] An enlarged view of part IIIB in Fig. 1. [Figure 4A] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4B] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4C] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4D] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4E] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4F] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4G] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. [Figure 4H] 5A to 5C are cross-sectional views showing an example of a manufacturing process of the wiring board according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] A wiring board according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a cross-sectional view of a wiring board 1, which is an example of the wiring board according to the present embodiment. FIG. 2 shows a plan view of the wiring board 1 of FIG. 1. FIG. 1 is a cross-sectional view of the wiring board 1 along line II shown in FIG. 2. The wiring board 1 is merely an example of the wiring board according to the embodiment. For example, the number of conductor layers and insulating layers included in the wiring board according to the embodiment is not limited to the number of conductor layers and insulating layers included in the wiring board 1 of FIG. 1. That is, the wiring board according to the embodiment may include any number of insulating layers and conductor layers in addition to the insulating layers and conductor layers that the wiring board 1 has. In addition, in each drawing referred to in the following description, a specific portion may be drawn enlarged so that the disclosed embodiment can be easily understood, and the components may not be drawn at the exact ratio between each other in terms of size and length.

[0009] As shown in FIG. 1, the wiring board 1 includes an insulating layer 2, two conductor layers (conductor layer 31 and conductor layer 32) facing each other with the insulating layer 2 interposed therebetween, and a plurality of interlayer conductors 4 connecting the conductor layer 31 and the conductor layer 32. The insulating layer 2 has a first surface 2a and a second surface 2b as two surfaces that are perpendicular to the thickness direction of the insulating layer 2 and face each other. The conductor layer 31 (first conductor layer) is formed on the first surface 2a, and the conductor layer 32 (second conductor layer) is formed on the second surface 2b. The insulating layer 2 further has a plurality of through holes 5 penetrating between the first surface 2a and the second surface 2b. The plurality of interlayer conductors 4 are formed in each of the plurality of through holes 5. Each of the plurality of through holes 5 contains one of the plurality of interlayer conductors 4. The plurality of interlayer conductors 4 are each formed in a cylindrical shape along the inner wall of the insulating layer 2 surrounding each of the plurality of through holes 5. That is, each interlayer conductor 4 has a film-like shape in part and a cylindrical shape having a hollow portion 4a as a whole.

[0010] Each of the interlayer conductors 4 penetrates the insulating layer 2 and connects the conductor layer 31 and the conductor layer 32. The interlayer conductors 4 may be so-called through-hole conductors. The interlayer conductors 4 are also called via conductors. However, the interlayer conductors 4 do not connect a conductor layer covered by the insulating layer 2 to any other conductor layer, but are electric conductors that connect conductor layers formed directly on each of two surfaces of the insulating layer 2 that intersect with the thickness direction of the insulating layer 2.

[0011] The hollow portion 4a of each of the interlayer conductors 4 is filled with a filler 6. The filler 6 is made of an insulating thermosetting resin such as an epoxy resin or a phenolic resin. The filler 5 may be made of a conductive resin containing conductive particles and an epoxy resin. However, the constituent material of the filler 6 is not limited to a thermosetting resin and a conductive resin. The filler 6 may be made of any resin.

[0012] 1, a component E is mounted on the wiring board 1. The component E may be, for example, any semiconductor integrated circuit device such as a microcomputer or memory, or a passive element such as a discrete semiconductor element or a resistor array.

[0013] 1 includes only the insulating layer 2, the conductor layers 31 and 32, and the interlayer conductor 4, but as described above, the wiring board of the embodiment may further include one or more pairs of insulating layers and conductor layers on each of the first surface 2a side and the second surface 2b side of the insulating layer 2. In that case, the insulating layer 2 and the conductor layers 31 and 32 may be formed as a core substrate of the wiring board of the embodiment and function as the core substrate. In that case, each of the multiple interlayer conductors 4 functions as a through-hole conductor that penetrates the insulating layer of the core substrate and connects the conductor layers on both sides of the core substrate.

[0014] As shown in Figs. 1 and 2, the wiring board 1 has a first region A1 and a second region A2 in which a portion of the multiple interlayer conductors 4 is formed. The first region A1 and the second region A2 are separate regions. The first region A1 and the second region A2 are regions in which the arrangement density of the multiple interlayer conductors 4 differs from each other in a plan view. Note that "plan view" means that an object is viewed with a line of sight along the thickness direction of the wiring board of the embodiment. In the second region A2, a portion of the multiple interlayer conductors 4 (second interlayer conductor 42) is formed at a higher density than the arrangement density of a portion of the multiple interlayer conductors 4 (first interlayer conductor 41) formed in the first region A1.

[0015] That is, the multiple interlayer conductors 4 include a first interlayer conductor 41 formed in the first region A1 and a second interlayer conductor 42 formed in the second region A2. The second interlayer conductor 42 is formed in the second region A2 at a higher density than the density of the first interlayer conductor 41 in the first region A1. Therefore, the multiple through holes 5 also include a first through hole 51 formed in the first region A1 and a second through hole 52 formed in the second region A2 at a higher density than the density of the first through holes 51 in the first region A1. The first interlayer conductor 41 is formed in the first through hole 51, and the second interlayer conductor 42 is formed in the second through hole 52.

[0016] As shown in FIG. 2, in the examples of FIG. 1 and FIG. 2, the second region A2 occupies the center of the wiring board 1 in a plan view. The first region A1 is provided outside the second region A2 in a plan view. The first region A1 occupies an area outside the second region A2 and surrounds the second region A2. As shown in FIG. 2, the wiring board 1 has a component mounting region ER, which is an area in which the component E shown in FIG. 1 is disposed. The component mounting region ER may be an area that is covered by the component E when the component E is mounted on the wiring board 1. In the wiring board 1, the second region A2 is provided directly below the component mounting region ER. Moreover, the second region A2 overlaps with the component mounting region ER almost entirely in a plan view. Meanwhile, the first region A1 surrounds the component mounting region ER in a plan view.

[0017] In a wiring board 1 having a second region A2 in the center where some of the interlayer conductors 4 are arranged at a higher density than the first region A1, high heat dissipation characteristics may be achieved from electronic components such as component E that are likely to be arranged in the center. Also, wiring may be drawn out from each of the many terminals of an electronic component such as component E. However, the positions, sizes, and shapes that the first region A1 and the second region A2 occupy within the wiring board 1 in a plan view are not limited to the examples in Figures 1 and 2. The first region A1 and the second region A2 may occupy any size and shape at any position within the wiring board 1 in a plan view.

[0018] The density of the first through holes 51 in the first region A1 is 0.6 pcs / mm 2 More than 1.2 pieces / mm 2 When the first through holes 51 are arranged at a density in this range, wiring arranged at a moderate fine pitch may be easily formed. On the other hand, the density of the second through holes 52 in the second region A2 may be 6 pcs / mm or less. 2 More than 10 pieces / mm 2 If the second through holes 52 are arranged at a density within this range, the high heat dissipation performance described above may be achieved and many wirings may be drawn out. On the other hand, the second through holes 52 and the second interlayer conductors 42 may be formed without using an extremely advanced method.

[0019] The insulating layer 2 is formed, for example, using an insulating resin. Examples of the insulating resin constituting the insulating layer 2 include thermosetting resins such as epoxy resin, bismaleimide triazine resin (BT resin), and phenol resin. However, the material of the insulating layer 2 is not limited to these exemplified thermosetting resins, and the insulating layer 2 may be formed using any material that has appropriate insulating properties and rigidity, such as a thermoplastic resin. In the example of FIG. 1, the insulating layer 2 includes a reinforcing material (core material) 21 that is made of, for example, glass fiber or aramid fiber. The insulating layer 2 may further include an inorganic filler (not shown) made of silica, alumina, or the like.

[0020] 1 and 2, each of the conductor layers 31 and 32 includes only a conductor pad 301 connected to the interlayer conductor 4. When the interlayer conductor 4 is a through-hole conductor as described above, the conductor pad 301 may be a so-called through-hole pad. Note that in the wiring board of the embodiment, each of the conductor layers 31 and 32 may include any conductor pattern.

[0021] The conductor layers 31 and 32, and the interlayer conductor 4 are formed using any metal, such as copper or nickel. The conductor layers 31 and 32, and the interlayer conductor 4 are each composed of a metal film formed by electroless plating, electrolytic plating, sputtering, or the like. The conductor layers 31 and 32 may further include a metal foil, such as a copper foil or a nickel foil, as a component. That is, the conductor layers 31 and 32, and the interlayer conductor 4 may have a multilayer structure including two or more metal films, as clearly shown in Figures 3A and 3B.

[0022] FIG. 3A is an enlarged view of part IIIA in FIG. 1, showing the first through hole 51 and the first interlayer conductor 41 near the first surface 2a of the insulating layer 2, and the conductor pad 301 in an enlarged view. FIG. 3B is an enlarged view of part IIIB in FIG. 1, showing the second through hole 52 and the second interlayer conductor 42 near the first surface 2a of the insulating layer 2, and the conductor pad 301 in an enlarged view. As shown in FIGS. 3A and 3B, the conductor pad 301, i.e., the conductor layer 31 in the wiring board 1 of the example of FIG. 1, has a five-layer structure. Specifically, the conductor layer 31 is composed of a first layer 30a, a second layer 30b, a third layer 30c, a fourth layer 30d, and a fifth layer 30e that are stacked in order on the first surface 2a of the insulating layer 2. Although not shown in FIGS. 3A and 3B, the conductor layer 32 also has the same structure as the conductor layer 31 on the second surface 2b of the insulating layer 2 (see FIG. 1).

[0023] The first layer 30a may be a metal foil layer made of, for example, copper foil or nickel foil, the second layer 30b and the fourth layer 30d may be metal film layers made of, for example, electroless plating film or sputtering film, and the third layer 30c and the fifth layer 30e may be metal film layers made of electrolytic plating film. Note that the conductor layer 31 (and the conductor layer 32) in the wiring board of the embodiment does not necessarily have the five-layer structure shown in Figures 3A and 3B. For example, the conductor layers 31 and 32 may not include the first layer 30a, which may be a metal foil layer. Furthermore, the conductor layers 31 and 32 may not include the fourth layer 30d and the fifth layer 30e.

[0024] On the other hand, the first interlayer conductor 41 and the second interlayer conductor 42 each include a lower layer film 40a in contact with the wall surface of the insulating layer 2 surrounding the first through hole 51 or the second through hole 52, and an upper layer film 40b formed on the lower layer film 40a. The lower layer film 40a may be a metal film made of, for example, an electroless plating film or a sputtering film, and the upper layer film 40b may be a metal film made of an electrolytic plating film. The lower layer film 40a is formed integrally with the second layer 30b of the conductor layer 31 and is continuous with the second layer 30b. The upper layer film 40b is formed integrally with the third layer 30c of the conductor layer 31 and is continuous with the third layer 30c. That is, the metal film constituting the lower layer film 40a is formed not only inside the first through hole 51 or the second through hole 52, but also on the first layer 30a of the conductor layer 31. Similarly, the metal film constituting the upper layer film 40b is formed not only inside the first through hole 51 or the second through hole 52, but also on the second layer 30b of the conductor layer 31.

[0025] In the wiring board of the embodiment, the thickness T1 of the first interlayer conductor 41 is greater than the thickness T2 of the second interlayer conductor 42. Specifically, the thickness of the upper layer film 40b constituting the first interlayer conductor 41 is greater than the thickness of the upper layer film 40b constituting the second interlayer conductor 42. In the wiring board 1, the conductor pattern of the conductor layer 31 and the conductor pattern of the conductor layer 32 (hereinafter also referred to as the "front and back conductor patterns") may be connected by one or more interlayer conductors among the multiple interlayer conductors 4 (see FIG. 1). In this case, the electrical resistance between the front and back conductor patterns is in principle inversely proportional to the number of interlayer conductors 4 connecting the front and back conductor patterns, i.e., the first interlayer conductors 41 or the second interlayer conductors 42.

[0026] In this regard, as described above, the first interlayer conductors 41 are formed in the first region A1 (see FIG. 2) at a lower density than the second interlayer conductors 42. Therefore, a difference is likely to occur between the number of first interlayer conductors 41 connecting the front and back conductor patterns and the number of second interlayer conductors 42 connecting the front and back conductor patterns. As a result, a difference may occur between the electrical resistance between the front and back conductor patterns in the second region A2 and the electrical resistance between the front and back conductor patterns in the first region A1. That is, the electrical resistance between the front and back conductor patterns may vary between the regions of the wiring board 1 in a plan view.

[0027] However, in this embodiment, as described above, the thickness T1 of the first interlayer conductor 41 is greater than the thickness T2 of the second interlayer conductor 42. Therefore, each first interlayer conductor 41 can have a smaller electrical resistance than each second interlayer conductor 42. Therefore, it is considered that the difference between the electrical resistance between the front and back conductor patterns in the first region A1 and the electrical resistance between the front and back conductor patterns in the second region A2, which is caused by the difference in arrangement density between the first interlayer conductor 41 and the second interlayer conductor 42, is reduced. Therefore, in the wiring board 1, it may be easier to obtain the desired electrical characteristics.

[0028] The thickness T1 of the first interlayer conductor 41 and the thickness T2 of the second interlayer conductor 42 are the distance between the outer wall and the inner wall of each interlayer conductor in the radial direction (diameter direction) from the central axis AX of the first through hole 51 or the second through hole 52. When the thickness of each interlayer conductor is not constant in the circumferential direction about the central axis AX, the thickness of each interlayer conductor is the intermediate thickness between the maximum thickness and the minimum thickness. Similarly, when the thickness of each interlayer conductor is not constant in the direction along the central axis AX, the thickness of each interlayer conductor is the intermediate thickness between the maximum thickness and the minimum thickness.

[0029] As an example, the difference between the thickness T1 of the first interlayer conductor 41 and the thickness T2 of the second interlayer conductor 42 is 15% or more and 40% or less of the thickness T1 of the first interlayer conductor 41. The first and second interlayer conductors 41, 42 having such a thickness difference may be easily formed when the first region A1 and the second region A2 each have the arrangement density of the through holes exemplified above. Moreover, as described above, it is considered that the difference in electrical resistance between the front and back conductor patterns in the first region A1 and the second region A2 is sufficiently reduced.

[0030] In the wiring board of the embodiment, as shown in Figs. 3A and 3B, the inner diameter D1 of the first through hole 51 is larger than the inner diameter D2 of the second through hole 52. That is, the outer diameter of the first interlayer conductor 41 is larger than the outer diameter of the second interlayer conductor 42. For convenience, the terms "inner diameter" and "outer diameter" are used, but the shapes of the cross sections (cross sections perpendicular to the central axis AX) of the first and second through holes 51, 52 and the first and second interlayer conductors 41, 42 are not limited to circular or elliptical. The "inner diameter" of each of the first and second through holes 51, 52 and the "outer diameter" of each of the first and second interlayer conductors 41, 42 are the longest distances between any two points on the outer circumference of the cross section perpendicular to the central axis AX.

[0031] 1, the first through hole 51 and the second through hole 52 illustrated in Fig. 3A and Fig. 3B each have a substantially constant inner diameter over the entire length from the first surface 2a to the second surface 2b of the insulating layer 2. The first and second interlayer conductors 41, 42 also each have a substantially constant outer diameter over the entire length from the first surface 2a to the second surface 2b. However, the inner diameter of each through hole may vary somewhat in the direction along the central axis AX. When the inner diameter of each through hole is not constant in the direction along the central axis AX, the intermediate length between the maximum inner diameter and the minimum inner diameter is the inner diameter of each through hole.

[0032] In the wiring board of the embodiment, as described above, not only is the thickness T1 of the first interlayer conductor 41 greater than the thickness T2 of the second interlayer conductor 42, but the inner diameter D1 of the first through hole 51 is greater than the inner diameter D2 of the second through hole 52. Therefore, the difference between the inner diameter D3 of the first interlayer conductor 41 and the inner diameter D4 of the second interlayer conductor 42 is not as large as would be expected from the difference between the thickness T1 of the first interlayer conductor 41 and the thickness T2 of the second interlayer conductor 42. For example, the difference between the inner diameter D3 and the inner diameter D4 is smaller than the difference between twice the thickness T1 and twice the thickness T2.

[0033] Therefore, both the hollow portions 4a in the first region A1 and the hollow portions 4a in the second region A2 are likely to be appropriately filled with the filler 6. For example, in a single filling step under selected conditions, both the hollow portions 4a in the first region A1 and the second region A2 may be sufficiently filled with the filler 6 without leaving any unfilled portions such as voids. Therefore, in the wiring board of the embodiment, it is considered that swelling is unlikely to occur, and furthermore, cracks in the interlayer conductors and peeling between the insulating layer 2 and the interlayer conductors are unlikely to occur. In other words, it is considered that good quality can be obtained with the wiring board of the embodiment.

[0034] As an example, the inner diameter D3 of the first interlayer conductor 41 may be approximately the same as the inner diameter D4 of the second interlayer conductor 42. That is, the difference between the inner diameter D1 of the first through hole 51 and the inner diameter D2 of the second through hole 52 may be approximately twice the difference between the thickness T1 of the first interlayer conductor 41 and the thickness T2 of the second interlayer conductor 42. In that case, it is more reliable to fill the hollow portion 4a of both the first region A1 and the second region A2 with the filler 6 without leaving voids or the like, and therefore it is considered that high quality can be more reliably obtained. Note that the inner diameter D3 and the inner diameter D4 being "approximately the same" means that the absolute value of the difference between the inner diameter D3 and the inner diameter D4 is 5% or less with respect to the inner diameter D1 of the first through hole 51. Also, "approximately twice" includes a range of 95% or more and 105% or less of exactly twice.

[0035] As an example, the inner diameter D1 of the first through hole 51 may be 160 μm or more and 220 μm or less, and the inner diameter D2 of the second through hole 52 may be 150 μm or more and 200 μm or less. When each through hole has such an inner diameter, the hollow portion 4a in both the first region A1 and the second region A2 can be filled sufficiently with the filler 6 more reliably, and therefore, it is believed that a high quality wiring board can be obtained.

[0036] In the wiring board of the embodiment, the insulating layer 2 may have a thickness of, for example, 1.0 mm or more and 2.0 mm or less. In the wiring board of the embodiment, the first through hole 51 in the first region A1 has an inner diameter larger than the inner diameter of the second through hole 52 in the second region A2, it is considered that the hollow portion 4a in each region is sufficiently filled with the filler 6 even if the thickness of the insulating layer 2 is 1.0 mm or more. In addition, if the thickness of the insulating layer 2 is 2.0 mm or less, it is considered that all the hollow portions 4a are more reliably filled with the filler 6 without leaving any unfilled portions.

[0037] Next, an example of a method for manufacturing a wiring board according to an embodiment will be described with reference to FIGS. 4A to 4H, taking the case of manufacturing wiring board 1 of FIG. 1 as an example.

[0038] 4A, a double-sided copper-clad laminate 10 is prepared, which includes an insulating layer that will become the insulating layer 2 of the wiring board 1 and copper foil 3a laminated on both surfaces of the insulating layer, and a plurality of through holes 5 are formed. The insulating layer of the double-sided copper-clad laminate 10 is formed using an insulating resin such as epoxy resin, and includes a reinforcing material 21 made of glass fiber or the like.

[0039] The multiple through holes 5 are formed at positions that create two regions (first region A1 and second region A2) with different densities of the through holes 5, and are formed at predetermined positions where multiple interlayer conductors 4 (see FIG. 1) are to be formed. In the example of FIG. 4A, a second region A2 is created in which the density of the through holes 5 is higher than that of the first region A1. First through holes 51 are formed in the first region A1, and second through holes 52 are formed in the second region A2 at a density higher than the density of the first through holes 51 in the first region A1.

[0040] 4A, in the manufacturing of the wiring board of the embodiment, the first through hole 51 is formed to have an inner diameter larger than the inner diameter of the second through hole 52. The first through hole 51 and the second through hole 52 are formed, for example, by drilling, and the first through hole 51 is formed using a drill having a larger diameter than the drill used to form the second through hole 52.

[0041] As shown in Fig. 4B, a metal film 3b made of, for example, copper is formed on the entire inner wall of the insulating layer 2 surrounding the first through hole 51 or the second through hole 52 and on the entire surface of the copper foil 3a. The metal film 3b is formed by, for example, sputtering or electroless plating. Parts of the metal film 3b form the lower layer films 40a (see Figs. 3A and 3B) of the first and second interlayer conductors 41, 42, and the second layer 30b (see Figs. 3A and 3B) of the conductor layers 31, 32 (see Fig. 1).

[0042] Then, as shown in FIG. 4C, a metal film 3c made of, for example, copper is formed on the entire surface of the metal film 3b. That is, the metal film 3c is formed on the entire surface of the metal film 3b in the first through hole 51 or the second through hole 52, and on the surface of the metal film 3b on the copper foil 3a. A plurality of first interlayer conductors 41, each of which is made of a part of the metal film 3b and a part of the metal film 3c and has a cylindrical shape with a hollow portion 4a, are formed in the first through hole 51. Similarly, a second interlayer conductor 42 having a structure similar to that of the first interlayer conductor 41 is formed in the second through hole 52. A part of the metal film 3c constitutes the upper layer film 40b (see FIG. 3A and FIG. 3B) of each of the first interlayer conductor 41 and the second interlayer conductor 42. Another part of the metal film 3c constitutes the third layer 30c (see FIG. 3A and FIG. 3B) of the conductor layers 31, 32 (see FIG. 1). The metal film 3c is formed by electrolytic plating using the metal film 3b as a power supply layer.

[0043] 4D and 4E show enlarged views of the IVD portion and the IVE portion of FIG. 4C, respectively. That is, FIG. 4D shows an enlarged view of the first interlayer conductor 41 near the first surface 2a of the insulating layer 2 and its periphery, and FIG. 4E shows an enlarged view of the second interlayer conductor 42 near the first surface 2a of the insulating layer 2 and its periphery. As shown in FIG. 4D and FIG. 4E, the metal film 3c is formed so that the thickness T1 of the first interlayer conductor 41 is larger than the thickness T2 of the second interlayer conductor 42. Since the arrangement density of the first through holes 51 is smaller than the arrangement density of the second through holes 52, the current density during electrolytic plating can be easily made different between the first region A1 and the second region A2 (see FIG. 4A). Therefore, as shown in FIG. 4D and FIG. 4E, the metal film 3c in which the thickness in the first through holes 51 is larger than the thickness in the second through holes 52 can be easily formed.

[0044] As shown in FIG. 4F, the hollow portion 4a of each of the first interlayer conductor 41 and the second interlayer conductor 42 is filled with a filler 6. For example, a resin such as an epoxy resin is injected into the hollow portion 4a of each interlayer conductor from either or both of the first surface 2a side and the second surface 2b side of the insulating layer 2. Since the thickness of the first interlayer conductor 41 is larger than the thickness of the second interlayer conductor 42, but the inner diameter of the first through hole 51 is larger than the inner diameter of the second through hole 52, the hollow portions 4a of both the first interlayer conductor 41 and the second interlayer conductor 42 are easily and sufficiently filled with the filler 6. The resin injected into each hollow portion 4a is solidified by heating or the like as necessary. Optionally, the end faces of the filler 6 on the first surface 2a side and the second surface 2b side may be polished by any method such as chemical mechanical polishing. By this polishing, the metal film 3C on each of the first surface 2a and the second surface 2B of the insulating layer 2 may be polished. As a result, the undulations on the surface of the metal film 3C may be reduced or substantially eliminated.

[0045] As shown in FIG. 4G, a metal film 3d made of, for example, copper is formed on the portions of the metal film 3c on the first surface 2a and the second surface 2b of the insulating layer 2 and on both end surfaces of the filler 6. The metal film 3d is formed by, for example, electroless plating or sputtering. Furthermore, a metal film 3e made of, for example, copper is formed on the metal film 3d by electrolytic plating using the metal film 3d as a power supply layer. The metal films 3d and 3e form so-called cap plating for the first interlayer conductor 41 and the second interlayer conductor 42, respectively. As a result of the formation of the metal films 3d and 3e, a conductor layer 31 and a conductor layer 32, each having a five-layer structure, are formed. The conductor layer 31 is formed on the first surface 2a of the insulating layer 2, and the conductor layer 32 is formed on the second surface 2b. A part of the metal film 3d constitutes a fourth layer 30d of each of the conductor layers 31 and 32 (see FIGS. 3A and 3B), and a part of the metal film 3e constitutes a fifth layer 30e of each of the conductor layers 31 and 32 (see FIGS. 3A and 3B).

[0046] As shown in Fig. 4H, the conductor layers 31 and 32 are patterned to include a desired conductor pattern. For example, an etching mask having appropriate openings is provided on the conductor layers 31 and 32, and unnecessary portions of the conductors 31 and 32 are removed by wet etching or dry etching. As a result, the wiring board 1 shown in Fig. 1 is completed.

[0047] The wiring board of the embodiment is not limited to those having the structure illustrated in each drawing and the structure, shape, and material illustrated in this specification. As described above, the wiring board of the embodiment may include any number of conductor layers and insulating layers other than the insulating layer 2 and conductor layers 31 and 32 of the example of FIG. 1. The wiring board of the embodiment may not include a filler such as the filler 6, but the wiring board of the embodiment is more suitable for a structure including a filler that fills the hollow parts of multiple interlayer conductors. The wiring board of the embodiment may have a component mounting area in the first area without having a component mounting area in the second area, or may have a component mounting area that overlaps both the first area and the second area. [Explanation of symbols]

[0048] 1. Wiring board 2. Insulation layer 31, 32 Conductor layer 4 Interlayer conductor (through hole conductor) 4a Hollow part 41 First interlayer conductor 42 Second interlayer conductor 5 Through hole 51 First through hole 52 Second through hole 6 Filling A1 1st area A2 2nd area D1 Inner diameter of first through hole D2 Inner diameter of second through hole D3 Inner diameter of first interlayer conductor D4 Inner diameter of second interlayer conductor ER component mounting area T1 Thickness of the first interlayer conductor T2 Thickness of the second interlayer conductor

Claims

1. an insulating layer having a plurality of through holes; Two conductor layers facing each other with the insulating layer interposed therebetween; a plurality of interlayer conductors formed in a cylindrical shape within the plurality of through holes and connecting the two conductor layers; A wiring board comprising: the wiring board has a first region in which a portion of the plurality of interlayer conductors is formed, and a second region in which a portion of the plurality of interlayer conductors is formed at a higher density than in the first region; the plurality of through holes include first through holes formed in the first region and second through holes formed in the second region at a density higher than a density of the first through holes in the first region, a thickness of a first interlayer conductor formed in the first through hole among the plurality of interlayer conductors is greater than a thickness of a second interlayer conductor formed in the second through hole among the plurality of interlayer conductors; The inner diameter of the first through hole is larger than the inner diameter of the second through hole.

2. 2. The wiring board according to claim 1, wherein an inner diameter of the first interlayer conductor is substantially the same as an inner diameter of the second interlayer conductor.

3. 2. A wiring board according to claim 1, wherein a difference between an inner diameter of the first through hole and an inner diameter of the second through hole is approximately twice a difference between a thickness of the first interlayer conductor and a thickness of the second interlayer conductor.

4. 2. The wiring board according to claim 1, wherein the inner diameter of the first through hole is 160 μm or more and 220 μm or less, and the inner diameter of the second through hole is 150 μm or more and 200 μm or less.

5. 2. The wiring board according to claim 1, The density of the first through holes in the first region is 0.6 holes / mm 2 Above, 1.2 pieces / mm 2 is as follows: The density of the second through holes in the second region is 6 holes / mm 2 Above, 10 pieces / mm 2 The following is the result.

6. 2. The wiring board according to claim 1, wherein the insulating layer has a thickness of 1.0 mm or more and 2.0 mm or less.

7. 2. The wiring board according to claim 1, The interlayer conductor has a hollow portion, The hollow portion is filled with resin.

8. 2. The wiring board according to claim 1, the wiring board has a component mounting area, the second region is provided directly below the component mounting region, The first region is provided outside the second region.

Images