Scheduling method for recording and playback double helix structures
The proposed scheduling method for multimedia communication technologies dynamically synchronizes recording and playback signals by using a preempt pattern and callback functions to manage cache updates, addressing synchronization challenges and reducing jitter, thereby improving audio signal stability and processing performance.
Patent Information
- Application Number
- JP2024083110
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-05-10
- Filing Date
- 2024-05-22
- Publication Date
- 2025-04-03
- Estimated Expiration
- 2044-05-22
AI Technical Summary
Existing multimedia communication technologies face challenges in synchronizing recording and playback signals due to scheduling jitter and echo cancellation requirements, leading to delays and distortion in audio signals.
A scheduling method for recording and playback of a double helix structure that dynamically synchronizes two signals using a preempt pattern, involving the preparation of N frame caches, adding recording caches to the sound card, and writing playback caches, with callback functions managing cache updates to reduce jitter and ensure synchronization.
This method effectively reduces time length jitter and dynamically matches recording and playback signals, ensuring passive and dynamic synchronization, which improves the stability of audio signals and enhances the performance of signal processing filtering modules like acoustic echo cancellation.
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Figure 2025048718000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to the technical field of multimedia communication, and particularly to a scheduling method for recording and playing back a double helix structure. [Background technology]
[0002] In the technical field of computer multimedia, the sound card is one of the most important peripheral devices. In addition to the board-level integrated sound card, the independent sound card is often integrated in the form of a PCI card. When a computer processes real-time audio, it uses DMA to relay and schedule between the operating system and the sound card. That is, the sound card and DMA exchange data bidirectionally, reading and writing, through hardware interrupts, and the operating system and DMA exchange data bidirectionally, which is favorable for freeing the CPU from the need to respond to sound card hardware interrupts and can improve the scheduling efficiency of the operating system.
[0003] However, this processing method has the disadvantage of increasing the delay for recording and playback, and the cache managed by DMA is called the core state cache, and the memory for the operating system to exchange with the core state cache is called the application state cache. The application state cache must not be too small. Otherwise, continuous recording and playback will not be possible, but the larger the application state cache, the greater the system delay. In a platform with an operating system such as a computer, a certain delay must be incurred to process audio reading and writing on the sound card. However, scheduling jitter occurs, and in addition to the aging of the sound card's crystal oscillator, jitter noise peculiar to such digital systems occurs, which has a certain impact on recording and playback. For example, if the amplitude of the jitter is large, the time uniformity of audio sampling will be destroyed, causing distortion of the physical frequency of the sound, and if it becomes more serious, audible intermittency in the sound generation time domain will occur. In general, the size of the application state cache can "disappear" this jitter effect to a certain extent, especially a sufficiently long cache.
[0004] However, when faced with a scenario such as dual audio communication, due to the working principle of the acoustic echo cancellation module, the echo cancellation process for the recording signal needs to be performed under the reference cooperation of the playback signal, in which case, how to "eliminate" the asynchronism of dual audio caused by system jitter is an important guarantee for recording and playback. In fact, if one needs the other as a reference, a certain synchronicity guarantee is required. Similarly, the above problem also occurs when positioning the sound source taking into account the multiple collected microphone signals. Summary of the Invention [Problem to be solved by the invention]
[0005] In response to the above problems in the prior art, the objective of the present invention is to provide a scheduling method for recording and playback with a double helix structure, which can passively and dynamically synchronize the two signals of recording and playback under the working principle of the preemption pattern of the sound card. [Means for solving the problem]
[0006] The present invention provides the following technical solution: A scheduling method for recording and playing a double helix structure, comprising: Step 1: Prepare N frame caches for recording and playback; Step 2: adding N recording caches to the sound card, and starting recording and writing N playback caches to the sound card one by one; Step 3: In the recording callback function, write the playback cache to the sound card; Step 4: Add a recording cache in the playback callback function; and step 5 of terminating the recording and playback.
[0007] Furthermore, the specific instructions in step 2 are all serial.
[0008] Furthermore, in step 2 above, the recording cache is empty or needs to be written, and the playback cache can be written to the sound card after being filled by the network or by reading the file.
[0009] Furthermore, the specific process of step 3 is as follows: In the record callback function, write the cache for item i in the N playback cache queue to the sound card, increment i from 0 to 1, and reset it to 0 if i is equal to N.
[0010] Furthermore, the specific process of step 4 is as follows: In the playback callback function, add a cache with code j in the N recording cache queue, increment j from 0 to 1, and reset it to 0 if i is equal to N.
[0011] Furthermore, in steps 3 and 4, before writing the cache of code i in the N playback cache queues to the sound card and adding the cache of code j in the N recording cache queues, respectively, one sub-thread is turned on to establish multi-thread recording and playback scheduling.
[0012] Furthermore, when processing real-time playback signals, the cache for code i in step 3 needs to be retrieved and processed before it is added to the playback cache queue, and the processing result needs to be stored; When processing a real-time recording signal, the cache of code j in step 4 needs to be processed before it is written to the sound card.
[0013] Furthermore, in steps 3 and 4, the recording callback function and the playback callback function respectively write the playback cache to the sound card or add the recording cache, and after the adding of the recording cache and the writing of the cache to the sound card are completed, the corresponding recording callback function and playback callback function can be called, and the calling of the recording callback function and the playback callback function, the writing of the playback cache to the sound card in the recording callback function, and the adding of the recording cache to the playback callback function are repeated until recording and playback are completed. Effect of the Invention
[0014] By adopting the above technology, the beneficial effects of the present invention compared to the prior art are as follows: In the present invention, when the recording callback + writing to the cache for the sound card is used as the recording frame time, the playback callback + adding to the recording cache is used as the playback frame time, which plays the role of neutralization and averaging, reduces the time length jitter, and can be dynamically matched. Under the working principle of the sound card preemption pattern, the two signals of recording and playback can be passively and dynamically synchronized. [Brief description of the drawings]
[0015] [Figure 1] FIG. 2 is a system block diagram of the overall method of the present invention. [Diagram 2] FIG. 13 is a schematic diagram showing the principle of repeating the calling of the recording callback function and the playback callback function, writing the playback cache to the sound card in the recording callback function, and adding the recording cache to the playback callback function in step 3 and step 4 of the present invention. [Diagram 3] FIG. 1 is a schematic diagram comparing the timeline of recording and playback of the present invention with DNA structure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0016] In order to more clearly understand the objectives, technical solutions and advantages of the present invention, the present invention will be described in more detail below in conjunction with the specification drawings and examples. It should be understood that the specific embodiments described herein are only used to describe the present invention, and are not used to limit the present invention.
[0017] Rather, the present invention encompasses alternatives, modifications, equivalent methods, and technical solutions to the spirit and scope of the present invention as defined by the appended claims. Furthermore, in order to provide a better understanding of the present invention in general, certain details are set forth in the following detailed description of the present invention. Those skilled in the art can fully understand the present invention without these details.
[0018] Referring to Figure 1-3, Example 1 The scheduling method for recording and playing back the double helix structure is Step 1: Prepare N frame caches for recording and playback; Step 2: adding N recording caches to the sound card, and starting recording, and writing N playback caches to the sound card one by one, where the specific sub-steps of step 2 are all in series, the recording caches are empty or need to be written, and the playback caches can be written to the sound card after being filled by the network or read file; Step 3 in the recording callback function: write the cache for code i in the N playback cache queue to the sound card, increment i from 0 by 1, and reset i to 0 if i is equal to N; Step 4 in the playback callback function adds a cache of code j in the N recording cache queue, increments j from 0 by 1, and resets it to 0 if i is equal to N; and step 5 of terminating the recording and playback; Among them, in steps 3 and 4, if the signal processing module processes the real-time recording and playback signals, such as filtering before playback, noise reduction after recording, or echo cancellation, the cache i in step 3 can be retrieved and processed before being added to the recording cache queue, and the processing result can be saved, which is pre-playback processing, or the cache j in step 4 can be processed before being written to the sound card, which is post-recording filtering.
[0019] In steps 3 and 4, the recording callback function and the playback callback function respectively write the playback cache to the sound card or add the recording cache. After the recording cache is added and the cache is written to the sound card, the corresponding recording callback function and playback callback function can be called. Until recording and playback are completed, the calling of the recording callback function and the playback callback function, the writing of the playback cache to the sound card in the recording callback function, and the adding of the recording cache to the playback callback function are repeated.
[0020] Example 2 The difference between this embodiment and the first embodiment is as follows.
[0021] In steps 3 and 4, before writing the cache of code i in the N playback cache queues to the sound card and adding the cache of code j in the N recording cache queues, respectively, one sub-thread is turned on to establish multi-thread recording and playback scheduling.
[0022] The two callback functions are blocking and cannot run for too long, making it easier to insert signal processing filtering modules when performing the operations of "add recording cache" and "write cache to sound card" in a multi-threaded pattern.
[0023] The following table shows an example of the execution result, where the recording frame length and playback frame length in the programming specification are 20 milliseconds (ms).
[0024] [Table 1]
[0025] As can be seen from the five experiments in the table above, due to the existence of scheduling jitter, the average frame length is not exactly 20 milliseconds, and the synchronization between recording and playback is improved compared to the normal pattern, and the consistency between the number of recording frames and the number of playback frames is much better than the normal pattern (the difference between the total number of frames is 14 frames), and the synchronization between the two can be seen. This consistency in the number of frames affects the performance of the signal processing filtering module, especially modules such as acoustic echo cancellation, which do not reduce or increase the update frequency of the echo filter, and the number of recording frames is almost the same as the number of playback frames, ensuring the stability of the filter effect.
[0026] In the present invention, "add recording cache", "write cache to sound card", "recording callback" and "playback callback" correspond to the four pairs of bases of ATCG, and their sequence progressive combination changes are completely consistent with the function call patterns on the two time lines of recording and playback, so this method is called "double helix structure recording and playback scheduling".
[0027] The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
[0028] (Additional Note) (Appendix 1) 1. A scheduling method for recording and playing back a double helix structure, comprising: Step 1: Prepare N frame caches for recording and playback; Step 2: adding N recording caches to the sound card, and starting recording and writing N playback caches to the sound card one by one; Step 3: In the recording callback function, write the playback cache to the sound card; Step 4: Add a recording cache in the playback callback function; 5. A scheduling method for recording and playing back a double helix structure, comprising the step of: terminating the recording and playing back.
[0029] (Appendix 2) The scheduling method for recording and playing back a double helix structure as described in Appendix 1, wherein the specific commands in step 2 are all serial.
[0030] (Appendix 3) The scheduling method for recording and playing back of a double helix structure described in Appendix 2, characterized in that in step 2, the recording cache is empty or needs to be written, and the playing cache can be written to the sound card after being filled by the network or read file.
[0031] (Appendix 4) The specific process of step 3 is as follows: The scheduling method for recording and playing back a double helix structure as described in Appendix 1, characterized in that in the recording callback function, the cache of code i in the N playback cache queues is written to the sound card, i is incremented from 0 by 1, and reset to 0 if i is equal to N.
[0032] (Appendix 5) The specific process of step 4 is as follows: 5. The scheduling method for recording and playback of a double helix structure as described in Appendix 4, characterized in that in the playback callback function, add a cache of code j in the N recording cache queues, increment j from 0 by 1, and reset it to 0 if i is equal to N.
[0033] (Appendix 6) The scheduling method for recording and playback of a double helix structure described in Appendix 5, characterized in that in step 3 and step 4, before writing the cache of code j in the N playback cache queues to the sound card and adding the cache of code i in the N recording cache queues, respectively, one sub-thread is turned on to establish a multi-thread recording and playback scheduling.
[0034] (Appendix 7) When processing real-time playback signals, the cache for code i in step 3 needs to be retrieved and processed before it is added to the playback cache queue, and the processing result needs to be stored; A scheduling method for recording and playing back a double helix structure as described in Appendix 5, characterized in that when processing a real-time recording signal, the cache of code j in step 4 needs to be processed before being written to the sound card.
[0035] (Appendix 8) The scheduling method for recording and playback of a double helix structure described in Appendix 5, characterized in that in step 3 and step 4, the recording callback function and the playback callback function respectively execute writing of the playback cache to the sound card or adding of the recording cache, and after the adding of the recording cache and the writing of the cache to the sound card are completed, the corresponding recording callback function and playback callback function can be called, and the calling of the recording callback function and the playback callback function, the writing of the playback cache to the sound card in the recording callback function, and the adding of the recording cache to the playback callback function are repeated until recording and playback are completed.
Claims
1. 1. A scheduling method for recording and playing back a double helix structure, comprising: Step 1 of preparing N frame caches for recording and playback respectively; Step 2: adding N recording caches to the sound card and starting recording, and writing N playback caches to the sound card one by one; Step 3, in the recording callback function, writes the playback cache to the sound card; Step 4 of adding a recording cache in the playback callback function; 5. A scheduling method for recording and playing back a double helix structure, comprising the step of: terminating the recording and playing back.
2. 2. The method for scheduling recording and reproducing of a double helix structure according to claim 1, wherein the specific commands in step 2 are all in series.
3. The scheduling method for recording and playing back of a double helix structure as claimed in claim 2, characterized in that in step 2, the recording cache is empty or needs to be written, and the playing cache can be written to the sound card after being filled by the network or the read file.
4. The specific process of step 3 is as follows: The scheduling method for recording and playing back of a double helix structure as claimed in claim 1, characterized in that in the recording callback function, the cache of code i in the N playback cache queues is written to the sound card, i is incremented from 0 to 1, and reset to 0 if i is equal to N.
5. The specific process of step 4 is as follows:
5. The method for scheduling recording and playback of a double helix structure according to claim 4, characterized in that in the playback callback function, add a cache of code j in the N recording cache queues, increment j from 0 to 1, and reset it to 0 if i is equal to N.
6. The scheduling method for recording and playback of a double helix structure according to claim 5, characterized in that in step 3 and step 4, before writing the cache of code j in the N playback cache queues to the sound card respectively and adding the cache of code i in the N recording cache queues respectively, one sub-thread is turned on to establish a multi-thread recording and playback scheduling.
7. When processing real-time playback signals, the cache for code i in step 3 needs to be retrieved and processed before it is added to the playback cache queue, and the processing result needs to be stored; The scheduling method for recording and playing back of a double helix structure as claimed in claim 5, characterized in that when processing real-time recording signals, the cache of code j in step 4 needs to be processed before being written to the sound card.
8. 6. The method for scheduling recording and playback of a double helix structure according to claim 5, wherein in step 3 and step 4, the recording callback function and the playback callback function respectively execute writing of the playback cache to the sound card or adding of the recording cache; after the adding of the recording cache and the writing of the cache to the sound card are completed, the corresponding recording callback function and playback callback function can be called; and until recording and playback are completed, the calling of the recording callback function and the playback callback function, the writing of the playback cache to the sound card in the recording callback function, and the adding of the recording cache to the playback callback function are repeated.
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