Projection type display device

Abstract

To inhibit display unevenness.SOLUTION: In two-row and two-column video pixels D3, D4, E3 and E4 adjacent to each other of video pixels disposed in matrix: the video pixels D3, D4 and E4 correspond to a panel pixel b2 and the video pixel E3 corresponds to a panel pixel c2 in an odd-numbered frame period; and the video pixels D3, D4 and E3 correspond to the panel pixel b2 and the video pixel E3 corresponds to the panel pixel c2 in an even-numbered frame period. The display control circuit supplies a data signal corresponding to a gradation level of the video pixel to the panel pixel b2 or c2.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a projection display device. [Background technology]

[0002] In a projection display device that projects image light created by a liquid crystal panel or the like onto a screen, etc., a technique for artificially increasing the resolution by using a light path shift element is known. In detail, in a projection display device, one frame period is divided into a plurality of unit periods, and the projection position of one panel pixel in the liquid crystal panel is shifted for each of the plurality of unit periods, and in each unit period, a gray scale level specified by video pixel data is individually expressed (for example, see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-139968 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the above technology has an issue in that, when viewed over one frame period, relatively dark areas and relatively bright areas are unevenly distributed in the projected image, which is visually perceived as unevenness and reduces display quality. [Means for solving the problem]

[0005] In order to solve the above problems, a projection type display device according to one embodiment of the present disclosure includes a liquid crystal panel having a plurality of panel pixels, a light path shift element that shifts an optical path of projection light projected from the panel pixels and projects it as a projection pixel, and a display control circuit that controls the liquid crystal panel and the light path shift element, wherein a frame period is composed of k (k is an integer equal to or greater than 4) unit periods, one panel pixel among the plurality of panel pixels individually expresses k pieces of video pixel data for each of the k unit periods, and the display control circuit controls the one panel pixel to display k pieces of video pixel data for each of the k unit periods. a data signal corresponding to a gray level of corresponding image pixel data is supplied to the one panel pixel, and a position of the projection pixel is controlled for the light path shift element to a projection position corresponding to the image pixel data for each of the k unit periods, the k image pixel data corresponding to the one panel pixel including first image pixel data, second image pixel data adjacent to the first image pixel data in the first direction, third image pixel data adjacent to the first image pixel data in the second direction, and fourth image pixel data adjacent to the third image pixel data in the opposite direction to the first direction. [Brief description of the drawings]

[0006] [Figure 1] 1 is a diagram showing a projection type display device according to an embodiment; [Diagram 2] FIG. 1 is a block diagram showing a configuration of a projection display device. [Diagram 3] 1 is a diagram showing the relationship between an arrangement of image pixels and an arrangement of panel pixels in a projection display device. [Figure 4] FIG. 1 is a diagram showing the relationship between one frame period and a unit period in a projection display device. [Diagram 5] FIG. 13 is a diagram showing projection positions in odd-numbered frame periods and even-numbered frame periods. [Figure 6] FIG. 2 is a diagram showing video pixels represented by one panel pixel in an odd-numbered frame period and an even-numbered frame period. [Figure 7] FIG. 1 is a perspective view showing a configuration of a liquid crystal panel in a projection display device. [Figure 8] FIG. 2 is a cross-sectional view showing the structure of a liquid crystal panel. [Figure 9] FIG. 2 is a block diagram showing the electrical configuration of a liquid crystal panel. [Figure 10] FIG. 2 is a diagram showing a configuration of a pixel circuit in a liquid crystal panel. [Figure 11] FIG. 11 is a diagram showing the relationship between video pixels, panel pixels, and projection positions during an odd-numbered frame period. [Figure 12] FIG. 1 is a diagram showing the relationship between image pixels, panel pixels, and projection positions in an even frame period; [Figure 13] 1A and 1B are diagrams for explaining the display quality of a projection display device according to an embodiment. [Figure 14] FIG. 11 is a diagram showing the relationship between image pixels, panel pixels, and projection positions in one frame period in the comparative example. [Figure 15] FIG. 11 is a diagram for explaining display quality according to a comparative example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, a projection display device according to an embodiment will be described with reference to the drawings. In each drawing, the dimensions and scale of each part are appropriately different from the actual ones. In addition, since the embodiments described below are preferred specific examples, various technically preferable limitations are attached, but the scope of the present disclosure is not limited to these forms unless otherwise specified in the following description to the effect that the present disclosure is limited.

[0008] FIG. 1 is a diagram showing an optical configuration of a projection display device 1 according to a first embodiment. As shown in the figure, the projection display device 1 includes liquid crystal panels 100R, 100G, and 100B. A lamp unit 2102 consisting of a white light source such as a laser is provided inside the projection display device 1. Projection light emitted from this lamp unit 2102 is separated into three primary colors, red (R), green (G), and blue (B), by three mirrors 2106 and two dichroic mirrors 2108 arranged inside. Of these, the R light enters the liquid crystal panel 100R, the G light enters the liquid crystal panel 100G, and the B light enters the liquid crystal panel 100B. Since the optical path of B is longer than the optical paths of R and G, it is necessary to prevent loss in the optical path of B. For this reason, a relay lens system 2121 consisting of an entrance lens 2122, a relay lens 2123, and an exit lens 2124 is provided in the optical path of B.

[0009] The liquid crystal panel 100R has a plurality of pixel circuits, as described below. Each of the plurality of pixel circuits includes a liquid crystal element. The liquid crystal elements of the liquid crystal panel 100R are driven based on a data signal corresponding to R, and have a transmittance according to the voltage of the data signal. Therefore, an R transmission image is generated in the liquid crystal panel 100R by individually controlling the transmittance of the liquid crystal elements based on a data signal corresponding to R. Similarly, a G transmission image is generated in the liquid crystal panel 100G based on a data signal corresponding to G, and a B transmission image is generated in the liquid crystal panel 100B based on a data signal corresponding to B.

[0010] The transmitted images of each color generated by the liquid crystal panels 100R, 100G, and 100B are incident on the dichroic prism 2112 from three directions. In the dichroic prism 2112, the R and B light are refracted at 90 degrees, while the G light travels straight. Therefore, the dichroic prism 2112 combines the images of each color. The combined image by the dichroic prism 2112 is incident on the projection lens 2114 via the optical path shift element 230. The projection lens 2114 enlarges and projects the composite image via the light path shift element 230 onto the screen Scr.

[0011] The light path shift element 230 shifts the light path of the light exiting from the dichroic prism 2112. In detail, the light path shift element 230 shifts the composite image projected onto the screen Scr in the left-right direction and / or the up-down direction with respect to the projection surface.

[0012] The transmitted images by the liquid crystal panels 100R and 100B are projected after being reflected by the dichroic prism 2112, whereas the transmitted image by the liquid crystal panel 100G is projected in a straight line. Therefore, the transmitted images by the liquid crystal panels 100R and 100B are in a left-right inverted relationship with the transmitted image by the liquid crystal panel 100G.

[0013] 2 is a block diagram showing an electrical configuration of the projection display device 1. As shown in the figure, the projection display device 1 includes a display control circuit 20, liquid crystal panels 100R, 100G, and 100B, and a light path shift element 230.

[0014] Video data Vid-in is supplied from a higher-level device such as a host device (not shown) in synchronization with a synchronization signal Sync. The video data Vid-in specifies the gradation levels of pixels constituting one frame period of video, for example, 8 bits for each RGB.

[0015] Note that the pixels of an image specified by the video data Vid-in are referred to as video pixels, and the data specifying the gradation level of the video pixels are referred to as video pixel data, but there may be cases where no distinction is made between video pixels and video pixel data. Also, the pixels of an image before or after synthesis by the liquid crystal panels 100R, 100G, or 100B are referred to as panel pixels. The position of the panel pixels shifted by the light path shift element 230 and projected onto the screen Scr is referred to as the projection position. In the liquid crystal panels 100R, 100G, and 100B, the panel pixels are arranged in a matrix in a plan view. In the embodiment, the arrangement of the video pixels specified by the video data Vid-in is, for example, twice as large in the vertical direction and twice as large in the horizontal direction as the arrangement of the panel pixels of the liquid crystal panels 100R, 100G, or 100B.

[0016] In the embodiment, a color image projected on the screen Scr is expressed by synthesizing the transmitted images of the liquid crystal panels 100R, 100G, and 100B. Therefore, the minimum unit of a color image can be divided into a red subpixel of the liquid crystal panel 100R, a green subpixel of the liquid crystal panel 100G, and a blue subpixel of the liquid crystal panel 100B. However, when it is not necessary to specify the color of the subpixels in the liquid crystal panels 100R, 100G, and 100B, or when only brightness is an issue, it is not necessary to refer to them as subpixels. Therefore, in this description, the display units in the liquid crystal panels 100R, 100G, and 100B will also be referred to as panel pixels.

[0017] The synchronization signal Sync includes a vertical synchronization signal that instructs the start of vertical scanning of the video data Vid-in, a horizontal synchronization signal that instructs the start of horizontal scanning, and a clock signal that indicates the timing of one video pixel in the video data Vid-in.

[0018] The display control circuit 20 includes a processing circuit 21, and conversion circuits 22R, 22G, and 22B. The processing circuit 21 controls the conversion circuits 22R, 22G, and 22B, the liquid crystal panels 100R, 100G, and 100B, and the light path shift element 230 for each unit period f1-1 to f1-4 and f2-1 to f2-4 based on the synchronization signal Sync. The light path shift element 230 shifts the projection position for each unit period according to the control by the processing circuit 21. Of the video data Vid-in supplied from a higher-level device, the R component is represented as video data Va_R, the G component is represented as video data Va_G, and the B component is represented as video data Va_B.

[0019] The conversion circuit 22R temporarily stores the video data Va-R supplied from the higher-level device in an internal buffer for one or more frame periods, then reads out the video data corresponding to a unit period, converts it into an analog voltage data signal Vid_R, and supplies it to the liquid crystal panel 100R. The conversion circuits 22G and 22B are different from the conversion circuit 22R only in the color components of the video data to be converted, and the rest are common to the conversion circuit 22R. That is, the conversion circuit 22G converts the video data Va-G corresponding to a unit period into an analog voltage data signal Vid_G and supplies it to the liquid crystal panel 100G, while the conversion circuit 22B converts the video data Va-B corresponding to a unit period into an analog voltage data signal Vid_B and supplies it to the liquid crystal panel 100B.

[0020] FIG. 3 is a diagram for explaining the corresponding relationship between image pixels and panel pixels in the projection display device 1. As shown in FIG. In detail, in FIG. 3, the left column is a diagram showing a portion of the arrangement of image pixels shown in the video data Vid-in, and the right column is a diagram showing an arrangement of panel pixels corresponding to the arrangement of image pixels in the left column.

[0021] In the array in the left column, in order to distinguish between video pixels in an image represented by video data Vid-in, the following codes are conveniently assigned to the first row: A1 to A6, the second row: B1 to B6, the third row: C1 to C6, the fourth row: D1 to D6, the fifth row: E1 to E6, the sixth row: F1 to F6, the seventh row: G1 to G6, and the eighth row: H1 to H6. Similarly, in the array in the right column of Fig. 3, in order to distinguish between panel pixels, the following codes are conveniently assigned to the first row: a1 to a3, the second row: b1 to b3, and the third row: c1 to c3.

[0022] 4 is a diagram for explaining the relationship between a frame period and a unit period in the projection display device 1 according to the embodiment. As shown in the figure, in this embodiment, a 2-frame (2F) period is divided into an odd frame period that is earlier in time and an even frame period that is later in time.

[0023] An odd frame period is divided into four unit periods. For convenience of distinguishing the four unit periods in an odd frame period, the four unit periods are assigned reference characters f1-1, f1-2, f1-3, and f1-4 in chronological order. An even frame period is similarly divided into four unit periods. For convenience of distinguishing the four unit periods in an even frame period, the four unit periods are assigned reference characters f2-1, f2-2, f2-3, and f2-4 in chronological order.

[0024] Note that one frame period is the period during which one frame of an image represented by video data Vid-in is supplied from a higher-level device, and is 16.7 milliseconds when the frequency of the vertical synchronization signal included in the synchronization signal Sync is 60 Hz. In this case, the length of each unit period is 4.17 milliseconds, which is 1 / 4 of the length of one frame period.

[0025] In this embodiment, the projection positions are changed for each of the eight unit periods, namely, unit periods f1-1 to f1-4 obtained by dividing an odd frame period into four and unit periods f2-1 to f2-4 obtained by dividing an even frame period into four, making it possible to provide eight projection positions in two consecutive frame periods. However, in this embodiment, two of the projection positions in the two frame periods are common to the odd frame periods and the even frame periods, so the number of projection positions in the two frame periods is six. The unit period is a period during which an image in one frame period specified by video data Vid-in is visually recognized by a user as a composite image produced by liquid crystal panels 100R, 100G, and 100B, the resolution of which is reduced to ¼. In the following description, when the liquid crystal panels 100R, 100G, and 100B are generally described without specifying the color, they will be denoted by the reference numeral 100.

[0026] FIG. 5 is a diagram showing projection positions in odd-numbered frame periods and even-numbered frame periods. In the figure, the thick solid line frames indicate panel pixels of the liquid crystal panel 100, and the thin solid line frames indicate image pixels. If the projection position in unit period f1-1 of the odd-numbered frame period is used as a reference, in unit period f1-2, the projection position shifts by 0.5 panel pixels upward in the drawing from the reference position in unit period f1-1. In unit period f1-3, the projection position is shifted 0.5 pixel to the right and 0.5 panel pixel downward from the projection position in unit period f1-2. That is, the projection position is shifted diagonally downward to the right. In unit period f1-4, the projection position is shifted downward by 0.5 panel pixels from the projection position in unit period f1-2.

[0027] In unit period 2-1 of the even frame period, the projection position shifts 0.5 pixel to the left and 0.5 panel pixel upward from the projection position in unit period f1-4, and returns to the reference position. In unit period f2-2, the projection position is shifted downward by 0.5 panel pixels from the reference position in unit period f2-1. In unit period f2-3, the projection position is shifted 0.5 pixel to the right and 0.5 panel pixel upward from the projection position in unit period f2-2. That is, the projection position is shifted diagonally upward to the right. In unit period f2-4, the projection position is shifted upward by 0.5 panel pixels from the projection position in unit period f2-3. After unit period f2-4, the projection position shifts leftward by 0.5 pixel and downward by 0.5 panel pixel from the projection position in unit period f2-4, and returns to the reference position.

[0028] In this manner, in this embodiment, the shifting order is different between odd-numbered frame periods and even-numbered frame periods. In detail, the shifting order starting from the reference position in unit period 1-1 or 2-1 is clockwise in odd-numbered frame periods and counterclockwise in even-numbered frame periods.

[0029] Next, focusing on one panel pixel, a video pixel expressed in an odd frame period and an even frame period will be described. Note that a panel pixel "expresses" a certain video pixel when the liquid crystal element 120 of the panel pixel is in a state of transmittance corresponding to the gray level (video pixel data) of the video pixel. For ease of explanation, we will focus on panel pixel b2.

[0030] FIG. 6 is a diagram showing image pixels represented by the panel pixel b2 in odd-numbered and even-numbered frame periods. Panel pixel b2 expresses video pixels D3, C3, D4, and E4 in order during unit periods f1-1 to f1-4 of the odd-numbered frame period. In other words, the video pixels expressed by panel pixel b2 are D3, D4, and E4 of the two rows and two columns of video pixels enclosed by a thick frame, and video pixel C3 adjacent to video pixel D3 in the upward direction. Of the two rows and two columns of video pixels enclosed by a thick frame, video pixel E3 other than video pixels D3, D4, and E4 is expressed by panel pixel c2 adjacent to panel pixel b2 in the downward direction. Similarly, panel pixel b2 expresses video pixels D3, E3, D4, and C4 in order during unit periods f2-1 to f2-4 of the even frame period. In other words, of the two rows and two columns of video pixels enclosed by a thick frame, the video pixels expressed by panel pixel b2 are D3, E3, and D4, and video pixel C4 adjacent to video pixel D4 in the upward direction. Of the two rows and two columns of video pixels enclosed by a thick frame, video pixel E4 other than video pixels D3, D4, and E3 is expressed by panel pixel c2 adjacent to panel pixel b2 in the downward direction.

[0031] Next, the liquid crystal panels 100R, 100G, and 100B will be described. The liquid crystal panels 100R, 100G, and 100B have the same structure, but only the color, i.e., the wavelength, of the light incident thereon is different. Therefore, the liquid crystal panels 100R, 100G, and 100B will be generally described as the liquid crystal panel 100, without specifying the color.

[0032] FIG. 7 is a perspective view of the liquid crystal panel 100, and FIG. 8 is a cross-sectional view taken along line Hh in FIG. As shown in these figures, in the liquid crystal panel 100, an element substrate 100a on which a pixel electrode 118 is provided and an opposing substrate 100b on which a common electrode 108 is provided are bonded together with a sealing material 90 so that their electrode forming surfaces face each other while maintaining a certain gap, and liquid crystal 105 is filled in this gap.

[0033] The element substrate 100a and the counter substrate 100b are each made of a substrate having optical transparency, such as glass or quartz. As shown in FIG. 7, one side of the element substrate 100a protrudes from the counter substrate 100b. In this protruding region, a plurality of terminals 106 are provided along the horizontal direction in the figure. One end of an FPC (Flexible Printed Circuits) substrate (not shown) is connected to the plurality of terminals 106. The other end of the FPC substrate is connected to the display control circuit 20, and the above-mentioned various signals are supplied thereto.

[0034] On the surface of the element substrate 100a facing the counter substrate 100b, pixel electrodes 118 are formed by patterning a transparent conductive layer made of, for example, ITO (Indium Tin Oxide). Although not shown, a microlens is provided for each panel pixel on the counter substrate 100b (or the element substrate 100a) to efficiently send a large amount of light to the openings that become the panel pixels. With this configuration, the light that is repelled by the light shielding portion is sent to the openings of the microlens, improving the light utilization efficiency.

[0035] 9 is a block diagram showing the electrical configuration of the liquid crystal panel 100. In the liquid crystal panel 100, a scanning line driving circuit 130 and a data line driving circuit 140 are provided on the periphery of the display area 10.

[0036] In the display region 10 of the liquid crystal panel 100, pixel circuits 110 are arranged in a matrix. In detail, in the display region 10, a plurality of scanning lines 12 are provided extending in the horizontal direction in the figure, and a plurality of data lines 14 are provided extending in the vertical direction and electrically insulated from the scanning lines 12. Then, the pixel circuits 110 are provided in a matrix corresponding to the intersections of the plurality of scanning lines 12 and the plurality of data lines 14.

[0037] If the number of scanning lines 12 is m and the number of data lines 14 is n, the pixel circuits 110 are arranged in a matrix of m rows and n columns. Both m and n are integers of 2 or more. In order to distinguish the rows of the matrix in the scanning lines 12 and the pixel circuits 110, they may be referred to as 1, 2, 3, ..., (m-1), m rows from the top in the figure. Similarly, in order to distinguish the columns of the matrix in the data lines 14 and the pixel circuits 110, they may be referred to as 1, 2, 3, ..., (n-1), n ​​columns from the left in the figure.

[0038] The scanning line driving circuit 130 selects the scanning lines 12 one by one in the order of, for example, the 1st, 2nd, 3rd, ..., mth rows in accordance with the control by the display control circuit 20, and sets the scanning signal to the selected scanning line 12 to H level. Note that the scanning line driving circuit 130 sets the scanning signal to the scanning lines 12 other than the selected scanning line 12 to L level. The data line driving circuit 140 latches one row of data signals supplied from the corresponding color circuit among the conversion circuits 22R, 22G or 22B, and outputs the data signals to the pixel circuit 110 located on the scanning line 12 via the data line 14 during the period when the scanning signal to the scanning line 12 is at H level.

[0039] FIG. 10 is a diagram showing an equivalent circuit of four pixel circuits 110 arranged in two vertical rows and two horizontal columns corresponding to the intersections of two adjacent scanning lines 12 and two adjacent data lines 14. As shown in the figure, the pixel circuit 110 includes a transistor 116 and a liquid crystal element 120. The transistor 116 is, for example, an n-channel thin film transistor. In the pixel circuit 110, the gate node of the transistor 116 is connected to the scan line 12, while the source node is connected to the data line 14, and the drain node is connected to a pixel electrode 118 that has a square shape in a plan view.

[0040] A common electrode 108 is provided in common to all pixels so as to face the pixel electrode 118. A voltage LCcom is applied to the common electrode 108. Then, as described above, liquid crystal 105 is sandwiched between the pixel electrode 118 and the common electrode 108. Therefore, for each pixel circuit 110, a liquid crystal element 120 is formed in which the liquid crystal 105 is sandwiched between the pixel electrode 118 and the common electrode 108. In addition, a storage capacitor 109 is provided in parallel to the liquid crystal element 120. One end of the storage capacitor 109 is connected to a pixel electrode 118, and the other end is connected to a capacitance line 107. A time-constant voltage, for example, a voltage LCcom that is the same as the voltage applied to the common electrode 108, is applied to the capacitance line 107. The pixel circuits 110 are arranged in a matrix shape in the horizontal direction, which is the extension direction of the scanning lines 12, and in the vertical direction, which is the extension direction of the data lines 14, and therefore the pixel electrodes 118 included in the pixel circuits 110 are also arranged in the vertical and horizontal directions.

[0041] When the scanning signal of a scanning line 12 becomes H level, the transistor 116 of the pixel circuit 110 provided corresponding to the scanning line 12 becomes ON state. When the transistor 116 becomes ON state, the data line 14 and the pixel electrode 118 become electrically connected, so that the data signal supplied to the data line 14 reaches the pixel electrode 118 via the transistor 116 that has become ON state. When the scanning line 12 becomes L level, the transistor 116 becomes OFF state, but the voltage of the data signal that has reached the pixel electrode 118 is held by the capacitive property of the liquid crystal element 120 and the storage capacitance 109.

[0042] As is well known, in the liquid crystal element 120, the orientation of the liquid crystal molecules changes in response to the electric field generated by the pixel electrode 118 and the common electrode 108. Therefore, the liquid crystal element 120 has a transmittance that corresponds to the effective value of the applied voltage. In addition, the region that functions as a panel pixel in the liquid crystal element 120, i.e., the region that has a transmittance according to the effective value of the voltage, is the region where the pixel electrode 118 and the common electrode 108 overlap when the element substrate 100a and the counter substrate 100b are viewed in plan. Since the pixel electrode 118 is square in plan view, the shape of the pixel formed by the liquid crystal panel 100 is also square. In addition, in this embodiment, the liquid crystal 105 is of a VA (Vertical Alignment) type, and is in a normally black mode in which the transmittance is at a minimum when the voltage applied to the liquid crystal element 120 is zero, and the transmittance increases as the applied voltage increases.

[0043] An operation of supplying a data signal to the pixel electrodes 118 of the liquid crystal elements 120 is executed in the order of the 1st, 2nd, 3rd, ..., mth rows in each unit period f1 to f4. As a result, a voltage according to the data signal is held in each of the liquid crystal elements 120 of the pixel circuits 110 arranged in m rows and n columns, each liquid crystal element 120 has a target transmittance, and a transmitted image of the corresponding color is generated by the liquid crystal elements 120 arranged in m rows and n columns. In this way, the generation of a transmission image is executed for each of RGB, and a color image obtained by combining RGB is projected onto the screen Scr. The data signals Vid_R, Vid_G, and Vid_B outputted corresponding to a certain unit period correspond to the RGB components of the video data corresponding to the unit period, so that a composite image of a color corresponding to a projection position is projected at the projection position during the unit period.

[0044] Next, how image pixels are visually recognized by a user through panel pixels in the projection display device 1 according to the embodiment will be described.

[0045] Fig. 11 and Fig. 12 are diagrams showing which video pixels are represented at which projection positions by panel pixels in the projection display device 1. In detail, Fig. 11 is a diagram showing at which projection positions the nine panel pixels in the right column of Fig. 3 represent the video pixels in the left column of Fig. 3 in unit periods f1-1 to f1-4 of an odd-numbered frame period. Also, Fig. 12 is a diagram showing at which projection positions the nine panel pixels represent the video pixels in unit periods f2-1 to f2-4 of an even-numbered frame period. 11 and 12. Note that the bold frames in the right columns of Fig. 11 and 12 indicate panel pixel b2, and the bold frames in the left columns of Fig. 11 and 12 indicate the image pixel represented by the panel pixel b2. For convenience, the projection position in unit period f1-1 of the odd-numbered frame period is taken as the reference position, and is indicated by the dashed line in the right columns of Fig. 11 and 12.

[0046] 11, in unit period f1-1 of the odd frame period, panel pixels a1, a2, a3, b1, b2, b3, c1, c2, and c3 respectively represent hatched image pixels B1, B3, B5, D1, D3, D5, F1, F3, and F5. Note that the arrow pointing diagonally downward to the left of the panel pixels in unit period f1-1 indicates the shift direction from unit period f2-4 of the immediately preceding even frame period.

[0047] When the unit period f1-1 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position by 0.5 panel pixels upward in the drawing from the reference position indicated by the dashed line during that unit period f1-1. In the next unit period f1-2, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels A1, A3, A5, C1, C3, C5, E1, E3 and E5, respectively.

[0048] When the unit period f1-2 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position from the projection position shown by the dashed line in the unit period f1-2 by 0.5 panel pixels to the right and by 0.5 panel pixels to the downward direction in the figure. That is, the light path shift element 230 shifts the projection position diagonally downward to the right. In the next unit period f1-3, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels B2, B4, B6, D2, D4, D6, F2, F4 and F6, respectively.

[0049] When the unit period f1-3 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position by 0.5 panel pixels downward in the drawing from the projection position indicated by the dashed line in that unit period f1-3. In the next unit period f1-4, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels C2, C4, C6, E2, E4, E6, G2, G4 and G6, respectively.

[0050] When the unit period f1-4 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position from the projection position shown by the dashed line in the unit period f1-4 by 0.5 panel pixels to the left and by 0.5 panel pixels to the upward direction in the drawing. That is, the light path shift element 230 shifts the projection position diagonally upward to the left and returns it to the reference position.

[0051] In unit period f2-1 of the next even frame period, as shown in FIG. 12, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent hatched image pixels B1, B3, B5, D1, D3, D5, F1, F3 and F5, respectively, similar to unit period f1-1. The arrow pointing diagonally upward to the left of the panel pixel in the unit period f2-1 indicates the shift direction from the unit period f1-4.

[0052] When the unit period f2-1 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position by 0.5 panel pixels downward in the drawing from the reference position indicated by the dashed line during that unit period f2-1. In the next unit period f2-2, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels C1, C3, C5, E1, E3, E5, G1, G3 and G5, respectively.

[0053] When the unit period f2-2 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position from the projection position shown by the dashed line in the unit period f2-2 by 0.5 panel pixels to the right and by 0.5 panel pixels to the upward direction in the figure. That is, the light path shift element 230 shifts the projection position diagonally upward to the right. In the next unit period f2-3, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels B2, B4, B6, D2, D4, D6, F2, F4 and F6, respectively.

[0054] When the unit period f2-3 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position from the projection position indicated by the dashed line in that unit period f2-3 by 0.5 panel pixels upward in the drawing. In the next unit period f2-4, panel pixels a1, a2, a3, b1, b2, b3, c1, c2 and c3 represent, in order, hatched image pixels A2, A4, A6, C2, C4, C6, E2, E4 and E6, respectively.

[0055] When the unit period f2-4 ends, the processing circuit 21 controls the light path shift element 230 to shift the projection position from the projection position shown by the dashed line in the unit period f2-4 by 0.5 panel pixels to the left and by 0.5 panel pixels to the downward direction in the figure. That is, the light path shift element 230 shifts the projection position diagonally downward to the left and returns it to the reference position.

[0056] Before describing the display quality in this embodiment, a description will be given of degradation of display quality that occurs in a projection display device according to a comparative example.

[0057] 14 is a diagram showing which image pixels are represented by panel pixels at which projection positions in a projection display device according to a comparative example. In the comparative example, a frame period is not divided into odd-numbered frame periods and even-numbered frame periods, but one frame period is divided into four unit periods f1 to f4.

[0058] In unit period f1, nine panel pixels a1, a2, a3, b1, b2, b3, c1, c2, and c3 respectively represent hatched image pixels A1, A3, A5, C1, C3, C5, E1, E3, and E5. When unit period f1 ends, processing circuit 21 controls light path shift element 230 to shift the projection position by 0.5 panel pixels to the right in the figure from the reference position shown by the dashed line in unit period f1.

[0059] In unit period f2, the nine panel pixels represent hatched image pixels A2, A4, A6, C2, C4, C6, E2, E4, and E6, respectively. When unit period f2 ends, processing circuit 21 shifts the projection position by 0.5 panel pixels downward in the figure from the projection position of unit period f2. In unit period f3, the nine panel pixels represent hatched image pixels B2, B4, B6, D2, D4, D6, F2, F4, and F6, respectively. When unit period f3 ends, processing circuit 21 shifts the projection position by 0.5 panel pixels to the left in the figure from the projection position of unit period f3. In unit period f4, the nine panel pixels represent hatched image pixels B1, B3, B5, D1, D3, D5, F1, F3, and F5, respectively. When unit period f4 ends, processing circuit 21 shifts the projection position by 0.5 panel pixels upward in the drawing from the projection position of unit period f4, returning it to the reference position. In this manner, in the comparative example, the projection position shifts clockwise by 0.5 panel pixels for each unit period.

[0060] Fig. 15 is a diagram for explaining display unevenness in a comparative example. As described above, in the liquid crystal panel 100, a microlens is provided for each panel pixel in order to improve the efficiency of light use. For this reason, the brightness of the panel pixels is not uniform, and in fact, as shown in the upper column of Fig. 15, it is brighter near the center and darker from the center toward the outside. Note that the frame Ppx indicates the outer edge of the panel pixels in the liquid crystal panel 100 at the reference position.

[0061] In the comparative example, the panel pixels viewed in this manner are shifted by 0.5 panel pixels in the following order from the reference position: right → downward → left → upward, as shown in the middle column of Figure 15, during unit periods f1 to f4. For this reason, when viewed over one frame period, the bright area of ​​the panel pixel circulates along the path indicated by the arrow in the lower column of FIG. 15, resulting in separation into a bright area Br that is perceived as a relatively bright area and a dark area Dr that is not. The difference between such bright areas Br and dark areas Dr is perceived as display unevenness. This display unevenness is easily perceived when a relatively bright still image is displayed. In the comparative example, the dark area Dr is divided into a dark area Drv along the vertical direction in the figure and a dark area Drh along the horizontal direction. The arrows in the figure indicate the movement direction of the center of the panel pixel in a plan view. In the lower part of the figure, the dark area Dr is shown in a lattice pattern, but in reality, the dark area Dr is an area other than the bright area Br.

[0062] In the comparative example, the cause of the display unevenness that occurs in one frame period is that the panel pixels are larger than the image pixels, so there are areas where there is a lot of overlap due to the shift and areas where there is little. In the comparative example, among the grid-like dark areas that occur in one frame period, the areas where the vertical and horizontal lines intersect are particularly dark. Conversely, if the light path of the shift is changed so that the center of the panel pixel that is perceived as bright passes through an area that is easily darkened, the display unevenness can be eliminated even if one frame period is considered as one unit. As described above, the brightness of the panel pixels in the plane becomes darker from the center toward the outside due to the microlenses. The area that is particularly likely to become dark among the grid-like dark areas that occur when such panel pixels are shifted clockwise or counterclockwise is the area outside the area where the center of the panel pixels rotates, and is the area Ded shown by the dashed line in the middle column of Figure 15.

[0063] In an embodiment, for example, panel pixel b2 represents image pixels D3, D4, and E4 among the image pixels in 2 rows and 2 columns in unit periods f1-1, f1-3, and f1-4 in an odd frame period, and represents image pixel C3 other than the image pixels in 2 rows and 2 columns in unit period f1-2, so that the center of the panel pixel passes near the area Ded that is prone to darkening. In other words, in the embodiment, from unit period f1-1 to unit period f1-2, the projection position is shifted upward by 0.5 panel pixels, and from unit period f1-2 to unit period f1-3, the projection position is shifted rightward by 0.5 panel pixels and downward by 0.5 panel pixels, so that the center of the panel pixel passes near the area Ded that is prone to darkening.

[0064] Similarly, in the embodiment, panel pixel b2 represents image pixels D3, E4, and D4 among the image pixels in two rows and two columns in unit periods f2-1, f2-2, and f2-3, and represents image pixel C4 other than the image pixels in two rows and two columns in unit period f2-4, so that the center of the panel pixel passes near the area Ded that is prone to darkening. In other words, in the embodiment, from unit period f2-3 to unit period f2-4, the projection position shifts leftward by 0.5 panel pixels and upward by 0.5 panel pixels, and from unit period f2-4 to unit period f1-1 of the next frame period, the projection position shifts downward by 0.5 panel pixels, so that the center of the panel pixel passes near the area Ded that is prone to darkening. In this manner, in the embodiment, the relatively bright central portion of the panel pixel passes through the area Ded that is prone to becoming dark, so that display unevenness can be reduced.

[0065] In contrast to the comparative example, in the projection display device 1 according to the embodiment, the frame period is divided into odd-numbered frame periods and even-numbered frame periods. In the embodiment, in the unit periods f1-1 to f1-4 of odd frames, the panel pixels are shifted from the reference position in the following order, as shown in the upper left column of Fig. 13: upward → right diagonally downward → downward → left diagonally upward. Therefore, when only the odd frame period is considered, the bright area by the panel pixels circulates along the path shown by the arrow in the lower left column of Fig. 13, so that the bright area Bro becomes a parallelogram obtained by deforming the square of the comparative example in the right diagonally downward direction, and the dark area Dr becomes the area excluding the parallelogram. The dark area Dr in the odd frame period is divided into a dark area Drv in the vertical direction and a dark area Ddr in the right diagonally downward direction in the figure. In the embodiment, in the unit periods f2-1 to f2-4 of the even frames, the panel pixels are shifted downward from the reference position, diagonally upward to the right, and diagonally downward to the left, as shown in the upper right column of Fig. 13. Therefore, when only the even frame periods are considered, the bright area of ​​the panel pixels circulates along the path shown by the arrow in the lower right column of Fig. 13, so that the bright area Bre becomes a parallelogram obtained by deforming the square of the comparative example diagonally upward to the right, and the dark area Dr becomes the area excluding the parallelogram. The dark area Dr in the even frame period is divided into a dark area Drv in the vertical direction and a dark area Dur in the diagonally upward to the right in the figure.

[0066] Here, in this embodiment, when viewed through two frame periods, an odd frame period and an even frame period, the dark area Ddr in the odd frame period and the dark area Dur in the even frame period are seen overlapping each other. Therefore, in this embodiment, the dark area Dv is less noticeable compared to the comparative example in which the dark area Dr is seen fixedly in a lattice shape. Therefore, in this embodiment, the deterioration of display quality can be suppressed compared to the comparative example.

[0067] The above-described embodiment can be modified or applied in various ways as follows.

[0068] In the embodiment, the liquid crystal panel 100 is of a transmissive type, but it may be of a reflective type. In the embodiment, the light path shift element 230 shifts the projection position from the reference position in the following order during odd frame periods: upward → right diagonal downward → downward → left diagonal upward, and shifts the projection position from the reference position in the following order during even frame periods: downward → right diagonal upward → upward → left diagonal downward, but the present invention is not limited to such a configuration. For example, the light path shift element 230 may shift the projection position from the reference position in the following order during odd frame periods: right → left diagonal downward → left → right diagonal upward, and shift the projection position from the reference position in the following order during even frame periods: left → right diagonal downward → right → left diagonal upward.

[0069] In the embodiment, each of the odd frame period and the even frame period is divided into four unit periods. That is, the number of unit periods included in one frame period, k, is exemplified as "4". k is not limited to "4". Specifically, k may be "4" or more as long as the light path shift by the light path shift element 230 is controlled so that the dark regions occurring in the odd frame periods and the dark regions occurring in the even frame periods are different.

[0070] In the embodiment, the shift timing of the light path in the light path shift element 230 is set to the rear end period corresponding to the vertical scanning period in the unit periods f1-1 to f1-4 and f2-1 to f2-4, but there may be a time delay. In such a case, the processing circuit 21 may be configured to control the light path shift element in anticipation of the time delay so that the image formed by the liquid crystal panel 100 in the unit period is shifted to the projection position corresponding to the unit period.

[0071] The number of unit periods included in the odd frame period and the even frame period, “4”, is an example of an integer k. The odd frame period is an example of a first frame period, and the even frame period is an example of a second frame period. The upward direction is an example of a first direction, and the downward direction is an example of a second direction. Panel pixel b2 is an example of one panel pixel, panel pixel a2 is an example of a panel pixel adjacent to the one panel pixel in the first direction, and panel pixel c2 is an example of a panel pixel adjacent to the one panel pixel in the direction opposite to the first direction. The data specifying the gradation level of image pixel D3 is an example of first image pixel data, the data specifying the gradation level of image pixel C3 is an example of second image pixel data, the data specifying the gradation level of image pixel D4 is an example of third image pixel data, the data specifying the gradation level of image pixel E4 is an example of fourth image pixel data, the data specifying the gradation level of image pixel C4 is an example of fifth image pixel data, and the data specifying the gradation level of image pixel E3 is an example of sixth image pixel data.

[0072] From the above-mentioned exemplary embodiments, the following aspects can be understood, for example.

[0073] A projection type display device according to one aspect 1 includes a liquid crystal panel having a plurality of panel pixels, a light path shift element that shifts an optical path of projection light projected from the panel pixels and projects it as a projection pixel, and a display control circuit that controls the liquid crystal panel and the light path shift element, wherein a frame period is composed of k (k is an integer equal to or greater than 4) unit periods, and one panel pixel among the plurality of panel pixels individually expresses k pieces of image pixel data for each of the k unit periods, and the display control circuit controls a video image corresponding to the one panel pixel for each of the k unit periods. a data signal corresponding to a gray level of the raw data is supplied to the one panel pixel, and a position of the projection pixel is controlled for the light path shift element to a projection position corresponding to image pixel data for each of the k unit periods, the k pieces of image pixel data corresponding to the one panel pixel include first image pixel data, second image pixel data adjacent to the first image pixel data in the first direction, third image pixel data adjacent to the first image pixel data in the second direction, and fourth image pixel data adjacent to the third image pixel data in the direction opposite to the first direction. According to the projection display device of the first aspect, the areas that become relatively dark due to the shift become less noticeable, so that display unevenness can be reduced.

[0074] In a projection display device according to a specific aspect 2 of aspect 1, the amount of light path shift caused by the light path shift element from one unit period to the next unit period is less than one panel pixel.

[0075] In a projection display device related to a specific aspect 3 of aspect 1, the frame period includes a first frame period and a second frame period, and in the first frame period, the k pieces of image pixel data corresponding to the one panel pixel include the first image pixel data, the second image pixel data, the third image pixel data, and the fourth image pixel data, and in the second frame period, the k pieces of image pixel data corresponding to the one panel pixel include the first image pixel data, the third image pixel data, fifth image pixel data adjacent to the third image pixel data in the first direction, and sixth image pixel data adjacent to the first image pixel data in the opposite direction to the first direction.

[0076] In a projection display device relating to a specific aspect 4 of aspect 3, the fifth image pixel data corresponds to the first frame period for a panel pixel adjacent to the one panel pixel in the first direction, and the sixth image pixel data corresponds to the first frame period for a panel pixel adjacent to the one panel pixel in the opposite direction to the first direction.

[0077] In a projection display device according to a fifth specific example of the third example, the display control circuit controls the light path shift element to shift the light path in an order opposite to that in the first frame period and the second frame period.

[0078] 1... projection type display device, 100R, 100G, 100B... liquid crystal panel, 110... pixel circuit, 118... pixel electrode, 120... liquid crystal element, 20... display control circuit, 21... processing circuit, 22R, 22G, 22B... conversion circuit, 230... light path shift element.

Claims

1. A liquid crystal panel having a plurality of panel pixels; a light path shift element that shifts an optical path of the projection light projected from the panel pixel and projects the light as a projection pixel; a display control circuit for controlling the liquid crystal panel and the light path shift element; Including, A frame period is composed of k unit periods (k is an integer equal to or greater than 4), Among the plurality of panel pixels, one panel pixel individually expresses k pieces of image pixel data for each of the k unit periods; The display control circuit includes: supplying a data signal corresponding to a grayscale level of video pixel data corresponding to the one panel pixel to the one panel pixel for each of the k unit periods; With respect to the light path shift element, controlling the positions of the projection pixels to projection positions corresponding to image pixel data for each of the k unit periods; The k image pixel data corresponding to the one panel pixel are first image pixel data; second image pixel data adjacent to the first image pixel data in the first direction; third image pixel data adjacent to the first image pixel data in the second direction; and fourth image pixel data adjacent to the third image pixel data in a direction opposite to the first direction. Projection type display device.

2. The amount of light path shift from one unit period to the next unit period by the light path shift element is less than one pixel in terms of panel pixels.

2. The projection display device according to claim 1.

3. the frame period includes a first frame period and a second frame period, In the first frame period, The k image pixel data corresponding to the one panel pixel are the first image pixel data; the second image pixel data; the third image pixel data; the fourth image pixel data; Including, In the second frame period, The k image pixel data corresponding to the one panel pixel are the first image pixel data; the third image pixel data; Fifth image pixel data adjacent to the third image pixel data in the first direction; sixth image pixel data adjacent to the first image pixel data in a direction opposite to the first direction; Includes 2. The projection display device according to claim 1.

4. The fifth image pixel data is A panel pixel adjacent to the one panel pixel in the first direction corresponds to the first frame period, The sixth image pixel data is A panel pixel adjacent to the one panel pixel in a direction opposite to the first direction is provided with a signal corresponding to the first frame period.

4. The projection display device according to claim 3.

5. The display control circuit includes: The order of shifting the optical path of the optical path shift element is reversed between the first frame period and the second frame period.

4. The projection display device according to claim 3.

Images