Device and program for detecting diagram mismatch

Abstract

To provide a device and a program for detecting a diagram mismatch, which can find a diagram error which blocks an appropriate operation.SOLUTION: A diagram mismatch detection device 100 detects the presence / absence of a diagram mismatch using a graph defined by a collection of apexes and a collection of sides on the basis of an operation diagram of a train and an interlocking table. In this diagram mismatch detection device 100, integrated processing can be performed even when station facilities, structures, etc. vary, and thus a diagram error which blocks an appropriate operation can be automatically and instantaneously found.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a train schedule inconsistency detection device and a detection program for detecting inconsistencies in train schedules. [Background technology]

[0002] For example, when automatically detecting timetable inconsistencies, a method is known in which cases are classified in advance and inconsistencies are detected and judged within the range (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2011-16461 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, timetable inconsistencies can take various forms, and it is believed that using a method such as that described in Patent Document 1 above, it would be difficult to maintain consistency in the inconsistency judgment while taking prompt action. Furthermore, if one were to use this method to perform uniform processing, there is a possibility that unexpected inconsistencies would occur.

[0005] The present invention has been made in consideration of the above-mentioned points, and has as its object to provide a timetable inconsistency detection device and detection program that can quickly and reliably find timetable errors that hinder proper operation through unified processing. [Means for solving the problem]

[0006] To achieve the above objective, the timetable inconsistency detection device detects whether or not there is a timetable inconsistency by using a graph in which a set of vertices and a set of edges are set (defined) based on train operation schedules and interlocking charts.

[0007] In the above-mentioned timetable inconsistency detection device, a graph is defined that is represented by a set of vertices and a set of edges that are defined based on the train schedule and interlocking diagram, and the presence or absence of a timetable inconsistency is detected using this graph, making it possible to perform uniform processing even if station facilities and structures are different, and ultimately to automatically and instantly find errors in the timetable that hinder proper operation.

[0008] In a specific aspect of the present invention, the set of vertices is composed of vertices corresponding to four types of events at a station: train arrival at a station, train departure from a station, train departure from a station, and train departure from a station. In this case, by using a graph composed of these vertices and edges described below, it becomes possible to detect a timetable mismatch.

[0009] In another aspect of the present invention, the set of edges includes edges connecting vertices corresponding to events occurring along the operation of each train, making it possible to detect timetable inconsistencies that reflect information about the progress of the train from the starting station to the terminal station through each station.

[0010] In yet another aspect of the present invention, the set of edges includes edges that connect vertices corresponding to train arrivals and departures at each station as events in the time order on the timetable. For example, edges that connect vertices corresponding to train arrivals and departures at each station in the time order on the timetable are included. In this case, it becomes possible to detect timetable inconsistencies related to train operations (arrival / departure) at each station.

[0011] In yet another aspect of the present invention, the set of edges includes edges that sequentially connect a vertex corresponding to the departure of the previous train to a vertex corresponding to the arrival of the next train at each station, making it possible to detect timetable inconsistencies (previous train departure / next train arrival) based on the time order at each station.

[0012] In yet another aspect of the present invention, the set of edges includes edges connecting dependencies between trains due to route conflicts in the interlocking diagram or edges connecting dependencies between set routes, making it possible to detect timetable inconsistencies related to route control that takes into account route conflicts in the interlocking diagram.

[0013] In yet another aspect of the present invention, a diagram inconsistency is detected based on the presence or absence of cycles in a graph represented by a set of vertices and a set of edges. In this case, a diagram inconsistency appears as a cycle in the defined / generated graph, so that a diagram inconsistency can be detected quickly and accurately by detecting these cycles.

[0014] The program for detecting timetable inconsistencies to achieve the above objective detects whether or not there are any inconsistencies in the timetable by using a graph in which a set of vertices and a set of edges are set (defined) based on train timetables and interlocking diagrams.

[0015] In the above-mentioned program for detecting timetable inconsistencies, a graph is defined which is represented by a set of vertices and a set of edges which are defined based on train timetables and interlocking diagrams, and the presence or absence of a timetable inconsistency is detected using this graph, making it possible to perform uniform processing even if station facilities and structures are different, and ultimately to automatically and instantly find errors in the timetable which hinder proper operation. [Brief description of the drawings]

[0016] [Figure 1] FIG. 1 is a conceptual diagram showing an example of the configuration of a timetable mismatch detection device according to an embodiment; [Diagram 2] (A) is a data diagram showing an example of a timetable showing train operations, (B) is a diagram corresponding to (A), and (C) is a diagram in which information regarding route control has been added to (B). [Diagram 3] 13A and 13B are diagrams showing an example of an interlocking diagram, and 13C is a diagram for explaining an example of a deadlock state. [Figure 4] 13(A) to 13(E) are diagrams for explaining the process of extracting a set of vertices for creating a graph (directed graph; dependency graph). [Diagram 5] 13(A) to 13(E) are diagrams for explaining the process of extracting a set of edges for creating a graph (directed graph; dependency graph). [Figure 6] FIG. 6 is a data diagram for explaining a graph (directed graph; dependency graph) created based on the contents of FIGS. 4 and 5. [Figure 7] 13(A) and (B) are diagrams for explaining an example of cycle detection. [Figure 8] 13A to 13C are diagrams for explaining the relationship between path control for paths in a competitive relationship and connections between vertices by edges in graph theory. [Figure 9] 13(A) and 13(B) are diagrams for explaining another example of cycle detection. [Figure 10] FIG. 13 is a conceptual diagram showing an example of highlighting based on detection of a cycle. [Figure 11] 11 is a flowchart for explaining a process for detecting a timetable inconsistency using a graph (directed graph; dependency graph). [Figure 12] FIG. 1 is a conceptual diagram for explaining an overview of a timetable mismatch detection device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] An example of a timetable mismatch detection device and a timetable mismatch detection program according to an embodiment will be described below with reference to Fig. 1 etc. Fig. 1 is a conceptual diagram for explaining an example of the configuration of the timetable mismatch detection device according to this embodiment.

[0018] The timetable inconsistency detection device 100 of this embodiment is a device for detecting inconsistencies regarding train timetables, and is composed of a PC or the like having a display, keyboard, mouse, etc., as shown in the figure, and is equipped with an input / output device 10, a data input unit 20, a timetable information storage unit 30, a data inspection unit 40, and an interlocking diagram data unit 50.

[0019] The input / output device 10 is a user interface for performing input and output, such as accepting data for creating and editing a diamond and outputting the results, with, for example, a keyboard and mouse provided on a PC functioning as input devices and a display functioning as an output device.

[0020] The data input unit 20 is connected to an input / output device 10 including, for example, a CPU unit of a PC, and receives diagram data that has been input or edited in the input / output device 10 , and stores it in a diagram information storage unit 30 .

[0021] The train schedule information storage unit 30 is composed of various storage devices and stores various information related to train schedules. For example, as described above, when information on new schedule creation or editing is received via the data input unit 20, the information is stored in a predetermined area.

[0022] The data inspection unit 40 is composed of, for example, a CPU, a circuit element, etc., and performs data processing based on various programs incorporated therein. Here, in particular, based on information on the operation schedule, such as the train running route stored in the timetable information storage unit 30, and information on the interlocking diagram stored in the interlocking diagram data unit 50, a process is performed to detect the presence or absence of inconsistency in the target timetable, for example, a newly edited or created timetable. That is, the data inspection unit 40 functions as a main part of the detection device 100 that detects the presence or absence of inconsistency in the timetable based on the train operation schedule and the interlocking diagram. Also, from another perspective, the data inspection unit 40 constitutes a timetable inconsistency detection program. In particular, in this embodiment, the timetable inconsistency detection device 100 detects timetable inconsistency in the data inspection unit 40 by using a graph (graph theory) defined by a set of vertices and a set of edges. That is, the data inspection unit 40 incorporates a program that extracts elements that should be vertices and edges for making a graph (graph theory) available from a newly created or edited generated diagram (diagram data) and an interlocking diagram created in advance at each station, etc., and analyzes a set of extracted vertices and edges using graph theory to determine whether or not there is an inconsistency. In this embodiment, the presence or absence of an inconsistency is determined by applying a dependency graph consisting of a set of extracted vertices and a set of edges. A detailed example of this will be described later.

[0023] The interlocking diagram data unit 50 is composed of, for example, various storage devices, and stores information about interlocking diagrams held by, for example, train operation management devices. In order to acquire such information, the interlocking diagram data unit 50 is connected to various equipment (not shown) that holds interlocking diagrams, such as operation management devices and station equipment. In addition, the interlocking diagram data unit 50 may be composed of, for example, a data acquisition unit that acquires data about interlocking diagrams from various equipment such as operation management devices, instead of the data storage unit described above, and may acquire interlocking diagrams according to commands from the data inspection unit 40. In other words, the interlocking diagram data unit 50 can be in various forms that enable it to acquire information about interlocking diagrams as needed by the data inspection unit 40, and does not necessarily have to hold the interlocking diagrams itself.

[0024] Regarding the schedule inconsistency detection device 100 having the above-mentioned configuration, the series of operations can be summarized as follows: first, in the input stage, diagram data is input and edited in the input / output device 10 serving as a schedule editing input / output device (step 1), and the input and edited diagram data is stored in the schedule information storage unit 30 via the data input unit 20 (step 2).

[0025] Next, as an inspection stage, when the data inspection unit 40 is started by a start-up operation on the input / output device 10 (step 3), the data inspection unit 40 reads the diagram data to be inspected from the diagram information storage unit 30 (step 4), and reads information regarding the relationship of the route competition of each route that constitutes the driving route to be referenced from the interlocking diagram (step 5), and based on this, inspects the validity of the diagram formed by the diagram data.

[0026] If the data inspection unit 40 detects invalid data (a schedule inconsistency) as a result of inspecting the validity of the diagram data described above, it presents the location where the schedule inconsistency was detected to the user (data creator) via the input / output device 10 (step 6).

[0027] The above-mentioned series of processes or operations are carried out by the schedule mismatch detection device 100 having the above-mentioned configuration.

[0028] The above-mentioned timetable mismatch detection device 100 is just one example, and various other configurations are possible in addition to the above-mentioned configuration in which an independent PC is configured to be connectable to various equipment such as a traffic management device that has information on interlocking charts. For example, it is possible to configure the traffic management device to function as the timetable mismatch detection device 100 by incorporating various programs or integrated circuits containing programs corresponding to the above-mentioned data inspection unit 40 into the traffic management device.

[0029] Hereinafter, with reference to FIG. 2, a configuration example of a diagram that can be the subject of handling will be described.

[0030] FIG. 2(A) is a data diagram showing an example of a timetable showing train operation, and FIG. 2(B) is a diagram corresponding to FIG. 2(A). In FIG. 2(A), the arrival and departure times at each station when a train operates in the order of α station, β station, and γ station are shown as a timetable. FIG. 2(B) shows a diagram created for the operation of a train based on the timetable shown in FIG. 2(A) with the horizontal axis (horizontal direction) representing time and the vertical axis (vertical direction) representing position, i.e., each station. Also, in FIG. 2(B), arrivals (train arrival at a station) at α station, β station, and γ station are shown by vertices Arrα, Arrβ, and Arrγ, and departures (departure from a station) are shown by vertices Depα, Depβ, and Depγ. That is, for example, in the case of "Arrα", "Arr" means arrival at a station, and "α" means that the corresponding station is α station.

[0031] Furthermore, in this embodiment, as shown in FIG. 2(C), station departure route control is represented by vertices Staα, Staβ, and Staγ, and station departure route exit is represented by vertices Extα, Extβ, and Extγ. Here, Ext refers to exit from the previous station departure route. For example, "Extα" represents the exit from the departure route of the station immediately preceding station α. ​​Similarly, "Extβ" represents the exit from the departure route of station α, and "Extγ" represents the exit from the departure route of station β.

[0032] Here, the station departure route control means a control to set the route to be taken next as a step before the departure from the station. For example, in the figure, the vertex Staα indicates that the route to the β station to be taken next is set as a step before the vertex Depα indicating the departure from the α station for the train at the α station.

[0033] As mentioned above, the term "exiting the route from the station" means departing from the route from the previous station to the next station (exiting the route from the previous station), and here, the arrival at the next station (destination station) is treated as departing from the previous station. For example, in the figure, if the vertex is Extβ, the arrival at β station (reaching vertex Arrβ) indicates that the departure route from the previous station, α station, has been exited.

[0034] In the case of the above-mentioned setting of each vertex, for example, when a train arrives at a station (for example, β station) and departs, the vertices are arranged in the order of vertex Arrβ, vertex Extβ, vertex Staβ, and vertex Depβ. However, in this case, vertex Extβ means that the train has left α station, which is the previous station, and vertex Staβ means that a departure route to the next station, γ station, is set. Note that vertex Arrβ means arrival at β station, and vertex Depβ means departure from β station. In this embodiment, these four types of vertices are adopted as the vertices of a graph (dependency graph). In other words, in this embodiment, a set of vertices constituting a graph for using operations based on graph theory is composed of vertices corresponding to four types of events at a station: train arrival at a station, station departure route exit (specifically, as described above, previous station departure route exit representing departure from the departure route from the previous station), station departure route control, and station departure.

[0035] In this embodiment, a graph is created based on more detailed route information including routes based on arrival and departure at each station as described above, as information related to the operation schedule. More specifically, the graph is created based on routes shown in an interlocking diagram as exemplified in Fig. 3. In the following, positions (locations) are described as each point, but if this is considered to be the location of a station (for example, a location indicating a part of a station that is subdivided into platforms and other components of the station), each point can also be considered as one of the stations.

[0036] An example of operation will be described below with reference to Fig. 3 in relation to the interlocking diagram. Fig. 3(A) and Fig. 3(B) are diagrams showing an example of the interlocking diagram, and Fig. 3(A) illustrates the travel routes Rt1 and Rt2 of trains J1 and J2 on a linear outline diagram. Fig. 3(B) shows a data diagram in which the correspondence between each route in Fig. 3(A) and competing routes is tabulated. That is, Fig. 3(B) shows competing routes for each route R1 to R7 on the linear outline diagram shown in Fig. 3(A) where signals are provided to control the progress and stop of the routes.

[0037] Of the above, in the example shown in Fig. 3(A), two parallel tracks RL1 and RL2 are provided with a section RC where a point machine can change tracks between RL1 and RL2. As shown in the figure, it is assumed that sections RA1, TB1, and PL1 are provided before and after the section RC for the track RL1 (in the illustrated example, the section RC exists between the section TB1 and the section PL1). As shown in the figure, it is assumed that sections RA2, TB2, and PL2 are provided before and after the section RC for the track RL2 (in the illustrated example, the section RC exists between the section TB2 and the section PL2). Signals are provided at the boundaries between the sections, and trains J1 and J2 proceed according to the signals.

[0038] As described above, each of the trains J1 and J2 travels along the travel routes Rt1 and Rt2 indicated by the arrows in the figure. More specifically, as shown in the travel route Rt1, the train J1 first travels from the section PL2 on the track RL2 side through a route change at the section RC (from track RL2 to track RL1), and then travels to the section TB1 on the track RL1 side, and then to the section RA1. On the other hand, as shown in the travel route Rt2, the train J2 travels from the section RA1 and the section TB1 through the section RC on the track RL1 side, and then to the section PL1. That is, there is no route change in the section RC. Here, when the section RC is in the positional relationship shown in FIG. 3(A), the route R31 of the train J1 (traveling by changing the route from track RL2 to track RL1) and the route R41 of the train J2 (traveling on track RL1 without a route change) are in a competitive relationship, as shown by hatching in FIG. 3(B). In such a case, if control is not performed in a certain order, a deadlock may occur between train J1 and train J2, for example, as shown in the area surrounded by the dashed line CC1 in the diagram of FIG. 3(C). Such a situation will result in a timetable inconsistency. The deadlock in the above example will be described in more detail below. First, as shown in FIG. 3(C), the time at which control is performed on the route R31 of train J1 is set to time tR31, and the time at which control is performed on the route R41 of train J2 is set to time tR41. At time tR31, train J2 is present on section TB1, which is the destination of train J1. For this reason, control on route R31 is suspended. As described above, even if control of the route R41 of train J2 is attempted at time tR41 without control or setting of the route R31, because control of the route R31, which is the approach route to section TB1 that is in a conflict with the route R41, which is the departure route from section TB1, has not been performed, in other words, because train J1, which enters and arrives at section TB1 earlier than train J2 and departs from section TB1, has not yet entered section TB1, control and setting of the route R41 of train J2 is also prohibited (sequence conflict). As a result, both trains J1 and J2 are unable to move, resulting in a deadlock.

[0039] In general, in order to avoid such a deadlock state, rules on the route control sequence to avoid the deadlock state are determined in advance for each station, for example, according to the shape and characteristics of each station. In other words, hazard cases that may cause deadlocks in route setting are assumed in advance, and when determining the route control sequence, the possibility of deadlock occurrence is detected by taking into account the train location status at the time of route control as necessary. In other words, the detection and judgment of timetable inconsistencies that may occur at each station are performed individually (ad hoc) based on the specific and finite inconsistency case classification as described above. However, such a method may cause problems such as maintaining consistency in inconsistency judgment and rapid action.

[0040] Therefore, in this embodiment, when applying graph theory as described above, not only the arrival and departure of each train at a station but also the departure and departure route control from a station are taken into account for the set of vertices and the set of edges that constitute a graph (dependency graph, directed graph), and the possibility of determining the route between trains is related to the information of the interlocking diagram that is set in advance for each station, so that the mechanism for detecting inconsistencies is described in a unified manner (algorithmized) based on graph theory, enabling quick and accurate detection and judgment. Also, by making the description unified, detection and judgment can be performed in a uniform manner regardless of the alignment of the station.

[0041] An example of a detection algorithm for a timetable inconsistency in this embodiment will be described below with reference to FIG. 4 and the like. Here, as described above, a graph G is created, and an analysis method known from existing graph theory (such as Kosaraju's algorithm) is used for the created graph G to detect an inconsistency in a train operation timetable. Note that the graph G is generally composed of a set V of vertices and a set E of edges connecting the vertices, and is expressed in graph theory as, for example, G=G(V,E). Here, it is assumed that the direction of connecting points in the set E of target edges is determined. In other words, it is assumed that the graph G is a directed graph (dependency graph).

[0042] 4(A) to 4(E) are diagrams for explaining the process of extracting a set V of vertices for creating a graph (dependency graph, directed graph) G. In the diagram, as an example, two trains J1 and J2 are shown traveling from point C to point A via point B, with train J1 departing first and train J2 departing later. However, this is merely an example, and in actual timetable creation (or timetable editing or timetable updating), there may be many variations in the number of trains, their direction of travel, and how they move. In each of FIGS. 4(A) to 4(E), vertices that are the subject of explanation are indicated by black circles, and those that have been explained are indicated by white circles. For example, FIG. 4(E) shows all vertices as white circles, since it provides a general description of each vertex after the explanation in FIGS. 4(A) to 4(D).

[0043] First, as shown in FIG. 4(A), vertices Arr1A and the like indicating arrival are extracted for each of trains J1 and J2. Here, in "Arr1A," "Arr" means arrival at the station, "1" means train J1, and "A" means point A. In other words, "Arr1A" means the arrival of train J1 at point A. "2" means train J2, and "B" and "C" mean points B and C, respectively. The same applies below.

[0044] Next, as shown in Fig. 4(B), vertices Sta1B and the like that indicate station departure route control, i.e., setting of a route to a point to go next, are extracted. Note that "Sta" in "Sta1B" means station departure route control, and "Sta1B" means setting a route from the current point B to point A, which is the next point, as the route destination of train J1.

[0045] Following the station departure route control in Fig. 4(B), vertices Dep1B and the like indicating station departure are extracted as shown in Fig. 4(C). Note that in "Dep1B", "Dep" means station departure, and "Dep1B" means the departure of train J1 from point B.

[0046] On the other hand, when the arrival of each of trains J1 and J2 is confirmed, vertices Ext1A and the like are extracted, which indicate that trains have departed from a route starting from a station, i.e., that trains have departed from a route from a previous station to an arrival at a next station, as shown in Fig. 4(D). Note that "Ext" in "Ext1A" means that train J1 has departed from a route starting from a station, and "Ext1A" means that train J1 has departed from a route that reaches point A from point B, which is one point before point A, by arriving at point A.

[0047] In summary, as shown in FIG. 4(E), a set V of vertices constituting a graph G is defined by vertices Arr1A, . . . , Ext1A, . . . , Sta1A, . . . , Dep1A, . . . corresponding to the above four types of events.

[0048] Hereinafter, the creation of a set E of edges constituting a graph G from the above set V of vertices will be described with reference to FIG.

[0049] 5(A) to 5(E) are diagrams for explaining the process of extracting a set E of edges for creating a graph G. FIG.

[0050] First, as shown in Fig. 5(A), for each of trains J1 and J2, vertices are connected in the order of each event to generate edges ED1 indicated by arrows, and a set of all edges ED1 is defined as a first edge set E1. In other words, edge set E1 is composed of edges connecting vertices corresponding to events that occur along the operation of each of trains J1 and J2.

[0051] Next, as shown in FIG. 5B, for each of points A, B, and C, the vertices of arrival (Arr) and departure (Dep) are connected in chronological order (from left to right) to generate an edge ED2 indicated by an arrow, and a set of all edges ED2 is defined as a second edge set E2. That is, the edge set E2 is composed of edges that connect vertices corresponding to events (arrival (Arr) and departure (Dep)) at points A, B, and C (for example, each station) in chronological order on the timetable. In this example, since train J1 departs first and train J2 departs later, for example, when focusing on point B, the vertices related to train J1 are first connected in the order of Arr1B and Dep1B, then Dep1B of train J1 is connected to Arr2B of train J2, and further the vertices related to train J2 are connected in the order of Arr2B and Dep2B, and so on. In this manner, edge ED2 is generated.

[0052] Next, as shown in FIG. 5(C), for each of points A, B, and C, the vertices are connected so as to connect the "Dep" (station departure) of the previous train to the "Arr" (station arrival) of the next train, and an edge ED3 indicated by an arrow is generated, and a set of all edges ED3 is defined as a third edge set E3. That is, the edge set E3 is composed of edges that sequentially connect the vertices corresponding to the departure of the previous train from the station at points A, B, and C (for example, each station) to the vertices corresponding to the arrival of the next train at the station. In this example, since train J1 departs first and train J2 departs later, for example, when focusing on point A, edge ED3 is generated such that Dep1A of train J1 is connected to Arr2A of train J2. Note that in this case, the time of both points may be reversed, which is different from the case of set E2 that connects the vertices in chronological order.

[0053] Next, as shown in FIG. 5(D), taking into consideration the route competition in the interlocking diagram, an edge ED4 indicated by an arrow is generated, and a set of all edges ED4 is defined as a fourth edge set E4. That is, the edge set E4 is composed of edges that connect dependencies regarding the control order of the running routes between trains due to route competition in the interlocking diagram. In this example, since train J1 departs first and train J2 departs later, for example, when train J1 that arrives at point A is compared with train J2 that exists at point B, which is the point (station) before point A, it is confirmed from the relationship of route competition that train J1 has departed from the route from point B to point A (Ext1A), and only then can train J2 set a route to point A, which is the next route destination (Sta2B). That is, edge ED4 is generated by connecting Ext1A and Sta2B.

[0054] To summarize the above, that is, as shown in FIG. 5(E), a set E (=E1∪E2∪E3∪E4) of edges constituting the graph G is defined by the union of the first set E1 to the fourth set E4 of edges.

[0055] In addition, Fig. 6 shows the sets V and E (=E1∪E2∪E3∪E4) constituting the graph G as described above, written using the elements shown in Fig. 4 and Fig. 5. In addition, in the figure, each element constituting the edge set E (=E1∪E2∪E3∪E4) indicates the edge direction with (start point, end point).

[0056] In this embodiment, for the graph G(V,E) created as described above, an inconsistency in the timetable is detected based on the presence or absence of a cycle in the graph G(V,E) represented by the set V of vertices and the set E of edges. In the graph G(V,E) created in the above manner, if there is no inconsistency in the timetable, there will be no cycle. Conversely, a location where a cycle is created corresponds to the presence of a location where a deadlock occurs as shown with reference to FIG. 3, or a location where previous and following trains overlap at the same point (overlapping stops occur) as shown in FIG. 10 described later.

[0057] Generally, various methods are known in graph theory for finding (detecting) cycles from graphs (dependency graphs, directed graphs), and by applying these various methods to the graph G(V,E) of this embodiment, the presence or absence of a cycle can be detected quickly and reliably. In other words, a timetable inconsistency can be detected. Furthermore, the location where the cycle occurs can be shown as the location causing the timetable inconsistency.

[0058] FIG. 7(A) shows each vertex constituting the set of vertices V and each edge constituting the set of edges E defined based on a diagram (partially excerpted) to create a graph G(V,E) for trains J1 and J2 in the embodiment illustrated in FIG. 3. In the figure, vertices related to train J1 are indicated by ◯ (white circle) and those related to train J2 are indicated by △ (white triangle). Also, each edge is indicated with an arrow with a direction. When detecting the presence or absence of a cycle, two cycles are detected as shown in the range surrounded by the dashed line CC2 in FIG. 7(B). In other words, it is possible to find out that there is an inconsistency in the timetable at that point by using graph theory.

[0059] Figures 8(A), 8(B) and 8(C) show considerations regarding the relationship between the path control for paths that are in a relationship of setting another path that is in a competitive relationship with one path after escaping that path, and the connection of vertices by edges in graph theory, and correspond to Figure 7. Figure 8(A) shows an example of a case where the above relationship is not connected by an edge, and Figure 8(B) shows an example of a case where the above relationship is connected. Also, Figure 8(C) shows another example of the above relationship.

[0060] First, in Fig. 8(A), Sta2TB1 of train J2, shown by a frame FFx, and Ext2PL1, shown by a frame FFy, are a pair in terms of the control and setting of the train J2's route and the escape, and the relationship of this pair is simply shown by a curve CCx. Note that the fourth set of edges E4 described with reference to Fig. 8 expresses the dependency relationship regarding the order that should be established between the station departure route escape Ext, in which a route control that is in a competitive relationship with the route is performed after the route escape, and the station departure route control Sta (which is in a competitive relationship with the route), and therefore, what is defined as set E4 are the edges connecting Ext and Sta, and edges connecting Ext2PL1 and Sta2TB1 and Stas in a competitive relationship (Sta2TB1 and Sta1PL2 in this figure) are not defined. In contrast, Sta1PL2 of train J1, which is enclosed in a box FFz, is related to the route of train J1 that is in conflict with the route of its paired train J2. However, Sta1PL2 is not connected to Ext2PL1. This is because, as shown in the figure, the time tSta1PL2 of Sta1PL2 is earlier than the time tDep2TB1 of Dep2TB1, which is the departure time related to Sta2TB1, which indicates the route control of train J2.

[0061] On the other hand, in the example shown in FIG. 8(B), after leaving one route, another route that is in a competitive relationship with the route is set, which is connected by an edge. To be more specific, as shown in the figure, Sta1PL2 and Ext1TB1, which are paired with respect to the control and setting of the route of train J1 and the exit, surrounded by frames FFx and FFy, have a paired relationship as shown by the curve CCx, and not only this, Ext1TB1 of train J1 is connected to Sta2TB1 of train J2. In the figure, this is shown by the curve CCy. This is because the time tSta2TB1, which is the route setting time for Sta2TB1, which indicates the route control of train J2, is later than the time tDep1PL2 of Dep1PL2, which is the departure time for Sta1PL2, which indicates the route control of train J1. Therefore, due to this point, when graph theory is used, it is detected as a cycle.

[0062] In addition to the above, in the example shown in Figure 8 (C), the items enclosed by the frames FFx, FFy, and FFz are in a pair relationship (Sta2TB1 and Ext2PL1) as shown by the curve CCx, and furthermore, in the relationship shown by the curve CCy, Ext2PL1 of train J2 is connected to Sta1TB1 of train J1. This is because Sta2TB1 and Ext2PL1 are a pair, and the time tSta1TB1, which is the route setting time for Sta1TB1 indicating the route control of train J1, is later than the time tDep2TB1 of Dep2TB1, which is the departure time for Sta2TB1 indicating the route control of train J2. Note that, regarding the above, when graph theory is used, a cycle caused by this portion is not detected.

[0063] As long as the route control of each train follows the order of route control (which is in a competitive relationship with route exit) the edge defined between Ext and Sta will extend from left to right (i.e., Ext followed by Sta) and such an edge will not form a cycle. For example, Ext2PL1→Sta1TB1 in Figure 8(C) corresponds to this.

[0064] On the other hand, if the order of route control (which is in a competitive relationship with route exit) does not hold, the edge between Ext and Sta will extend from right to left, and such an edge may form a cycle, for example, Ext1TB1→Sta2TB1 in Figure 8(B).

[0065] 9(A) and 9(B) show another example of a case where train J1 is the first train and train J2 is the second train, but the stop of the second train J2 overlaps with the stop of the first train J1. That is, in this example, in the relationship shown in FIG. 9(A), two cycles corresponding to the stop of the second train J2 overlapping with the stop of the first train J1 are detected at point A in the range surrounded by the dashed line CC3 in FIG. 9(B).

[0066] When an inconsistency as described above is detected, it is possible to highlight the relevant portion including the relevant part in the diagram, as shown in Fig. 10. Such a display mode may be displayed as a result of inspection or detection, for example, on the input / output device 10 (display) in Fig. 1.

[0067] Hereinafter, with reference to a flowchart shown in FIG. 11, an example of a process of detecting a timetable inconsistency by the timetable inconsistency detection device 100 using the graph G(V,E) will be described.

[0068] First, the data inspection unit 40 of the timetable inconsistency detection device 100 reads the timetable data from the timetable information storage unit 30. That is, data on train timetables is input (step S101). In parallel with this, data on interlocking diagrams is input via the interlocking diagram data unit 50 (step S102). Based on these, a set V of vertices and a set E of edges constituting the graph G(V,E) are generated (defined), that is, the graph G(V,E) is generated (step S103).

[0069] When the graph G(V,E) is generated in step S103, the data checking unit 40 performs an automatic check for the presence or absence of a timetable inconsistency based on a cycle detection algorithm (step S104).

[0070] In step S104, if it is determined that a cycle has been detected, i.e., that there is a timetable inconsistency (step S104: Yes), the data inspection unit 40 sends a command signal to the input / output device 10 (display) to highlight the timetable inconsistency obtained as a result of the detection, and the display is performed (step S105), and the series of processes is terminated.

[0071] On the other hand, if it is determined in step S104 that no cycle has been detected, that is, no timetable mismatch has occurred (step S104: No), a message to that effect is displayed, for example, on the input / output device 10 (display) (step S106), and the series of processes ends.

[0072] In addition, when highlighting is performed in step S105, for example, a process of accepting correction or re-input of the data on the train timetable input in step S101 may be performed at the same time.

[0073] Hereinafter, an overview of the timetable mismatch detection device 100 of this embodiment will be described with reference to a conceptual diagram shown in FIG.

[0074] As described above and as shown in the figure, the timetable inconsistency detection device 100 of this embodiment acquires information on train timetables and interlocking diagrams, and creates a graph G(V,E) based on these. That is, a set of vertices V and a set of edges E are set, that is, the vertices and edges are defined from the train timetable and interlocking diagrams. Then, the created graph G(V,E) is detected for the presence or absence of a timetable inconsistency by using graph theory, particularly cycle detection. In the above cases, for cycle detection, a method established in graph theory can be applied, and for example, for cycle detection, it can be detected quickly and reliably by using existing methods. On the other hand, in the creation (definition) of the set, not only the train timetable but also the interlocking diagram is incorporated. By incorporating the interlocking diagram, it is possible to detect inconsistencies that are not only seen to see whether there is a possibility of an inconsistency occurring in the timetable of each train, but also considered whether there is a deadlock in the control order of the running path between the operating trains from the viewpoint of station interlocking specific to each station.

[0075] As described above, the timetable inconsistency detection device 100 of this embodiment detects the presence or absence of a timetable inconsistency by using a graph G(V,E) in which a set of vertices V and a set of edges E are set based on the train schedule and interlocking diagram. The timetable inconsistency detection device 100 determines a graph G(V,E) represented by a set of vertices V and a set of edges E defined based on the train schedule and interlocking diagram, and detects the presence or absence of a timetable inconsistency by using the graph G(V,E), which enables unified processing even if the facilities and structures of stations are different, and ultimately enables automatic and instantaneous detection of errors in the timetable that hinder proper operation.

[0076] 〔others〕 The present invention is not limited to the above-described embodiment, and can be embodied in various forms without departing from the spirit and scope of the present invention.

[0077] For example, in the above, the detection device 100 is described as being configured as a standalone PC or incorporated into a traffic management device, but the present invention is not limited to this. For example, it is also possible to consider an embodiment in which the various processes described above are performed on a cloud-based server.

[0078] Furthermore, this invention can be considered for use in determining the consistency of a newly created timetable or an edited version of an original timetable, for example in the case of a timetable revision, but it is not limited to this and can also be used, for example, when creating a special timetable or in a simulation.

[0079] In addition, regarding the use of graph theory, various methods can be applied as known analytical methods, not limited to the Kosaraju algorithm.

[0080] Also, for example, in the above embodiment, each vertex can be considered to include time information in addition to location (point or station) information. For example, for station arrival and station departure, the arrival time and departure time included in the timetable can be used, but for station departure route exit (previous station departure route exit), it can be defined as simultaneous with or immediately after arrival at the station, and for station departure route control, it can be defined as simultaneous with or immediately before departure from the station. For example, it is possible to have an embodiment in which the first edge set E1 is generated according to the time context defined as above.

[0081] Furthermore, when generating the fourth edge set E4, it is set based on the competitive relationships contained in the interlocking diagram illustrated in Figure 3(B). Even in this case, for competing routes, based on the definition of time described above, edges can be defined in terms of the chronological relationship between the time of one train's departure from the station route exit (exit from the previous station route exit) and the time of the station departure route control of another train, so that it is possible to detect points where deadlocks due to competitive relationships may occur.

[0082] In the above case, the vertices from the arrival to the departure of a train are arranged in the order of Arr, Ext, Sta, and Dep due to the time relationship, but it is also possible to create a graph by, for example, swapping the order of Arr and Ext. [Explanation of symbols]

[0083] 10... Input / Output device, 20... Data input section, 30... Timetable information storage section, 40... Data inspection section, 50... Interlocking diagram data section, 100... Detection device, Arr1A, Arrα, Arrβ, Arrγ... Vertex, CC1-CC3... Dashed line, Dep1B, Depα, Depβ, Depγ... Vertex, E, E1-E4... Set of edges, ED1-ED4... Edge, Ext1A, Extα, Extβ, Extγ... Vertex, G... Graph (dependency graph, directed graph), J1, J2... Train, PL1, PL2, RA1, TB1, RA2, TB2, RC... Section, R1-R7... Route, RL1, RL2... Track, Rt1, Rt2... Travel route, Sta1B, Staα, Staβ, Staγ... Vertex, V... Set of vertices

Claims

1. A timetable inconsistency detection device that detects the presence or absence of inconsistencies in train schedules by using a graph in which a set of vertices and a set of edges are set based on train schedules and interlocking diagrams.

2. 2. The device for detecting timetable inconsistencies according to claim 1, wherein the set of vertices is composed of vertices corresponding to four types of events at a station: train arrival at a station, departure from a station on a route, departure from a station on a route control, and departure from a station.

3. The apparatus for detecting a timetable mismatch according to claim 1 , wherein the set of edges includes edges connecting vertices corresponding to events occurring along the operation of each train.

4. The apparatus for detecting a timetable inconsistency according to claim 1 , wherein the set of edges includes edges that connect vertices corresponding to events at each station in chronological order on the timetable.

5. 2. The apparatus for detecting timetable inconsistencies according to claim 1, wherein the set of edges includes edges that sequentially connect, at each station, a vertex corresponding to the departure of a previous train from the station to a vertex corresponding to the arrival of a next train at the station.

6. The device for detecting timetable inconsistencies according to claim 1 , wherein the set of edges includes an edge that connects dependencies between trains due to route conflicts in the interlocking diagram.

7. 2. The device for detecting a diagram inconsistency according to claim 1, further comprising: detecting a diagram inconsistency based on the presence or absence of a cycle in a graph represented by the set of vertices and the set of edges.

8. A program for detecting inconsistencies in train schedules that uses a graph with a set of vertices and a set of edges based on train schedules and interlocking diagrams to detect whether or not there are inconsistencies in the schedule.

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