Projection type display device

Abstract

To suppress inconvenience in a case where an optical path shift element 230 is used.SOLUTION: A projection type display device 1 supplies to a panel pixel a1 a data signal based on video pixel data A1 corresponding to one unit period in the one unit period among unit periods f1-f4 constituting one frame, supplies to a panel pixel b1 adjacent to the panel pixel a1 a data signal based on video pixel data C1 corresponding to the one unit period, corrects a first gradation level of the video pixel data A1 and a second gradation level of the video pixel data C1 so as to reduce a difference between the first gradation level and the second gradation level, and aligns gradation levels of three pieces of video pixel data continued in a direction, in which the video pixel data C1 is positioned, to the same value as the corrected gradation level of the video pixel data C1 with respect to the video pixel data A1.SELECTED DRAWING: Figure 13

Description

[Technical field]

[0001] The present invention relates to a projection display device. [Background technology]

[0002] In recent years, as liquid crystal panels have become smaller and more precise, the gap between pixel electrodes has become narrower, and the effect of the electric field generated between adjacent pixel electrodes, that is, the electric field parallel to the substrate surface (transverse electric field), cannot be ignored. Specifically, the transverse electric field causes poor alignment of the liquid crystal, that is, domains, which are visually recognized as display defects. In order to suppress display defects caused by domains, a technique has been proposed in which, when the horizontal electric field is expected to be strong, the video data supplied from a higher-level device is corrected so that the difference in voltage applied to adjacent pixel electrodes is reduced. This type of correction is called domain correction (see, for example, the description in Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2011-170235 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, when a configuration in which the projection position of one panel pixel of the liquid crystal panel 100 is shifted by a light path shift element is applied to domain correction, the brightness of the panel pixel may change as if a moving image is displayed even when a still image is displayed. This causes a problem that the display quality may be degraded due to the domain. [Means for solving the problem]

[0005] In order to solve the above problem, a projection type display device according to one aspect of the present disclosure includes a liquid crystal panel having a plurality of panel pixels, in which a first panel pixel and a second panel pixel are adjacent to each other among the plurality of panel pixels, a light path shift element that shifts an optical path of projection light projected from the panel pixels to shift a position of the projection pixel, and a display control circuit that controls the liquid crystal panel and the light path shift element, and among video pixel data that constitutes video data input to the liquid crystal panel and is arranged in a matrix, k (k is an integer of 2 or more) pieces of video pixel data correspond individually to the first panel pixels in the k unit periods and k pieces of video pixel data correspond individually to the second panel pixels in the k unit periods, the k pieces of video pixel data corresponding to the first panel pixels and the k pieces of video pixel data corresponding to the second panel pixels are different, and the display control circuit a circuit controls the light path shift element to shift the position of the projection pixel for each of the k unit periods, supplies a data signal based on video pixel data corresponding to the one unit period to the first panel pixel in one of the k unit periods, supplies a data signal based on the video pixel data corresponding to the one unit period to the second panel pixel, corrects at least the second gradation level to reduce a difference between a first gradation level of the first video pixel data corresponding to the one unit period and a second gradation level of the second video pixel data corresponding to the one unit period among the k video pixel data corresponding to the first panel pixel, and adjusts gradation levels of (k-1) video pixel data including the second video pixel data that are consecutive to the first video pixel in a direction in which the second video pixel is located to the same value as the corrected second gradation level. [Brief description of the drawings]

[0006] [Figure 1] 1 is a diagram showing a projection type display device according to an embodiment; [Diagram 2] FIG. 1 is a block diagram showing a configuration of a projection display device. [Diagram 3] FIG. 1 is a diagram showing one frame and a unit period in a projection display device. [Figure 4]FIG. 2 is a diagram showing the relationship between image pixels and panel pixels in a projection display device. [Diagram 5] FIG. 2 is a diagram showing the relationship between image pixels, panel pixels, and projection positions in one frame. [Figure 6] FIG. 1 is a perspective view showing a configuration of a liquid crystal panel in a projection display device. [Figure 7] FIG. 2 is a cross-sectional view showing the structure of a liquid crystal panel. [Figure 8] FIG. 2 is a block diagram showing an electrical configuration of a liquid crystal panel. [Figure 9] FIG. 2 is a diagram showing a configuration of a pixel circuit in a liquid crystal panel. [Figure 10] FIG. 1 is a diagram showing an example of VT characteristics in a liquid crystal element. [Figure 11] FIG. 2 is a diagram for explaining domains in a liquid crystal panel. [Figure 12] FIG. 1 is a diagram showing conventional domain correction and the like. [Figure 13] FIG. 11 is a diagram for explaining a first correction. [Figure 14] FIG. 11 is a diagram for explaining a second correction. [Figure 15] FIG. 11 is a diagram for explaining a third correction. [Figure 16] FIG. 2 is a diagram illustrating an example of a processing circuit according to an embodiment. [Figure 17] FIG. 13 is a diagram illustrating another example of a processing circuit in the embodiment. [Figure 18] 10 is a diagram illustrating an example of a coefficient matrix of a filter processing circuit in the processing circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, a projection display device according to an embodiment will be described with reference to the drawings. In each drawing, the dimensions and scale of each part are appropriately different from the actual ones. In addition, since the embodiments described below are preferred specific examples, various technically preferable limitations are attached, but the scope of the present disclosure is not limited to these forms unless otherwise specified in the following description to the effect that the present disclosure is limited.

[0008] FIG. 1 is a diagram showing an optical configuration of a projection display device 1 according to a first embodiment. As shown in the figure, the projection display device 1 includes liquid crystal panels 100R, 100G, and 100B. A lamp unit 2102 made of a white light source such as a halogen lamp is provided inside the projection display device 1. Projection light emitted from the lamp unit 2102 is separated into three primary colors, red (R), green (G), and blue (B), by three mirrors 2106 and two dichroic mirrors 2108 arranged inside. Of these, the R light enters the liquid crystal panel 100R, the G light enters the liquid crystal panel 100G, and the B light enters the liquid crystal panel 100B. Since the optical path of B is longer than the optical paths of R and G, it is necessary to prevent loss in the optical path of B. For this reason, a relay lens system 2121 consisting of an entrance lens 2122, a relay lens 2123, and an exit lens 2124 is provided in the optical path of B.

[0009] The liquid crystal panel 100R has pixel circuits arranged in a matrix, as described later. In the pixel circuits, the transmittance of light emitted from the liquid crystal elements is controlled based on a data signal corresponding to R. That is, in the liquid crystal panel 100R, the light emitted from the liquid crystal elements functions as the smallest unit of an image. Through such control, the liquid crystal panel 100R generates an R transmission image based on a data signal corresponding to R. Similarly, the liquid crystal panel 100G generates a G transmission image based on a data signal corresponding to G, and the liquid crystal panel 100B generates a B transmission image based on a data signal corresponding to B.

[0010] The transmitted images of each color generated by the liquid crystal panels 100R, 100G, and 100B are incident on the dichroic prism 2112 from three directions. In the dichroic prism 2112, the R and B light are refracted at 90 degrees, while the G light travels straight. Therefore, the dichroic prism 2112 combines the images of each color. The combined light by the dichroic prism 2112 is incident on the projection lens 2114 via the light path shift element 230. The light path shift element 230 shifts the light path emitted from the dichroic prism 2112. In detail, the light path shift element 230 can shift the image projected on the screen Scr in the left-right direction and the up-down direction with respect to the projection surface. The projection lens 2114 enlarges and projects the composite image via the light path shift element 230 onto the screen Scr.

[0011] For ease of explanation, in order to distinguish between pixels projected onto the screen Scr and pixels resulting from synthesis of the liquid crystal panels 100R, 100G, and 100B, the pixels projected onto the screen Scr are referred to as projected pixels, and the pixels before or after synthesis of the liquid crystal panels 100R, 100G, or 100B are referred to as panel pixels. Also, the position of a projected pixel via the light path shift element 230 is simply referred to as a projection position. The transmitted images by the liquid crystal panels 100R and 100B are projected after being reflected by the dichroic prism 2112, whereas the transmitted image by the liquid crystal panel 100G is projected in a straight line. Therefore, the transmitted images by the liquid crystal panels 100R and 100B are in a left-right inverted relationship with respect to the transmitted image by the liquid crystal panel 100G.

[0012] 2 is a block diagram showing an electrical configuration of the projection display device 1. As shown in the figure, the projection display device 1 includes a display control circuit 20, the above-mentioned liquid crystal panels 100R, 100G, and 100B, and a light path shift element 230.

[0013] Video data Vid_in is supplied to the display control circuit 20 in synchronization with a synchronization signal Sync from a higher-level device such as a host device (not shown). The video data Vid_in is data representing an image to be displayed on the projection display device 1, and more specifically, specifies the gradation level of the pixels of the image, for example, by 8 bits for each RGB. Note that the pixels of an image specified by the video data Vid_in are referred to as video pixels, and the data that specifies the gradation level of a video pixel is referred to as video pixel data, but there may be cases in which no distinction is made between video pixels and video pixel data. The synchronization signal Sync includes a vertical synchronization signal that instructs the start of vertical scanning of the video data Vid_in, a horizontal synchronization signal that instructs the start of horizontal scanning, and a clock signal that indicates the timing of one pixel of the video data.

[0014] In this embodiment, a color image projected onto the screen Scr is expressed by overlapping transmitted images of the liquid crystal panels 100R, 100G, and 100B. Therefore, a pixel, which is the smallest unit of a color image, can be divided into a red panel pixel of the liquid crystal panel 100R, a green panel pixel of the liquid crystal panel 100G, and a blue panel pixel of the liquid crystal panel 100B. Strictly speaking, the red, green and blue panel pixels should be referred to as sub-pixels, but in this description they are referred to as panel pixels as described above.

[0015] The liquid crystal panels 100R, 100G, and 100B have a common structure, but only the color, i.e., wavelength, of the light incident thereon is different. Therefore, when there is no need to specify the color of the liquid crystal panels 100R, 100G, and 100B, the reference numeral 100 will be used.

[0016] The display control circuit 20 includes a control circuit 21, and processing circuits 22R, 22G, and 22B. In this embodiment, the pixel arrangement of the video image specified by the video data Vid_in is, for example, twice as large in the vertical direction and twice as large in the horizontal direction as the arrangement of the panel pixels in the liquid crystal panel 100. Therefore, in this embodiment, the projection direction is shifted by the light path shift element 230 to artificially increase the resolution. In detail, when one frame of a video image specified by the video data Vid_in is displayed, the period for displaying one frame is divided into four unit periods, and the projection position is shifted for each unit period. Due to such shifting, one panel pixel is visually recognized as if it is displaying the four video pixels specified by the video data Vid_in. Before describing the control circuit 21 and the processing circuits 22R, 22G, and 22B, a method for expressing four video pixels specified by the video data Vid_in using one panel pixel in the liquid crystal panel 100 will be described.

[0017] 3 is a diagram for explaining the relationship between frames and unit periods in this embodiment. As shown in this diagram, in this embodiment, one frame F is divided into four unit periods. In order to distinguish the four unit periods in frame F for convenience, the reference characters f1, f2, f3, and f4 are assigned in chronological order. Note that frame F is a period during which one frame of an image represented by video data Vid_in is supplied from a higher-level device, and corresponds to one period of 16.7 milliseconds when the frequency of the vertical synchronizing signal included in the synchronizing signal Sync is 60 Hz. In this case, the length of each of unit periods f1 to f4 is 4.17 milliseconds.

[0018] Next, a description will be given of the relationship between the image pixels whose gradation levels are specified by the image data Vid_in, the panel pixels of the liquid crystal panel 100, and the projection positions of the light path shift element 230. As described above, the light path shift element 230 shifts the projection direction from the dichroic prism 2112, but for convenience, the shift amount will be explained in terms of the size of the projection pixel on the screen Scr.

[0019] The left column in Fig. 4 is a diagram showing only a part of the arrangement of video pixels represented by the video data Vid_in, and the right column in Fig. 4 is a diagram showing an arrangement of panel pixels corresponding to the video pixels and arrangement in the left column.

[0020] In the array in the left column of the figure, in order to distinguish between video pixels in an image represented by video data Vid_in, the following codes are conveniently assigned to the first row: A1 to A6, B1 to B6, C1 to C6, D1 to D6, E1 to E6, and F1 to F6. Similarly, in the array in the right column of Fig. 4, in order to distinguish between panel pixels, the following codes are conveniently assigned to the first row: a1 to a3, b1 to b3, and c1 to c3.

[0021] Fig. 5 is a diagram showing which video pixels of an image represented by video data Vid_in are displayed at which projection positions by the panel pixels of the liquid crystal panel 100 in the projection display device 1. In detail, Fig. 5 is a diagram showing which video pixels of the array of video pixels represented by video data Vid_in in the left column of Fig. 4 are displayed at which projection positions in unit periods f1 to f4 by nine panel pixels of the liquid crystal panel 100 in the right column of Fig. 4.

[0022] For convenience, the projection position in unit period f1 of frame F is taken as the reference position. In the unit period f1, the panel pixels a1 to a3, b1 to b3, and c1 to c3 display the video pixels A1, A3, A5, C1, C3, C5, E1, E3, and E5 of the video data Vid_in in that order. In the next unit period f2, the light path shift element 230 shifts the projection position, indicated by the dashed line in unit period f1, by 0.5 pixels of the liquid crystal panel 100 to the right in the drawing. Also, in unit period f2, panel pixels a1-a3, b1-b3, and c1-c3 of the liquid crystal panel 100 display video pixels A2, A4, A6, C2, C4, C6, E2, E4, and E6 of the video data Vid_in in that order. In unit period f3, the light path shift element 230 shifts the projection position by 0.5 pixels of the liquid crystal panel 100 downward in the drawing from the projection position in unit period f2 indicated by the dashed line. Also, in unit period f3, panel pixels a1 to a3, b1 to b3, and c1 to c3 of the liquid crystal panel 100 display video pixels B2, B4, B6, D2, D4, D6, F2, F4, and F6 of the video data Vid_in in order. Then, in unit period f4, the light path shift element 230 shifts the projection position by 0.5 pixels of the liquid crystal panel 100 to the left in the drawing from the projection position in unit period f3 indicated by the dashed line. Also, in unit period f4, panel pixels a1 to a3, b1 to b3, and c1 to c3 of the liquid crystal panel 100 display video pixels B1, B3, B5, D1, D3, D5, F1, F3, and F5 of the video data Vid_in in order. After unit period f4, the light path shift element 230 shifts the projection position by 0.5 pixels of the liquid crystal panel 100 in the upward direction in the drawing from the projection position in unit period f4 to the position in unit period f1.

[0023] 2, the control circuit 21 generates a control signal Ctr for controlling the scanning of the liquid crystal panels 100R, 100G, and 100B for each unit period. The control circuit 21 also controls the projection position by the light path shift element 230 for each unit period.

[0024] The details of the processing circuits 22R, 22G, and 22B will be described later. The processing circuit 22R processes the R component video data Va_R out of the video data Vid_in for each unit period f1 to f4, converts it into an analog data signal Vid_R, and supplies it to the liquid crystal panel 100R. Similarly, of the video data Vid_in, the G component video data Va_G is processed for each unit period f1 to f4, converted into an analog data signal Vid_G and supplied to the liquid crystal panel 100G, and of the video data Vid_in, the B component video data Va_B is processed for each unit period f1 to f4, converted into an analog data signal Vid_B and supplied to the liquid crystal panel 100B.

[0025] Next, the liquid crystal panels 100R, 100G, and 100B will be described. The liquid crystal panels 100R, 100G, and 100B have the same structure, but only the color, i.e., the wavelength, of the light incident thereon is different. Therefore, the liquid crystal panels 100R, 100G, and 100B will be generally described with the reference numeral 100, without specifying the color.

[0026] FIG. 6 is a diagram showing a main part of the liquid crystal panel 100, and FIG. 7 is a cross-sectional view taken along line Hh in FIG. As shown in these figures, in the liquid crystal panel 100, an element substrate 100a on which a pixel electrode 118 is provided and an opposing substrate 100b on which a common electrode 108 is provided are bonded together with a sealing material 90 so that their electrode forming surfaces face each other while maintaining a certain gap, and liquid crystal 105 is filled in this gap.

[0027] The element substrate 100a and the counter substrate 100b are each made of a substrate having optical transparency, such as glass or quartz. As shown in FIG. 3, one side of the element substrate 100a protrudes from the counter substrate 100b. In this protruding region, a plurality of terminals 106 are provided along the horizontal direction in the figure. One end of an FPC (Flexible Printed Circuits) substrate (not shown) is connected to the plurality of terminals 106. The other end of the FPC substrate is connected to the display control circuit 20, and the above-mentioned various signals are supplied thereto.

[0028] On the surface of the element substrate 100a facing the counter substrate 100b, pixel electrodes 118 are formed by patterning a transparent conductive layer made of, for example, ITO (Indium Tin Oxide). Although not shown, a microlens is provided for each panel pixel on the counter substrate 100b (or the element substrate 100a) to efficiently send a large amount of light to the openings that become the panel pixels. With this configuration, the light that is repelled by the light shielding portion is sent to the openings of the microlens, improving the light utilization efficiency.

[0029] 8 is a block diagram showing the electrical configuration of the liquid crystal panel 100. In the liquid crystal panel 100, a scanning line driving circuit 130 and a data line driving circuit 140 are provided on the periphery of the display area 10.

[0030] In the display region 10 of the liquid crystal panel 100, pixel circuits 110 are arranged in a matrix. In detail, in the display region 10, a plurality of scanning lines 12 are provided extending in the horizontal direction in the figure, and a plurality of data lines 14 are provided extending in the vertical direction and electrically insulated from the scanning lines 12. Then, the pixel circuits 110 are provided in a matrix corresponding to the intersections of the plurality of scanning lines 12 and the plurality of data lines 14.

[0031] If the number of scanning lines 12 is m and the number of data lines 14 is n, the pixel circuits 110 are arranged in a matrix of m rows and n columns. Both m and n are integers of 2 or more. In order to distinguish the rows of the matrix in the scanning lines 12 and the pixel circuits 110, they may be referred to as 1, 2, 3, ..., (m-1), m rows from the top in the figure. Similarly, in order to distinguish the columns of the matrix in the data lines 14 and the pixel circuits 110, they may be referred to as 1, 2, 3, ..., (n-1), n ​​columns from the left in the figure.

[0032] The scanning line driving circuit 130 selects the scanning lines 12 one by one in the order of, for example, the 1st, 2nd, 3rd, ..., mth rows in accordance with the control by the display control circuit 20, and sets the scanning signal to the selected scanning line 12 to H level. Note that the scanning line driving circuit 130 sets the scanning signal to the scanning lines 12 other than the selected scanning line 12 to L level. The data line driving circuit 140 latches one row of data signals supplied from the corresponding color circuit among the processing circuits 22R, 22G or 22B, and outputs the data signals to the pixel circuit 110 located on the scanning line 12 via the data line 14 during the period when the scanning signal to the scanning line 12 is at H level.

[0033] FIG. 9 is a diagram showing an equivalent circuit of four pixel circuits 110 arranged in two vertical rows and two horizontal columns corresponding to the intersections of two adjacent scanning lines 12 and two adjacent data lines 14. In FIG. As shown in the figure, the pixel circuit 110 includes a transistor 116 and a liquid crystal element 120. The transistor 116 is, for example, an n-channel thin film transistor. In the pixel circuit 110, the gate node of the transistor 116 is connected to the scan line 12, while the source node is connected to the data line 14, and the drain node is connected to a pixel electrode 118 that has a square shape in a plan view.

[0034] A common electrode 108 is provided in common to all pixels so as to face the pixel electrode 118. A voltage LCcom is applied to the common electrode 108. Then, as described above, liquid crystal 105 is sandwiched between the pixel electrode 118 and the common electrode 108. Therefore, for each pixel circuit 110, a liquid crystal element 120 is formed in which the liquid crystal 105 is sandwiched between the pixel electrode 118 and the common electrode 108. In addition, a storage capacitor 109 is provided in parallel to the liquid crystal element 120. One end of the storage capacitor 109 is connected to a pixel electrode 118, and the other end is connected to a capacitance line 107. A time-constant voltage, for example, a voltage LCcom that is the same as the voltage applied to the common electrode 108, is applied to the capacitance line 107. The pixel circuits 110 are arranged in a matrix shape in the horizontal direction, which is the extension direction of the scanning lines 12, and in the vertical direction, which is the extension direction of the data lines 14, and therefore the pixel electrodes 118 included in the pixel circuits 110 are also arranged in the vertical and horizontal directions.

[0035] When the scanning signal of a scanning line 12 becomes H level, the transistor 116 of the pixel circuit 110 provided corresponding to the scanning line 12 becomes ON state. When the transistor 116 becomes ON state, the data line 14 and the pixel electrode 118 become electrically connected, so that the data signal supplied to the data line 14 reaches the pixel electrode 118 via the transistor 116 that has become ON state. When the scanning line 12 becomes L level, the transistor 116 becomes OFF state, but the voltage of the data signal that has reached the pixel electrode 118 is held by the capacitive property of the liquid crystal element 120 and the storage capacitance 109.

[0036] As is well known, in the liquid crystal element 120, the orientation of the liquid crystal molecules changes in response to the electric field generated by the pixel electrode 118 and the common electrode 108. Therefore, the liquid crystal element 120 has a transmittance that corresponds to the effective value of the applied voltage. In addition, the region that functions as a panel pixel in the liquid crystal element 120, i.e., the region that has a transmittance according to the effective value of the voltage, is the region where the pixel electrode 118 and the common electrode 108 overlap when the element substrate 100a and the counter substrate 100b are viewed in plan. Since the pixel electrode 118 is square in plan view, the shape of the pixel formed by the liquid crystal panel 100 is also square. In addition, in this embodiment, the liquid crystal 105 is of a VA (Vertical Alignment) type, and is in a normally black mode in which the transmittance is at a minimum when the voltage applied to the liquid crystal element 120 is zero, and the transmittance increases as the applied voltage increases.

[0037] An operation of supplying a data signal to the pixel electrodes 118 of the liquid crystal elements 120 is executed in the order of the 1st, 2nd, 3rd, ..., mth rows in each unit period f1 to f4. As a result, a voltage according to the data signal is held in each of the liquid crystal elements 120 of the pixel circuits 110 arranged in m rows and n columns, each liquid crystal element 120 has a target transmittance, and a transmitted image of the corresponding color is generated by the liquid crystal elements 120 arranged in m rows and n columns. In this way, the generation of a transmission image is executed for each of RGB, and a color image obtained by combining RGB is projected onto the screen Scr. The data signals Vid_R, Vid_G, and Vid_B outputted corresponding to a certain unit period correspond to the RGB components of the video data corresponding to the unit period, so that a composite image of a color corresponding to a projection position is projected at the projection position during the unit period.

[0038] Here, the domains in the liquid crystal panel 100 will be described. FIG. 10 is a diagram showing an example of the applied voltage-transmittance characteristics (VT characteristics) of the liquid crystal element 120 in the normally black mode. In the normally black mode, a high gradation level is specified and a panel pixel having a high transmittance (bright panel pixel) has a high voltage applied to the liquid crystal element 120. On the other hand, a low gradation level is specified and a panel pixel having a low transmittance (dark panel pixel) has a low voltage applied to the liquid crystal element 120.

[0039] For the sake of convenience, the bright panel pixels and the dark panel pixels are defined as follows. A bright panel pixel is a pixel in which, when a voltage corresponding to a gray level is applied to a pixel electrode 118, the voltage applied to the liquid crystal element 120 including the pixel electrode 118 exceeds VH, and a dark panel pixel is a pixel in which the voltage applied to the liquid crystal element 120 is below VL. Here, VH and VL are defined as follows: VH>VL When the voltage applied to the liquid crystal element 120 is voltage VL, the relative transmittance is, for example, 10%, and when the voltage is VH, the relative transmittance is, for example, 90%. However, VL and VH may be voltages corresponding to other relative transmittances.

[0040] As shown in Fig. 11, when a bright panel pixel Lp and a dark panel pixel Dp are adjacent to each other in the liquid crystal panel 100, the voltage difference between the pixel electrodes 118 becomes large, and the transverse electric field generated in the direction along the substrate surface tends to cause a phenomenon in which the orientation of liquid crystal molecules becomes disordered near the boundary Edg between the two panel pixels, that is, a domain. In general, the greater the voltage difference between the pixel electrodes 118, the greater the degree of the domain that occurs near the boundary between the two adjacent panel pixels. A panel pixel in which a domain occurs does not have a transmittance corresponding to the gradation level, and this causes a decrease in display quality.

[0041] Therefore, if one is concerned only with suppressing display defects caused by domains, when a bright panel pixel Lp and a dark panel pixel Dp are adjacent to each other, it should be possible to make corrections so as to reduce the lateral electric field generated in the pixel electrode 118 of the bright panel pixel Lp and the pixel electrode 118 of the dark panel pixel Dp.

[0042] However, in a configuration in which the projection position of the panel pixel is shifted using the light path shift element 230, even if the video image specified by the video data Vid_in is a still image, the gradation level may change like a moving image when viewed from the panel pixels of the liquid crystal panel 100. Note that a video image is a still image when the grayscale levels of video pixels do not change when comparing successive frames.

[0043] For example, a case will be described in which the image pixels of a still image are as shown in the upper left column of Fig. 12. In detail, the gradation levels of the image pixels A1 and A2 are the lowest black level, and the gradation levels of the other image pixels B1, B2, C1, C2, D1, D2, E1, E2, F2, and F1 are the highest white level. In this case, as shown in the upper right column of Fig. 12, panel pixel a1 expresses video pixel A1 in unit period f1, video pixel A2 in unit period f2, video pixel B2 in unit period f3, and video pixel B1 in unit period f4. Panel pixel b1 expresses video pixel C1 in unit period f1, video pixel C2 in unit period f2, video pixel D2 in unit period f3, and video pixel D1 in unit period f4. Panel pixel c1 expresses video pixel E1 in unit period f1, video pixel E2 in unit period f2, video pixel F2 in unit period f3, and video pixel F1 in unit period f4.

[0044] In the unit period f1, the gradation level of the video pixel A1 corresponding to the panel pixel a1 is black, and the video pixel C1 corresponding to the panel pixel b1 adjacent to the panel pixel a is white. Therefore, the panel pixel a1 becomes a dark panel pixel, and the panel pixel b1 becomes a bright panel pixel, so domain correction is performed. Specifically, as shown in the left middle column of Fig. 12, a correction is performed to increase the gradation level of the video pixel A1 from the minimum value, and to decrease the gradation level of the video pixel C1 from the maximum value.

[0045] When viewed in terms of the arrangement of video pixels, for a video pixel corresponding to a certain panel pixel, the video pixels of the panel pixels adjacent to that panel pixel are the video pixel located in the same column two rows above, the video pixel located in the same column two rows below, the video pixel located two columns to the left on the same row, and the video pixel located two columns to the right on the same row. For example, in Figure 5, when panel pixel b2 represents video pixel C3 in unit period f1, the video pixels represented by panel pixels a2, c2, b1 and b3 adjacent to panel pixel b2 are, in order, video pixel A3 located two rows and in the same column as video pixel C3, video pixel E3 located two rows and in the same column as video pixel C3, video pixel C1 located two columns to the left on the same row, and video pixel C5 located two columns to the right on the same row. Therefore, when a certain image pixel is expressed by a panel pixel, whether or not domain correction is necessary can be determined by comparing the grayscale level of the image pixel with the grayscale levels of the following four image pixels. Note that the four image pixels for a certain image pixel are, as described above, the image pixel located in the same column two rows above, the image pixel located in the same column two rows below, the image pixel located two columns to the left on the same row, and the image pixel located two columns to the right on the same row.

[0046] Assume that the voltage applied to liquid crystal element 120 corresponding to the black level, which is the lowest gradation level, is 0 V (volts), and the voltage applied to liquid crystal element 120 corresponding to the white level, which is the highest gradation level, is 5 V. In domain correction, as shown in the right middle column of Fig. 12, the gradation levels of image pixels A1 and C1 are individually corrected so that the voltage applied to liquid crystal element 120 of panel pixel a1 in unit period f1 is, for example, 1.8 V, and the voltage applied to liquid crystal element 120 of panel pixel b1 is, for example, 4.6 V. Furthermore, in unit period f1, the grayscale level of video pixel C1 corresponding to panel pixel b1 and the grayscale level of video pixel E1 corresponding to panel pixel c1 are both bright panel pixels, so that domain correction is not performed. In unit period f2, panel pixel a1 continues to be a dark panel pixel from unit period f1, and panel pixel b1 continues to be a bright panel pixel, so a similar domain correction is performed. Note that in unit period f2, panel pixels b1 and c1 are both bright panel pixels, so domain correction is not performed.

[0047] In unit period f3, panel pixels a1, b1, and c1 are all bright panel pixels, so domain correction is not performed.Similarly, in unit period f4, panel pixels a1, b1, and c1 are all bright panel pixels, so domain correction is not performed.

[0048] Incidentally, in the liquid crystal panel 100, the optical responsiveness of the liquid crystal element 120 to an electrical change is low compared to the optical responsiveness of other display elements, such as an organic EL element. In order to compensate for the low optical responsiveness, a technique called overdrive is sometimes applied to the liquid crystal panel 100. In detail, overdrive is a technique in which, for example, when a change in grayscale level occurs in a certain image pixel from the previous unit period to the current unit period, a voltage that is excessively swung in the direction of grayscale level change compared to the grayscale level specified in the current unit period is applied to the liquid crystal element 120 of the panel pixel corresponding to the image pixel in the current unit period.

[0049] However, when overdrive is applied to a configuration in which domain correction is performed and the light path shift element 230 is used, the following inconvenience occurs. That is, as shown in the lower right column of Fig. 12, when returning from unit period f4 to unit period f1, in panel pixel a1, the grayscale level of video pixel B1 changes from the maximum value to the minimum value of the grayscale level of video pixel A1, which is increased by domain correction. Therefore, the grayscale level of video pixel A1 in unit period f1 is relatively strongly corrected by overdrive in the direction of decreasing the grayscale level, but the domain correction is corrected in the direction of increasing the grayscale level as described above. This causes the inconvenience that the domain correction and the overdrive correction are offset. Specifically, in unit period f1, the voltage applied to the liquid crystal element 120 of panel pixel a1 is raised from 0 V to 1.8 V by the domain correction, but conversely, it is lowered by αV by the overdrive, so that the domain correction and the overdrive correction cancel each other out.

[0050] In this embodiment, as a first measure, domain correction is performed so that the strength of the horizontal electric field in the dark panel pixel and the bright panel pixel in a certain unit period is smaller than the voltage difference corresponding to the gray level specified by the video data. Since the domain correction of this first measure itself is the same as the conventional domain correction described above, if left as it is, the effect of the correction will be canceled out by overdrive.

[0051] Therefore, the following first, second or third amendment is added to the first measure. The first correction is a correction for aligning the grayscale levels of three adjacent consecutive video pixels in a first specific direction relative to a video pixel corresponding to a dark panel pixel, when viewed in terms of the arrangement of video pixels, to the grayscale level of the video pixel subjected to domain correction. Note that the first specific direction referred to here is the direction in which the video pixel corresponding to the light panel pixel is located with respect to the video pixel corresponding to the dark panel pixel. The second correction is a correction for adjusting the gradation levels of three adjacent consecutive video pixels in a second specific direction relative to the video pixel corresponding to the bright panel pixel in the image pixel array to the gradation level of the video pixel subjected to the domain correction. Note that the second specific direction here is the direction in which the video pixel corresponding to the dark panel pixel is located with respect to the video pixel corresponding to the bright panel pixel. The third correction is a correction that combines the first correction and the second correction.

[0052] First, an example in which the first correction is added to the first measure will be described.

[0053] The lower left and lower right columns of Fig. 13 are diagrams for explaining the case where the first correction is applied. For comparison, the upper left and upper right columns of Fig. 12 are reproduced in the upper left and upper right columns of Fig. 13. First, an example of domain correction performed by the first measure on the image pixel array shown in the upper left column of FIG. 12 or the upper left column of FIG. 13 is already as shown in the middle left column of FIG. In detail, in the arrangement of the video pixels, since the gradation level of the video pixel C1 located two rows below and in the same column as the video pixel A1 is the highest, the gradation level of the video pixel A1 is increased from the lowest value and the gradation level of the video pixel C1 is decreased from the highest value. Similarly, since the gradation level of the video pixel C2 located two rows below and in the same column as the video pixel A2 is the highest, the gradation level of the video pixel A2 is increased and the gradation level of the video pixel C2 is decreased.

[0054] Next, the first correction added to the first measure will be described. In the arrangement of the video pixels, the first specific direction in which the video pixel C1 corresponding to the bright panel pixel b1 is located with respect to the video pixel A1 corresponding to the dark panel pixel a1 is the downward direction. Therefore, as shown in the lower left column of FIG. 13, the grayscale levels of the three video pixels B1, C1, and D1 adjacent and consecutive downward with respect to the video pixel A1 corresponding to the dark panel pixel a1 are aligned. Since the grayscale level of the video pixel C1 is lowered from the highest value by the first measure, the grayscale levels of the video pixels B1 and D1 are aligned to the grayscale level of the lowered video pixel C1. Similarly, among the grayscale levels of the three video pixels B2, C2, and D2 adjacent and consecutive downward with respect to the video pixel A2 corresponding to the dark panel pixel a1, the grayscale levels of the video pixels B2 and D2 are aligned to the grayscale level of the lowered video pixel C2.

[0055] As a result of this first correction, panel pixels a1, b1, and c1 express video pixels as shown in the lower right column of Fig. 13. Note that in unit periods f1 and f2, the process is the same as conventional domain correction. The difference is that in unit periods f3 and f4, panel pixel a1 expresses video pixels B2 and B1 with an increased gradation level, and panel pixel b1 expresses video pixels D2 and D1 with a continued decreased gradation level from unit periods f1 and f2.

[0056] When the first correction is added to the first measure, the voltage applied to the liquid crystal element 120 of the panel pixel a1 in the unit periods f3 and f4 is lowered below the voltage corresponding to the maximum white level due to the correction that increases the gradation level. Therefore, the amount of change in the gradation level decreases when returning from the unit period f4 to f1, and the amount of correction by the overdrive is also reduced. Therefore, according to the first correction, the proportion of the domain correction that is offset by the overdrive correction decreases, so it is possible to prevent the effect of the domain correction from being offset by the overdrive. Furthermore, in unit periods f1 and f2, the horizontal electric field between panel pixels a1 and b1 is weakened by the correction of the first measure, and in unit periods f3 and f4, panel pixels a1 and b1 are at the same potential by the first correction, so that even if a display defect due to a domain occurs in unit periods f1 and f2, the display defect is quickly alleviated.

[0057] Next, an example in which the second correction is added to the first measure will be described.

[0058] The lower left and lower right columns of Fig. 14 are diagrams for explaining a case where the second correction is applied. For comparison, the upper left and upper right columns of Fig. 14 are examples in which the black in the upper left column of Fig. 13 and the upper right column of Fig. 13 are inverted to white and white to black. First, the first measure before the second correction will be described. In the arrangement of video pixels, the grayscale level of the video pixel C1 located in the same column two rows below the video pixel A1 is the lowest, while the grayscale level of the video pixel A1 is the highest. Therefore, without correction in the unit period f1, domains will occur in the panel pixel a1 expressing the video pixel A1 and the panel pixel b1 expressing the video pixel C1. Therefore, first, a correction is made to lower the grayscale level of the video pixel A1 and to increase the grayscale level of the video pixel C1. Similarly, since the grayscale level of the video pixel C2 located in the same column two rows below the video pixel A2 is the lowest, a correction is made to lower the grayscale level of the video pixel A2 and to increase the grayscale level of the video pixel C2.

[0059] Next, the second correction will be described. In the arrangement of the video pixels, the first specific direction in which the video pixel C1 corresponding to the bright panel pixel b1 is located with reference to the video pixel A1 corresponding to the bright panel pixel a1 is the downward direction. Therefore, as shown in the lower left column of FIG. 14, the grayscale levels of the three video pixels B1, C1, and D1 adjacent and consecutive downward with respect to the video pixel A1 corresponding to the dark panel pixel a1 are aligned. Since the grayscale level of the video pixel C1 is increased from the lowest value by the first measure, the grayscale levels of the video pixels B1 and D1 are aligned to the grayscale level of the increased video pixel C1. Similarly, among the grayscale levels of the three video pixels B2, C2, and D2 adjacent and consecutive downward with respect to the video pixel A2 corresponding to the bright panel pixel a2, the grayscale levels of the video pixels B2 and D2 are aligned to the grayscale level of the increased video pixel C2.

[0060] As a result of this second correction, panel pixels a1, b1, and c1 express video pixels as shown in the lower right column of Fig. 14. Note that in unit periods f1 and f2, the process is the same as conventional domain correction. The difference is that in unit periods f3 and f4, panel pixel a1 expresses video pixels B2 and B1 with increased gradation levels, and panel pixel b1 expresses video pixels D2 and D1 with increased gradation levels from unit periods f1 and f2.

[0061] According to the second correction, the voltage applied to the liquid crystal element 120 of the panel pixel a1 in the unit periods f3 and f4 is increased above the voltage corresponding to the maximum black level due to the correction that reduces the gradation level. Therefore, the amount of change in the gradation level decreases when returning from the unit period f4 to f1, and the amount of correction by the overdrive is also reduced. Therefore, according to the second correction, the proportion of the domain correction that is offset by the overdrive correction decreases, so that it is possible to prevent the effect of the domain correction from being offset by the overdrive. Furthermore, in unit periods f1 and f2, the horizontal electric field between panel pixels a1 and b1 is weakened by the correction of the first measure, and in unit periods f3 and f4, panel pixels a1 and b1 are at the same potential, so that even if a display defect due to a domain occurs in unit periods f1 and f2, the display defect is quickly alleviated.

[0062] Next, an example in which the first correction and the second correction are used together to add the third correction to the first measure will be described. In detail, an example in which the first correction is added to the first measure and the second correction is added to the first measure will be described.

[0063] The lower left and right columns of Fig. 15 are diagrams for explaining the case where the third correction is applied. Note that in the third correction, the range of image pixels to be corrected is expanded, so the array of image pixels is expanded compared to the upper columns of Fig. 12 and Fig. 13. In detail, five consecutive video pixels A1, B1, C1, D1 and E1 have the lowest gradation levels, and five consecutive video pixels F1, G1, H1, I1 and J1 have the highest gradation levels. In other words, the video pixel E1 with the lowest gradation level and the video pixel F1 with the highest gradation level are adjacent to each other.

[0064] First, the first measure before the first amendment will be explained. Compared to video pixel E1, which has the lowest gradation level, video pixel G1, which is located in the same column two rows below, has the highest gradation level. For this reason, without correction in unit period f1, domains would occur in panel pixel c1 expressing video pixel E1 and panel pixel d1 expressing video pixel G1, so correction is performed to increase the gradation level of video pixel E1 and decrease the gradation level of video pixel G1.

[0065] Next, the first correction after the first measure will be described. In the arrangement of the video pixels, the first specific direction in which the video pixel G1 is located is the downward direction with respect to the video pixel E1. Therefore, the grayscale levels of the three video pixels F1, G1, and H1 that are adjacent and consecutive in the downward direction with respect to the video pixel E1 are made uniform. Since the grayscale level of the video pixel G1 has already been lowered from the highest value, the grayscale levels of the video pixels F1 and H1 are made uniform to the lowered grayscale level of the video pixel G1.

[0066] Next, we will explain the first measure before the second amendment. Compared to video pixel F1, which has the highest gradation level, video pixel D1, which is located in the same column two rows above, has the lowest gradation level. For this reason, without correction in unit period f4, domains would occur in panel pixel c1, which represents video pixel F1, and panel pixel b1, which represents video pixel D1, so correction is performed to lower the gradation level of video pixel F1 and increase the gradation level of video pixel D1. However, since the gray level of the image pixel F1 has already been lowered, there is no need to lower it again.

[0067] Next, the second correction after the first measure will be described. In the arrangement of the video pixels, the second specific direction in which the video pixel D1 is located is the upward direction relative to the video pixel F1. Therefore, the grayscale levels of the three video pixels C1, D1, and E1 that are adjacent and consecutive in the upward direction relative to the video pixel F1 are aligned. Since the grayscale level of the video pixel D1 has already increased from the lowest value, the grayscale levels of the video pixels C1 and E1 are aligned to the increased grayscale level of the video pixel D1.

[0068] When there are five consecutive image pixels A2, B2, C2, D2 and E2 and five consecutive image pixels F2, G2, H2, I2 and J2 with the highest gradation levels, the gradation levels are similarly corrected and made uniform. In the third correction, the grayscale levels of the video pixels F1, F2, G1, G2, H1 and H2 decrease from the maximum value, so that the voltage applied to the liquid crystal element 120 in the panel pixels corresponding to these video pixels becomes, for example, 4.6 V, which is slightly lower than the maximum value of 5 V. Also, the grayscale levels of the video pixels C1, C2, D1, D2, E1 and E2 increase from the minimum value, so that the voltage applied to the liquid crystal element 120 in the panel pixels corresponding to these video pixels becomes, for example, 1.2 V, which is slightly higher than the minimum value of 0 V. When the third correction is performed in addition to the first measure, the number of stages by which the horizontal electric field generated in the panel pixel is weakened increases compared to the first and second corrections, so that the degradation of display quality due to the domain can be further suppressed. Also, according to the third correction, the change in the gray level per unit period is small when viewed from the perspective of one panel pixel, so that it is possible to suppress the effect of the domain correction from being reduced by overdrive.

[0069] Next, specific examples of the processing circuits 22R, 22G, and 22B that execute the first correction, the second correction, or the third correction will be described.

[0070] FIG. 16 is a block diagram showing the configuration of the processing circuits 22R, 22G, and 22B. As shown in this figure, the processing circuit 22R includes a gamma correction circuit 221, a domain correction circuit 222, a continuity correction circuit 224, a separation circuit 225 and an overdrive correction circuit 226.

[0071] In the processing circuit 22R, a gamma correction circuit 221 corrects the gradation level specified by Va_R of the R component of the video data Vid_in so that it matches the transmittance characteristics of the liquid crystal element 120 and the visual characteristics of humans. The data obtained by correcting the gradation level specified by the video data Va_R still specifies the gradation level.

[0072] The domain correction circuit 222 focuses on one video image in the array of video pixels that make up the video data Va_R, and individually compares the gradation level of the video pixel of interest with the gradation levels of four adjacent target video pixels within a unit period to determine whether or not the domain occurrence condition is met.

[0073] The domain occurrence conditions are that if the gradation level of the image pixel of interest is less than a first threshold, then the gradation level of the image pixel to be determined is greater than or equal to a second threshold (first condition), and that if the gradation level of the image pixel of interest is greater than or equal to the second threshold, then the gradation level of the image pixel to be determined is less than the first threshold (second condition). The first threshold value is a grayscale level where the voltage applied to the liquid crystal element 120 corresponds to VL, and the second threshold value is a grayscale level where the voltage applied to the liquid crystal element 120 corresponds to VH.

[0074] If the first condition among the domain generation conditions is satisfied, the domain correction circuit 222 performs one of the following corrections: increasing the gradation level of the image pixel of interest; decreasing the gradation level of the pixel to be determined; or increasing the gradation level of the image pixel of interest and decreasing the gradation level of the pixel to be determined. In this embodiment, if the first condition is satisfied, a correction is executed to increase the gradation level of the image pixel of interest and decrease the gradation level of the determination target pixel.

[0075] If the second condition of the domain generation conditions is satisfied, the domain correction circuit 222 performs one of the following corrections: lowering the gradation level of the image pixel of interest; increasing the gradation level of the pixel to be determined; or lowering the gradation level of the image pixel of interest and increasing the gradation level of the pixel to be determined. In this embodiment, if the second condition is satisfied, a correction is executed to lower the gradation level of the image pixel of interest and to increase the gradation level of the determination target pixel.

[0076] It should be noted that if the domain occurrence condition is not satisfied, the domain correction circuit 222 does not correct the grayscale level of the image pixel of interest and the grayscale level of the determination target pixel. Moreover, the domain correction circuit 222 performs the determination for all image pixels while sequentially shifting the image pixel of interest in one frame.

[0077] The continuous correction circuit 223 executes the first correction, the second correction, or the third correction described above.

[0078] The separation circuit 225 extracts video data corresponding to a unit period designated by the control circuit 21 from the array of video pixels and outputs the extracted video data.

[0079] The overdrive correction circuit 226 applies overdrive correction to the video data of the current unit period output from the separation circuit 225. In detail, the overdrive correction circuit 226 compares the grayscale level of the video data of the current unit period with the grayscale level of the video data corresponding to the same panel pixel one unit period ago, and adds a correction amount, which is the direction of change in the grayscale level and has a positive or negative value depending on the amount of change, to the grayscale level of the video data of the current unit period. The video data that has been subjected to the overdrive correction is converted into an analog data signal Vid_R by a DA conversion circuit (not shown) and is supplied to the liquid crystal panel 100R.

[0080] Moreover, the processing circuits 22G and 22B have a common configuration, with only the color components of the input video data and the destinations of the output data signals being different, and therefore a description thereof will be omitted.

[0081] In short, the domain correction by the domain correction circuit 222 is a process for reducing the horizontal electric field generated between adjacent panel pixels. For this reason, the domain correction circuit 222 can be replaced by a filter processing circuit that smoothes the grayscale levels of the image pixels.

[0082] 17 is a block diagram showing a configuration in which the domain correction circuit 222 is replaced with a filter processing circuit 220. In detail, of the video data Vid_in, Va_R of the R component is processed by the filter processing circuit 220, the gamma correction circuit 221, and the continuous correction circuit 223 in this order. In this configuration, the filter processing circuit 220 smoothes the gradation level of the image pixel specified by Va_R of the R component in the image data Vid_in. Note that the smoothing of the gradation level is performed by using, for example, a filter coefficient matrix as shown in FIG.

[0083] The coefficient matrix of this filter means that when focusing on a certain video image in the array of video pixels that make up the video data Va_R, if the gradation level of the video pixel of interest is higher than the gradation levels of the surrounding video pixels, the gradation level of the video pixel of interest is lowered by multiplying it by a positive coefficient shown in a thick frame, and the gradation levels of the video pixels located around the video pixel of interest are increased by an amount multiplied by a coefficient according to their position.

[0084] Note that the coefficients in the filter coefficient matrix in Figure 18 are just one example, and the difference "0.1" (=1-0.9) generated by multiplication of the coefficient shown in the thick frame is evenly distributed to the 48 surrounding image pixels. The filter processing circuit 22 smoothes all image pixels while sequentially shifting the image pixel of interest in one frame.

[0085] The above-described embodiment can be modified or applied in various ways as follows.

[0086] In the embodiment, one frame period is divided into four unit periods. That is, the number of unit periods included in one frame period, k, is set to "4" as an example. k is not limited to "4" and may be any number equal to or greater than "2."

[0087] In the embodiment and the like, the projection position by the light path shift element 230 is rotated clockwise, but it may be rotated counterclockwise.

[0088] From the above-mentioned exemplary embodiments, the following aspects can be understood, for example.

[0089] A projection type display device according to one aspect (aspect 1) includes a liquid crystal panel having a plurality of panel pixels, in which a first panel pixel and a second panel pixel are adjacent to each other among the plurality of panel pixels, a light path shift element that shifts an optical path of projection light projected from the panel pixels to shift a position of the projection pixel, and a display control circuit that controls the liquid crystal panel and the light path shift element, wherein, among the image pixel data that constitutes image data input to the liquid crystal panel and that is arranged in a matrix, k (k is an integer of 2 or more) pieces of image pixel data correspond individually to the first panel pixels in the k unit periods and k pieces of image pixel data correspond individually to the second panel pixels in the k unit periods, and the k pieces of image pixel data corresponding to the first panel pixels and the k pieces of image pixel data corresponding to the second panel pixels are different, and the display control circuit a data signal based on the image pixel data corresponding to the one unit period is supplied to the first panel pixel during one unit period among the k unit periods, and a data signal based on the image pixel data corresponding to the one unit period is supplied to the second panel pixel; among the k pieces of image pixel data corresponding to the first panel pixel, at least the second gradation level is corrected so as to reduce a difference between a first gradation level of the first image pixel data corresponding to the one unit period and a second gradation level of the second image pixel data corresponding to the one unit period; and gradation levels of (k-1) pieces of image pixel data including the second image pixel data that are consecutive to the first image pixel in a direction in which the second image pixel is located are adjusted to the same value as the corrected second gradation level. According to the projection display device of the first aspect, in a configuration in which a light path shift element is used to shift the projection position every unit period, it is possible to suppress the occurrence of domains due to a lateral electric field, thereby preventing a decrease in display quality.

[0090] In a specific example 2 of the example 1, the display control circuit corrects the first gradation level in addition to the second gradation level.

[0091] In a specific example 3 of example 2, when the first gradation level is less than a first threshold value and the second gradation level is equal to or greater than a second threshold value, the display control circuit corrects the first gradation level and the second gradation level, respectively.

[0092] In a specific example 4 of example 3, the display control circuit corrects a first gradation level that is less than the first threshold to equal to or greater than the first threshold, and corrects a second gradation level that is greater than or equal to the second threshold to less than the second threshold.

[0093] In a fifth specific example of the fourth example, the display control circuit corrects the image pixel data arranged in the matrix so that a difference in grayscale level between adjacent image pixel data becomes smaller.

[0094] In a specific aspect 6 of any of aspects 1 to 5, the k is 4, and of the image pixel data arranged in the matrix, four image pixel data arranged in two rows and two columns correspond to one panel pixel, and the display control circuit shifts the four projection positions clockwise or counterclockwise for the light path shift element.

[0095] 1...projection type display device, 100R, 100G, 100B...liquid crystal panel, 110...pixel circuit, 118...pixel electrode, 120...liquid crystal element, 20...display control circuit, 22...processing circuit, 220...filter processing circuit, 221...gamma correction circuit, 222...domain correction circuit, 225...separation circuit, 226...overdrive correction circuit, 230...light path shift element.

Claims

1. a liquid crystal panel having a plurality of panel pixels, in which a first panel pixel and a second panel pixel are adjacent to each other among the plurality of panel pixels; a light path shift element that shifts the light path of the projection light projected from the panel pixel to shift the position of the projection pixel; a display control circuit for controlling the liquid crystal panel and the light path shift element; Including, Among the image pixel data that constitutes the image data input to the liquid crystal panel and is arranged in a matrix, k (k is an integer equal to or greater than 2) pieces of video pixel data correspond to the first panel pixels individually in the k unit periods; k image pixel data correspond to the second panel pixels individually in the k unit periods; The k image pixel data corresponding to the first panel pixels are different from the k image pixel data corresponding to the second panel pixels, The display control circuit includes: controlling the light path shift element to shift the position of the projection pixel for each of the k unit periods; In one unit period among the k unit periods, supplying a data signal based on the image pixel data corresponding to the one unit period to the first panel pixel, and supplying a data signal based on the image pixel data corresponding to the one unit period to the second panel pixel; Among the k image pixel data corresponding to the first panel pixels, correcting at least the second gradation level so as to reduce a difference between a first gradation level of the first image pixel data corresponding to the one unit period and a second gradation level of the second image pixel data corresponding to the one unit period; The gray level of (k-1) image pixel data including the second image pixel data, which is continuous with respect to the first image pixel in a direction in which the second image pixel is located, is adjusted to the same value as the corrected second gray level.

1. A projection display device comprising:

2. The display control circuit includes: Correcting the first gray level in addition to the second gray level.

2. The projection display device according to claim 1.

3. The display control circuit includes: the first gray level is less than a first threshold, When the second gradation level is equal to or greater than a second threshold value, correcting the first gradation level and the second gradation level, respectively; 3. The projection display device according to claim 2.

4. The display control circuit includes: correcting a first gradation level that is less than the first threshold value to be equal to or greater than the first threshold value; correcting the second gradation level, which is equal to or greater than the second threshold, to be less than the second threshold; 4. The projection display device according to claim 3.

5. The display control circuit includes: Among the image pixel data arranged in the matrix, a difference in gray level between adjacent image pixel data is corrected to be small.

5. The projection display device according to claim 4.

6. The k is 4, Among the image pixel data arranged in a matrix, four image pixel data arranged in two rows and two columns correspond to one panel pixel; The display control circuit includes: With respect to the light path shift element, Shift the four projection positions clockwise or counterclockwise 6. The projection display device according to claim 1.

Images