Μ-led, μ-led configuration structure, display, and methods related thereto

Abstract

To provide a μ-LED and an optoelectronic semiconductor configuration structure of μ-LEDs.SOLUTION: The present invention relates to various aspects of a μ-LED or a μ-LED configuration structure for augmented reality or optical applications, particularly in an automotive field. Among these, the μ-LED is characterized by its extremely small dimensions of several μm.SELECTED DRAWING: Figure 4A

Description

[Technical Field]

[0001] This patent application is based on the following German patent applications: German Patent Application Publication No. 102019201114.4, dated January 29, 2019, German Patent Application Publication No. 102019111766.6, dated May 7, 2019, German Patent Application Publication No. 102019112124.8, dated May 9, 2019, German Patent Application Publication No. 102019116313.7, dated June 14, 2019, German Patent Application Publication No. 102019131506.9, dated November 21, 2019, German Patent Application Publication No. 102019118251.4, dated July 5, 2019, German Patent Application Publication No. 102019118251.4, dated July 5, 2019, German Patent Application Publication No. 102019116313.7, dated June 14, 2019, German Patent Application Publication No. 102019116313.7, dated November 21 ...6313.7, dated November 21, 2019, German Patent Application Publication No. 102019116313.7, dated July 5, 2019, German Patent Application Publication No. 10201911 German Patent Application Publication No. 102019118082.1 dated July 4, German Patent Application Publication No. 102019108260.9 dated March 29, 2019, German Patent Application Publication No. 102019125349.7 dated September 20, 2019, German Patent Application Publication No. 102019112490.5 dated May 13, 2019, German Patent Application Publication No. 102019112604.5 dated May 14, 2019, German Patent Application Publication No. 102019112609.6 dated May 14, 2019, German Patent Application Publication No. 102019112609.6 dated January 31, 2019 German Patent Application Publication No. 102019102509.5, German Patent Application Publication No. 102019115479.0, dated June 7, 2019, German Patent Application Publication No. 102019112616.9, dated May 14, 2019, German Patent Application Publication No. 102019113791.8, dated May 23, 2019, German Patent Application Publication No. 102019110499.8, dated April 23, 2019, German Patent Application Publication No. 102019110523.4, dated November 15, 2019, German Patent Application Publication No. 10201 German Patent Application Publication No. 9130934.4, German Patent Application Publication No. 102019114321.7, dated May 28, 2019, German Patent Application Publication No. 102019127425.7, dated October 11, 2019, German Patent Application Publication No. 102019112639.8, dated May 14, 2019, German Patent Application Publication No. 102019112605.3, dated May 14, 2019, German Patent Application Publication No. 102019113636.9, dated May 22, 2019, German Patent Application Publication No. 102019103365, dated February 11, 2019.German Patent Application Publication No. 102019116312.9, dated June 14, 2019, German Patent Application Publication No. 102019115991.1, dated June 12, 2019, German Patent Application Publication No. 102019125875.8, dated September 25, 2019, German Patent Application Publication No. 102019127424.9, dated October 11, 2019, German Patent Application Publication No. 102019127424.9, dated July 4, 2019 German Patent Application Publication No. 102019118085.6, German Patent Application Publication No. 102019125336.5, dated September 20, 2019, German Patent Application Publication No. 102019113793.4, dated May 23, 2019, German Patent Application Publication No. 102019110500.5, dated April 23, 2019, German Patent Application Publication No. 102019111767.4, dated May 7, 2019 German Patent Application Publication No. 102019121672.9 dated August 12, 2019, German Patent Application Publication No. 102019118084.8 dated July 4, 2019, German Patent Application Publication No. 102019113768.3 dated May 23, 2019, German Patent Application Publication No. 102019113792.6 dated May 23, 2019, German Patent Application Publication No. German Patent Application Publication No. 102019110497.1, German Patent Application Publication No. 102019114442.6, dated May 29, 2019, German Patent Application Publication No. 102019129209.3, dated October 29, 2019, German Patent Application Publication No. 102019130821.6, dated November 14, 2019, and German Patent Application Publication No. 102019130866, dated November 15, 2019.This application claims priority to Danish Patent Application No. 201970059 (DK PA201970059) filed January 29, 2019, and Danish Patent Application No. 201970061 (DK PA201970061) filed January 29, 2019, the disclosures of which are incorporated herein by reference, and to the following U.S. application: U.S. Patent Application No. 62 / 937,552 filed November 19, 2019, the disclosures of which are incorporated herein by reference.

[0002] Background technology Ongoing developments in the fields of the Internet of Things and communications are opening up a wide range of new applications and concepts that will increase effectiveness and efficiency for development, service and manufacturing purposes.

[0003] One aspect of the new concept is based on augmented or virtual reality, a general definition of which is given as "an interactive experience of a real environment in which real-world objects are augmented with computer-generated perceptible information."

[0004] Information is primarily conveyed through visualization, but is not limited to vision. Sometimes touch and other senses are used to augment reality. In visualization, the overlaid sensory-visual information can be constructive, i.e., adding to the natural environment, or destructive, e.g., obscuring parts of the natural environment. Furthermore, in some applications, it is possible to interact in some way with the overlaid sensory information. In this way, augmented reality enhances the user's ongoing awareness of the real environment.

[0005] In contrast, "virtual reality" replaces a user's real environment with a completely simulated one. In other words, while a user of an augmented reality environment can at least partially perceive the real world, the virtual reality environment is completely simulated and may differ significantly from reality.

[0006] Augmented reality can be used to improve the natural environment, enriching the user's experience or supporting them in performing specific tasks. For example, a user can use a display with augmented reality capabilities to support them in performing specific tasks. Hints are provided to the user by overlaying information about real-world objects, supporting the user with additional information. This allows them to act faster, safer, and more effectively during manufacturing, repair work, or other services. In the medical field, augmented reality can be used to guide and support doctors in diagnosing and treating patients. In development, engineers can experience experimental results firsthand, making it easier to evaluate them. In the tourism and event industries, augmented reality can provide users with additional information, such as landmarks and history. Augmented reality can also support learning activities and tasks.

[0007] overview The following overview describes various aspects of μ-displays in the field of automotive and augmented reality applications. These include devices, displays, drive controls, process engineering techniques, and other aspects suitable for augmented reality and automotive applications. These include aspects related to the generation of light using displays, etc. Furthermore, control circuits, current supply circuits, and aspects of light extraction, light guiding, and light focusing, as well as applications of such devices, are described and illustrated with the aid of various examples.

[0008] Due to various limitations and challenges arising from the small size of light-generating structural elements, it is not only advantageous but often practical to combine various aspects. For ease of discussion, the present disclosure has been divided into several sections with similar subject matter. However, this should not be explicitly understood as meaning that features of one subject matter cannot be combined with features of other subject matters. Rather, aspects of different subjects need to be combined to create displays for augmented reality or other applications, as well as for automotive applications.

[0009] In order to consider the following solutions, it is necessary to explain some terms and expressions in order to define a common and equivalent understanding. In this document, the terms described are generally used with this understanding in mind. However, there may be differences in interpretation in individual cases, and in such cases, the differences are made known.

[0010] "Active matrix display" The term "active matrix display" originally referred to liquid crystal monitors, which consisted of a matrix of thin-film transistors used to control the LCD pixels. Each pixel contained a circuit with active components (mainly transistors) and current supply terminals. However, this technology is now not limited to liquid crystals, but is also used to control and drive μ-LEDs and μ-displays, among others.

[0011] "Active matrix carrier substrate" An "active matrix carrier substrate" or "active matrix backplane" refers to a display's light-emitting diode drive control that includes thin-film transistor circuitry, either integrated into the backplane or applied to it. The "active matrix carrier substrate" includes one or more interface contacts that form electrical terminals to the μ-LED display structure. Thus, the "active matrix carrier substrate" can be a component of or support an active matrix display.

[0012] "Active layer" The active layer is the layer in an optoelectronic device and / or light-emitting diode where charge carriers recombine. In its simplest form, the active layer can be characterized by two adjacent semiconductor layer regions of different conductivity types. More complex active layers include quantum wells (see relevant section), multiple quantum wells, or other structures with additional properties. Similarly, depending on the structure and material system, the bandgap (see relevant section) of the active layer can be tailored, which determines the wavelength and therefore color of the light.

[0013] "Alvarez lens arrangement structure" A pair of Alvarez lenses can be used to adapt the beam path of video eyewear. The adjustment optics (Verstelloptik) includes a rotatable variant with an Alvarez lens arrangement, in particular a Moiré lens arrangement. In this case, the beam deflection is determined in the radial direction z and in the transverse direction x, y, e.g., z=ax 2 +by 2 It is determined by the first derivative of the respective phase plate relief approximated by +cx+dy+e and the offset of the two paired phase plates in the transverse direction x, y. In another configuration, a rotatable prism is contemplated for the adjustment optics.

[0014] Augmented Reality (AR) Augmented reality (AR) is an interactive experience of a real environment, where visual objects in the real world are augmented by computer-generated perceptible information. Augmented reality refers to the computer-assisted augmentation of the perception of reality using exactly this computer-generated perceptible information. This information can address any human sensory modality. However, augmented reality is often understood only as the visual representation of information, i.e., the supplementation of images or videos with additional computer-generated information or virtual objects by fading in / overlaying them. Applications and descriptions of augmented reality modes of operation can be found in the introduction and in the examples below.

[0015] "Automotive" Automotive generally refers to the automobile or automobile industry, so the term should cover not only this sector but also all other industrial sectors that include μ-displays or light displays with very high resolution in general and μ-LEDs.

[0016] "Band gap" The band gap, also known as the band distance or forbidden band, is the energy distance between the valence band and the conduction band of a solid. Its electrical and optical properties are largely determined by the size of the band gap. The size of the band gap is usually expressed in electron volts (eV). Therefore, the band gap is also used to distinguish between metals, semiconductors, and insulators. The band gap can be adapted, or changed, by various measures, such as spatial doping, deformation of the crystal lattice structure, and even modification of the material system. In material systems with a so-called direct band gap, where the valence band maximum and the conduction band minimum overlap in momentum space, electron-hole pair recombination is possible during light emission.

[0017] "Bragg grating" A fiber Bragg grating is a special optical interference filter inscribed into an optical waveguide. It reflects wavelengths within the filter bandwidth around λB. The fiber core of the optical waveguide can be periodically modulated in refractive index in various ways, resulting in regions of high and low refractive index that reflect light of specific wavelengths (bandstops). The central wavelength of the filter bandwidth in single-mode fiber is due to the Bragg condition.

[0018] "Directivity" Directivity (i.e., directional properties) refers to the radiation pattern of a μ-LED or other light-emitting structure element. High directivity means a high radiation directivity, i.e., a small radiation cone. In general, the goal is to achieve a high radiation directivity so as to avoid light crosstalk to neighboring pixels as much as possible. A light-emitting structure element therefore varies in brightness depending on the viewing angle and therefore differs from a Lambertian emitter.

[0019] The directionality can be altered, for example, at the intended surface of light emission, by mechanical or other measures. These measures include lenses, as well as photonic crystals or pillar structures placed on the emission surface of pixelated arrays, and especially on arrays of μ-LEDs. These create a virtual bandgap, reducing or preventing the vectorial propagation of light along the emission surface.

[0020] "Distant world" The terms near field and far field describe spatial regions around an element that emits electromagnetic radiation, and they have different characteristics. Typically, spatial regions are divided into three regions: the reactive near field, the transition region, and the far field. In the far field, electromagnetic radiation propagates as a plane wave, independent of the radiating element.

[0021] "Screen door effect" The screen door effect (SDE) is a permanently visible image artifact in digital video projectors. The term screen door effect refers to the undesirable black gaps between individual pixels or their projected information, which occur for technical reasons and take the form of a crosshatch pattern. This gap is due to the construction of LCDs, where conductor tracks for drive control pass between the LCD segments, which can absorb light and prevent it from reaching the screen. When using small optoelectronic lighting devices, especially μ-LEDs, or when the spacing between individual light-emitting diodes is too large, the resulting low packing density can lead to visible differences between spot-illuminated and dark areas when viewing individual pixel areas. This so-called screen door effect is particularly noticeable at short viewing distances, especially in applications such as VR glasses. Subpixel structures are typically noticeable and annoying when the illumination difference within a pixel continues periodically across the matrix arrangement. Therefore, the screen door effect in automotive and augmented reality applications should be avoided as much as possible.

[0022] "Flip Chip" Flip-chip assembly is an assembly and bonding technology process in which unpackaged semiconductor chips are contacted using contact bumps, so-called bumps. In flip-chip assembly, the chip is directly assembled via the bumps onto the substrate / circuit carrier, without any additional connecting wires, with the active contact side facing down. This results in particularly small package dimensions and short conductor lengths. Flip-chips are therefore electronic semiconductor elements that are contacted specifically on the backside. Furthermore, this assembly may require special transfer techniques, for example using an auxiliary carrier. The radiation direction in a flip-chip is usually opposite the contact side.

[0023] "flip flop" A flip-flop, sometimes called a bistable flip-flop or bistable multivibrator, is an electronic circuit whose output signal has two stable states. Its current state depends not only on the input signals present at that time but also on the previous states. It is not dependent on time, only on events. This bistability allows flip-flops to store a single bit of data for an unlimited period of time. However, unlike other memory devices, they require a continuous power supply. As the fundamental building blocks of sequential circuits, flip-flops are essential elements in digital technology, making them fundamental components of many electronic circuits, from quartz clocks to microprocessors. In particular, they are the foundation of computer static memory chips, serving as a rudimentary single-bit memory. In some implementations, various types of flip-flops and other buffer circuits can be used to store state information. Each input and output signal is digital, meaning it alternates between logically "false" and logically "true." These values ​​are also known as "low" (0) and "high" (1).

[0024] Head-up display A head-up display is a display system or projection device that projects information into the user's field of view, allowing the user to maintain head position and gaze direction. HUDs are augmented reality systems. HUDs may also include sensors to determine gaze direction and orientation in space.

[0025] "Horizontal light-emitting diode" In a horizontal LED, the electrical terminals are on a common side of the LED, which is often the back side, not facing the light-emitting surface of the LED. Therefore, horizontal light-emitting diodes have contacts formed on only one side of the surface.

[0026] "Interference filter" An interference filter is an optical element that uses the effect of interference to filter light by frequency (or by color in the case of visible light).

[0027] "Collimation" In optics, collimation refers to the process of parallelizing the direction of a diverging light beam. The relevant lenses are called collimators or converging lenses. A collimated light beam has a high proportion of parallel rays, which minimizes divergence during propagation. The term in this sense refers to the divergence of light emitted from a light source. A collimated beam emitted from a surface is strongly dependent on the angle of the beam. In other words, the radiance (power per unit of projected source area per given angle) of a collimated light source changes as the angle increases. There are several ways to collimate light, for example, by using special lenses placed in front of the light source. Therefore, collimated light can be considered to be highly directionally dependent as well.

[0028] "Convertermaterial" Conversion materials are materials suitable for converting light of a first wavelength to a second wavelength, where the first wavelength is shorter than the second wavelength. These include a variety of stable inorganic and organic dyes and quantum dots, among others. These conversion materials can be applied and patterned in a variety of processes.

[0029] "Lambert Radiator" Many applications require a so-called Lambertian radiation pattern. This means that an emitting surface ideally has uniform irradiance across its surface, resulting in a circular distribution of radiant intensity in the vertical direction. Since the human eye only assesses luminance (which is the optical equivalent of radiance), such a Lambertian material will appear to have the same brightness regardless of the viewing direction. This uniform brightness, independent of angle, can be an important quality factor, especially for curved and flexible display surfaces, but is difficult to achieve with currently available displays due to their construction and LED technology.

[0030] LEDs and μ-LEDs are similar to Lambertian radiators and emit light over a large solid angle. Depending on the application, further measures are taken to improve the radiation pattern or achieve higher directivity (see relevant section).

[0031] "Conductivity type" "Conductivity type" refers to the predominant charge carriers (n-type or p-type) in a given semiconductor material. That is, a semiconductor material that is n-type doped is considered to have n-type conductivity. Thus, if a semiconductor material is n-type, it is n-doped. The "active" region of a semiconductor refers to the interface between the n-type and p-type doped layers of the semiconductor. In this region, p-type and n-type charge carriers recombine radially. In some configurations, the active region is further patterned, including, for example, quantum well or quantum dot structures.

[0032] "Light field display" A virtual retinal display (VNA) or light field display is a display technology that renders a raster image directly onto the retina of the eye. This gives the user the impression that the screen is floating in front of their eyes. A light field display can be provided as glasses that project a raster image directly onto the retina of the user's eye. A virtual retinal display creates an image inside the user's eye by projecting it directly onto the retina. A light field display is an augmented reality system.

[0033] "Lithography" or "Photolithography" Photolithography is one of the central techniques in semiconductor and microsystems technology for producing products such as integrated circuits. In this technique, an image from a photomask is transferred onto a light-sensitive photoresist by exposure to light. The exposed portions of the photoresist are subsequently dissolved (or the unexposed portions are dissolved when the photoresist is hardened with light). This creates a lithography mask that can be further processed by chemical and physical processes, such as applying material to the exposed areas or etching recesses into the exposed areas. The remaining photoresist can then be removed.

[0034] μ-LED μ-LEDs are optoelectronic components with edge lengths of less than 70 μm, in particular below 20 μm, in particular in the range of 1 μm to 10 μm. A further range is 10 to 30 μm. This allows for areas of several hundred μm 2 ~Several tens of μm 2 For example, the μ-LED has an edge length of about 8 μm, which is about 60 μm. 2 The μ-LED has an edge length of 5 μm or less, resulting in an area of ​​30 μm 2 The typical height of such μ-LEDs is, for example, in the range of 1.5 μm to 10 μm.

[0035] In addition to traditional lighting applications, a major application of μ-LEDs is being considered for displays, where they form pixels or subpixels that emit light of defined colors. μ-LEDs are particularly suitable for compact monolithic displays for AR applications due to their small pixel size and the high density they allow for with small spacing.

[0036] Due to their extremely small size, μ-LEDs are obviously more difficult to manufacture and process than conventional, larger LEDs. This also applies to additional elements such as contacts, packaging, and lenses. Some features that are feasible in larger optoelectronic components are either not possible with μ-LEDs or can only be achieved in other ways. In this respect, μ-LEDs differ significantly from conventional LEDs, i.e., light-emitting components with edge lengths of 200 μm or more.

[0037] "μ-LED Array" See the μ-Display section.

[0038] μ-Display A μ-display or μ-LED array is a matrix of many pixels arranged in defined rows and columns. In terms of its function, it is more likely to be a matrix of μ-LEDs of the same type and color, thus providing a larger illuminated surface. On the other hand, the purpose of a μ-display is primarily to convey information, which often requires different colors and addressable driving control for each individual pixel or subpixel. A μ-display can be formed by arranging several μ-LED arrays side by side on a backplane or other carrier. However, an array of μ-LEDs can also form a μ-display.

[0039] The size of each pixel is on the order of a few microns, similar to the μ-LED. As a result, the overall size of a μ-Display with 1920 x 1080 pixels, each with a 5 μm pixel size, and its adjacent pixels is several tens of mm. 2 In other words, a μ-display or μ-LED array is a compact array realized using μ-LEDs.

[0040] A μ-display or μ-LED array can be formed from the same workpiece. The μ-LEDs of a μ-LED array can be formed monolithically. Such a μ-display or μ-LED array is called a monolithic μ-LED array or μ-display.

[0041] Alternatively, μ-LEDs can be grown individually on a substrate and then placed on a carrier, either individually or in groups, at the desired spacing, using a so-called pick-and-place process, to form two assemblies. Such μ-displays or μ-LED arrays are called non-monolithic. In non-monolithic μ-displays or μ-LED arrays, other spacings between the individual μ-LEDs are also possible. These spacings can be flexibly selected depending on the application and design. Therefore, such μ-displays or μ-LED arrays can also be called pitch-extended. A pitch-extended μ-display or μ-LED array means that the μ-LEDs are spaced farther apart when transferred to the carrier than they were on the growth substrate. In non-monolithic μ-displays or μ-LED arrays, each pixel can contain a blue-emitting μ-LED, a green-emitting μ-LED, and a red-emitting μ-LED.

[0042] To make the different advantages of monolithic and non-monolithic μ-LED arrays available in one module, monolithic and non-monolithic μ-LED arrays can be combined to form μ-Displays, which can then realize different functions and / or applications. Such displays are called hybrid displays.

[0043] "μ-LED nanocolumn" μ-LED nanocolumns are typically stacks of semiconductor layers with an active layer, thus forming μ-LEDs. μ-LED nanocolumns have an edge length that is smaller than the pillar height. For example, μ-LED nanocolumns have edge lengths of approximately 10 nm to 300 nm, and device heights can range from 200 nm to over 1 μm.

[0044] "μ-Rod" A μ-rod or rod is a geometric structure, particularly a pole or bar, or a generally longitudinally extending, e.g., cylindrical, structure. μ-rods are produced with spatial dimensions ranging from μm to nanometers. Therefore, nanorods are also encompassed herein.

[0045] "Nanorods" In nanotechnology, nanorods are a design of nanoscale objects. Their individual dimensions range from approximately 10 nm to 500 nm. They can be synthesized from metallic or semiconducting materials. Their aspect ratio (length divided by width) is between 3 and 5. Nanorods are produced by direct chemical synthesis. A combination of ligands acts as a shape control agent, attaching with varying strength to different facets of the nanorod. This allows for different designs of nanorods with different growth rates, resulting in the production of elongated objects. μLED nanocolumns are such nanorods.

[0046] "Miniature Light-Emitting Diode" The dimensions of miniature light emitting diodes are in the range of 100 μm to 750 μm, especially in the range above 150 μm.

[0047] "Moiré effect" and "Moiré lens arrangement structure" The Moiré effect is the apparent coarse raster caused by the overlay of regular, relatively fine rasters. The resulting pattern, which looks similar to an interference pattern, is a special case of the subsampling aliasing effect. In signal analysis, the "aliasing effect" refers to errors that occur when a sampled signal contains frequency components higher than half the sampling frequency. In image processing and computer graphics, the aliasing effect occurs when a sampled image produces patterns that are not present in the original image. The Moiré lens geometry is a special case of the Alvarez lens geometry.

[0048] "Monolithic element" A monolithic device is a device made from one piece. A typical example of such a device is a monolithic pixel array, where the array is made from one piece and the μ-LEDs of the array are fabricated together on a carrier.

[0049] Optical mode A mode describes the characteristics of a particular wave at rest in time. In this case, the wave is expressed as the sum of different modes. Modes have different spatial distributions of intensity. The shape of the mode is determined by the boundary conditions along which the wave propagates. Vibrational mode analysis can be applied to both standing and continuous waves. Electromagnetic radiation, such as light, lasers, and radio waves, has modes such as TEM or transverse electromagnetic mode, TE or H mode, and TM or E mode. TEM or transverse electromagnetic mode: Both the electric and magnetic field components are always perpendicular to the direction of propagation. This mode can only propagate when there are two conductors (equipotential surfaces) that are insulated from each other, such as in a coaxial cable, or when there are no electrical conductors, such as in a gas laser or optical waveguide. TE or H mode: Only the electric field component is perpendicular to the direction of propagation, and the magnetic field component is aligned with the direction of propagation. TM or E mode: Only the electric field component is perpendicular to the direction of propagation, and the electric field component is aligned with the direction of propagation.

[0050] "Optoelectronic structural elements" Optoelectronic components are semiconductor bodies that generate and emit light during operation by the recombination of charge carriers. The generated light can range from infrared to ultraviolet, and its wavelength depends on various parameters, especially the material system and doping used. Optoelectronic components are also called light-emitting diodes.

[0051] For the purposes of this disclosure, the terms optoelectronic component and light-emitting component are used synonymously. Thus, μ-LEDs (see item) are special optoelectronic components with respect to their geometrical shape. In displays, optoelectronic components are usually present monolithically or as individual elements arranged in a matrix.

[0052] "Passive matrix backplane" or "passive matrix carrier substrate" A passive matrix display is a matrix display in which the individual pixels are passively driven (no additional electronic components are used for each pixel). The light-emitting diodes in the display can be driven using integrated circuitry. In contrast, monitors in which the pixels are actively driven by transistors are called "active matrix displays". A passive matrix carrier substrate is the component that holds a passive matrix display.

[0053] "Photonic crystals" or "photonic structures" The photonic structure may be a photonic crystal, a quasi-periodic photonic structure, or a deterministic aperiodic photonic structure. The photonic structure periodically varies the refractive index of light, thereby creating a photon band structure. This band structure may have a band gap in a certain frequency range. This prevents photons from propagating in all spatial directions through the photonic structure. In particular, propagation parallel to the surface is often prevented, while perpendicular propagation is possible. In this way, the photonic structure or photonic crystal determines propagation in a specific direction. By blocking or reducing propagation in one direction, the photonic structure or photonic crystal generates a beam or bundle of beams, as needed, in a spatial region or radiation region prepared for this purpose.

[0054] Photonic crystals are photonic structures that arise and grow in transparent solids. Although they are not necessarily crystals, the name comes from the fact that the diffraction and reflection effects of X-rays in crystals are similar to those of crystals, based on their lattice constant. The dimensions of the structures are at least one-quarter of the relevant wavelength of the photons, i.e. in the range of a fraction of a micrometer to several micrometers. They are produced by classical lithography, but also by self-assembly processes.

[0055] Alternatively, similar or similar properties to photonic crystals can be created in aperiodic, but nevertheless ordered, structures, particularly quasi-periodic or deterministic aperiodic structures, such as spiral photonic arrays.

[0056] In particular, examples here include so-called two-dimensional photonic crystals, which have a periodic variation of the optical refractive index in two mutually perpendicular spatial directions, in particular in two mutually perpendicular spatial directions that run parallel to the light exit surface.

[0057] However, one-dimensional photonic structures, in particular one-dimensional photonic crystals, also exist. One-dimensional photonic crystals have a periodic variation in the refractive index along one direction. In particular, this direction can run parallel to the light exit surface. The one-dimensional structure can form a beam in a first spatial direction. In this case, the photonic effect can be achieved even after just a few periods of the photonic structure. For example, the photonic structure can be configured such that the electromagnetic radiation is at least approximately collimated in the first spatial direction. This allows the generation of a collimated beam, at least with respect to the first spatial direction.

[0058] "Pixel" A picture element (pixel), image cell, or image element refers to an area element required to capture or display an individual color value in a digital raster graphic, as well as a color value on an image sensor or a raster-driven screen. A pixel is therefore an addressable element of a display device and contains at least one light-emitting device. Pixels have a fixed size, and adjacent pixels are separated by a defined distance (pixel spacing). In displays, especially μ-displays, a pixel is often formed by combining three (or four or more, if there is additional redundancy) sub-pixels of different colors.

[0059] "Prana Array" A planar array is essentially a flat surface. It is often smooth and has no protruding structures. Surface roughness is usually undesirable and does not have the desired function. A planar array can be, for example, a monolithic planar array with several optoelectronic structural elements.

[0060] "Pulse Width Modulation" Pulse width modulation, or PWM, is a type of modulation used to drive and control devices, specifically μ-LEDs. In this case, a PWM signal controls a switch configured to turn on and off the current through each μ-LED, causing the μ-LED to either emit light or not. PWM outputs a square wave signal with a constant frequency, f. The relative amount of on-time to off-time in each period, T (=1 / f), determines the brightness of the light emitted by the μ-LED. The longer the on-time, the brighter the light.

[0061] "Quantum well" A quantum well (Quantenwell / Quantentopf) is a potential profile in the band structure of one or more semiconductor materials that restricts the freedom of movement of particles in one spatial dimension (usually the z-direction). This results in only planar regions (x,y planes) being occupied by charge carriers. The width of the quantum well crucially determines the quantum mechanical states that the particles can assume, leading to the formation of energy levels (subbands). This means that particles can only assume discrete (potential) energy values.

[0062] "Recombination" In general, a distinction is made between radiative and non-radiative recombination. In the latter case, photons are generated, which can leave the device. Non-radiative recombination generates phonons, which heat the device. The ratio between radiative and non-radiative recombination is a relevant parameter and depends in particular on the size of the device. In general, the smaller the device, the smaller the ratio, and therefore the more non-radiative recombination there is than radiative recombination.

[0063] "Refresh Time" The "refresh time" is the time at which a cell, such as a display, must be rewritten to avoid losing information, or the time at which a refresh is predetermined by the external environment.

[0064] "Die (Rohchip)" or "Light emitter" Light emitters, or dies, are semiconductor structures that have been fabricated on a wafer and then separated from the wafer, and that are suitable for producing light after electrical contact during operation. Thus, a die is a semiconductor structure that includes an active layer for producing light. Typically, dies are singulated after contact, but they can also be post-processed into arrays.

[0065] "Slot antenna" A slot antenna is a special type of antenna in which, instead of a metallic structure in space surrounded by air (as a non-conductor), a metallic structure (e.g., a metal plate, a waveguide, etc.) is interrupted. This interruption causes the emission of electromagnetic radiation whose wavelength depends on the geometry of the interruption. In most cases, the interruption follows the dipole principle, but other geometric shapes are theoretically possible. Thus, a slot antenna comprises a metallic structure with a cavity resonator whose length is on the order of the wavelength of visible light. The metallic structure may be placed in or surrounded by an insulating material. The metallic structure is usually grounded to establish a constant potential.

[0066] "Visual field" Field of view (FOV) is the area within the viewing angle of an optical instrument, sun sensor, camera (film or recording sensor), or transparent display screen that can recognize and record events or changes. In particular, the field of view is the area a person can see without moving their eyes. In augmented reality or an apparent object placed in front of the eyes, the field of view includes the area measured in degrees of visual angle when the eyes are fixed steadily.

[0067] "Subpixel" A subpixel (e.g., sub-pixel) refers to the internal structure of a pixel. Typically, the term subpixel is associated with a higher resolution than can be expected based on an individual pixel. A pixel can also be composed of multiple smaller subpixels, each emitting a single color. The overall color impression of a pixel is created by the blending of the individual subpixels. Therefore, a subpixel is the smallest addressable unit in a display device. Similarly, a subpixel has a fixed size that is smaller than the size of the pixel to which it is assigned.

[0068] "Vertical light-emitting diode" In contrast to horizontal LEDs, vertical LEDs have one electrical terminal on the front side of the LED and one on the back side. One of the two sides also forms the light-emitting surface. Therefore, vertical light-emitting diodes have contacts on two opposing major surfaces. Therefore, a conductive yet transparent material must be deposited to ensure electrical contact on the one hand and allow light to pass through on the other.

[0069] "Virtual Reality" Virtual reality (VR) is the representation and simultaneous perception of reality and its physical properties in a real-time computer-generated interactive virtual environment. Virtual reality can replace the operator's real-world environment with a completely simulated one.

[0070] The following sections describe various aspects of the semiconductor structure of μ-LEDs, including the structure and material systems for producing light, but also relate to processing considerations.

[0071] An essential feature of the augmented reality field, as well as of automotive displays or other display arrangements using μ-LEDs, is that adjacent μ-LEDs of the arrangement, as a μ-display or μ-array, are spaced apart so far that the human eye cannot resolve or distinguish the individual μ-LEDs of the arrangement. In particular, the individual rows or columns of μ-LEDs arranged in rows or columns cannot be resolved or distinguished by the human eye. In addition, the distance between the μ-LEDs or the pixel density or pixel pitch of the μ-LED array is adapted accordingly to the viewer's distance from the μ-LED array, so that the viewer's eye cannot resolve the individual μ-LEDs of the μ-LED array for the respective application.

[0072] μ-LED arrays consume relatively less energy than arrays using organic LEDs (OLEDs) and liquid crystal displays (LCDs), achieving up to 10 6 Cd / m 2 μ-LED arrays have the advantage of achieving high brightness of up to 5000 pixels per inch (PPI) and, when used in displays, very high refresh rates in the nanosecond range. Furthermore, compared to OLEDs and LCDs, μ-LED arrays have a very long service life and excellent stability against environmental influences. Furthermore, the use of μ-LED arrays makes it possible to adjust the values ​​for the contrast range and resolution to the desired values ​​of these parameters, for example, depending on the application.

[0073] Furthermore, μ-LED arrays allow the illumination surface formed by the μ-LEDs to be adapted to any desired shape. Therefore, this application is not limited to conventional displays. μ-LED arrays can also be used in the automotive field, for example, to utilize curved surfaces as displays or light-emitting arrays. In this case, they can be used not only to display information but also as simple illumination surfaces for illumination or lighting.

[0074] One aspect concerns the generation of different colors in monolithic displays. In monolithic μ-LED arrays, individual pixels can include respective μ-LED arrays that emit, for example, blue light, and each μ-LED further comprises a conversion material that converts the blue light partially or completely into secondary light, which, together with the blue primary light, can provide mixed light, for example white light. Monolithic μ-LED arrays can achieve a high-brightness illumination surface and can therefore be advantageously used as a light source for automotive lighting, for example, for automotive headlights.

[0075] On the other hand, in non-monolithic μ-displays or μ-LED arrays, the space between adjacent pixels or μ-LEDs can be used to place other components, such as electronic components for operating the μ-LEDs, or sensors or detectors. Non-monolithic μ-LED arrays can be advantageously used, for example, in displays, displays with built-in sensors, especially touchscreens, and also control elements.

[0076] Some aspects relate to the principle that conductive structures can be forced to emit electrical radiation at dedicated frequencies. Accordingly, a concept is proposed here to use slot-type antenna structures to induce light emission and increase the ratio of radiative to non-radiative recombination in the active region of a semiconductor device, since this ratio typically changes to the detriment of radiative recombination as μ-LEDs are miniaturized and / or their active areas are reduced.

[0077] Such a structure offers additional benefits beyond improving the ratio, since the emitted wavelength depends primarily on the geometric parameters of the slot antenna, which are adapted to the physical characteristics of the environment. As a result, different mechanical structures can be used to generate different colors of light. Furthermore, slot antenna structures enable directional light emission, which can be beneficial for implementation in applications requiring strong collimation.

[0078] In one configuration, a light emitting device includes a conductive structure that forms a slot-type antenna structure and has an upper major surface and a lower major surface positioned opposite the upper major surface and separated by a layer thickness. A cavity is disposed within the conductive structure. The cavity has a width and a specific length, and the wavelength of light generated by the device further depends on the specific length. The width is smaller than the corresponding cavity length.

[0079] In some variations, the slot-type antenna structure includes a metal plate of a certain thickness, with a slot or cavity formed in the metal plate. As above, the slot has a width and a specific length. The light-emitting device also includes a semiconductor layer stack disposed within the cavity along a first major direction and extending at least beyond the upper major surface. The semiconductor layer stack may be an LED nanocolumn and include a first electrical contact, a second electrical contact, and an active region. In some variations, the active region of the semiconductor layer stack may be located between the first and second contacts. The active region of the semiconductor layer stack may be implemented by a single pn junction, a quantum well, a multiquantum well, or a combination thereof. The semiconductor layer stack may have a length greater than its corresponding width. For example, the semiconductor layer stack may have a length at least twice as long as its width. The semiconductor layer stack may also have a length from five to ten times as long as its width.

[0080] To define the light and promote radiative recombination over non-radiative recombination in the semiconductor layer stack during operation, the cavity length is substantially based on n / 2 (n is a natural number) of the wavelength of the light emitted during operation. In this regard, it should be noted that various physical parameters change the light emission behavior and the emission center wavelength, so that the actual cavity length may need to be adjusted slightly. These parameters can be summarized in a so-called shortening factor, which can be measured and / or calculated from the physical parameters. In this application, the shortening factor is considered by noting that the cavity length is substantially based on n / 2 of the wavelength of the light emitted during operation.

[0081] In some variations, the conductive structure has a distance between the upper and lower major surfaces (referred to as a thickness) that is greater than the thickness of the active region of the semiconductor layer stack. The active region may be located within the cavity, particularly between the levels defined by the upper and lower major surfaces. In such a configuration, the active region is located within the cavity, facilitating the necessary radiative recombination within the active region. With respect to the length of the cavity, the semiconductor layer stack may be located substantially in the center of the cavity. Accordingly, the center of the semiconductor layer stack is located substantially at half the length of the cavity. In this implementation, the semiconductor layer stack and the slot-type antenna form a dipole structure, and the dominant emission wavelength is given by approximately twice the cavity length, adjusted for the shortening ratio.

[0082] In some other implementations, the semiconductor layer stack is placed toward the end of the cavity, for example, at the edge of the cavity length. In yet another implementation, the light emitting device may have two semiconductor layer stacks disposed at each end of the cavity as described herein.

[0083] The semiconductor layer stack may extend beyond the conductive structure. Therefore, the first and second electrical contacts of the semiconductor layer stack are also provided above the upper main surface or, correspondingly, below the lower main surface. The semiconductor layer stack may thus be a so-called vertical layer stack. Depending on the application, the first contact may be a p-type contact and the second contact an n-type contact, or vice versa. Contacting the semiconductor layer stack outside the cavity not only simplifies implementation but also reduces undesirable effects.

[0084] Forming a cavity that facilitates visible light emission requires a cavity length of several hundred nanometers. Because the semiconductor layer stack and active region may be disposed within the cavity, the diameter of the basal plane of the semiconductor layer stack and active region is typically smaller than the wavelength emitted by the device during operation. It is generally desirable for the slot to have a length greater than its width. In some embodiments, the length-to-width ratio may be 30:1 to 5:1, particularly 15:1 to 5:1. For ratios less than 5:1, or even other ratios, a reflective but insulating layer may be provided along the sidewalls of the semiconductor layer stack to reflect light having a component perpendicular to the cavity length. This suppresses light that attempts to propagate perpendicular to the cavity length.

[0085] In some variations, the cavity extends through the conductive structure and further forms a slot. The slot is rectangular in shape, but may have rounded edges due to the manufacturing method. In other variations, the cavity is more of a cutout, with a through-hole located where the semiconductor layer stack is located. In other words, the cavity is partially closed at the lower major surface, except for the hole where the stack is located and which extends through the conductive structure.

[0086] In some embodiments, the slot may have a rectangular shape with the semiconductor layer stack disposed at the common end of two sub-slots.

[0087] Another aspect relates to insulating the conductive structure and separating the structure from the stack. A transparent insulating layer is applied to at least the upper major surface of the conductive structure. However, the contacts of the semiconductor layer stack are not covered by the insulating material but extend across the insulating material or reach the level of the surface of the insulating material facing the conductive structure. In this implementation, the light-emitting device also has a contact layer applied on the transparent insulating layer and in contact with the first electrical contact. The contact layer may be insulated with another layer applied on the contact layer. This layer (or contact layer) may be patterned to improve the light-emitting properties of the device. In addition to coating or roughening the surface to enhance light extraction, periodic structures such as photonic crystals may be placed on the top surface. Additional optics such as microlenses may also be used.

[0088] In some other embodiments, a transparent insulating layer also covers the lower major surface, so that the other contact of the semiconductor layer stack and the transparent insulating layer form a substantially flat surface. However, the conductive structure is not completely covered by the insulating layer because it must be connected to a reference potential to function as a slot-type antenna. Therefore, the conductive structure has at least one contact. The conductive structure may be at the same potential as the connection of the semiconductor layer stack. In that case, the layer stack is connected to the conductive structure. However, it is also possible to apply a different potential to the conductive structure.

[0089] The light emitted by such devices can have a broad spectrum, i.e., the emission spectrum is centered around a central wavelength (as described above) but also includes other frequency components. Also, the spectrum of light emitted from an element with a nominally identical cavity will be broad. To narrow the spectrum and provide light of a specific central wavelength with a narrow spectrum, a color filter may be disposed on the upper major surface corresponding to the light-emitting surface. The filter may have a narrow color bandpass. In some variations, a converter may be disposed on the upper major surface to convert light of a first wavelength to a second, longer wavelength color. Using a converter, a light-emitting device can be optimized for a given wavelength and then converted to another desired wavelength.

[0090] Another aspect relates to packaging a number of such light-emitting devices together with appropriate driver and control circuits, in particular to produce a μ-LED display. Such an array comprises at least two light-emitting devices as described above. The at least two devices may then share a common conductive structure. The common conductive structure may have several cavities arranged therein, each cavity being included in a corresponding light-emitting device. Additionally or alternatively, the μ-LED array may have a common transparent insulating layer applied over at least the upper main surface of the conductive structures. If the conductive structures are separate for each light-emitting device, the insulating layer may fill the spaces between the conductive structures of each device.

[0091] In some variations, a common filter or other structure can be provided that is applied over at least two light emitting devices, providing redundancy in case one light emitting device is damaged and reducing the complexity of the implementation by allowing the color filter to be applied over a larger area (as opposed to only one stack and one cavity).

[0092] To individually control the light emitting devices, at least one of the p-type or n-type contacts is not connected to each other, allowing the light emitting devices to be addressed and controlled separately.

[0093] In the above-described μ-LED array, some light-emitting devices may have color filters to set the color of the corresponding light-emitting device. These color filters may have different characteristics. For example, the color filters of at least two light-emitting devices may have different bandpass or filter characteristics relative to the color filters of the other two light-emitting devices. Thus, different colors can be obtained. This may be useful when the light-emitting devices have a very wide emission spectrum spanning two or more target regions. For example, a light-emitting device may have an emission spectrum covering both green and blue components. A corresponding color filter may be used to filter out undesired components of the spectrum. A similar solution is presented when the light-emitting devices each have a converter.

[0094] The converter in one of the at least two light-emitting devices may be different from the converter in the other of the at least two light-emitting devices, allowing different colors to be obtained from cavities of the same length, and pixels may simply be constructed from three, six, or nine subpixels of the same cavity, with corresponding converters located above the cavity. Each pixel thus fabricated may share the same conductive structures.

[0095] In addition to the μ-LEDs of the above type, further designs are also conceivable. Primarily, these designs have surfaces suitable for generating light. RGB modules are created by combining such light-emitting diodes. This applies not only to large LED designs, but also to modules with small components. However, for modules with very small light-emitting diodes in the μ-LED field, it can be very laborious to individually manufacture and transfer such μ-LEDs.

[0096] Therefore, monolithic μ-LEDs, i.e. μ-LEDs grown in rows and columns on a carrier, may enable the fabrication of μ-display modules without the need for μ-LED component transfer.

[0097] However, some applications require the construction of μ-LEDs that emit light in different colors. In this case, μ-LEDs emitting light in the blue, green, and red spectrums form μ-pixels, respectively. Three such μ-pixels, or four or more in case of redundancy, form one pixel. Here, μ-LEDs that emit colored light during operation can be fabricated in different material systems to create RGB μ-displays or corresponding modules. This makes monolithic design difficult.

[0098] Another approach is described in the following embodiments and methods. A method for manufacturing pixelated μ-LED arrays is proposed, which involves forming a combination of polyhedral or prismatic coated material volumes on a growth substrate. By material volume, we mean a semiconductor body created on the surface of a carrier. The coated material volumes are configured to have an active layer suitable for emitting light. In this respect, such coated material volumes can also be called μ-LEDs due to their size. In a second step, a converter material tailored to a defined color is introduced between a pair of material volumes. These colors can be, for example, red and green. In some embodiments, the material volumes, or the μ-LEDs thus manufactured, are configured to emit blue light; in this case, the converter between the two material volumes can be omitted.

[0099] In this way, a total of four such ingot material volumes or μ-LEDs can be used to generate blue, green, and red light individually. The conversion material is located at least midway between two material volumes that can be simultaneously electrically controlled. In some embodiments, the conversion material also partially extends over the surface of the material volumes. Furthermore, by increasing the material volumes, redundancy can be achieved, allowing light of the desired wavelength to be emitted even if one volume fails. The material volumes have the shape of a longitudinally extending rectangular prism or an ingot. However, other regular polyhedrons, such as parallelepipeds, rectangular prisms, or similar shapes, such as truncated pyramids, obelisks, wedges, or regular polyhedrons, are also conceivable.

[0100] Furthermore, according to a second aspect, μ-LED arrangements, in particular for pixels, are proposed, which have a respective set of coated material volumes in the form of polyhedrons or prisms on a carrier substrate, between which a conversion material is introduced, which converts the light emitted by the material volumes into light of a further wavelength, often completely.

[0101] To fabricate the material volume, an ingot-shaped core is first formed on a carrier substrate, onto which multiple epitaxial layers are then overgrown. Suitable photostructures are used for this purpose. The core and layers can be made of III-V semiconductors, such as GaN. Because the geometrically defined material volume is determined by epitaxial growth, RGB pixels can be arranged on a very small surface area. Placing converters within the cavities allows for redundancy and facilitates fabrication by jetting or dispensing methods. In this way, a μ-display can be created as an RGB display based on a redundant 3D ingot arrangement.

[0102] Electrical connections are possible without further wiring technology, in particular by means of through-hole vias passing through the carrier. In this way, SMT ("surface mounted technology") components can be formed, or material volumes can be formed monolithically with the conductive structures present in the carrier.

[0103] As described above, a first doped layer and a second doped layer are applied over the core. An active layer is disposed between the first and second layers. The latter may include one or more quantum well structures. Additionally, the first and / or second layers may include current spreading layers, doping gradients, or other measures to minimize resistance to the active layer and allow high current densities. Additional measures, such as current confinement to direct current away from the edges of the material volumes, are described in this disclosure and can be used in the fabrication of the material volumes. These include, but are not limited to, quantum well intermixing. Each combination is electrically contacted by p-type and n-type contact regions via metallization. In some embodiments, one or both regions may be commonly configured, i.e., the material volumes share one or two common contact regions.

[0104] According to a further aspect, a growth layer may be formed on a growth carrier having unmasked areas, on which a number of material volumes may be grown. According to a further aspect, the growth layer may include n-type doping, in particular GaN. The masking may include SiO2 or SiN. The growth layer may be made of the same material (e.g., GaN) as the core of the material volume, and may be doped depending on the application.

[0105] According to a further configuration, the material volumes can be produced with their longitudinal axes parallel to one another and with the same geometric shape. According to a further configuration, a p-contact, in particular a strip-shaped p-contact, can be formed by depositing a mirror-like first metallization, in particular providing solder, on the face of the material volume covered with the active layer and the further layer facing away from the growth carrier. According to a further aspect, a solder metallization layer can be deposited on a main face of the planar carrier, and this solder metallization layer can be connected, in particular bonded, to the first metallization of the material volume forming the p-contact.

[0106] In some configurations, the growth layer is removed area by area, in particular by etching (RIE (reactive ion etching) or ICP (inductively coupled plasma etching) in each case). A passivation is deposited on the growth areas thus exposed, which can completely cover the surface of the exposed areas, leaving some areas uncovered or the passivation open again. In some embodiments, the latter opening is carried out along the longitudinal axis of the material volume on the surface facing away from the substrate. A second metallization is then applied to the exposed areas of the material volume, forming strip-like n-type contacts.

[0107] Depending on the configuration, at least part of the passivated sidewalls are also coated with a metallization, which is reflective and allows light to be reflected back from them. In the case of two adjacent coated material volumes, these sidewall mirror metallizations can be created alternately, with some facing away from each other and others facing away from each other. In such a configuration, in the case of two adjacent coated material volumes with sidewall mirror metallizations created back to back, it is intended that the free space be filled with conversion material.

[0108] On and along the passivation layer, an electrical connection can be made from the n-type contact, the sidewall mirror metallization, and the metallic intermediate connection deposited as the third metallization to the n-type contact region deposited as the fourth metallization, especially in the form of a strip. These can be on the same side of the carrier. Alternatively, a through-hole via is provided, contacting the contact region facing away from the metal volume. This through-hole via is electrically insulated from the solder metallization layer and the carrier by the passivation layer. Of course, the p-type and n-type regions can be interchanged.

[0109] According to a further configuration, p-type contact-through-hole vias may be formed in the respective conversion material regions. Suitable materials such as Al or Ag may be used for the metallization.

[0110] By shortening the length of the ingot, so-called μ-rods are obtained. These have a pillar-like structure, similarly containing an active layer covering the surface along the longitudinal axis, such that during operation they emit light in essentially all directions. Such μ-rods can be produced many times on a carrier by self-organization or orientation-dependent crystal growth. Due to their relatively small structure, μ-LEDs, especially for μ-displays, can be fabricated simply by changing the parameters of the epitaxial process. μ-rods of the above-mentioned type exhibit spatial dimensions ranging from the sub-μm to the nanometer range.

[0111] The light generated by the μ-rod is emitted in virtually all spatial directions, although the portion of light emitted directly upwards is rather small due to the small base surface. Therefore, it may be contemplated to surround the μ-rod with one of the reflective structures disclosed below. In this way, the μ-rod is placed in a cavity of some kind, and the walls of this cavity are chamfered and reflective. Similarly, in some embodiments, a cover electrode, as disclosed below, may be provided.

[0112] Another possibility is described below, which is based on the principle that μ-rods are singulated and then placed in parallel contact with a substrate, thus creating horizontally aligned μ-rods, each forming a subpixel.

[0113] According to a first aspect, an electronic device, particularly a μ-LED, is proposed, in which a μ-rod extending substantially parallel to the carrier is connected to the carrier. To this end, the μ-rod has an elongated core with a first doping, which is coated outwardly with a layer sequence from a first longitudinal end to a second longitudinal end free of the layer sequence. The layer sequence includes an active layer, which in some embodiments may include a quantum well structure or the like. Furthermore, measures such as special doping, as described herein, may be taken to confine current to a low-defect region of the active layer. The μ-rod has a first longitudinal end electrically and mechanically connected to a first contact region of the carrier by the layer sequence and the first contact, and a second longitudinal end electrically and mechanically connected to a second contact region of the carrier by the core and the second contact. Finally, the layer sequence is electrically insulated from the second contact by masking. Thus, the μ-rod is elongated and positioned substantially parallel to the carrier. Although this consumes more space, this structure also allows a high light output to be obtained with a small current.

[0114] In the case of a method for producing such an electronic component and a μ-LED electrically connected on a carrier, a μ-rod can be produced in a first step and contacted at its first and second ends, each of which contacts a differently doped layer. This production can be carried out in a basic step by epitaxial deposition of material. Thus, the μ-rod has an elongated core with a first doping, which is grown, in particular epitaxially, by one or more layer sequences from a first longitudinal end to a second longitudinal end without a layer sequence.

[0115] The μ-rod thus produced is then arranged along a carrier substantially parallel to it. At a first longitudinal end of the μ-rod, the layer sequence with the first contact is electrically and mechanically connected to a first contact region of the carrier. At a second longitudinal end, the core is electrically and mechanically connected to a second contact region of the carrier by means of the second contact. In this case, the layer sequence is electrically insulated from the second contact by an insulating layer.

[0116] The increased flexibility in fabricating μ-rods allows their emission to be tailored to a desired wavelength range or wavelength. In some embodiments, the μ-rod's geometry is tailored to one of a certain wavelength of light. In addition to different lengths and / or diameters, μ-rods can also have geometries with different thicknesses of individual layers. Different diameters allow μ-rods to be fabricated that emit light of different wavelengths during operation. The active layer may be provided with quantum wells. μ-rods may be shaped, for example, as polyhedrons, prisms, pyramids, or wedges along their longitudinal axes. Their cross sections may include four or six corners. In some embodiments, μ-rods may be coated with an additional conversion material to convert the emitted light, or may be coated with the material during further processing.

[0117] In some embodiments, when the μ-rods are arranged parallel along their longitudinal axes on a carrier, it may be advantageous to attach a reflective layer between the carrier and the μ-rods. In this regard, see elsewhere configurations in which the carrier has a reflector structure around the μ-LEDs, and light from the μ-LEDs arranged therein is polarized by the reflector structure. Such a reflector structure may be arranged around the μ-rods or each μ-rod arranged on the carrier.

[0118] In one embodiment, a group of three μ-rods is arranged parallel to one another on a carrier and electrically and mechanically connected to contact regions of the carrier. Each μ-rod may be configured to emit red, green, or blue light, thereby forming a pixel. Multiple such arrays arranged in rows and columns can form a μ-display. As mentioned above, the μ-rods may have different diameters for red, green, and blue light, i.e., they have different sizes. In the case of multiple pixels, rearranging the μ-rods can reduce visual artifacts due to the periodicity.

[0119] In some embodiments, the manufacturing and fabrication of contacts is involved. For example, the first contact, particularly the p-type contact, at the first longitudinal end of each μ-rod not facing the insulating layer can be performed in various ways. This includes epitaxial growth, particularly epitaxial growth using a seed layer photopatterned by oxygen plasma etching. Similarly, contacts may be formed by sputtering. In some embodiments, at least one contact surface is formed on the first contact as a contact surface for the first contact region of the carrier. The second contact is fabricated in the same manner.

[0120] As already briefly mentioned for μ-rods, they can be generated by a kind of self-organization. In this case, crystalline orientation is used to induce directional crystal growth. When constructing three-dimensional light-emitting heterostructures for optoelectronic semiconductor arrays, e.g. μ-LEDs, especially at small scales, it is difficult to fabricate stress-free active layers with controlled 3D design and surface cross sections that form angles with each other. Nitride such as GaN grown on sapphire and In x Ga1- xFor μ-LEDs with active layers containing n-quantum wells, it has already been proposed to fabricate triangular profiles perpendicular to the <11-00> or <112-0> directions, or to adopt a hexagonal profile. For GaN-based semiconductor structures, lateral epitaxial overgrowth is performed using a mask with hexagonal openings aligned with the <11-00> or <112-0> direction of GaN. For AlInGaP-based semiconductor structures on GaAs, the (001)n-GaAs <110> It is proposed to orient the opposing corners of the hexagonal opening of the mask with an angle error of less than 10° relative to the direction. <112> The angular error for the orientation needs to be less than 15°. However, these used approaches are limited or not available at all for very small structures, especially in the range of edge lengths less than 70 μm.

[0121] The method disclosed below allows the realization of compact μ-LEDs or optoelectronic semiconductor arrangements with high efficiency in terms of the ratio of luminous flux to absorbed power, which can accordingly form part of a μ-display in monolithic form or as individual pixels.

[0122] The starting point of the concept proposed herein is an optoelectronic semiconductor arrangement comprising a three-dimensional light-emitting heterostructure with a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, the first conductive semiconductor layer and the second conductive semiconductor layer having different dopants. According to the proposed principle, the light-emitting heterostructure is formed by doping aluminum gallium arsenide (Al x Ga 1-xThe shaping layer comprises AlGaAs and / or aluminum indium gallium phosphide (AlInGaP) and / or aluminum gallium indium phosphide arsenide, and is grown three-dimensionally on a shaping layer. The shaping layer has side surfaces with a {110} orientation. Optionally, a flat top surface {111} may be provided. To achieve high conversion efficiencies and reduce non-radiative recombination, especially at the edges of micrometer-sized light-emitting heterostructures, it is necessary to create a stress-free three-dimensional layer structure with few lattice defects. It has been recognized that the shaping layer, which forms the base layer for fabricating three-dimensional light-emitting heterostructures, should be selectively epitaxially deposited on a GaAs (111)B epitaxial substrate.

[0123] As used herein, a gallium arsenide (111)B epitaxial substrate is understood to mean a carrier substrate for selective epitaxy consisting of gallium arsenide with a (111)-oriented surface according to Miller indices, where the surface plane is terminated by arsenic atoms. Gallium arsenide (111)B epitaxial substrates can be used doped or undoped. Compared to gallium arsenide (111)A with gallium termination, the controllability of selective epitaxy is improved, likely due to the higher volatility of arsenic atoms. The arsenic termination of gallium arsenide (111)B is expected to have a sufficient number of uniformly distributed arsenic defects to improve nucleation, allowing the initial stages of epitaxial layer formation to be advantageously controlled by externally adjustable epitaxial process parameters such as temperature and source supply.

[0124] For selective epitaxial growth of the shaping layer on the gallium arsenide (111)B epitaxial substrate, gallium arsenide and / or aluminum gallium arsenide and / or aluminum gallium indium phosphide are preferred. The shaping layer material may be undoped, n-type doped, or p-type doped. A further design option is to deposit SiO 2 in or on the shaping layer. x and SiN xIt is further contemplated to epitaxially deposit a Bragg mirror stack having successive layers of:

[0125] On the gallium arsenide (111)B epitaxial substrate, SiO x , SiN x or SiO x N y A lithographically patterned dielectric layer consisting of is used as a mask. The openings in the mask are selected so that the base surface of the shaping layer preferably has an edge length of 50 nm to 100 μm. In one configuration, the shaping layer's shaping structure and its orientation relative to the crystallographic direction of the gallium arsenide (111)B epitaxial substrate promotes the formation of at least one {110} oriented side surface of the shaping layer. In some embodiments, the shaping layer takes the form of a triangular pyramid with side surfaces oriented (-1-10), (-10-1), and (0-1-1). In a further advantageous configuration, the shaping layer has a top surface oriented (-1-1-1) in addition to side surfaces oriented (-1-10), (-10-1), and (0-1-1), such that in a further preferred configuration, there is a shaping layer positioned as a three-sided truncated pyramid.

[0126] The proposed method produces a precise epitaxially grown compact with a clear outline, small internal crystal strain, and a small number of lattice defects, and then aluminum gallium arsenide (Al gallium arsenide) is grown on the compact. x Ga 1-x Light-emitting heterostructures based on AlInGaP (AlAs) and aluminum indium gallium phosphide (AlInGaP) are epitaxially grown. Making them three-dimensional increases the area of ​​the active layer, improving the extraction of photons emitted parallel to the layers. Furthermore, the invention also leads to the enclosure of the peripheral region of the light-emitting heterostructure, so that at least the active layer can reach the mask for selective epitaxy, which acts as an electrical insulator. In this case, the mask is made of SiO x , SiN x or SiO x N yThis can include a step of forming a closed light-emitting heterostructure without incorporating additional passivation in the surrounding region, which reduces non-radiative recombination and increases light generation efficiency. This boundary effect occurs because the {110}-oriented side surfaces of the shaping layer taper toward the mask, at least to the edge of the mask. Thus, the shaping layer can be formed planar with a (111)-oriented top layer parallel to the substrate. Preferably, the shaping layer has a lateral extent parallel to the epitaxial substrate of less than 20 μm and a vertical extent perpendicular to the epitaxial substrate of less than 5 μm. To adjust the desired profile, the shaping layer can be post-treated after selective epitaxial growth by wet-chemical processing. In a preferred configuration, profile control of the shaping layer is achieved solely by selective epitaxial growth.

[0127] Aluminum gallium arsenide (Al x Ga 1-x Light-emitting heterostructures based on As and / or aluminum indium gallium phosphide (AlInGaP) can generate wavelengths in the range of 560 nm to 1080 nm. To complete the μ-LED, light-guiding, contact, and passivation layers are added to the optoelectronic semiconductor structure. This allows for configurations in which the main emission direction is in the growth direction of the semiconductor array layer stack or against the growth direction. Furthermore, light extraction on the p-side or n-side of the light-emitting heterostructure is also possible. Further measures for light guiding, collimation, or conversion to other colors are disclosed in this application.

[0128] In a variant in which the growth direction of the layer stack of the light-emitting heterostructure is the main emission direction, a layer sequence is located above it, which comprises a transparent contact layer for the second conductive semiconductor layer, for example a layer of ITO (indium tin oxide). In one possible configuration, the ITO layer is deposited over the entire upper surface of the light-emitting heterostructure. In addition, a Bragg mirror stack (DBR) may be provided below the light-emitting heterostructure.

[0129] The first conductive semiconductor layer of the light-emitting heterostructure is most easily electrically contacted from below using an appropriately doped conductive gallium arsenide (111)B epitaxial substrate and a similarly doped shaping layer selectively grown epitaxially on the substrate.

[0130] A matrix arrangement of light-emitting heterostructures can be processed in parallel and, depending on the process used, can serve as the matrix for a μ-LED display, where the structures are fabricated in a monolithic arrangement of rows and columns.

[0131] Alternatively, the heterostructures can be singulated en bloc or individually, for example by laser separation, without damaging the active layer whose edges are protected by a masking layer. Such separated light sources can form μ-LEDs with extended contact surfaces, which, in the simplest case, can be mounted on complementary contact surfaces of an IC chip without separate wire bonding.

[0132] In another variation where the growth direction is along the main emission direction, the active layer with quantum wells is applied locally confined to the side surfaces with a {110} orientation or to the top surface with a (111) orientation. Opaque metallization can be provided on the non-emitting parts of the heterostructure, for example, forming an annular contact. Additional passivation and carrier layers may also be present. Furthermore, a light guide structure can be provided at the exit window; in the simplest case, the surface is roughened to increase the extraction rate. Furthermore, additional surface treatments can be performed by conventional processing to form elements that further improve the radiation pattern, such as collimators or photonic crystals.

[0133] To achieve light emission with a primary emission direction opposite to the growth direction, the gallium arsenide (111)B epitaxial substrate and at least a portion of the forming layer are first removed, and a transparent contact layer is applied under the light-emitting heterostructure in a further step. The light source thus constructed is suitable for IC chip assembly by bonding.

[0134] In a further alternative configuration, a temporary carrier over the three-dimensional light-emitting heterostructure is used to remove the gallium arsenide (111)B epitaxial substrate and shaping layers. These underlying layers are replaced with metallization and a carrier substrate. The temporary carrier can then be replaced with a top-side passivation and light guide structure. Such a configuration is suitable for dual-bond contact configurations on IC chips.

[0135] Besides various aspects of the crystal geometry or orientation, it was also found that the smaller the area of ​​the active layer, the lower the radiative recombination compared to the non-radiative recombination. This is believed to be due to defects in the active layer. These defects mainly form in the peripheral region of the μ-LED because processing there (singulation or etching) changes the crystal structure, resulting in a higher defect density there. In general, it can be said that the larger the area of ​​the peripheral region compared to the area of ​​the active layer, the higher the number of defects and therefore the higher the non-radiative recombination. Furthermore, it was recognized that defect density affects the efficiency of light-emitting diodes at both high and low current densities and, together with current density, is an important factor in aging (and therefore the efficiency loss of light-emitting diodes).

[0136] A prerequisite for applications in the automotive sector is that the μ-display and its individual pixels must have sufficient brightness, i.e. be able to carry relatively high current densities. On the other hand, for augmented reality applications, a high contrast range is important, i.e. the μ-LEDs in the display must be equally capable of handling high and low current densities. Accordingly, their efficiency must be high or even higher even at low currents.

[0137] Therefore, taking into account these requirements on the one hand and the effect of defects on the other hand, it may be desirable to reduce the defect density in the active layer, especially in the peripheral region, or to move charge carriers away from the peripheral region.

[0138] One method for improving low-current operation is quantum well intermixing, which has been used in various ways in the fabrication of active semiconductor components. In this case, the bandgap of an active layer configured as a quantum well is changed by exchanging lattice atoms between the active layer and the surrounding barrier material. This exchange process can be carried out particularly efficiently if appropriate impurity atoms, particularly doping atoms, are introduced into the semiconductor. This changes the bandgap of the region affected by the exchange process, so that charge carriers experience repulsive forces. For example, dopants can be used to migrate into the active layer by diffusion processes and cause quantum well intermixing there. This method has also been successfully tested in optoelectronic components based on III-V semiconductors such as Ga, In, Al, P, and As.

[0139] However, it has also been observed that light-emitting diodes (LEDs), particularly μ-LEDs, made from this material system show a relatively short-term decrease in brightness as their dimensions decrease. This degradation occurs even at significantly lower load currents than components without quantum well intermixing. In other words, quantum well intermixing reduces the brightness of μ-LEDs even at low currents, a phenomenon not particularly observed in larger LEDs.

[0140] A method has now been found that not only significantly reduces this effect but also prevents the loss of luminous efficiency due to impurities as much as possible, at least over the long term, and is therefore particularly suitable for the production of μ-LEDs.

[0141] To this end, a method for manufacturing semiconductor components, particularly μ-LEDs, is proposed, in which a semiconductor structure is provided in a first step. This semiconductor structure can be fabricated by growing layers of different doping and / or different material compositions, in particular an n-doped first layer, a p-doped second layer, and an active layer with at least one quantum well disposed therebetween. The p-doped layer is doped with a first dopant.

[0142] In a second step, a patterned mask is applied to the semiconductor structure, particularly the p-doped layer, to protect the active layer regions intended for the generation of electromagnetic radiation from the penetration of the second dopant. In this case, the mask material may be made of a dielectric material (such as silicon oxide or silicon nitride), a metal (such as Ti), or a semiconductor material.

[0143] The p-type doped layer not covered by the patterned mask is then doped with a second dopant by a diffusion process using first process parameters. The process parameters and mask material are selected to cause quantum well intermixing in the areas of the active layer not covered by the patterned mask. This masking creates a relatively sharp lateral transition region in at least one quantum well intermixing, where the degree of quantum well intermixing abruptly decreases at the boundary defined by the mask. This results in a relatively abrupt change in the bandgap of the quantum well.

[0144] According to the proposed principle, the diffusion process is followed by a final heat treatment step, in which second process parameters different from the first process parameters are set, and the semiconductor is subjected to an annealing step at the second process parameters without the addition of a second dopant.

[0145] This downstream annealing step is configured with different process parameters and without the use of a second dopant so that the significant improvement in low current efficiency achieved in the first step is maintained over a longer period of operation.

[0146] The inventors have recognized that the process of providing the second dopant with the first process parameters is critical in that it is causally related to both the occurrence of quantum well intermixing and subsequent degradation. In this case, atoms of the second dopant diffuse into the semiconductor layer stack and the active layer (or quantum well), where they can replace atoms of the original crystal lattice. These atoms are both atoms of the first dopant and atoms of the actual lattice material. Atoms displaced to interstitial sites are mobile, and we suspect they play a significant role in the degradation of optoelectronic devices. Simultaneously, by changing the process parameters and performing an additional annealing step without further dopant supply, subsequent efficiency degradation is reduced. In another aspect, providing a supporting pressure with elements that form the crystal lattice (e.g., by providing appropriate precursors) provides appropriate environmental conditions for the annealing step.

[0147] By appropriately selecting this element, the lattice atoms displaced by the second dopant are provided with the ability to react at the semiconductor surface, thereby preventing their free movement. If the displaced lattice atoms are, for example, group III atoms, this process can be initiated by a supporting pressure, preferably using a group V element. Accordingly, the interstitial atoms generated in the diffusion process diffuse to the surface during the annealing step according to the present invention and are bonded there. Reducing the number of interstitial atoms involved in the degradation mechanism significantly extends the life of the component.

[0148] In the annealing step, the precursor may be added from the beginning or only after the second process parameter is reached, and the precursor concentration may be varied during the annealing step so that sufficient precursor material is available to saturate the lattice atoms displaced by the dopant.

[0149] In another embodiment, the precursor may specifically contain the elements phosphorus or arsenic, primarily in compounds such as PH3, AsH3, TBA, or TBP.

[0150] In another aspect, first and second process parameters are related. In one embodiment, the parameters include at least one of the following parameters, or a combination thereof: temperature, temperature change over a defined period of time, pressure, pressure change over a defined period of time, gas composition and flow rate, particularly precursor, and duration of the annealing step. For example, the second process parameter includes a defined second temperature that is higher than the temperature at which the second dopant is supplied. In other words, the temperature during the annealing step is higher than the temperature at which quantum well intermixing occurs. Also, the durations of doping and annealing may be different.

[0151] In another embodiment, a second dopant different from the first dopant is used. For example, Zn may be used as the second dopant. The material system of the semiconductor structure may be, for example, a III-V semiconductor material. This may have at least one of the following material systems: InP, AlP, GaP, GaAlP, InGaP, InAlP, GaAlP, or InGaAlP. Similarly, the material system may also be combined with other III-V semiconductors, such as As.

[0152] In another aspect, an optoelectronic component is provided. The component includes a semiconductor structure made of a III-V semiconductor material. The semiconductor structure includes an n-doped layer, a p-doped layer, and an active layer having at least one quantum well disposed therebetween. The p-doped layer includes a first dopant. The component further includes a light-generating region, specifically a central region of the active layer, laterally surrounded by a second region of the active layer. A second dopant is introduced into the second region, causing quantum well intermixing with at least one quantum well of the active layer in the second region, resulting in a bandgap of the second region larger than that of the central region.

[0153] In another embodiment, a patterned mask is placed on the p-doped layer so as to cover a first subregion of the p-doped layer. A second dopant is introduced into the subregion of the p-doped layer not covered by the mask, causing quantum well intermixing in the active layer located below this subregion. In this case, the size of the mask is substantially the same as that of the first subregion. By selecting a support pressure during the annealing step according to the present invention, the material displaced by the second dopant is converted into a layer covering a portion of the surface. A diffusion process during annealing removes material from interstitial sites, thereby eliminating non-radiative recombination centers in the quantum well and thus preventing a decrease in the efficiency of the optoelectronic component over time. Accordingly, a layer consisting of a trivalent material of the III-V semiconductor material and an element of the precursor material, in particular P or As, is formed on the surface of the intermixed subregion of the p-doped layer.

[0154] A further embodiment for improving quantum well intermixing is presented in the following method. To this end, a method for manufacturing a semiconductor component, in particular an optoelectronic component or μ-LED, is proposed, in which a semiconductor structure is provided in a first step. This semiconductor structure can be produced by growing layers of different doping and / or different material composition, in particular an active layer with a first n-doped layer, a second p-doped layer, and at least one quantum well disposed therebetween. In this connection, the p-doped layer is provided with a first dopant for doping.

[0155] In a second step, a patterned mask is applied to the semiconductor structure, particularly the p-doped layer, to protect the active layer regions intended for the generation of electromagnetic radiation from the penetration of the second dopant. In this case, the mask material may be made of a dielectric material (such as silicon oxide or silicon nitride), a metal (such as Ti), or a semiconductor material.

[0156] The p-type doped layer not covered by the patterned mask is then doped with a second dopant, resulting in quantum well intermixing in the areas of the active layer not covered by the patterned mask. In this context, doping of the p-type doped layer with the second dopant can be achieved by vapor-phase diffusion using a precursor containing the second dopant. Alternatively, the precursor is thermally decomposed in a gas-phase reaction, in which the dopant is absorbed at the semiconductor surface and diffuses into the semiconductor, resulting in quantum well intermixing. Because all of these subprocesses have different temperature dependencies, the temperature range in which efficient quantum well intermixing can be achieved is very limited (typically 520 + / - 20°C for InP- or GaAs-based semiconductors).

[0157] The proposed principle therefore defines the steps of precursor-based dopant application and in-diffusion, which allows for the establishment of a process sequence for efficient quantum well intermixing by vapor phase diffusion, thus enabling the optimization of the process sequence for widening the process window and thus realizing aging-resistant optoelectronic components.

[0158] The defined process sequence comprises the following steps: - depositing a second dopant on the surface of the p-type doped layer by decomposing the precursor at a first temperature selected so that the second dopant does not substantially diffuse into the p-type doped layer; and - diffusing the deposited second dopant into the p-type doped layer at a second temperature higher than the first temperature.

[0159] The inventors have recognized that the process control of doping with a second dopant has a significant impact on reducing the charge carrier concentration in regions where impurity-induced degradation of luminous efficiency occurs over a long period of time, particularly due to the increased dopant barrier in the active layer below the edge of the mask that can be achieved through the process control.

[0160] In addition, for the proposed process control, the step of vapor-phase diffusion of the dopant-containing precursor is explicitly divided into the following steps: - depositing a decomposition product containing the second dopant on the surface of the semiconductor structure; and - Diffusing a second dopant into the semiconductor structure.

[0161] This separation allows the temperature to be freely selected during the diffusion step with quantum well intermixing, in particular up to values ​​(above 520°C) at which surface occupation by the second dopant is no longer possible due to excessive desorption, which can be used advantageously to improve the aging behavior of optoelectronic components.

[0162] The second dopant may be of the same dopant type as the first dopant, e.g., Zn, Mg, etc. The amount of the deposited second dopant may be selected to diffuse substantially completely into the p-type doped layer during the diffusion process at the second temperature, thus providing only an amount sufficient for diffusion and quantum well intermixing to occur, but not more.

[0163] In another embodiment, the deposition amount of the second dopant herein is selected, for example, to form a barrier to lateral diffusion of charge carriers in areas of the active layer not covered by the patterned mask, the barrier consisting of a barrier created by the second dopant and a barrier caused by quantum well intermixing.

[0164] In a development of this aspect, the amount of the second dopant is selected such that in regions of the active layer not covered by the patterned mask, the barrier to lateral diffusion of charge carriers generated by the second dopant is greater than the barrier caused by quantum well intermixing. Furthermore, the amount of the second dopant may be selected such that the bandgap of the active layer in regions under the patterned mask is smaller than the bandgap of the active layer not covered by the patterned mask.

[0165] In another embodiment, the doping process is followed by a final heat treatment step at a third temperature higher than the second temperature, and the semiconductor is subjected to an annealing step at this third temperature without the addition of a second dopant. This downstream annealing step is configured at a higher temperature and without the use of a second dopant so that the significant improvement in low-current efficiency achieved in the doping process is maintained over a longer period of operation.

[0166] The inventors have recognized that the process of providing a second dopant at a first temperature and diffusing the second dopant at a second temperature is crucial in that it contributes to both the occurrence of quantum well intermixing and subsequent degradation. In this case, atoms of the second dopant diffuse into the semiconductor layer stack and the active layer (or quantum well), where they can replace atoms of the original crystal lattice. These atoms are both atoms of the first dopant and atoms of the actual lattice material. The atoms displaced to interstitial sites are mobile, and we believe they significantly contribute to the degradation of optoelectronic devices. A simultaneous additional annealing step at a higher third temperature, during which no additional dopant is provided, reduces subsequent efficiency degradation.

[0167] In another aspect, suitable environmental conditions for the annealing step are provided by providing a supporting pressure with an element that forms a crystal lattice (e.g., by providing a suitable additional precursor). By appropriately selecting this element, the lattice atoms displaced by the second dopant are provided with the ability to react at the semiconductor surface, thereby preventing their free movement. If the displaced lattice atoms are, for example, group III atoms, this process can be initiated by a supporting pressure, preferably with a group V element. Accordingly, interstitial atoms generated in the diffusion process diffuse to the surface during the annealing step according to the present invention and are bonded there. Reducing the number of interstitial atoms involved in the degradation mechanism significantly extends the lifespan of the component.

[0168] Thus, according to this embodiment, the annealing process comprises the steps of providing a further precursor comprising an element of the fifth main group, in particular P or As, and / or forming a layer of III-V semiconductor material on the surface of the p-type doped layer.

[0169] In the annealing step, the precursor may be added from the beginning or only after the second process parameter is reached, and the precursor concentration may be varied during the annealing step so that sufficient precursor material is available to saturate the lattice atoms displaced by the dopant.

[0170] In another embodiment, this further precursor may specifically comprise the elements phosphorus or arsenic, primarily in compounds such as PH3, AsH3, TBA or TBP.

[0171] Another aspect concerns the process parameters that can be varied for each of the deposition, diffusion, and annealing steps. In one embodiment, the parameters include at least one of the following parameters, or a combination thereof: temperature during one of the aforementioned steps, temperature change over a defined period of time, pressure during one of the aforementioned steps, pressure change over a defined period of time, composition and flow rate of gases, especially precursors, and duration of the annealing step.

[0172] For example, the process parameters may include a first temperature during deposition of the second dopant into the p-doped layer, selected so that the second dopant does not substantially diffuse into the p-doped layer; a second temperature during the diffusion process of the second dopant, which is higher than the first temperature; and a third temperature during the annealing step, which is higher than the second temperature. In other words, the temperature during the annealing step is higher than the two temperatures used to generate quantum well intermixing. The durations of the second dopant deposition, the diffusion process, and the annealing may also be different.

[0173] In other embodiments, a second dopant different from the first dopant is used. For example, Zn or Mg may be used as the second dopant. The material system of the semiconductor structure may be, for example, a III-V semiconductor material. This may include at least one of the following material combinations: InP, AlP, GaP, GaAlP, InGaP, InAlP, GaAlP, or InGaAlP. Similarly, the material system may also include combinations with other III-V semiconductors, such as As.

[0174] In another aspect, an optoelectronic component is provided. The component includes a semiconductor structure made of a III-V semiconductor material. The semiconductor structure includes an n-doped layer, a p-doped layer, and an active layer having at least one quantum well disposed therebetween. The p-doped layer includes a first dopant. The component further includes a light-generating region, specifically a central region of the active layer, laterally surrounded by a second region of the active layer. The second region includes a second dopant introduced into the second region, which causes quantum well intermixing with at least one quantum well of the active layer in the second region, resulting in a bandgap of the second region larger than that of the central region.

[0175] Because this local quantum well intermixing by impurities occurs in the second region rather than the first region, a barrier is formed in the active layer, restricting the lateral movement of charge carriers in the quantum wells of the active layer of the optoelectronic component to this first region of the active layer. This prevents, for example, as much as possible, the current for operating the optoelectronic component from flowing into the peripheral region of the optoelectronic component, i.e., through the second region surrounding the first region. This reduces the non-radiative recombination of charge carriers caused by non-radiative recombination centers in the second region or high non-radiative surface recombination, thereby improving the performance of the component.

[0176] In another embodiment, a patterned mask is disposed on the p-doped layer to cover a first subregion of the p-doped layer, and a second dopant is introduced into the subregion of the p-doped layer not covered by the mask to induce quantum well intermixing in the active layer disposed below the subregion, the size of the mask being substantially the same as the size of the first subregion.

[0177] By selecting the supporting pressure during the annealing step according to the present invention, the material displaced into the interstitial sites by the second dopant is converted into a layer covering a portion of the surface. The diffusion process during annealing removes the material from the interstitial sites, which presumably does not result in non-radiative recombination centers in the quantum well, so that the efficiency of the optoelectronic component does not decrease over time. Accordingly, a layer consisting of the trivalent material of the III-V semiconductor material and elements of the precursor material, in particular P or As, is formed at the surface of the mixed subregion of the p-type doped layer.

[0178] As already mentioned in the concepts above, quantum well intermixing effects and impurity penetration influence the aging behavior of μ-LEDs. Although they can certainly be mitigated by the measures disclosed herein, it has been found that they remain measurable and sometimes relevant, especially at relatively high load current densities, and especially in the case of very small devices with edge lengths of only a few μm, such as μ-LEDs. This is apparently due to a location- and position-dependent concentration gradient of the diffused material, which is determined by the photomask geometry and structure.

[0179] Thus, in one embodiment, an optoelectronic component is proposed, which comprises an n-doped first layer, a p-doped second layer doped with a first dopant, and an active layer. The latter is arranged between the n-doped first layer and the p-doped second layer and has at least one quantum well. According to the invention, the active layer can be divided into at least two regions, which are particularly adjacent to each other. In this case, the second region is arranged concentrically around the first region (particularly the optically active region) and has quantum well intermixing.

[0180] Concentric arrangement of the quantum well intermixing around the optically active region in this embodiment means that the first region, particularly the optically active region, is completely surrounded by the second region, with the two regions arranged around a common center point of their respective areas, although slight deviations or intentional variations in the center points are possible within manufacturing tolerances.

[0181] The inventors have hypothesized that impurity penetration and quantum well intermixing may depend on providing open areas into which the diffusing material can be introduced. Impurities at the corners of a square or rectangular active layer (or in areas corresponding to angular structures defined by a photomask) can diffuse from multiple sides, resulting in chamfered regions with higher impurity concentrations and / or quantum well intermixing than regions located, for example, midway along the length of a side. This effect can be undesirable in some circumstances and is avoided by choosing a concentric arrangement, since the absence of corners in such an arrangement prevents such significant diffusion.

[0182] Quantum well intermixing can be achieved by doping the second region with a second dopant, such as magnesium, zinc, cadmium (Mg, Zn, Cd), etc. However, this is not intended to be an exclusive choice of dopant, and any other dopant of the same type that can be devised by one skilled in the art can be used for doping.

[0183] A diffusion mask is applied locally to the semiconductor structure, and the second dopant is driven into the active layer region by region, e.g., by a diffusion process, to cause quantum well intermixing in the corresponding unmasked regions where quantum wells are present. The regions where quantum well intermixing occurs form the second regions. Thus, according to this aspect, the optoelectronic component includes the second dopant substantially uniformly distributed in the second regions.

[0184] In another embodiment, quantum well intermixing is prevented as much as possible in the first region, particularly the optically active region. More precisely, according to this embodiment, quantum well intermixing does not occur in the first region. Accordingly, after the diffusion process, the second dopant is placed as little as possible in the first region. This embodiment can also be realized by the measures described above.

[0185] This local quantum well intermixing by impurities in the second region, but not in the first region, creates a barrier in the active layer, restricting the lateral movement of charge carriers in the quantum wells of the active layer of the optoelectronic component to this first region of the active layer. This prevents, for example, as much as possible, the current for operating the optoelectronic component from flowing into the peripheral region of the optoelectronic component, i.e., through the second region surrounding the first region. This reduces the non-radiative recombination of charge carriers caused by non-radiative recombination centers or high non-radiative surface recombination in the second region, thereby improving the performance of the component.

[0186] For further improvement, in another embodiment, the two regions are at least approximately circular in shape. The absence of corners results in uniform diffusion of impurities into the second region, preventing the formation of local maxima caused by corners. Thus, forming the two regions in a circular or approximately circular shape has the effect of making the concentration of the introduced impurities as uniform as possible along the circumference of the two regions. This also results in reduced performance degradation due to surface recombination in the second region.

[0187] The term "circular" in this context means that polygons with six or more sides are also possible, i.e., polygons with eight, ten or more sides, since such shapes have already been shown to have a positive effect on improving the performance of optoelectronic components. Likewise, the term "circular" can also include ellipses, as well as ovals or other rounded convex shapes.

[0188] In another embodiment, the diffusion process for producing quantum well intermixing in the second region can mean that the second dopant is at least partially formed not only in the active layer of the second region, but also in the second p-doped layer and also in regions of the n-doped layer adjacent to the active layer, although this should not necessarily be understood as meaning that the regions of the second p-doped layer and the first n-doped layer in which the second dopant is formed coincide with the second region of the active layer, although they could.

[0189] In another aspect, an optoelectronic component, in particular a μ-LED, is proposed, in which the second region has a substantially uniform bandgap that is modified by quantum well intermixing. The second region is arranged concentrically around the first region, meaning that in this region the bandgap energy is as constant as possible, and only towards the periphery of the region does the bandgap increase or decrease, or the bandgap energy rise or fall.

[0190] On the other hand, at least one quantum well in the first region, particularly the optically active region, has a smaller bandgap than the second region. Accordingly, a barrier formed according to one of the above-described embodiments is formed between the first and second regions. In this case, the transition between the two bandgaps can be either a sharp step or a smooth transition.

[0191] Furthermore, at least one quantum well of the first region, in particular the optically active region, is substantially free of quantum well intermixing, so that this region is substantially free of the second dopant.

[0192] In addition to geometrical considerations for improving the performance of individual μ-LEDs, measures are also provided for improving quantum well intermixing at wafer level. μ-LEDs are typically fabricated at wafer level as a large number of such structures. In this case, the fabrication can be monolithic, or the μ-LEDs can be singulated at a later stage. In the former case, the quantum well intermixing also serves as a barrier against electrical crosstalk, while in the latter case, it can already be used during fabrication to modify the range that will later form the edges.

[0193] In one embodiment, a semiconductor structure is provided that includes an n-type doped first layer, a p-type doped second layer doped with a first dopant, and an active layer. The latter is disposed between the n-type doped first layer and the p-type doped second layer and has at least one quantum well. According to the present invention, the active layer can be divided into a plurality of first regions, particularly optically active regions, and at least one second region. In this case, the plurality of first optically active regions and the at least one second region are adjacent to each other. Furthermore, the plurality of first regions are spaced apart from each other in a hexagonal pattern and are surrounded by at least one second region having a quantum well.

[0194] Here, each one of the plurality of first, in particular optically active, regions of the semiconductor structure can form, for example, each one of the optoelectronic components. Thus, the semiconductor structure can be formed from a number of individual optoelectronic components, which can be subsequently singulated, for example, by an etching process or laser cutting through the epitaxial layer and subsequent removal of the substrate.

[0195] For example, the first regions may have a circular shape. Compared to square μ-LED structures, the lack of corners results in more uniform impurity penetration and quantum well intermixing along the boundaries of the subsequent μ-LEDs. This also means that non-radiative recombination in the peripheral regions of the second regions can be reduced, thereby improving the performance of each individual optoelectronic component.

[0196] The term "circular" in this context means that polygons with six or more sides are also possible, i.e., polygons with eight, ten or more sides, since this shape can already have a positive effect on improving the performance of the optoelectronic component. Likewise, the term "circular" can also include ellipses, as well as ovals or other rounded convex shapes.

[0197] A mask is applied locally to the semiconductor structure, and a second dopant is introduced into the active layer region by region, for example, using a diffusion process, so that QWI occurs in the corresponding regions where quantum wells exist. The regions where quantum well intermixing occurs form at least one second region. Thus, the semiconductor structure includes a second dopant, specifically a dopant different from the first dopant disposed in the p-type doped second layer, which is substantially uniformly distributed in the at least one second region.

[0198] On the other hand, in the first regions, the application of the mask prevents QWI as much as possible. More precisely, quantum well intermixing does not occur in the first regions. Accordingly, after the diffusion process, the second dopant is substantially absent from the first regions, and thus from the regions of the first portions within the quantum wells of the active layer.

[0199] The division into the first and second regions and the associated QWI allows the first region to be used as an optically active region in the operation of subsequent end devices, in particular μ-LEDs, and is therefore referred to hereinafter as the first optically active region.

[0200] Since this local quantum well intermixing by impurities occurs in the second region, rather than in the first optically active regions, it creates an electronic barrier in the active layer through a change in the band structure, restricting the lateral movement of charge carriers of the quantum wells in the active layer of the semiconductor structure to the first optically active regions of the active layer. This prevents, as much as possible, the flow of current for operating an optoelectronic component, for example, into the peripheral region of the optoelectronic component, i.e., through the second region surrounding the first region. Since non-radiative recombination centers are often present in the peripheral region of a singulated μ-LED structure, charge carriers are kept away from the peripheral region, which therefore leads to improved performance of the component.

[0201] However, in practice, impurity penetration and thus quantum well intermixing depend on the size of the open area into which the diffusing material is introduced. Thus, if a semiconductor structure contains multiple first optically active regions arranged in a hexagonal pattern, the spaces between each triangular arrangement of three first optically active regions will have local maxima, which are larger in area and therefore have a higher impurity concentration, than the areas between two adjacent first optically active regions. These maxima result from the fact that the diffusion process proceeds more efficiently in the larger areas where the second dopant is added than in the small spaces between two first optically active regions, for example, covered by a mask. This effect can be undesirable in some situations, since achieving a highly uniform diffusion pattern within the semiconductor structure is important for improving the low-current efficiency of optoelectronic components.

[0202] Thus, in another embodiment, a semiconductor structure is provided, comprising an n-doped first layer, a p-doped second layer doped with a first dopant, and an active layer. The latter is disposed between the n-doped first layer and the p-doped second layer and has at least one quantum well. According to the present invention, the active layer can be divided into a plurality of first regions, particularly optically active regions, and at least one second region. In this case, the first optically active regions and the at least one second region are adjacent to each other. Furthermore, the first optically active regions are spaced apart from each other in a hexagonal pattern and are surrounded by at least one second region having a quantum well. Furthermore, at least one third region is disposed in the space between the first optically active regions and the second regions, particularly adjacent to the at least one second region.

[0203] Unlike the previous embodiment, in this case the active layer is divided into a plurality of first optically active regions and at least one second region as well as at least one third region.

[0204] The at least one third region is arranged in such a way that the regions where local maxima of high impurity concentration occur according to the aforementioned embodiment are inaccessible to quantum well intermixing, for example by applying a mask, and that quantum well intermixing does not occur as much as possible in these regions as well as in the plurality of first optically active regions. Thus, after the diffusion process, the second dopant is arranged as little as possible in the at least one third region as in the plurality of first optically active regions.

[0205] Furthermore, the at least one second region surrounds the multiple first optically active regions such that each of the multiple first optically active regions is individually concentrically surrounded by a portion of the at least one second region or by one of the multiple second regions. Thus, the at least one second region may result, for example, from a continuous annular segment each disposed around one of the multiple first optically active regions, or from a plurality of annular patches each disposed concentrically around one of the multiple first optically active regions. Similarly, the term annular may include a circular, elliptical, or other rounded, convex shape that is substantially concentrically disposed around and completely surrounds the multiple first optically active regions.

[0206] In this regard, at least one third region is adjacent to at least one second region. Therefore, the at least one third region may have a continuous mesh-like area arranged around the plurality of annular second regions. However, in another embodiment, each of the plurality of third regions may at least approximately reproduce the shape of a deltoid curve. This may be formed, for example, by exactly three second regions arranged in a triangle, each of which has an at least approximately circular or annular shape. Similarly, the plurality of third regions may have a circular shape or may be arranged at the center of each of three triangular first regions, each of which has an at least approximately circular shape.

[0207] An important aspect of the arrangement of the at least one third region is to reduce local maxima with higher impurity concentrations in the second region during the diffusion process, for example by applying a mask, such as a dielectric or a photoresist mask, and thus achieve a diffusion pattern in the semiconductor structure that is as homogeneous as possible.

[0208] Quantum well intermixing can be achieved by doping the second region with a second dopant, such as magnesium, zinc, cadmium (Mg, Zn, Cd), etc. However, this is not intended to be an exclusive choice of dopant, and any other dopant of the same type that can be devised by one skilled in the art can be used for doping.

[0209] In another embodiment, the diffusion process for creating quantum well intermixing in the at least one second region may result in the second dopant being at least partially formed not only in the active layer of the second region, but also in the second p-doped layer and also in regions of the n-doped layer adjacent to the active layer, although this should not necessarily be understood as meaning that the regions of the second p-doped layer and the first n-doped layer in which the second dopant is formed coincide with the at least one second region of the active layer, although they may.

[0210] In another aspect, a semiconductor structure is proposed in which at least one second region has a substantially uniform bandgap created by quantum well intermixing, meaning that in this region the bandgap energy has as constant a value as possible, with the bandgap only increasing or decreasing towards the periphery of the region.

[0211] Meanwhile, the quantum well in the plurality of first optically active regions and at least one third region has a smaller bandgap than the quantum well in the at least one second region. Accordingly, barriers formed according to one of the above embodiments are formed between the plurality of first optically active regions and the second region, and between the at least one third region and the second region. In this case, the transitions between the bandgaps can be either sharp-edged or smooth.

[0212] In another embodiment, the plurality of first optically active regions and the at least one third region have substantially the same bandgap, particularly because the at least one quantum well of the plurality of first optically active regions and the at least one third region are substantially free of quantum well intermixing, and thus substantially free of the second dopant, in these regions.

[0213] According to another aspect, a semiconductor structure, possibly formed from a large number of individual optoelectronic components, is singulated into a plurality of optoelectronic components, for example by an etching process or laser cutting through an epitaxial layer and subsequent removal of the substrate. In this case, each cutout of the plurality of optoelectronic components is, for example, circular and includes at least one of the plurality of first optically active regions and a portion of at least one second region, where the first optically active region and the second region are particularly arranged concentrically around the circular cutout. Therefore, at least one third region of the semiconductor structure is not part of the plurality of individual optoelectronic components and thus particularly represents a reject of the singulation process.

[0214] For small light-emitting diodes, especially red light-emitting diodes, further reduction in chip size, especially to less than 50 μm, is difficult due to non-radiative recombination occurring at the outer edge of the chip. Up until now, for red light-emitting diodes based on AlGaInP materials, the chip size has been reduced to approximately 100 μm. 2 This problem has not received much attention because the recombination rate is not small. As mentioned above, quantum well intermixing is used to reduce the rate of non-radiative recombination. In the following aspects, we present the concept of redirecting charge carriers away from the edge of the chip by magnetic current confinement.

[0215] According to a first aspect, an optoelectronic component, in particular a vertical μ-LED for a monolithic μ-display, is proposed. It has a layer stack in which the active layer extends in a plane. The main direction of movement of charge carriers, i.e., electrons and holes, runs perpendicular to this plane through the active layer. The latter allows for the desired radiative recombination. However, the periphery of the active layer has a higher defect density, which can lead to non-radiative recombination. Therefore, a magnetization element is provided to provide magnetic field lines that penetrate at least a portion of the layer stack, directing the moving charge carriers away from the peripheral regions of the XY cross section of the layer stack.

[0216] According to a second aspect, a method for reducing non-radiative recombination, particularly in the region of the active layer of a μ-LED, is proposed. The vertical μ-LED comprises a layer stack in which layers extending along an XY plane are stacked one on top of the other along a Z-axis perpendicular to the XY plane, the main direction of charge carrier movement being along the Z-axis, particularly extending around the XY cross section of the layer stack. The method comprises the step of generating magnetic field lines for repelling charge carriers away from the peripheral region of the XY cross section of the layer stack.

[0217] The proposed geometry utilizes magnetic effects to effectively influence the lateral distribution of current induction in the μ-LED, in order to redirect charge carriers (i.e., electrons and possibly holes) away from the peripheral regions of the active layer, thus realizing a kind of electron lens. In this way, scalability to smaller chip sizes can be achieved. Non-radiative recombination at the chip edge is thus reduced.

[0218] According to a further configuration, the magnetizing elements can provide magnetic field lines in the region of the active layer and / or in the region before the active layer opposite to the main direction of charge carrier movement, tapering towards the poles of the magnetic dipole or extending along the Z-axis. Advantageously, the magnetizing elements are arranged to provide magnetic field lines only in peripheral regions of the XY cross section of the layer stack.

[0219] In one embodiment, the magnetization element comprises a number of current lines, in particular strip-shaped current lines, extending along the outer surface of the layer stack, the current flow of each current line being supplied antiparallel to the current flow through the optoelectronic component. Alternatively, the magnetization element may be constructed using a number of permanent magnetic dipoles circulating through the layer stack along the XY plane, in particular in the region of the active layer and / or in the region in front of the active layer, in the direction opposite to the main direction of charge carrier movement. Instead of permanent magnetic dipoles, electromagnets may also be used, the current flow of which may in particular be supplied by the current flow through the optoelectronic component.

[0220] According to a further configuration, the magnetization element may be a magnetic material, in particular manganese, circulating through the layer stack along the XY plane, deposited on the outer surface of the layer stack in the region of the active layer and / or in the region in front of the active layer opposite to the main direction of charge carrier movement and magnetized by an external magnetic field.

[0221] According to a further embodiment, the layer stack may have an electrically insulating passivation coating, particularly on the outer surfaces of the layer stack. In this context, the layer stack is a pillar-shaped μ-LED. Simply put, it comprises a p-doped layer, an n-doped layer, and an active layer arranged therebetween. The latter may be configured as a quantum well or multiple quantum well. Corresponding structural forms of μ-LEDs with additional features are part of this application. Of course, the layer stacks described herein and the μ-LEDs used therein may be replaced or supplemented by the structural forms disclosed herein. For example, the magnetic current confinement may simultaneously have reflective properties, preventing light from exiting through the sides. In one embodiment, two opposing side surfaces can be made reflective and used for current transport, while the other two sides can be provided with dielectric mirrors. In another embodiment, the extraction layer on the surface may have a photonic structure.

[0222] In addition to measures to improve semiconductor manufacturing and light generation, another aspect concerns the direction of light emission. In particular for μ-displays and polyhedral displays, it is necessary to achieve a defined radiation pattern. On the one hand, it is necessary to prevent the light generated by a μ-LED from interacting with neighboring μ-LEDs, and on the other hand, it is also desirable to extract the light in order to optimize the light efficiency at a given current intensity. In the following aspects, various measures are presented to improve the radiation pattern of an optoelectronic component or μ-LED by means of a reflective layer or mirror surrounding the active layer or μ-LED.

[0223] Some μ-LEDs emit light laterally. This effect is often undesirable, as it can lead to crosstalk between adjacent pixels, resulting in interference and other effects that degrade the visual impression. Furthermore, it also results in a lower light output. Similarly, many applications require a Lambertian radiation pattern for the display, i.e., it is particularly desirable for the display to be equally bright when viewed from any direction. Strong edge emission from the chip results in a non-Lambertian radiation pattern.

[0224] Ultra-small μ-LED chips can be realized in a vertical design, i.e. with one contact on the top and one on the bottom of the chip. To electrically connect a vertical μ-LED to the substrate, a second contact of the μ-LED (facing away from the substrate or on top), the so-called "top contact", must be deposited and patterned. In this case, a planarization and / or passivation layer is also used around the chip.

[0225] According to a first aspect, a method for producing an array with at least one light emitter is proposed. The light emitter may be, in particular, a μ-LED, a μ-rod as already presented herein, a μ-LED pillar, or any other element that emits light in a direction parallel to the active layer and also laterally. In this method, first and second contact areas are patterned on one side of a substrate. The light emitter is likewise applied to the structure or is generated there by patterning from multiple semiconductor layers.

[0226] Next, a first metal mirror layer and a second metal mirror layer are applied, the first metal mirror layer electrically connecting the contact layer provided on the second contact of the light emitter with the second contact region, and the second metal mirror layer is formed on a reflector structure disposed on the substrate. The reflector structure can be obtained from a subsequent patterned planarization layer. In some embodiments, the reflector structure surrounds the light emitter at a distance. In other embodiments, a portion of the planarization layer can be patterned to surround the light emitter.

[0227] The optoelectronic component comprises a light emitter, which is electrically contacted in particular by a first metal mirror layer, and a micro-reflector structure, which surrounds this in particular and is coated with a second metal mirror layer.

[0228] According to a second aspect, an array is proposed having at least one light emitter, where a first contact of the vertical light emitter is connected to a first contact region on one side of a substrate. On the same side of the substrate, a second contact of the vertical light emitter, facing away from the substrate, is connected to a second contact region by a contact layer, in particular a semitransparent contact layer and a first metal mirror layer. Furthermore, a reflector structure is formed surrounding the light emitter at a distance and having a second metal mirror layer on its side flanks. In some aspects, the reflector structure includes reflective sidewalls, which can be angled to redirect the light. In other aspects, the sidewalls may have a nonlinear slope, for example, a square or parabolic slope.

[0229] The second contact or top contact process can be used to create a light extraction structure on the substrate in the same step. In this case, the top contact is formed by the second contact of the light emitter, a contact layer, a first metal mirror layer, and a second contact region. Here, the contact layer on the second contact of the light emitter is electrically connected to the second contact region by the first metal mirror layer.

[0230] Here, the light extraction structures are formed by reflector structures, in particular micro-reflector structures, coated with a second metal mirror layer.

[0231] To create the top contact, a light emitter is first embedded in a planarization layer. This can be exposed by photolithography in a second contact area for a second contact on the substrate, or a top contact (upper contact). This patterning process is then used in the same step to form reflector structures, particularly μ-reflectors, on the substrate from the planarization layer. After depositing a transparent contact layer, a patterned application of a metal mirror layer can be performed as a metal bridge between the second contact and the second contact area.

[0232] This is necessary because the contact layer is not suitable for bridging large height differences. This metallization process can be used to simultaneously mirror coat the reflector structure.

[0233] In this way, displays can be manufactured cheaply and quickly, as a separate lithography process to form the reflector is no longer required as in the past.Preparing the reflector from a planarization layer with a top-contact metal mirror layer increases efficiency and contrast, improving the display's radiation pattern without additional processing.

[0234] Some further aspects are primarily concerned with the arrangement and contact of vertical μ-LEDs with transparent electrical cover layers. The objective here is to improve the display characteristics, especially when there are a large number of pixels per unit area. Since the spatial location of the electrical contacts of vertical μ-LEDs is on the upper side, away from the carrier substrate, it is conceivable to use transparent or at least partially transparent conductive materials, as already explained in this application. Known materials for this purpose are, for example, ITO (indium tin oxide), a semiconducting mixed oxide that is transparent or partially transparent to visible light, but which has a relatively high sheet resistance.

[0235] Thus, pixel elements in the form of one or more μ-LEDs for generating pixels of a display are proposed, which have a flat carrier substrate. The carrier substrate here can be understood as a backplane or support surface that provides a mechanically stable holding function and also provides electrical connections for the μ-LEDs. Possible materials for the carrier substrate include insulating compounds as well as semiconductors, such as silicon or III-V semiconductor materials. According to one embodiment, the carrier substrate is designed to be flexible or bendable.

[0236] At least one μ-LED is arranged on a carrier substrate and configured to emit light across the carrier substrate plane away from the carrier substrate. The at least one μ-LED here may be attached to the carrier substrate, for example, by bonding, fusing, or as a result of an epitaxial layer process. The μ-LED is configured as a so-called vertical chip, with at least one contact located in a spatial region of the μ-LED remote from the carrier substrate. Thus, the at least one μ-LED has an electrical contact on its upper side facing away from the carrier substrate. The upper side here refers to a side or outer surface region of the μ-LED, at least a portion of which is parallel to the carrier substrate plane.

[0237] Vertical μ-LED configurations are mentioned here, including, but not limited to, a pair of ingots with the aforementioned conversion material between them, vertical or horizontal μ-rods, or antenna structures. Quantum well intermixing may be proposed to supply charge carriers from the edge or fringe of the active layer.

[0238] The electrical contact may be, for example, a metallic or generally conductive surface, the idea being that this surface is in contact with a layer lying on the carrier substrate plane. On top of the emitter tip, the pixel element has an at least partly conductive flat contact layer, which is electrically connected to the electrical contact of the emitter tip.

[0239] In other words, an additional layer may be processed on at least one μ-LED, which is in direct contact with the electrical contacts of at least one μ-LED. For example, this planar contact layer may extend integrally over multiple μ-LEDs and pixel elements. In one embodiment, this contact layer forms a common cathode or a common anode. In one embodiment, the thickness of this contact layer is 80 to 150 nm.

[0240] The planar contact layer is configured to be at least partially transparent to the light emitted by the at least one μ-LED. This means that the light emitted by the at least one μ-LED can at least partially pass through the contact layer. For this purpose, the well-known ITO material can be used, for example. The contact layer is provided with conductor tracks that are electrically and planarly connected to the contact layer. In this case, the electrical conductivity of the conductor tracks is greater than that of the contact layer. The conductor tracks can be configured, for example, planar or as flat surfaces or strips.

[0241] The material of the conductor tracks is selected to have better electrical conductivity properties than, for example, ITO material. In other words, the conductor tracks should bridge spatial regions of low conductivity in the contact layer, resulting in an overall reduction in the electrical resistance across the contact layer (also called improved lateral conductivity). For this purpose, the conductor tracks should be connected to the contact layer at least at two points spaced apart from one another, increasing the conductivity of the conductor tracks, which should reduce the overall resistance of the arrangement from the conductor tracks and the contact layer between these two points.

[0242] For example, conductor tracks can be understood as bus bars, distributor bars, or similar conductive structures. According to one embodiment, the conductor tracks are implemented as spatially separated structures as part of the contact layer itself. This means, for example, that the contact layer is provided with various patterned regions or regions provided with modified materials or substance combinations that have improved electrical conductivity. The material of the conductor tracks can be, for example, silver, aluminum, gold, chromium, or nickel-vanadium.

[0243] According to one embodiment, the contact layer may be arranged in the space between two adjacently arranged μ-LEDs. In other words, due to the configuration and arrangement of the μ-LEDs, there is a space between each μ-LED, which space can advantageously be provided to receive the contact layer. According to one embodiment, the electrical contact of at least one μ-LED is arranged on a side surface of at least one μ-LED. In other words, the contact layer contacts the contact of at least one μ-LED, for example, in the region of the space between the two μ-LEDs.

[0244] In one embodiment, the conductor tracks are arranged between two μ-LEDs arranged adjacently on the carrier substrate, outside the primary emission area of ​​the μ-LEDs. It should be taken into account here that μ-LEDs, due to their structure, emit most of their light laterally and in the direction opposite to the plane of the carrier substrate. It may be desirable here for a high proportion of the light to be emitted vertically as much as possible, i.e., with a conical or ideally Lambertian radiation pattern.

[0245] Therefore, in order to avoid crosstalk, crosstalk and undesired reflections, it is necessary to suppress undesired light components outside this advantageous primary emission area. For this reason, the mostly light-transmitting conductor tracks must not block or limit this primary emission area and are therefore preferably arranged outside this primary emission area or radiation path. This can be made possible in particular by creating a spatial area suitable for this purpose by the space between the μ-LEDs.

[0246] In one embodiment, the conductor tracks are configured to absorb and / or reflect light components of the light emitted by the at least one μ-LED outside the primary emission area for beam shaping of the at least one μ-LED, which means that in addition to the function of improving the electrical conductivity, the conductor tracks can also be used to absorb or reflect the light emitted by the μ-LED.

[0247] That is, the conductor track is strategically positioned around the primary emission area of ​​at least one μ-LED to achieve a beam-shaping effect. For example, the conductor track may be implemented as a flat conductor structure extending annularly around the area of ​​at least one μ-LED. If three μ-LEDs are used as subpixels, each forming a pixel, the conductor structure may extend around each pixel. In another example, beam shaping can be achieved by providing openings in the conductor track through which the emitted light can pass.

[0248] In one aspect, in order to improve the absorption of unwanted light components outside the primary emission area of ​​the μ-LED, the conductor tracks have a light absorbing layer on the side facing the carrier substrate. According to one embodiment, this can be a separately applied layer of absorbing material, but can also be performed by a surface texture on the conductor tracks.

[0249] In one embodiment, the conductor tracks extend over the μ-LEDs in a planar manner. Furthermore, the conductor tracks are provided with cutouts in the region of the primary radiators of each μ-LED for the passage of the light emitted by the respective μ-LED. These cutouts may be, for example, openings, holes, gaps, or other structures through which the light emitted by the μ-LEDs can pass. In other words, the conductor tracks may be provided as a continuous layer or as a continuous element. This allows, in particular, more complex shapes for the openings or cutouts for beam shaping.

[0250] In one embodiment, the conductor tracks are applied to the side of the contact layer facing away from the carrier substrate. In other words, the conductor tracks are arranged on top of the contact layer, for example as an element that is subsequently applied later in the manufacturing process. In another embodiment, the conductor tracks are applied to the side of the contact layer facing the carrier substrate. In other words, when viewed from the carrier substrate, the conductor tracks are located below the ITO contact layer.

[0251] According to a further embodiment, the conductor tracks are applied to a carrier substrate. The adjacent arrangement of several μ-LEDs creates corresponding spaces. These spaces can extend up to the height or level of the carrier substrate itself. In this case, it is conceivable to leave the planarization layer in the region of this space rather than implementing it continuously. A manufacturing advantage here is that the conductor tracks can be produced directly on the carrier substrate and the contact layer can be applied vertically onto the conductor tracks.

[0252] According to one embodiment, at least one μ-LED is arranged in a cavity of a carrier substrate, and the conductor tracks are arranged outside the cavity. For example, the carrier substrate can be understood as a patterned surface that is not continuously flat or planar, but has recesses. The μ-LEDs are arranged in these recesses or pits, and the sidewalls of the recesses can be used as reflective surfaces for beam shaping. To avoid light blocking and absorption, one or more conductor tracks are arranged outside the recesses.

[0253] According to one embodiment, a bonding element is provided on the pixel element for electrically connecting the contact layer to a terminal element of the carrier substrate. The consideration here is that the contact layer arranged on the carrier substrate forms, for example, a common anode or a common cathode and therefore needs to be electrically connected. This can be achieved by a terminal element having one end electrically conductively attached to the contact layer and the other end attached to a conductor structure of the carrier substrate. The terminal element may be arranged, for example, in the outer edge region of one or more pixel elements.

[0254] Another embodiment involves the fabrication of one or more pixel elements for a display. For this purpose, in a first step, a planar carrier substrate is provided, and a plurality of light-emitting structural elements are fabricated on the carrier substrate. The structural elements can be fabricated in a conventional manner by applying, doping, and patterning various semiconductor layers. Typical material systems are based on GaN, including, for example, GaN, GaNP, GaNInP, and GaNA1P. The light-emitting structural elements have their main emission direction facing away from the carrier substrate. Furthermore, electrical contacts are provided on the surfaces of the light-emitting structural elements that do not face the carrier substrate. Furthermore, an at least partially conductive planar contact layer is applied, which is electrically connected to the electrical contacts of the light-emitting structural elements. In one embodiment, the contact layer can extend across the carrier substrate and cover the structural elements. The contact layer is configured to be at least partially transparent to light emitted by the semiconductor component during operation. On the contact layer, at least one conductor track is provided, which is electrically connected to the contact layer and is planarly connected to the contact layer. The electrical conductivity of the conductor track is greater than that of the contact layer.

[0255] The above-presented aspects regarding the reflective layer or mirror can also be applied to other designs of μ-LED implementations, such as the vertical μ-LED design with a circular structure shown below. Various designs based on vertical or horizontal μ-LED architectures are suitable for the production of μ-LED displays. In this case, short switching times and at the same time sufficient current carrying capacity are particularly important. At the same time, the emitted light should already exit as collimated as possible.

[0256] When horizontal μ-LEDs are used, the anode and cathode contacts are typically realized using separate metal lead frames, both located on the underside of the chip. Both the cathode and anode are wired to the metal lead frames at each pixel. When vertical μ-LED chips are used, the anode contacts located on the underside of the chips are realized using separate metal lead frames, while the cathode contacts located on the top side of each chip are realized by a common cathode. In both cases, the leads should be as short as possible to keep parasitic capacitance low.

[0257] As explained above, μ-LEDs are fabricated monolithically or individually, then post-processed on a substrate. The backplane (in the case of a backplane assembly; in monolithic structures, this can double as the substrate, or the growth substrate can be replaced by the backplane) contains the drive and control elements. Regarding drive and control, a distinction is made between passive matrix backplanes with integrated circuitry and active matrix backplanes with TFT circuitry. In passive matrix backplanes with integrated circuitry for driving and controlling the light-emitting diodes, the cathode and anode leads are usually routed directly to the pixel or subpixel. Control of the pixel or subpixel is achieved via microintegrated circuits.

[0258] When an active matrix backplane is implemented, the individual pixels are driven and controlled using integrated TFT circuits (TFT = Thin Film Transistor).

[0259] Therefore, an arrangement has been proposed that allows for short leads to achieve high switching times. Furthermore, a common connection of the cathode and anode is realized. This arrangement is particularly suitable for creating pixels for μ-display modules, which can also be individually addressed and driven. Furthermore, it can be supplemented by other measures, such as the aforementioned mirror wraparound structure. This also reduces optical crosstalk to neighboring pixels in some embodiments.

[0260] According to a first aspect, a device is proposed comprising a substrate and a μ-LED die fixed on one side of the substrate, which has, on the side facing away from the substrate, electrical contacts electrically connected to electrical control contacts by a mirror coating, which at least partially covers the surface of the substrate facing the die.

[0261] The mirror coating thus performs two functions: on the one hand, it serves to direct the light in the direction of emission, and on the other hand, it transports the current. A common cover contact or common cover electrode allows the μ-Display to achieve fast switching times. This makes it possible to offer pulse-width modulation dimmer concepts that improve panel efficiency, among other things, along with improved optical parameters such as the angle dependence of the emission and contrast.

[0262] The method for fabricating such an array begins with preparing a substrate having a number of contacts on its surface, and then attaching a μ-LED die to one of these contacts. This attachment can be achieved using conventional transfer and attachment techniques, some of which are presented in this disclosure. The μ-LED die is mounted as a vertical die, and one of the substrate surfaces also contains contacts. A mirror coating layer is formed on the substrate surface, at least partially covering the surface, and is electrically connected to the electrical control contacts on the substrate surface. In a final step, a transparent cover electrode is formed on the additional contact, making electrical contact with the mirror coating layer.

[0263] Furthermore, the use of a mirror coating can also improve current spreading, current carrying capacity, and switching time in combination with a cavity structure. In this case, such a cavity also serves to improve extraction efficiency, the angular dependence of light emission, and contrast. For this purpose, in some embodiments, the substrate includes a protrusion surrounding the μ-LED die. Alternatively, instead of a protrusion, a cavity may be provided on the surface of the substrate on which the μ-LED die is disposed. In addition to one μ-LED die, three μ-LED dies may also be surrounded or disposed as subpixels to collectively form a pixel.

[0264] In either case, the cavity or protrusion has a mirror coating on its optionally chamfered side surfaces. This structure is similar to that described above. The angle of these sides with the substrate surface can vary depending on the desired characteristics. In particular, this structure can be modified so that the side flanks have a parabolic or other nonlinear slope. In some embodiments, the mirror-around structure disclosed herein can be used. The height of the protrusion or the depth of the cavity is selected so that the μ-LED die is flush with the top surface of the protrusion or cavity. This allows for the cover electrode to be closed. This is particularly advantageous when a mirror coating is placed on the top surface and the cover electrode rests on the mirror coating layer.

[0265] In some embodiments, the spaces between the μ-LED dies or the areas within the protrusions or cavities are filled with a transparent insulating layer, which then surrounds the dies. In particular, the transparent insulating layer closes at the level of the inverted contacts of the dies, so that the cover electrodes rest on the insulating material.

[0266] In some embodiments, the mirrored surfaces arranged on the substrate surface and possibly on the circumferential structure surround not only one but multiple dies. These dies may be configured as redundant dies so that if one chip fails, another chip can take over each time. The circumferentially arranged mirrored surfaces generate more uniform radiation. Similarly, multiple dies for generating light of different wavelengths may be arranged within the circumferentially arranged mirrored surfaces. The mirrored circumferential surfaces can separate different pixels from each other and reduce optical crosstalk between pixels.

[0267] The mirror coating is connected in series with the cover electrode and the substrate control contact and includes highly reflective materials, particularly Al, Ag, AgPdCu, Nd, Nb, La, Au, Cu, Pd, Pt, Mg, Mo, Cr, Ni, Os, Sn, Zn, and alloys or combinations thereof, which also effectively conduct current. The cover electrode may have a transparent conductive oxide layer, particularly ITO or IGZO. Other examples of cover electrode materials include metal oxides, zinc oxide, tin oxide, cadmium oxide, indium-doped tin oxide (ITO), aluminum-doped tin oxide (AZO), Zn2SnO4, CdSnO3, ZnSnO3, and In4SnO. 12 or a mixture of different transparent conductive oxides.

[0268] The transparent insulating layer may comprise SiO or other insulating transparent materials described herein.

[0269] According to a further configuration, direct electrical contact between the cover electrode and the mirror coating can be established by overlapping the surface of the cover electrode with the mirror coating, particularly at the surface of the protrusion or at the edge of the recess or cavity. In this way, a reliable, low-impedance contact can be provided. In particular, if several such cavities or protrusions are arranged in series, the cover electrode can be placed on several mirror coating layers. This allows current to be introduced into the cover electrode over a wide area and at several positions.

[0270] In some embodiments, the mirror coating layer extends partially along the surface of the substrate, particularly around one or more μ-LED dies, thereby enhancing reflection over a broad area even at the substrate surface.

[0271] To ensure contact, direct electrical contact between the cover electrode and the mirror coating is established via through-hole vias or vias in the mirror coating material through the planarization and / or insulating layers. Additional process steps to achieve metallic contact between the conductive oxide of the cover electrode and the contact area on the backplane / substrate are omitted. For example, a simple bridge can be constructed from the ITO cover contact to the CrAl contact area for ACF bonding, enabling further cost savings. These through-hole vias can also be implemented as openings. However, in other configurations, trenches or other structures can be provided in the transparent insulating layer, with a conductive reflective layer applied to the inner walls for contact. This provides good electrical contact on the one hand and creates a reflective structure on the other, resulting in good light reflection in some areas and reduced optical crosstalk.

[0272] The insulating layer may be chamfered at the edge of the pixel, exposing the mirror coating layer there. The cover electrode extends along this inclined surface and contacts the mirror coating layer. In this way, a compact structure can be further provided. The flanks or inner walls of the opening have angles according to the desired radiation pattern. These may correspond to those disclosed herein. In this way, further material damage at the transition edges can be avoided.

[0273] Another aspect concerns the fabrication of pixels or μ-LED modules containing multiple μ-LED dies arranged in rows and columns. Each pixel may be embedded in a cavity or surrounded by a protrusion. A cover electrode can therefore be used as a common connection for multiple such μ-LED dies. Furthermore, the cover electrode can also be provided with an extraction structure. Particular mention should be made here of the photonic structures disclosed herein that are suitable for further collimating the light. The cover electrode can also be provided with a converter. In this way, for example, a type of μ-LED die that produces blue light can be used, and this light can be converted in a conversion layer. In this case, an additional reflective structure can be assembled on the cover electrode to avoid optical crosstalk to other pixels. Furthermore, photonic structures that collimate the converted light are also conceivable.

[0274] Nano light-emitting diode arrays comprising nanocolumns or nanorods applied in a matrix and stacked vertically have been described previously in the context of stimulated emission in slot-type antenna structures in this application. Nanocolumns are characterized by their high aspect ratio, i.e., their height relative to their base plane is typically less than 1 μm. 2 The range is as follows:

[0275] Compared to light-emitting diodes with planarly extended semiconductor layer stacks, the quasi-one-dimensional nature of nanocolumns and the resulting relaxed lattice matching requirements offer the advantage of more flexible material compositions for forming the active layer. This results in improved spectral tuning of the light emission and can also influence the targeted introduction of strain and the determination of the extension of the active layer. This leads to the aforementioned possibility of stimulated emission. However, columns emitting light of different colors can also be created using different material systems and / or strain or doping.

[0276] Depending on the manufacturing variant, the nanocolumns are fabricated starting from a planar semiconductor layer system with layers of different conductivity types (n-type or p-type doping). The active layer of the semiconductor layer system typically has a quantum well structure. Photolithography techniques are then used to pattern the planar semiconductor layer system, at least down to the depth of the active layer, and serve to create nanocolumns with laterally confined disk-shaped active zones.

[0277] A second variation for the fabrication of nano-light-emitting diode arrays starts from a patterned n-type gallium nitride layer on a carrier substrate such as Al2O3, SiC or ZnO, and then deposits a layer of III-V semiconductors, in particular (Al x In y Ga 1-x-y This is achieved by epitaxially growing nanolayer structures in the form of upright nanocolumns of )N. The nanocolumns have a core-shell structure with an elongated core, an active layer covering the core, and a shell layer with a charge carrier polarity different from that of the core material.

[0278] The regions between adjacent nanocolumns are filled with an insulating material that serves as a base for a transparent contact layer, or the top contact layer can form a bridge structure that spans the air-filled areas between the nanocolumns.

[0279] The starting point for the following discussion of improving nano-light-emitting diode arrays is an array having a carrier substrate and nanocolumns at least indirectly connected to the carrier substrate and extending longitudinally from the carrier substrate. Preferably, a matrix arrangement of multiple nanocolumns is present on the carrier substrate. Each nanocolumn has a semiconductor sequence with at least one active layer for generating electromagnetic radiation, configured so that at least a portion of the radiation emission is transverse to the longitudinal direction. According to a proposed concept, a reflector device is arranged on the carrier substrate transverse to the nanocolumns, which at least partially redirects the radiation emission transverse to the longitudinal direction toward a main radiation direction extending parallel to the longitudinal direction. This reduces the radiation angle of the nano-light-emitting diode array, and the thus achieved pre-collimation facilitates beam coupling into subsequent optical components in the beam path.

[0280] In one advantageous configuration, the reflector device comprises a first reflective optical element and a second reflective optical element arranged on different sides of the associated nanocolumn, and advantageously, a further reflector device is provided between each two adjacent nanocolumns.

[0281] The nanocolumns that emit electromagnetic radiation may be part of pixels of a lighting unit or display device. In one possible configuration, each pixel includes a single nanocolumn and a reflector device associated with and surrounding the nanocolumn. In a further configuration, according to some embodiments, a pixel includes multiple nanocolumns, and the reflector device assigned to the pixel may surround the nanocolumns of the pixel. In an alternative configuration, there are multiple reflector devices within a pixel, with each nanocolumn of the pixel being provided with a separate reflector device.

[0282] The pixels may be designed, for example, as RGB pixels, allowing for spectral adaptability of the light emission. In configurations with multiple nanocolumns per pixel, these may be proposed in different colors. It is also conceivable to adjust the color by adapting the active layer of each nanocolumn or by locally embedding the nanocolumns in different light-converting materials. Furthermore, the n-type and / or p-type contacts are patterned to allow pixels and / or parts of pixels, in particular individual nanocolumns or groups of nanocolumns, to be individually energized.

[0283] In one configuration, the nano light emitting diode array has a shaping layer monolithically formed with a layer of semiconductor sequence of nanocolumns, which layers are integrally designed and may result from a common fabrication method or from fabrication steps performed sequentially using the same substrate.

[0284] In some embodiments, the reflector device has a metallic reflective layer and / or a Bragg mirror to improve reflectivity. In another embodiment, the configuration includes a Fresnel lens array incorporated into the reflector device to further improve collimation. In a further design, a wavelength conversion element is arranged in the beam path between the nanocolumns and the reflector device, and a first wavelength conversion element assigned to a first nanocolumn is adapted to emit electromagnetic radiation that is spectrally different from the radiation flux of a second wavelength conversion element assigned to a second nanocolumn. In an alternative configuration of the nano light-emitting diode array, at least some of the nanocolumns have a lateral direction in which no reflector device is arranged. Alternatively, an optical isolator may be provided in this direction between adjacently arranged nanocolumns.

[0285] A method for producing a nano-light-emitting diode array according to these principles comprises photolithographically patterning at least one shaping layer of the reflector device and / or the layers of the nanocolumn semiconductor sequence. Furthermore, it is proposed to pattern the reflector device using an anisotropic etching process as well as to apply an etch-stop layer to form nanocolumns with a high aspect ratio. In a further preferred production method, the shaping layer of the reflector device and / or the layers of the nanocolumn semiconductor sequence are epitaxially grown. A further production variant is provided by a nanostamping process.

[0286] As already mentioned, to reduce light losses, the light exiting the sidewalls is redirected using a reflector layer. Another approach proposes reflective interfaces that are placed directly on the sides of the optoelectronic component. This approach can therefore be implemented not only in monolithic structures but also in single optoelectronic components. Similarly, this approach can also be implemented in the case of μ-LED nanocolumns or semiconductor layer stacks, as has been proposed, for example, in antenna structures.

[0287] In one embodiment, the optoelectronic device comprises at least one optoelectronic light source, in particular in the form of a μ-LED, based on a semiconductor material and having an active zone for generating light, wherein a light exit surface for the generated light is formed on an upper surface of the light source, which in addition to said upper surface has at least one further interface delimiting the light source laterally and / or downwardly, at which interface a dielectric reflector is arranged, which is configured to reflect the generated light.

[0288] In contrast to or in addition to other reflective mirrors, a dielectric reflector is applied directly to the interface. Without the dielectric reflector, light generated by the light source would leak laterally and / or downward, especially into the material of the device's carrier surrounding the light source. The dielectric reflector, on the other hand, at least partially reflects the light incident on the interface back into the light source. Therefore, the use of an electric reflector can at least partially prevent the light from leaking laterally and / or downward from the light source. Ideally, the reflected light would then leak through the light exit surface after further reflection, for example. In this way, the dielectric reflector can increase the amount of light. At the same time, the element is very small.

[0289] The interface may have a side surface that circumferentially surrounds the light source and a lower surface of the light source, the lower surface facing the upper surface. The dielectric reflector may be disposed only on the side surface or only on the lower surface. Alternatively, the dielectric reflector may be disposed on both the side surface and the lower surface. Therefore, the dielectric reflector may be disposed on the entire interface that separates the light source, except for the upper surface. Therefore, the dielectric reflector can surround the entire light source, except for the upper surface, thereby enabling a relatively large amount of light to be emitted.

[0290] The dielectric reflector may have a periodic or aperiodic sequence of overlapping material layers, in which at least two immediately successive material layers have different refractive indices. In particular, the dielectric reflector may be composed of a periodic sequence of two alternating dielectric material layers with different refractive indices. The thickness of the material layers may be adapted to the wavelength of the light emitted by the light source in order to achieve the highest possible reflection.

[0291] Aperiodic sequences of material layers can, at least in some configurations, produce equivalent mirror effects with thinner layers than periodic layer sequences. In particular, dielectric reflectors can be configured as Bragg mirrors, which are well known and are also called distributed Bragg reflectors, abbreviated as DBR.

[0292] Bragg mirrors may be formed from a periodic arrangement of two alternating thin films with different refractive indices. Most of the layers consist of dielectrics based on semiconductor materials. At the interface between two material layers, a portion of the incident light is reflected according to the so-called Fresnel law. Constructive interference occurs between the reflected beams if their wavelengths are close to four times the optical wavelength of each material layer.

[0293] The wavelength range over which the reflectivity of a Bragg mirror is very high, especially for normally incident light, and could, at least theoretically, reach 100% for a large number of alternating layers, is called the stop band. Light whose wavelength falls within the stop band of a Bragg mirror is at least highly reflected and ideally cannot propagate through the Bragg mirror.

[0294] Therefore, a reflector formed as a Bragg mirror is preferably formed so that the wavelength of the light emitted by the light source is located within the stop band, particularly at its center. In this case, the thickness of the material layer of the Bragg reflector is adjusted to the wavelength of the emitted light. In this connection, the optical thickness of the layer is advantageously 1 / 4 of the wavelength of the emitted light. The optical thickness corresponds to the product of the layer thickness and the optical refractive index.

[0295] Some aspects of this concept also relate to an optoelectronic device, such as a display arrangement or a monolithic array, or a headlight, such as a matrix headlight, comprising a plurality of the proposed optoelectronic devices, the light sources of which are arranged in an array. Each light source can form a pixel of the display arrangement or the monolithic array. Each light source can be proposed to emit light of one of a plurality of predetermined colors, for example, red, green, and blue. Each light source can form a subpixel of a pixel, the pixel being formed by a plurality of light sources, each emitting light of one of the colors.

[0296] The light source of the optoelectronic device may be embedded in the carrier, in particular so that only the light-emitting surface of the light source presents an open outer surface, while each interface of the light source is surrounded by the carrier material. In this regard, a dielectric reflector of the optoelectronic device may be arranged between the light source and the interface of the carrier material. For example, the carrier may be composed of one or more layers of semiconductor material. Each layer may contain electronic circuits, for example, in the form of one or more planar conductor tracks. Similarly, electronic circuits may be present for supplying and controlling the light source. For example, the current supply of the light source may be carried out by the conductor tracks.

[0297] A further aspect of the presented concept also relates to a method for manufacturing an optoelectronic device, in particular a display device or a headlight, in which an optoelectronic light source based on a semiconductor material is provided, the light source having an active zone for generating light and, on its upper surface, a light exit surface for the generated light, and a dielectric reflector arranged on at least one interface of the light source, the dielectric reflector being configured to reflect the generated light, and the interface delimiting the light source laterally and / or downwardly.

[0298] The interface may form the remaining outer surface of the light source except for the top surface, and the reflector may cover all or at least a portion of the interface.

[0299] Also provided are methods for manufacturing optoelectronic devices, such as display arrangements or headlight arrays. In some aspects, the methods involve arranging a number of light sources of optoelectronic devices according to the present invention in an array, with only the light source exit faces presenting open outer surfaces, while the carrier material is embedded in the carrier to surround the interfaces of the light sources. A dielectric reflector may also be positioned between the carrier material and each interface of the light sources. This step may be performed before embedding the light sources in the carrier.

[0300] The proposed concept also relates to a method for manufacturing an optoelectronic device, for example a monolithic array or a headlight, in particular using a plurality of the proposed optoelectronic devices or μ-LEDs, in which a number of optoelectronic light sources based on semiconductor material are arranged in an array on a carrier, each having an active zone for generating light and an open outer upper surface as a light exit surface for the light, and for each light source a dielectric reflector is arranged on at least one interface that laterally and / or downwardly separates the light source relative to the material of the carrier, which is configured to reflect the generated light.

[0301] The deposition of the dielectric reflector may involve depositing the dielectric reflector material using atomic layer deposition, also known as "atomic layer deposition." Here, the material for forming the dielectric reflector may be deposited in extremely thin layers. Layer thicknesses equivalent to a monolayer of atoms can be achieved. This allows for the deposition of layers of precisely defined thickness even on non-planar (e.g., curved) surfaces. Atomic layer deposition allows for the easy production of reflectors, particularly Bragg mirror types.

[0302] The dielectric layer of the reflector with a high refractive index can be made of, for example, Nb2O5, TiO2, ZrO2, HfO2, Al2O3, Ta2O5, or ZnO, while the dielectric layer with a low refractive index can be made of, for example, SiO2, SiN, SiON, or MgF2.

[0303] The deposition of the dielectric reflector may involve applying the material of at least one layer of the dielectric reflector by a first method and depositing the material of the other layers by a second method. In particular, the layer directly adjacent to the interface of the light source may be deposited by the first method. The first method may be, for example, a vapor deposition method such as CVD (chemical vapor deposition) or PE-CVD (plasma-enhanced chemical vapor deposition). This allows for covering interface irregularities, e.g., rough surfaces caused by etching processes, with a more conformal deposition. Further layers of the dielectric mirror can then be fabricated on the smooth surface.

[0304] The second method can be atomic layer deposition, which allows the formation of a layer of dielectric reflector with a defined thickness.

[0305] A further aspect also relates to a method for manufacturing an optoelectronic apparatus, or in particular a multitude of optoelectronic devices as presented herein, in which optoelectronic light sources based on semiconductor material are arranged in an array on a carrier, each light source having an active zone for generating light and an open outer upper surface on the top surface as a light exit surface for the light, the light sources are arranged so that there are at least slight gaps between adjacent light sources on the top surface and spaces behind them, and for each light source, a dielectric reflector formed to reflect the generated light is arranged on at least one interface that separates the light source laterally and / or downwardly with respect to the material of the carrier, the dielectric reflector of the light source is formed by introducing a material for the dielectric reflector from the top surface into each gap between adjacent light sources, for example by atomic layer deposition, and the dielectric reflector is formed in each space located behind the gap.

[0306] At least the light output surface of the light source may be covered with a photomask, and a dielectric reflector may be formed in the space at the same time. The photomask can be removed after the reflector is completed. An example of a headlamp may be a matrix headlamp. Therefore, the headlight assembly may be a matrix headlight assembly.

[0307] Another aspect concerns improving the radiation pattern of μ-LEDs by adding a dielectric filter with an additional reflective surface. An optoelectronic component, particularly a μ-LED, according to the first aspect of the present disclosure includes at least a semiconductor device, a dielectric filter, and a reflective material. Furthermore, the optoelectronic component may include, for example, the components described herein.

[0308] At least one semiconductor element includes an active zone configured to generate light. This may be configured as a vertical or horizontal μ-LED. To increase the efficiency of the element, measures such as quantum well intermixing are possible. Furthermore, the at least one semiconductor element has a first major surface, a second major surface opposite the first major surface, and a side surface extending between the two major surfaces. For example, the at least one semiconductor element may have three or more side surfaces. However, it is also conceivable that the at least one semiconductor element has a rounded major surface and therefore only one aspect.

[0309] The dielectric filter is disposed on a first main surface of the at least one semiconductor element and is configured to transmit or pass only light incident on the dielectric filter in a predetermined direction.

[0310] For example, the dielectric filter may be configured to transmit light only within a predetermined cone angle. The cone angle is oriented such that its axis is perpendicular to the first main surface of the at least one semiconductor element. The angle between the outer surface or base of the cone and the axis of the cone, i.e., the half-opening angle of the cone, may have a predetermined value. For example, the half-opening angle of the cone may be at most 5°, at most 15°, at most 30°, or at most 60°. Light components incident on the dielectric filter from the semiconductor element at angles within the predetermined cone angle are transmitted, while the remaining light components are substantially not transmitted and are, for example, reflected back to the semiconductor element. This allows for high directionality of light emitted from the optoelectronic device.

[0311] The dielectric filter may be configured to have a very small cone angle and opening angle, such that only light that exits the semiconductor device normal to the first major surface is transmitted by the dielectric filter.

[0312] A dielectric filter may consist of a stack of dielectric layers, which are applied to a semiconductor device by coating and have particularly high transmittance. For example, the dielectric layers in the stack may have alternating low and high refractive indices. Examples of materials for the high-refractive-index dielectric layers include Nb2O5, TiO2, ZrO2, HfO2, Al2O3, Ta2O5, or ZnO. Examples of materials for the low-refractive-index dielectric layers include SiO2, SiN, SiON, or MgF2. A stack of dielectric layers with alternating high and low refractive indices may be configured as a Bragg filter. Furthermore, the dielectric filter may be a photonic crystal.

[0313] A reflective material is deposited on one or more sides of the at least one semiconductor element and the dielectric filter. The reflective material may cover at least one or more or all sides of the at least one semiconductor element. Similarly, the reflective material may cover at least one or more or all sides of the dielectric filter. In one configuration, the reflective material completely surrounds both the at least one semiconductor element and the dielectric filter laterally.

[0314] The reflective material may be reflective to light emitted by the at least one semiconductor element or at least a portion of the wavelength range of this light, such that light exiting through the side of the at least one semiconductor element or the dielectric filter is reflected back, thereby increasing the efficiency of the optoelectronic component.

[0315] A plurality of structural elements may be proposed. These may also comprise one or more semiconductor elements having the above-mentioned properties. A dielectric filter is disposed on each of the semiconductor elements. Furthermore, the semiconductor elements are surrounded by a reflective material. Additionally or alternatively, a plurality of structural elements comprising semiconductor elements may be surrounded by such a mirror. For example, such a configuration may provide redundancy, so that if one semiconductor element fails, the redundant semiconductor element can take over its function. For example, the semiconductor elements may be arranged in an array, i.e., in a regularly arranged structure.

[0316] The optoelectronic components may be integrated into a display, i.e., a display device. Each semiconductor component may represent or constitute a pixel of the display. Furthermore, each semiconductor component may represent a subpixel of a pixel, and each pixel may be formed from multiple subpixels that emit light having, for example, red, green, and blue colors.

[0317] A reflective material laterally surrounding the individual semiconductor elements and their respective dielectric filters allows for high contrast between adjacent pixels. Furthermore, high pixel densities are possible. According to one configuration, the semiconductor elements are configured as μ-LEDs. μ-LEDs have a small lateral extent of their light-emitting surface, especially in the μm range. In contrast to monolithic arrays of μ-LEDs, the individual μ-LEDs form self-contained units and can be individually positioned and moved at large distances from one another. The light emitted by the semiconductor elements can be, for example, in the visible range, ultraviolet (UV) light, and / or infrared (IR) light.

[0318] In addition to displays, optoelectronic components according to the first aspect of the present application can also be used, for example, in AR (Augmented Reality; erweiterte Realitaet) applications and other applications of pixelated arrays or pixelated light sources.

[0319] According to one embodiment, at least one or more or all side surfaces of the at least one semiconductor element extend at an angle with respect to the height of the active zone. This means that at least a portion of each side surface forms an angle with the first main surface of the at least one semiconductor element that is not 90°, and in particular is less than 90°. The at least one semiconductor element may be chamfered over its entire height or only partially chamfered, but in either case, the active zone is preferably located in the chamfered region. The fully or partially chamfered side surface may form an interface with an insulating layer having a low refractive index. Light emitted horizontally is reflected by the chamfered side surface toward the surface of the component.

[0320] At least one semiconductor element may have a first electrical terminal and a second electrical terminal. For example, one terminal may represent a cathode and the other terminal may represent an anode. Furthermore, the reflective material may be electrically conductive and electrically coupled to the first terminal of the at least one semiconductor element. In particular, the first terminal may be connected to an n-type doped region of the at least one semiconductor element. As a result, the reflective material provides optical isolation between adjacent pixels while simultaneously providing electrical contact to the at least one semiconductor element.

[0321] In the case of multiple optoelectronic components comprising multiple semiconductor elements, the reflective and conductive materials surrounding each semiconductor element may be interconnected, allowing the first terminals of the semiconductor elements to be controlled together from the outside. In this case, the second contacts of the semiconductor elements may be individually drivable, for example, via the underside of the semiconductor element. This configuration is advantageous for manufacturing, since only one contact needs to be defined with good resolution, and also facilitates the fabrication of very small pixels where providing two separate contacts on the underside of the chip would not provide enough space. The reflective material may be, for example, metal, contain metal, or be electro-deposited.

[0322] A reflective layer may be disposed below the second main surface of the at least one semiconductor element. This allows light emitted through the second main surface to be reflected back into the semiconductor element and completely exit the optoelectronic component through the top surface. Furthermore, the reflective layer may be electrically conductive and electrically coupled to a second terminal of the at least one semiconductor element. For example, the second terminal may be connected to a p-type doped region of the at least one semiconductor element. As a result, in addition to its reflective properties, the reflective layer also serves to establish electrical contact with the at least one semiconductor element. It may also be proposed to enable the second terminal of each semiconductor element to be individually controlled.

[0323] The reflective layer may, but need not, be made of the same material as the reflective material, for example, a metal.

[0324] Alternatively, the reflective layer may be electrically insulating, and one or more conductive layers may be arranged above and / or below the reflective layer, in particular connected to the second contact of the at least one semiconductor element. In this case, the reflective layer may be, for example, a dielectric mirror, in particular arranged on a metal layer. Electrical contact is then established via feedthroughs through the dielectric layer or via the side surfaces of the dielectric layer. Furthermore, a conductive, transparent layer may be arranged above the reflective layer, i.e., between the at least one semiconductor element and the reflective layer. For example, indium tin oxide (ITO) may be used as the material for the conductive, transparent layer.

[0325] In one configuration, a silver mirror is disposed beneath a conductive, transparent layer, e.g., of indium tin oxide, and a dielectric mirror, or alternatively, only a conductive, transparent layer, e.g., of indium tin oxide, and a silver mirror are disposed beneath at least one semiconductor element.

[0326] An electrically insulating first material may be disposed between the reflective material and the reflective layer. Furthermore, the electrically insulating first material may be in direct contact with one or more side surfaces of the at least one semiconductor element, particularly the chamfered portions of the side surfaces. Furthermore, the electrically insulating first material may have a lower refractive index than the at least one semiconductor element, particularly in the region of the interface with the electrically insulating first material. As a result, the electrically insulating first material causes electrical insulation between the first terminal and the second terminal of the at least one semiconductor element. Furthermore, the refractive index contrast may allow light to be reflected back at the interface between the at least one semiconductor element and the electrically insulating first material.

[0327] The electrically insulating first material may consist of, for example, SiO2 and may be deposited by vapor deposition using, for example, TEOS (tetraethyl orthosilicate) or by other methods based on, for example, silane, to allow for high aspect ratios.

[0328] A layer having a roughened surface configured to redirect or scatter light may be disposed between the at least one semiconductor element and the dielectric filter, i.e., on a first major surface of the at least one semiconductor element. The layer may have a Lambertian radiation pattern. Furthermore, the layer may be configured to redirect light components that are above the critical angle for total internal reflection, thereby essentially extracting all components and not leaving them "trapped" within the component.

[0329] The layers described above may consist, for example, of randomly or deterministically patterned semiconductor surfaces. The surfaces may have roughened structures with sloping flanks, the height of which, in the case of μ-LEDs, is up to a few hundred nanometers. The roughened structures can be produced, for example, by etching.

[0330] Furthermore, it is also possible to not use the above-mentioned layer and instead roughen the first main surface of the at least one semiconductor element. For this purpose, a random or deterministic topology can be etched into the first main surface, for example, in order to achieve a Lambertian radiation pattern in particular. The roughened first main surface of the at least one semiconductor element can have the same properties as the roughened surface of the above-mentioned layer.

[0331] On the roughened surface of at least one semiconductor element or layer arranged on said semiconductor element, a further layer, for example made of SiO2, having a refractive index different from that of the underlying layer and further having a flat upper surface, may be deposited, which allows for the application of a dielectric filter by means of its flat upper surface while at the same time maintaining the functionality of the roughened surface of the underlying layer due to the refractive index difference.

[0332] Due to the small lateral extent of the pixel of at most 50 μm, it is possible to reduce the height of the at least one semiconductor element in the μm range. In particular, the at least one semiconductor element may have a lateral extent or edge length of at most 50 μm and / or a height of at most 1 μm to 2 μm.

[0333] As mentioned above, a device can include a plurality of optoelectronic components, which can have the configurations described herein. Each of the semiconductor elements of the components can be completely laterally surrounded by a reflective material, together with an associated dielectric filter and a reflective layer disposed below the respective semiconductor element. According to one configuration, the semiconductor elements are arranged in an array, with adjacent semiconductor elements separated from each other by the reflective material. As a result, the reflective material forms a grid, and adjacent semiconductor elements are separated from each other only by the grid.

[0334] If the reflective material is also electrically conductive, the first terminals of all the semiconductor elements may be connected to a common external terminal via the reflective material, and the second terminals of the semiconductor elements may be individually controllable.

[0335] According to an alternative configuration, multiple semiconductor elements, each laterally surrounded by a reflective material, are juxtaposed, with an electrically insulating second material disposed between adjacent semiconductor elements, which may be, for example, a potting material.

[0336] In this configuration, the reflective material may be electrically conductive. Conductor tracks may extend above and / or below and / or within the electrically insulating second material to connect the first terminals of the semiconductor elements to a common external terminal. The second terminals of the semiconductor elements may be individually drivable.

[0337] A method according to a second aspect of the present application is used for manufacturing an optoelectronic component. The method includes providing at least one semiconductor element having an active zone configured to generate light and disposing a dielectric filter on a first main surface of the at least one semiconductor element. The dielectric filter is configured to transmit only light in a predetermined direction. Furthermore, a reflective material is disposed or deposited on at least one side of the at least one semiconductor element and at least one side of the dielectric filter.

[0338] A method for manufacturing an optoelectronic device according to the second aspect of the present application may comprise the above-mentioned configuration of an optoelectronic component according to the first aspect of the present application.

[0339] In the following, we will look in detail at aspects of processes and methods for manufacturing μ-LEDs or μ-displays or modules, but as already explained, aspects of processes also include the processing of semiconductor structures or materials, and vice versa. In this respect, the following aspects can be easily combined with the previous ones.

[0340] Due to the manufacturing process and the very small dimensions of the individual optical elements, individual pixel elements can become defective within the display's many pixels. This problem is exacerbated in monolithic μ-Display modules, as defects or variations in manufacturing can quickly lead to pixel failure due to their small size. Monolithic displays, in particular, cannot replace individual defective pixels, so a high defect density necessitates replacing the entire module.

[0341] For example, known solutions attempt to compensate for the missing light of a defective pixel by setting surrounding or adjacent pixels to a higher brightness, so that the missing light from the defective pixel can be at least partially compensated for. In many cases, replacing or repairing these defective pixels does not seem economically or process-wise feasible, so it is desirable to be able to use manufactured displays of sufficiently good quality even with individual defective pixels.

[0342] The following aspects of pixel elements with electrically isolated and optically coupled sub-pixels can compensate for such small defects, thereby improving yield while maintaining the quality of the μ-display or μ-display module.

[0343] These aspects take into account the use of suitable measures to prevent optical crosstalk. The proposed measures are not only suitable for the above-mentioned tasks, but also have additional advantages, especially when μ-LEDs are very close to each other in monolithic structure devices and good optical isolation must be achieved. In the case of very densely packed monolithic arrays or μ-displays or μ-display modules, clean optical isolation between pixels is necessary so that the light emitted by the μ-LEDs does not radiate into the area of ​​adjacent pixels. To prevent optical crosstalk, trenches (or more generally, optically isolating structures) are often provided between two μ-LEDs. On the one hand, optical crosstalk must be suppressed to achieve sufficiently good high-contrast image quality, but this can make pixel failures very noticeable.

[0344] Therefore, an optical pixel element for generating a pixel of a display is proposed, which is formed by at least two subpixels. According to one embodiment, a pixel element is provided with 2, 4, 6, 9, 12, or 16 subpixels. In other words, two subpixels receive the same drive control information and are implemented, for example, for the same wavelength, providing redundancy. Therefore, even if one of these at least two subpixels fails, the pixel element can still emit light of that wavelength. According to one embodiment, the brightness of the subpixel can be adjusted to compensate for the lack of light of the failed subpixel. According to one embodiment, the subpixels are implemented as so-called fields. For example, if the pixel element is implemented in a rectangular structure, the subpixels within the pixel element structure are again divided into fields, which are formed. Each of these subpixels can be driven and controlled independently of the subpixels of the other fields.

[0345] Each subpixel has an optical emitter region, which allows each subpixel to be individually controlled and function autonomously. The emitter region contains a pn junction, one or more quantum wells, or other active layers for generating light. Contacts are mounted on the underside of the emitter region for connection to a control unit or electronic control circuitry.

[0346] The drive control electronics are configured to electrically control individual pixel elements and individual subpixels. For example, the drive control electronics or control device may be configured to detect a subpixel defect and subsequently disable the defective subpixel. Furthermore, according to one embodiment, the drive control electronics may be configured to drive adjacent subpixels to increase their luminance, so that the luminance of the neighboring failed subpixel is compensated for. For this purpose, the drive control electronics may be provided with, for example, a storage unit for storing the operating states of the subpixels. In other words, in this case, the detected defective subpixels can be detected intensively in order to adjust their luminance or compensate for the defect of the neighboring subpixels or pixel elements by turning them on or off, if necessary. In other configurations, for example, the active time of a subpixel may be increased to compensate for the failed subpixel. On the other hand, if all subpixels are functional, the drive control circuit may drive all subpixels individually with reduced luminance, reduced duration, or multiplexed. By utilizing functional subpixels with lower current and / or duration, the lifetime of the subpixels can be extended.

[0347] A subpixel separation element is provided to separate two adjacent subpixels from each other within a pixel element. This subpixel separation element has the effect of electrically separating the drive control of each emitter chip or the drive control of the subpixel. In other words, the subpixel separation element may be configured to prevent electrical interaction between the emitter chips of adjacent subpixels.

[0348] In particular, due to the use of semiconductors and the short distances between the emitter regions of individual subpixels in the μm range, driving the emitter tips can have secondary electrical or electromagnetic effects on spatially adjacent or surrounding areas. This can lead to, under certain circumstances, driving a primary emitter tip causing activation of adjacent emitter tips as well. Therefore, the subpixel separation elements are configured to prevent electrical crosstalk to adjacent subpixels and possible activation of adjacent subpixels.

[0349] On the other hand, the subpixel separation elements are configured to optically couple light emitted from the emitter chips of adjacent subpixels, thus eliminating the visual impression that individual subpixels are turned off. Optically coupling means that light generated by a primary emitter chip or primary subpixel can penetrate into adjacent subpixels due to optical crosstalk. In this way, the formation of black dots or black spots due to subpixel defects can be advantageously prevented. Instead, light can penetrate from adjacent subpixels and be emitted in the light-emitting direction from the defective subpixel. This advantageously corrects the visible effects of the defective subpixel. Therefore, the subpixel separation elements do not have or achieve any optical separation effect.

[0350] This is advantageous if one subpixel fails. Because it is not optically isolated, the pixel is still perceived as a whole and does not give a different visual impression than if both subpixels were active. In one embodiment, the subpixel isolation element may electrically isolate but not optically isolate, or may optically promote crosstalk. In one variation, the subpixel isolation element extends only to the front or into the active layers of the two subpixels. In other words, the subpixel isolation element electrically isolates two subpixel elements that are connected via a common layer.

[0351] In one embodiment, the subpixels share a common epitaxial layer. Often, pixel elements or entire displays are configured with a common layer or multiple overlapping layers grown to interconnect multiple subpixels and / or pixel elements. This can be used, for example, to provide a common electrical contact or connection. According to one embodiment, the epitaxial layer comprises a group III element such as gallium, indium, or aluminum, and a group V element such as nitrogen, arsenic, or phosphorus, or a combination thereof, or a material system comprising the aforementioned elements. This can, among other things, affect the color and wavelength of the emitted light of the light-emitting diode. The epitaxial layer can also comprise an active semiconductor layer, i.e., p-type doped regions and n-type doped regions, including, for example, an active boundary region.

[0352] For example, an emitter chip is arranged on a first surface of the epitaxial layer transverse to the longitudinal extension of the epitaxial layer plane. In this case, light from the emitter chip is emitted transversely to the epitaxial layer toward a second, opposing surface of the epitaxial layer and is emitted therefrom. The subpixel separating elements extend in a trench-like manner from the first surface of the epitaxial layer, on which the emitter chip or μ-LED is arranged, transversely to the epitaxial layer plane.

[0353] In other words, the subpixel separation elements are implemented herein as recesses, gaps, slots, or other structures, which may further be filled with an electrically insulating material. The insulating material is preferably optically transparent to facilitate optical crosstalk. Here, according to one embodiment, the length of the trench is selected so that drive control signals to one subpixel do not electrically crosstalk with a second adjacent subpixel of the same pixel. In particular, such trench-like structures significantly extend the current flow path, thereby increasing electrical resistance and thereby creating electrical decoupling.

[0354] The optical effect on the emitted light is also related to the region of the epitaxial layer that is more centrally located or towards the second, more distant face of the epitaxial layer. That is, the depth of the trench is selected to ensure electrical decoupling, but on the other hand, the trench terminates before the region of the epitaxial layer where light can travel between two adjacent subpixels. The emission direction of the emitter tip extends, for example, transversely to the epitaxial layer, allowing light to exit at the opposite second face.

[0355] In one embodiment, the trench extends perpendicular to the epitaxial layer plane. In another embodiment, the trench length d1 is less than the total thickness of the epitaxial layer, assuming the trench extends in this manner. In this case, the epitaxial layer has at least approximately the same total thickness across multiple pixel elements and subpixels. In another embodiment, the trench length d1 between pixel elements is the same as the thickness of the epitaxial layer. In other words, the trench extends continuously from the first surface of the epitaxial layer to the second surface. In another embodiment, the trench extends continuously and obliquely through the epitaxial layer at an angle between 0 and 90 degrees relative to the epitaxial layer plane.

[0356] In one embodiment, each pixel element or subpixel element thereof includes multiple semiconductor layers in a layer sequence, and further includes an active layer for generating light. The active layer may include a structure such as a quantum well configured for generating light. In one embodiment, one or more layers are spread across multiple pixels or subpixels. For example, it may be proposed that the active layer is spread across multiple color subpixels.

[0357] In one embodiment, subpixels or pixel elements can be electrically contacted and / or driven independently of one another. For example, contacts can be provided on the surface of the subpixel away from the epitaxial layer. These can be, for example, mechanical contacts, solder connections, clamp connections, etc. Importantly, individual subpixels can be contacted and electrically manipulated without substantial interaction with adjacent subpixels. This is particularly advantageous for detecting the functional or operational state of subpixels, since diagnostic information can be generated for each individual subpixel individually. Similarly, it can be advantageous to turn individual subpixels on and off without relying on adjacent subpixels. This allows multiple subpixels to be operated simultaneously at lower light intensities, thereby reducing thermal or other stresses on the subpixels even at higher light intensities.

[0358] According to a further aspect, the individual subpixels are contacted via a carrier substrate. The carrier substrate is intended to provide mechanical stability on the one hand, and at the same time to incorporate fine conductor structures for individually contacting the individual subpixels on the other hand. Further elements, such as electronic drive and control circuits or driver circuits, can also be integrated into the carrier substrate, in particular a silicon wafer. This can have the same material system, or a different material system via a matching layer. In this way, silicon can also be used as the carrier material. This allows for easy implementation of circuits, particularly for drive and control, on this carrier.

[0359] According to one embodiment, the brightness of a pixel element can be adjusted by turning individual subpixels off or on. An advantage of this is that a single off or on switch already provides effective brightness control. This can, for example, significantly simplify the drive control electronics or control unit. In another example, the brightness of one or more subpixels of a pixel element can be additionally adjusted. This allows for finer brightness gradations and more precise adjustment or calibration of the color spectrum due to the interaction of different wavelengths of subpixels of the same pixel element. Brightness adjustment can be performed using PWM drive control. Even if a subpixel fails, the PWM drive control can be appropriately extended to ensure equivalent brightness. Conversely, if a subpixel is not defective, adjusting the PWM drive control allows the subpixel to operate at its maximum efficiency, resulting in less thermal stress and, ultimately, a longer lifetime.

[0360] For example, if eight sub-pixels are patterned on one pixel element, then 2 3 In other words, this modified configuration can achieve a dynamic range of 2^3 levels of brightness. 3 This can be increased by a factor of (2^3), which in turn reduces the complexity of electronic control devices and the associated costs.

[0361] In another aspect, a μ-display is proposed having a plurality of pixel elements as described above and below. According to one aspect, such a μ-display may be an optical semiconductor display for applications in the augmented reality or automotive fields, where small displays with very high resolution are used. Similarly, such displays may be used in wearable devices, such as smart watches or wearables.

[0362] A pixel element isolation layer is provided between two adjacent pixel elements. This is configured to electrically isolate adjacent pixel elements for driving and controlling each pixel element. Furthermore, the pixel element isolation layer is configured to provide optical isolation for light emitted from the pixel elements. A pixel element isolation layer can be understood abstractly as any structure or material that isolates two pixel elements from each other. Typically, a large number of such pixel elements are arranged side by side on a plane, e.g., a support surface, and connected to a driving and control electronic circuit via contacts. In this way, a display can be formed as a whole.

[0363] The electrical and electromagnetic isolation ensures that pixel elements can be driven independently of neighboring pixel elements, with minimal or no electrical or electromagnetic interaction, and especially no optical interaction. This is important for the sole reason that each pixel can be generated independently of the others to display specific image content on the display. This optical isolation is also necessary to ensure that the individual pixels have sufficient sharpness and contrast or definition relative to each other on the display.

[0364] In one embodiment, multiple pixel elements share a common epitaxial layer. The pixel element isolation layer is configured as a trench and extends laterally relative to the epitaxial layer surface in the light-emitting direction of the emitter tip. In other words, the pixel element isolation layer is configured as a recess, such as a trench, slit, or slot, and does not contain a solid material or contains, for example, a reflective or absorbing material. In one example, the pixel isolation element is filled with an insulating material incorporating a mirror layer. The insulating material electrically isolates two adjacent pixels, and the mirror element prevents optical crosstalk. In some configurations, the mirror element also provides or facilitates light collimation.

[0365] The pixel element isolation layer is intended to prevent electrical or electromagnetic signals from being transmitted from one pixel element to another. At the same time, the pixel element isolation layer is intended to minimize or prevent light from being emitted from one pixel element to an adjacent pixel element. In one example, the pixel element isolation layer can be formed only by arranging two separated pixel elements adjacent to each other during placement, thereby creating corresponding insulating or reflective interface layers. According to one embodiment, the trench is perpendicular to the epitaxial layer plane, and the length of the pixel element isolation layer is equal to or less than the thickness of the epitaxial layer.

[0366] According to further aspects, the trench depth of the pixel element isolation layer is greater than the trench depth of the subpixel isolation layer. This has the advantage, among other things, that the increased length of the pixel element isolation layer allows for both electrical and optical isolation. On the other hand, a shallower trench depth between subpixels only provides electrical isolation, although optical crosstalk may be desirable. In some aspects, the pixel element isolation layer depth extends through and separates the active layer of a second adjacent pixel. Furthermore, the pixel element isolation layer may extend to or just below the emitting surface.

[0367] In another aspect, a method for calibrating pixel elements is proposed. This method is based on the idea that optimal driving control should be possible when the display is turned on. This means, for example, that defective subpixels are detected as such and, if necessary, no further driving control is performed thereafter. This can, for example, avoid error messages or malfunctions. The structure of the pixel element with subpixels allows each subpixel to be driven and tested individually.

[0368] To this end, in a first step, the sub-pixels of the pixel element are driven, for example, by a drive control electronic circuit or a control unit. In a second step, defect information of the sub-pixels is detected. In other words, the drive control electronic circuit may be designed and configured in such a way that malfunctions or defects are detected. For this purpose, for example, the current intensity can be measured or other electrical parameters can be evaluated.

[0369] In a further step, the defect information is stored in a memory unit of the control unit. This information can be used, for example, to optimize the drive control by the drive control electronics. For example, if a certain brightness is desired and it is known that a certain subpixel is defective, the drive control electronics can appropriately differentiate and drive adjacent subpixels in order to, for example, correct the brightness. As a result, even if a subpixel is defective, the intensity of the light emitted by the pixel element will not change at all or will only change very little, and will not be noticeable to the viewer.

[0370] In another aspect of the method, the drive control, sensing and storage is performed sequentially for all individual sub-pixels of the pixel element. In other words, the drive control electronics may be configured to sequentially check all sub-pixels available by individually addressable emitter tips in order to detect the functional state of the entire pixel element. According to one embodiment, this may be done once when the display is powered on, or after a certain time has passed.

[0371] An extension of pixelated or other emitters with reduced optical and electrical crosstalk is presented in the following concepts.

[0372] In conventional monolithic pixel arrays, it is common practice in some embodiments to etch the active zone to separate individual pixels and make them individually addressable. However, the etching process of the active layer introduces defects that can lead to increased leakage current at the edges, on the one hand, and to additional non-radiative recombination, on the other hand. The smaller the pixel, the substantially larger the relative damage area. Traditionally, the edges of the etched active zone have been passivated by various methods. These methods include regrowth, deposition of an in situ passivation layer, diffusion of species to shift the p-n junction and increase the bandgap around the active zone, and wet etch cleaning to remove as much damage as possible.

[0373] According to the proposed principle, a pixel structure is proposed with a material bridge that includes at least the active layer, which makes it possible to reduce the increase in defect density in the region of the active layer.

[0374] Thus, an array of optoelectronic pixels or subpixels, in particular a micropixel-emitter array, a micropixel-detector array, or a combined micropixel-detector-emitter array, comprises each pixel or subpixel forming an active zone between an n-type doped layer and a p-type doped layer. According to the proposed principle, between two adjacently formed pixels, the material of the layer sequence is interrupted or removed from the n-type doped side and the p-type doped side up to or into the cladding layer, or up to or at least partially into the active zone. In this way, a maximum thickness d c This results in a material transition of less than 100%, which reduces the electrical and / or optical conductivity at the material transition.

[0375] According to a second aspect, a method for fabricating an array of optoelectronic pixels or subpixels is proposed, in which in a first step, a generally planar layer sequence having n-type and p-type doped layers is provided along the array, and an active zone suitable for emitting light is formed between these layers. Subsequently, between adjacent pixels to be formed, material of the layer sequence is removed from the n-type and p-type doped sides down to or into the undoped cladding layer, or just before or up to the active zone. This removal may be performed by an etching process. However, after removal, a material transition remains between adjacent pixels, including the active zone and, optionally, small regions above, below, or on both sides. This is because the maximum thickness d at which the electrical and / or optical conductivity is effectively reduced by the material transition is determined. c Includes:

[0376] The proposed concept allows for the creation of an area-wide array of pixels. While the etching process removes material, it leaves behind a material transition, including the active layer, between adjacent pixels or subpixels. Therefore, the etching process does not result in a high defect density in the active layer, particularly in the pixel region. However, individual pixels or subpixels are optically and electrically isolated from one another. Therefore, it is proposed to fabricate micropixel-emitter arrays and micropixel-detector arrays formed of micropixels without etching through the active zone, to avoid optical and electrical crosstalk and a reduction in the performance and reliability of the etched active zone. In this way, etching defects are avoided or the number of defects is effectively reduced.

[0377] The terms pixel and subpixel refer to the μ-LEDs that emit light when activated. In principle, multiple subpixels of different colors are combined to form a pixel, also called a picture element.

[0378] According to one embodiment, the removed material may be at least partially replaced with a filling material. In other words, after partial removal of material, in particular an n-doped or p-doped layer, the resulting space is refilled to obtain a planar surface, which can provide mechanical support, bonding and / or electrical insulation functions.

[0379] According to a further configuration, the removed material can be at least partially replaced with a material that has a relatively small bandgap and thus absorbs the light of the active zone. This effectively reduces optical crosstalk. Alternatively, at least a portion of the removed material can be replaced with a material that has a high refractive index, in particular a refractive index higher than that of the cladding layer or the active zone. This effectively creates a high-refractive-index interface that prevents the fundamental mode from propagating. Furthermore, alternatively, in one embodiment, a light-absorbing material and / or a material with a high refractive index can be applied to each material transition. In this way, such a material can influence the waveguide of the material transition, thereby preventing crosstalk.

[0380] According to a further aspect, the material with a high refractive index can be formed by diffusing or injecting a material that increases the refractive index into the fill material, especially into the respective cladding layer, thus effectively improving the array with respect to crosstalk in a simple manner that does not require etching.

[0381] Another aspect concerns the reduction of electrical crosstalk. Materials that increase optical absorption and / or electrical resistance can be introduced into the active zone of each material transition. The corresponding method is relatively simple. In this way, the array can be effectively improved in terms of crosstalk in a simple manner that does not require etching.

[0382] According to a further aspect, at least one optical structure, in particular a photonic crystal and / or a Bragg mirror, may be fabricated along, on, or within the material transition. These are particularly useful elements for reducing optical crosstalk. Such photonic crystals or structures may also be used to improve light collimation.

[0383] In another embodiment, an electric bias may be applied to the two major surfaces of the material transitions by two opposing electrical contacts, generating an electric field through each material transition. This is an effective element for reducing optical crosstalk. The electric field in this case is generated by applying a bias. This bias may be derived from, or be derived from, a voltage for operating the pixel, for example. However, in some embodiments, such a field may be determined by intrinsic material properties. Thus, in one embodiment, it is proposed to generate an electric field at each material transition by an n-type doped material and / or a p-type doped material applied or grown on at least one of the two major surfaces of the material transition. In this way, the electric field is built into the corresponding array, eliminating the need for applying a voltage.

[0384] According to a further embodiment, the exposed main surfaces of the material transitions and / or the exposed surface regions of the pixels may be electrically insulated and passivated by respective passivation layers, in particular comprising silicon dioxide. In this way, current flow through selected regions of the array, in particular through material transitions functioning as waveguides, can be effectively and specifically prevented. By electrically contacting the main surfaces of the pixels with contact layers, vertical optical structure elements can be produced. Here, one of the main surfaces may be electrically connected to one another via a shared layer. According to a further embodiment, the materials and / or material transitions between one pixel and its neighboring pixels may be formed differently from one another, in particular according to direction.

[0385] For the production of μ-LED displays, it would be advantageous to provide μ-LED subunits during processing, separate them, and then post-process them. On the one hand, this allows the subunits to be tested individually. If a μ-LED in a subunit fails, it is not necessary to replace the entire μ-display, but only the subunit. On the other hand, adjusting the process steps allows for greater manufacturing flexibility and the possibility of producing different sizes. This approach is particularly suitable for a modular architecture for μ-LEDs.

[0386] According to one aspect of the modular architecture, a method for manufacturing a μ-LED module is proposed, comprising the following steps: - producing at least one layer stack providing a base module on a carrier; - applying a first contact to a surface area of ​​the layer stack facing away from the carrier; - applying a second contact to a surface area of ​​the first layer facing away from the carrier;

[0387] Alternatively, you can take the following steps: - creating at least one layer stack providing a base module, the layer stack having a first layer formed on a carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer; - exposing a surface area of ​​the first layer that does not face the carrier; - connecting a first contact to a surface area of ​​the second layer facing away from the carrier; - connecting second contacts to surface areas of the first layer facing away from the carrier;

[0388] Thus, the μ-LED module comprises at least one layer stack providing a base module having a first layer formed on a carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer, with a first contact connected to a surface area of ​​the second layer facing away from the carrier and a second contact connected to a surface area of ​​the first layer facing away from the carrier.

[0389] In this way, a base module, particularly a contact surface, can be created as a basic element of a μ-LED module. The base module is part of a larger system, but in its simplest form, can contain μ-LEDs. In one embodiment, the base module contains multiple μ-LEDs, at least two of them, which can be individually controlled or designed for redundancy. Therefore, according to the principle of modularity, the whole can be divided into parts, which we call modules. With a rectangular or any other shape and the common function of emitting light, modules can be easily assembled.

[0390] The starting point is the μ-LED with a lateral architecture. The size of this optoelectronic component is such that it meets the requirements of the display sector, where a very small pixel pitch necessitates an extremely small chip size, with an emitting area of ​​approximately 300 μm. 2 Then, to meet the requirements of other applications such as video walls as well, the μ-LED architecture is configured to allow the fabrication of light-emitting diodes composed of multiple subunits of this ultra-compact μ-LED by simply adjusting one process step, specifically using different masks for the layer stack or mesa structure.

[0391] For example, the basic size of the base module is 15 μm x 10 μm. With this mask and appropriate contact or singulation, components of 15 μm x 20 μm or 30 μm x 30 μm can also be easily produced, which are also suitable for various μ-LED display applications. As mentioned above, a component includes one or more base modules, which may also include one or more μ-LEDs.

[0392] A modular design, where the currently required ultra-small chips can be used as a base unit or module and then processed into components twice the size of the base unit (module) with only minor adjustments to the process, saves development resources and provides a degree of flexibility in the manufacturing of such components. For example, if an application in the μ-LED range requires different brightness levels or pixel pitches, the required chips can be manufactured relatively easily.

[0393] In one embodiment, not only the mesa (layer stack) but also the contact surfaces are patterned differently. This changes two steps, but it is no longer necessary to ensure that all contact pads are connected. By using a horizontal chip architecture, an additional process step for n-type contact connection, as is the case with vertical chips after assembly on the target substrate, can be avoided. This simplifies manufacturing compared to other manufacturing techniques, thereby reducing costs.

[0394] According to a further aspect, the second contact can be formed to be electrically insulated from the transition layer and the second layer by a dielectric and to extend over a surface region of the second layer that does not face the carrier.

[0395] Depending on the application requirements, the base modules are arranged in a matrix along at least one row and at least one column on the XY plane, with the base modules in each row facing the same direction. Base modules in two adjacent columns can also be oriented in the same direction as needed. In this way, an electrical series circuit of the base modules can be easily realized.

[0396] Alternatively, the orientation of the base modules in two adjacent rows can be reversed, placing the same contacts next to each other. In this way, electrical parallel circuiting of the base modules can be easily achieved. Since both the n-type and p-type contacts are located on the underside of the lateral μ-LED, it is advantageous to arrange the chips alternately. This allows the p-side contacts of both base elements in the case of a 2xX configuration to be located in the center of the chip, while the n-side contacts are located on the outside, minimizing the risk of potential short circuits.

[0397] In some embodiments, the separation of at least one light-emitting diode module from the plurality of base modules is performed by deep lateral patterning through the first layer, particularly from the side of the second layer. This can be done by laser lift-off, particularly from the side of the carrier facing away from the modules. Etching processes are also conceivable.

[0398] Another aspect concerns whether and to what extent such subunits can be equipped with sensors. For μ-displays, particularly in the field of augmented reality but also envisioned for automotive applications, it may be useful to provide sensors to detect user reactions or other parameters. For example, in augmented reality applications, one or more photosensors may be provided to detect the direction of gaze or changes in gaze direction. Similarly, the amount of light can be detected, e.g., to brighten or dim the image. The same sensors can also be used in displays for automotive applications. Similarly, sensors to detect driver attention are possible, allowing for appropriate action to be taken if drowsiness is detected.

[0399] The inventors recognize that future displays may no longer have sensors located outside the display, but rather need to realize the sensor functionality behind or inside the full μ-display, instead of the separate solutions of the past.

[0400] The μ-LED modules disclosed herein can be further subdivided for this purpose. In this case, sensors may be implemented instead of μ-LEDs in the redundant positions of subpixels. Thus, according to a first aspect, a μ-display is proposed, which has a target matrix formed on a first or end carrier. The matrix or μ-display has locations that can be occupied by μ-LEDs. Furthermore, a number of structural elements, in particular μ-LEDs, are formed on a second or replacement carrier, resulting in a starting matrix in which the locations that can be occupied by structural elements are evenly spaced relative to the target matrix. The μ-LEDs are then grouped on the replacement carrier to form a number of modules, which are then separated from the second carrier, but in this case, the modules are arranged and electrically connected on the first carrier in the target matrix so that a number of locations not occupied by structural elements remain on the latter, and at least one sensor element is arranged and electrically connected in each of these locations, at least partially. In some aspects, the locations that can be occupied by the target matrix correspond to the locations of subpixels or pixels.

[0401] Furthermore, the present application provides modules or subunits of the μ-LEDs disclosed herein, whose size and spacing correspond to the corresponding parameters of the available locations on the target matrix. The subunits are grouped into modules and arranged and electrically contacted on the target matrix so that a large number of locations remain unoccupied by structural elements, and at least one sensor element is arranged and electrically connected to each of these locations, at least partially. In this way, by arranging the modules or subunits on a display module or display, several locations can be freed up, where sensors can be implemented. This makes the sensors an integral part of the display. This has several advantages, for example, it is possible to directly measure the light hitting the display and then adjust the illuminance of the modules or individual μ-LEDs depending on their location.

[0402] According to a second aspect, a method for manufacturing a μ-display is proposed, which comprises a target matrix formed on a first or end carrier and occupyable by μ-LEDs arranged in rows and columns. The occupyable locations may correspond to subpixels. Furthermore, the locations exhibit a size and spacing substantially corresponding to the modules disclosed herein. In other words, the target matrix comprises locations arranged in rows and columns and occupyable by modules of μ-LEDs.

[0403] Thus, the modules are fabricated as disclosed herein, for example by shallow mesa etching and deep mesa etching, followed by grouping into modules. The modules thus fabricated are removed from the replacement carrier and placed in the open locations of the target matrix on the end carrier and electrically connected to the end carrier. However, in this process, the previously defined locations remain open. These locations are each occupied by at least one sensor element, which is placed and electrically connected.

[0404] The end carrier may have wiring connections between the module and the individual μ-LEDs. Additionally, in some embodiments, the end carrier includes at least one power supply and / or drive control electronic circuit for the applied module or μ-LEDs. In other embodiments, the end carrier further includes electronics for reading at least one sensor element. At least one sensor element may include a photosensor. Further examples are as follows:

[0405] The prepared μ-LED modules or subunits and the associated areas of the target matrix on the end carrier must be identically rasterized or have the same size and possibly the same periodicity, especially when transferring large modules with multiple rows or columns and applying them to the end carrier.

[0406] In one aspect, one or more contact areas of a module or subunit correspond to associated contact areas of an occupiable location on the end carrier. In this manner, the module can be incorporated into a target matrix on the end carrier. The module can then be inserted or integrated into the target matrix on the end carrier.

[0407] This makes it possible to construct a display in which modules, in particular μ-LED modules, are evenly spaced from one another in all structural elements. Thus, in one embodiment, the target matrix of the display is implemented with very small spacing between occupiable locations. In this manner, each occupiable location can be fitted with a very small module to be manufactured. This allows for very high resolution due to the small size and close spacing of the pixels, and the display can be brought very close to the user's eyes.

[0408] Alternatively, the occupiable locations of the target matrix can be spaced further apart. Similarly, in some embodiments, multiple subunits as disclosed herein can be placed in such an occupiable location. In some embodiments, the target matrix locations arranged in rows and / or columns can be spaced apart by a distance b. The μ-LED modules are each the same size and have a distance a from each other. Distance a can be the same as distance b, which substantially corresponds to the configuration described above. However, distance b can also be several times greater than distance a. Because the occupiable locations are also the contact surfaces of the μ-LED modules or subunits, the greater the distance b between the occupiable locations, the greater the available space. In this way, larger modules can be used or multiple modules can be combined. For example, if distance b is 2.5 times greater than distance a, a single module composed of four individual modules can be placed in an occupiable location, with a distance still remaining between adjacent modules.

[0409] This configuration allows differences in eye sensitivity and resolution to be taken into account. The smaller the distances a and b, the higher the resolution, which may reduce the viewer's eye sensitivity. Therefore, the same μ-LED module can be used to realize displays with different pixel or subpixel sizes and pixel pitches. This is considered advantageous in that the μ-LED module can be manufactured independently of the target matrix, its carrier, and its wiring.

[0410] The previously disclosed shallow mesa etch is used to form the pixel electrical contacts and the μ-LED module and target matrix. It can be combined with so-called deep etch to define the μ-LED grid and module. This chip grid can differ from the pixel chip grid depending on the application. For example, a large 2x2 chip (four base units) with four subpixels can be fabricated. Each base unit is a μ-LED. Similarly, by skillfully configuring the mask for the second mesa etch, pixels can be created that each have one less base unit. Arranging these pixels creates a display with a "hole" the size of a base unit or a multiple of it. Various sensors can then be housed under this "hole" or "missing subpixel." This combination allows for redundant subpixels, where some of the redundant subpixels can be replaced by sensors.

[0411] For this reason, it is appropriate to provide μ-LEDs with a uniform chip architecture and a uniform or easily variable chip size for display manufacturing. For this purpose, the techniques described herein can be used. For example, in manufacturing modules of the disclosed type, it is also possible to utilize the cover electrodes and surrounding structures disclosed herein to enhance light output. In some embodiments, the module can then be further processed, for example, by applying photovoltaic structures. However, it should be noted that μ-LED modules may also be equipped with such structures during the manufacturing process.

[0412] In some embodiments, μ-LEDs are grouped into rectangular or square modules, which can also be combined in any way, in particular in rows. Fabrication using shallow and deep etching allows wafers to be prepared from such modules and singulated as needed to fit the target matrix. In this way, modules of various sizes can be realized. Free positioning allows certain locations to be left free. Similarly, groups of cells or entire rows or columns can also be left free. Finally, these modules can be implemented in displays in which the target matrix has a different arrangement of occupyable locations, i.e., not in rows and columns, for example.

[0413] According to one configuration, at least one module may have four pixel elements arranged in two rows and two columns. Each pixel element may include one or more subpixels. In another configuration, one module may have four subpixel elements, also arranged in a 2x2 matrix. This is a more manageable configuration. According to a further configuration, at least one module may have two rows and two columns, but only three structural elements. This is a more manageable configuration, as the unoccupied locations are already reserved for modules.

[0414] In a further configuration, at least seven modules, each having four pixel elements, and at least two modules, each having three pixel elements, may be arranged and electrically connected in a target matrix on an end carrier to create at least two locations not occupied by pixel elements, each having at least one sensor element disposed therein and electrically connected thereto. Again, the modules may be arbitrarily configured and interconnected or positioned relative to one another on the end carrier to create specific unoccupied locations. Again, the pixel elements may include multiple subpixel elements and corresponding μ-LEDs, or each pixel element may itself be a μ-LED.

[0415] According to a further configuration, the locations occupied by the sensor elements may be surrounded by structural elements, in this way clearly defined locations, i.e. locations not occupied by structural elements, can be explicitly made available for the sensor elements.

[0416] In some embodiments, the modules may be fabricated as subpixels. Modules emitting different colors may be fabricated in different second or replacement carriers.

[0417] According to various configurations, the plurality of sensor elements may be formed as part of a sensor device formed on the first carrier or the end carrier to receive electromagnetic radiation incident on the first surface of the first carrier. In this way, different light spectra can be detected depending on the application. According to further configurations, the sensor elements may be in the form of photodiodes, phototransistors, photoresistors, ambient light sensors, infrared sensors, ultraviolet sensors, proximity sensors, or infrared structural elements. Similarly, the sensor may be a vital sign sensor that detects a vital sign parameter. In this way, the display device can be used in a variety of ways. For example, the vital sign may be body temperature.

[0418] In a further configuration, the vital signs monitoring sensor may be located within the display screen or behind the rear surface of the display screen, the sensor configured to measure one or more parameters of the user, including, in addition to body temperature, for example, gaze direction, pupil size, skin resistance, etc.

[0419] According to a further embodiment, the structural element can have a first layer formed on the carrier, an active transition layer formed on the first layer, and a second layer formed on the active transition layer. The first contact is connected to a surface area of ​​the second layer facing away from the carrier, and the second contact is connected to a surface area of ​​the first layer facing away from the carrier. This configuration corresponds to a vertical μ-LED. In this way, the structural element can be contacted only from one side. In another embodiment, the second contact is electrically insulated from the transition layer and the second layer by a dielectric and extends over the surface area of ​​the second layer facing away from the carrier.

[0420] In addition to being manufactured as monolithic pixel arrays, μ-LEDs can also be applied to a carrier board and then contacted. Due to their large size, μ-LEDs are difficult to individually transfer and contact. Therefore, in some applications in the automotive sector, as well as in the special cases of video walls and augmented reality applications, μ-LEDs are first applied to a larger carrier and then contacted with leads on the board. The board can also be configured as a screen layout, such as a video wall or pixel matrix. Such layouts sometimes require special connection technologies, which vary from layout to layout and from technique to technique or manufacturing process to process. This makes the offering of various μ-LEDs or modules very complex.

[0421] Therefore, pixel modules for different assemblies must be developed that meet the various requirements and are particularly suitable for the manufacturing processes of different generations of video wall NPPs, i.e. LED matrices for AR or VR applications, as well as flexible displays in the automotive sector.

[0422] In one embodiment, a μ-LED module includes a body having a first major surface and four side surfaces. At least three contact pads are disposed on the first major surface. These are configured to be electrically connected to optoelectronic components, respectively. For example, three or a subset of three contact pads are connected to μ-LEDs having an edge length of 10 μm or less. According to the present invention, a plurality of contact webs are further provided. Each contact web electrically connects one of the at least three contact pads. Furthermore, the contact webs on the first major surface are wired to at least one of the four side surfaces. In other words, the contact webs are disposed on the first major surface and on at least one of the side surfaces. On the side surfaces, the contact webs form contact tabs, i.e., they are configured for external contact.

[0423] The proposed μ-LED modules are thus rewiringable, allowing the modules to be connected in a simple manner to already predefined connection points on a carrier or matrix. In particular, the significantly smaller μ-LEDs can be pre-positioned on the module, which allows the module to reserve space for electrical connections. This increases the flexibility of such modules and allows them to be used in a variety of applications.

[0424] For example, in addition to modules combining three μ-LEDs to form one pixel, multiple μ-LEDs can also be combined in this way to form larger modules. Individual μ-LEDs can be manufactured separately, allowing the use of techniques best suited to each individual μ-LED. Individual μ-LEDs can also be configured with redundancy. Large modules are also referred to as segments. In addition to individual μ-LEDs, specialized modules with shallow and deep mesa etching as disclosed herein are also available. Similarly, ingot designs or the proposed antenna structure designs are also conceivable. The proposed wiring modifications allow modules and μ-LEDs to be manufactured separately and adapted to each application.

[0425] In one configuration, the contact webs extend only along the sidewalls, while in another configuration they are also connected to contact pads on the second major surface, the underside of the μ-LED module. Thus, contact pads are present on both the top (for the μ-LEDs) and bottom sides of the μ-LED module. This allows the μ-LED module to be used in both SMT-based (surface mount) manufacturing processes and contact web processes, where the contact webs on the carrier are pushed to the sides of the module. This configuration increases the module's flexibility and allows for better compensation of manufacturing tolerances of the carrier (e.g., the length or size of the contact webs).

[0426] In a further configuration, it is proposed that the second of the four side surfaces only has the fourth contact web. This contact web can be distinguished, for example, by receiving a specific potential during operation. Furthermore, this contact web can also be distinguished visually from the other contact webs, for example, by the size of its side surface. This allows the module to be oriented correctly during transfer. In another configuration, two of the three contact webs are located on different side surfaces. According to one embodiment, four contact webs are provided, each located on a side surface and connected to a contact pad, preferably on the underside, i.e., the second main surface, of the module.

[0427] In another example, contact webs are also arranged on the first major surface, extending towards the corners and continuing along the side corners towards the second major surface (e.g. the underside of the module).

[0428] Another aspect relates to the design of the module body. According to this aspect, the module body has a prism based on a quadrilateral surface, e.g., a rectangular surface. In one configuration, a second major surface is provided opposite the first major surface and has a larger area than the first major surface. Alternatively, the first major surface may be provided such that it forms an angle of 90° or more with each of the four side surfaces. This forms a prism or a four-sided truncated pyramid. In another configuration, the side surfaces are not arranged perpendicular to the first major surface.

[0429] In another embodiment, the contact webs and / or contact pads comprise metal tabs, particularly vapor-deposited metal tabs, having a thickness of less than 5 μm, particularly less than 2 μm, or even less than 1 μm. For example, the thickness of the contact webs and contact pads may be in the range of 100 nm to 50 nm. They may be fabricated by a suitable photolithography process. Depending on the configuration, the metal tabs and contact pads may be deposited on an insulating layer of the module body, for example, by MOCVD. The contact pads on the underside may be fabricated in a separate step. In another configuration, the module body includes at least one through-hole via at least partially filled with a conductive material, and the conductive material on the first major surface is connected to or forms one of at least three contact pads disposed on the first major surface.

[0430] The module body may be configured to have a continuous major surface. In other configurations, the body may include a recess on the first or second major surface through which at least one contact web extends. The contact web on the second major surface may be connected to a through-hole via and wired to a contact pad. Similarly, the contact web may connect at least one μ-LED disposed on the first major surface to the through-hole via.

[0431] The body may comprise or be made of silicon. The body may be surrounded by an insulating layer, e.g., silicon dioxide, to prevent short circuits. The silicon material may be exposed where a reference potential is connected. Similarly, the through-hole vias in the body are lined with insulating material. Contact webs and contact pads are applied to the insulating layer. The module body may have a thickness of less than 30 μm, in particular in the range of 5 μm to 15 μm. In this way, a very low overall height of only a few tens of μm can be achieved. The overall height of the module can be further reduced by adding recesses into which optical structural elements are inserted.

[0432] Another aspect relates to a method for manufacturing a μ-LED module, in particular by patterning a membrane wafer to have a plurality of substantially V-shaped trench-like recesses. The recesses are configured so that the first main surface of the patterned membrane wafer bounded by the trenches forms an angle of 90° or more with the flanks of the trenches. A plurality of contact pads are then fabricated on the first main surface of the membrane wafer. Optionally and / or additionally, lead wires, contact tabs, and webs can also be fabricated on the first main surface and on the side surfaces. At least one optoelectronic component, in particular a μ-LED, is then applied to the module and conductively connected to the contact pads. In a next step, a temporary carrier is prepared, and the membrane wafer is rebonded to the temporary carrier and then etched back to or just before the trenches. Finally, rear contacts are applied and optionally singulated.

[0433] As previously explained, pixel defects can be reduced in monolithic arrays by providing redundant subpixels. While electrical crosstalk is avoided, optical crosstalk between redundant subpixels is possible. Similar issues exist when pixels are isolated. While it may be possible to test functionality before isolation, the small size of μ-LEDs can lead to alignment or connection errors when transferring them to the backplane during fabrication. In addition to continuous improvements in process steps, one approach is to provide redundant μ-LEDs in each pixel of the pixel array, or more precisely, to provide redundancy wherever μ-LEDs can be placed. This means, for example, providing two or more μ-LED chips per RGB subpixel of a pixel rather than just one μ-LED chip per color, resulting in an excessive number of subpixels per pixel in most cases. Another approach involves repairing defective subpixels. According to the function text, the defective subpixels are turned off and replaced with functional subpixels.

[0434] The method for manufacturing pixel fields according to the invention comprises, inter alia, arranging pixels in a field on a substrate and providing the substrate for electrically contacting the pixels, the substrate providing a set of primary contacts for the pixels, the set of primary contacts for the pixels being provided for electrically contacting groups of sub-pixels of the pixel, and the substrate providing a set of replacement contacts for the pixels.

[0435] Subsequently, the μ-LEDs are mounted on the primary contacts of the pixel, but not on the set of replacement contacts of the pixel. A defective μ-LED is then identified from the group of μ-LEDs, and a replacement subpixel for the defective μ-LED is mounted on one of the possibly multiple replacement contacts of the set of replacement contacts of the pixel. In this regard, a pixel may include one or more subpixels. The pixel may also be configured to connect vertical or horizontal μ-LEDs. Thus, the primary contact may include at least one contact area (for vertical μ-LEDs) or two contact areas (for horizontal μ-LEDs). One of the two contact areas can be used for multiple μ-LEDs, including redundant ones. In the case of vertical μ-LEDs, one of the cover electrodes presented here may be provided. A mirror surround may surround the pixel field.

[0436] In addition to separate μ-LEDs, the μ-LED modules or base modules disclosed herein can also be implemented. For example, a μ-LED module may include two base modules, with one base module provided as a redundant unit.

[0437] Thus, the method according to the invention allows for the implementation of a specified set of subpixels on the primary contacts of each pixel of the pixel field. In each case, the subpixels are implemented on the primary contacts. In this case, for each pixel, defective subpixels on the primary contacts can be determined. For each identified defective subpixel in a pixel, a replacement subpixel is implemented on the pixel's replacement contact in a subsequent step. In this way, only one replacement contact is implemented in a pixel, replacing the subpixel identified as functionally defective on the primary contact.

[0438] Therefore, there is no need to implement multiple sub-pixels of the same color in a pixel for redundancy. Compared to the redundancy concepts known from the prior art, the number of sub-pixels used in the pixel field to be manufactured is much lower, since their population is increased only after defective sub-pixels have been identified. This allows for a reduction in manufacturing costs.

[0439] Furthermore, the present application allows the use of drive control techniques to, on the one hand, test the functionality of the μ-LEDs and, on the other hand, safely disconnect the defective μ-LEDs in case of failure, especially in the case of a "SHORT" state, by measures such as blowing a fuse, so that the defective ones can remain on the pixel, avoiding additional process steps.

[0440] Furthermore, if a defective subpixel is identified, it is possible to individually refit the pixel with a replacement contact. As a result of further functional tests in the ongoing process, it is also possible to implement replacement contacts for several free pixels. This increases the probability of a successful fitting process. Furthermore, there is also the possibility of refitting subpixels, for example in the form of μ-LED chips, with selected characteristic data, for example for precise color adjustment at each pixel.

[0441] According to one configuration, the steps of identifying defective subpixels within the group of subpixels and implementing replacement contacts for the identified subpixels may be repeated for each subpixel identified as defective until a replacement subpixel is present in the pixel, such that all defective subpixels of a pixel can have replacement subpixels implemented on the substrate in a subsequent process step.

[0442] According to another aspect, if a defective pixel is declared "OPEN," i.e., if no error current flows through the damaged or destroyed pixel, it is not necessary to remove the identified defective subpixel. Similarly, circuit-related measures can be provided to cut off the electrical contact of the identified defective subpixel, thereby avoiding the conduction of current through the defective subpixel during operation of the pixel field. Corresponding concepts are disclosed herein and can be used for this purpose.

[0443] Compared to repair concepts, the process of removing defective subpixels can be omitted, which makes the manufacturing process faster and more cost-effective. There is no risk of damaging the pixel field when removing the defective subpixel. Indeed, repairs that remove defective subpixels allow the free primary contact surface to be used further. However, residue or damage reduces the chances of a second attachment or bonding process being successful. On the other hand, the replacement contacts provided are free of residue and damage.

[0444] The subpixel identified as defective and the replacement subpixel may be provided to emit the same color, so that the defective subpixel is replaced with a replacement subpixel that emits at least approximately the same color as the defective subpixel would have if it were functional.

[0445] Each pixel's subpixel group can include one or more sets of RGB subpixels, where RGB stands for red, green, and blue. Thus, a subpixel group can have, for example, three subpixels. One subpixel may be configured to emit red light, another subpixel may be configured to emit green light, and yet another subpixel may be configured to emit blue light. It is well known that any or nearly any color can be generated by additively mixing the three primary colors red, green, and blue.

[0446] A subpixel group may include two or more respective subpixels to produce each primary color, for example, a subpixel group may include six subpixels, with two subpixels each to produce red, green, or blue.

[0447] According to one configuration, it is proposed that if no defective sub-pixels are found in a pixel, then none of the replacement contacts of the pixel are populated with replacement sub-pixels, and thus a pixel field may have pixels that do not have replacement contact(s) populated.

[0448] Another aspect involves the design of primary contact configurations. These are intended to contact the anode and / or cathode sides of a pixel's subpixels. For example, the contacts may be configured so that a so-called flip chip can be placed on them and electrically connected. A flip chip is an optoelectronic chip with electrical p-type and n-type contacts on the same surface. Similarly, replacement contacts may be formed to contact replacement subpixels of a pixel on the anode and / or cathode sides. The redundancy of contact surfaces for each pixel's subpixels provided by the replacement contacts may be related to both the cathode and anode of the subpixel, or to only one of the two terminals.

[0449] In this context, a subpixel or replacement subpixel is formed by a μ-LED mounted on a respective contact and electrically and mechanically connected to it. The mounting of a replacement subpixel to a replacement contact for a subpixel identified as defective can be performed regardless of the color of light emitted by the replacement subpixel. In principle, each primary contact is mounted, and only the replacement contact of the μ-LED declared defective is mounted. However, the primary and secondary contacts do not necessarily have to differ in terms of circuitry or their surface structure. Therefore, in this respect, a combined mounting is also possible. In this context, the first contact to which a μ-LED of a certain color is mounted can also be referred to as the primary contact.

[0450] The proposed concept also relates to a pixel array having a substrate on which pixels are arranged in a field and for electrically contacting the pixels, the substrate providing a set of primary contacts for the pixels, the set of primary contacts being provided for electrically contacting groups of subpixels, and the substrate also providing replacement contacts for the pixels, whereby, according to the proposed principle, the primary contacts are populated with a set of subpixels, the set of subpixels having defective, inactive subpixels, and replacement contacts of the set of replacement contacts for the pixels are populated with the replacement subpixels to replace the defective, inactive subpixels.

[0451] At least two pixels in a pixel field may have a different number of occupied replacement contacts, due to the fact that replacement subpixels are populated with replacement contacts within a pixel only if a defective subpixel is identified on the primary contact.

[0452] As mentioned above, the concept of reducing defects and even crosstalk increases the yield of functional devices during manufacturing. In some embodiments, measures to improve the printing of μ-LEDs are involved. For this purpose, μ-LEDs with edge lengths typically less than 100 μm, often between 70 μm and 20 μm, are being developed. For specific applications in the field of augmented reality, dimensions are also less than 20 μm, for example, between 1 μm and 10 μm, or even between 1 μm and 5 μm.

[0453] One of the technical challenges associated with μ-LEDs is the manufacturing process in particular, since they must not only be produced in large quantities but also assembled into matrices or modules. To produce such modules or even larger displays, the manufactured μ-LEDs, either as individual chips or already assembled as in the module presented here, are transferred to the support surface of the module or display, where they are fixed and electrically connected. To transfer millions of LEDs, speed and precision are crucial in this process.

[0454] Various processes are known for this purpose, such as transfer printing, in which multiple μ-LEDs are simultaneously picked up from a wafer with a flat stamp and transferred to the support surface of the subsequent display, where they are precisely assembled to form a large-area, full-array structure. For this purpose, elastomer stamps can be used, for example, to which the appropriate surface texture and material properties allow the individual μ-LEDs to adhere without mechanical or electrical damage. Depending on the process technology, the μ-LEDs can be difficult to remove, as they may tilt, shift, or twist. Therefore, it is desirable to enable the picking up of μ-LEDs with minimal retention and damage.

[0455] The aspects and ideas described below are based on the following consideration: when using mass transfer printing, i.e., a process in which a large number of semiconductor chips are transferred locally at the same time, the μ-LEDs are picked up or lifted from the wafer using a suitable tool. This requires that the chips are in a precise and definite position on the wafer in order to place a tool, such as an elastomeric stamp with a cushioned structure, as accurately as possible on each μ-LED. At the same time, it is desirable that the surface texture always be homogeneous and uniform in spatial position so that the transfer tool can adhere to the chip surface with as high a standard probability as possible.

[0456] According to a first aspect, a method for providing a μ-LED is proposed, in which a first conductive contact layer is arranged on a first main surface of a functional layer stack facing away from a substrate. The layer stack is configured as an optically active layer stack, and accordingly forms, in particular, a μ-LED. At least one support structure is then formed that is attached to the substrate and supports the μ-LED. This support structure allows the contacted functional layer stack to be separated during lift-up. Subsequently, a sacrificial layer, in particular made of AlGaAs or InGaAlP, arranged between the second main surface of the functional layer stack facing the substrate and the substrate is at least partially removed. After the partial removal, a second conductive contact layer can be provided on the second main surface of the functional layer stack in the region of the removed sacrificial layer.

[0457] In particular, the method presented here allows lithographic processing of the functional layer stack on only one side of the substrate, avoiding additional rebonding if necessary. The support structure can also be lithographically tailored to meet the needs of the layer stack size and other parameters. At the same time, the layer stack is contacted on both sides to form a vertical μ-LED.

[0458] In a second aspect, a μ-LED is proposed that includes a functional layer stack. A first conductive contact layer is provided on the first main surface of the functional layer stack facing away from the substrate, and a second conductive contact layer is provided on the second main surface of the functional layer stack facing the substrate. The contacted functional layer stack is supported, in particular without restraint, by at least one support structure attached to the substrate. This support structure allows the contacted functional layer stack to be separated in further process steps during lift-up. Therefore, the layer stack or μ-LED has a break edge after lift-up and in all subsequent process steps.

[0459] The measures proposed here do not require rebonding and allow for easy alignment of lithography masks. They allow the fabrication of horizontal as well as vertical μ-LEDs. They reduce absorption, increase light extraction from horizontal surfaces, and allow for thinner epitaxially produced layers. Without bonding, the epistructure of the layer sequence is less susceptible to mechanical stress. Furthermore, the presence of a sacrificial layer allows for more precise etching processes, since they can be highly selective with respect to the sacrificial layer. Therefore, the contact layer can be made thinner.

[0460] In some embodiments, the support structure may comprise InGaAlP, AlGaAs, or BCB, or an oxide, such as SiO2, or a nitride, or a combination of such materials, and may be particularly non-conductive. In this case, it is also configured to passivate the layer stack. The support structure may be at least partially epitaxially grown or fabricated by vapor deposition or electroplating. Alternatively, the sacrificial layer may comprise AlGaAs or InGaAlP and be removed by wet chemical etching. The first and second conductive contact layers may be sputtered, vapor deposited, electroplated, or epitaxially formed. The contact layer may be transparent and comprise ITO, ZnO, or a metal. In some embodiments, the flanks of the contacted functional layer stack may be covered with a passivation layer to prevent oxidation or degradation. Alternatively, a metal, particularly Zn, may be diffused from one flank of the contacted functional layer stack into the outer edge region of the functional layer stack. This changes the band structure of the outer edge region and moves charge carriers away from areas with increased defect density.

[0461] To ensure secure attachment of the support structure, it may extend into the substrate from the first main surface side of the functional layer stack.

[0462] According to a further configuration, a first support layer, in particular comprising InGaAlP and / or AlGaAs, may be formed on the first main surface side of the functional layer stack, and a first conductive contact layer may be provided on this support layer, and the first support layer and the first conductive contact layer may be provided on the substrate in at least one location, thus together providing a support structure.

[0463] Another aspect concerns how to avoid breaking edges and improve lift-up.

[0464] The proposed solution is to use a crystalline dielectric support structure to maintain a mechanical connection between the μ-LED and the surrounding or underlying substrate, but this mechanical connection is designed to, on the one hand, mechanically hold the μ-LED chip securely in place, but on the other hand, break when subjected to the smallest possible bending or pulling force, thereby allowing the chip to be released and removed.

[0465] In particular, a carrier structure for picking up area-shaped microchips or μ-LEDs is proposed. By carrier structure here, we mean an arrangement that can pick up a large number of such μ-LEDs, for example with an edge length in the range of 5 μm to 20 μm or less. The aim here is in particular to maximize the use of available space while providing a mechanically stable fixation, for example to a grid or matrix. Furthermore, the carrier structure is suitable for providing a plurality of microchips for transfer using a transfer tool.

[0466] Furthermore, the carrier structure has at least two pickup elements connected to the carrier substrate. Pickup elements here are to be understood as mechanisms or functional elements suitable for mechanically contacting and spatially fixing the μ-LED or holding it at a defined spatial position, possibly by interacting with further pickup elements. The diameter of the pickup elements can be, for example, in the 1 μm range. According to one embodiment, the microchip is attached to the two pickup elements.

[0467] In some embodiments, the carrier structure includes a flat carrier substrate. Such a carrier substrate can be, for example, a wafer, a foil, a frame, or the like used in the field of semiconductor manufacturing. In this regard, for example, a wafer, in addition to its function as a base plate or base material for the semiconductor manufacturing process, can also provide a support or supporting function for preparing subsequent mass production transfer. Alternatively, flexible materials, such as sheets, are also suitable as carrier substrates.

[0468] According to one embodiment, the pick-up elements have a column-like, pillar-like or pole-like shape starting from the carrier substrate. In one configuration, the microchip is partially but not completely placed at its corners or edges on at least two pick-up elements. The pick-up elements are connected to the carrier substrate and configured to detachably hold the microchip between the at least two pick-up elements such that the μ-LEDs can be moved with a defined minimum force in a direction perpendicular to the carrier structure surface.

[0469] In other words, it is necessary to intentionally create the possibility of holding the μ-LEDs sufficiently securely by the pickup elements, and on the other hand, to remove them with minimal force and feed them, for example, to a transfer tool. For this purpose, it may be proposed that the contact area of ​​each pickup element be less than 1 / 20, in particular less than 1 / 40, and in particular within the range of 1 / 80 to 1 / 50, of the chip area of ​​the μ-LED. In an alternative configuration, the edge length of the μ-LED is at least 10 times, in particular 20 times, the edge length of the pickup elements.

[0470] "Detachable" should be understood as a non-destructive, detachable connection between the microchip and the pickup element without any permanent material bond, for example, fusion or adhesive bonding. This attachment can be based on a physical connection, such as an adhesive connection via van der Waals forces or electronic bridges. The same can be achieved by using different materials between the μ-LED and the pickup element and by appropriately selecting the connection between them. This is intended, in particular, to avoid processes such as breakage, which would involve the destruction of the material structure and the corresponding fragments, particles, or chips. Alternative adhesion mechanisms, such as mechanical friction or delamination, are used here. In particular, known limited or restricted adhesive properties of materials or material combinations are utilized. According to one embodiment, the μ-LED is mounted between two or more pickup elements.

[0471] For example, adhesive or other cohesive forces are generated at the contact surfaces, which can mechanically fix the μ-LED in space. Here, when a defined minimum force is applied to the μ-LED, for example by an attached transfer tool, a release force is consequently effective at the contact surfaces between the μ-LED and the pick-up element. This defined minimum force can be influenced by an appropriate selection of the materials or material combinations at these contact surfaces.

[0472] The contact or overlap area is, for example, 0.05 μm 2 ~1 μm 2The μ-LEDs may have dimensions in the range of 1 / 20, 1 / 40, 1 / 80, 1 / 50, 1 / 10, 1 / 20, 1 / 30, 1 / 40, 1 / 80, 1 / 50, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 20, 1 / 30, 1 / 40, 1 / 10, 1 / 2 ...10, 1 / 20, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 10, 1 / 10, 1 / 20, 1 / 10, 1 / 10, 1 / 10, 1 / 10,

[0473] For example, besides the material or material combination, the dimensions and arrangement of the contact surface must be chosen appropriately, resulting in a suitable compromise. Likewise, the size and shape of this contact surface can be configured to influence the defined minimum force. The larger the contact surface, the greater the minimum force required to separate the μ-LED from the carrier structure. Besides frictional or lamination retention principles, magnetic or electrical retention forces are also conceivable.

[0474] In another example, the carrier structure may have only one pick-up element holding the μ-LED. Due to the light weight of the semiconductor structure, it may be considered that a suitably shaped and sufficiently large contact surface between the single pick-up element and the μ-LED provides a sufficient holding force in combination with a minimum force of suitable height to release the μ-LED.

[0475] In one configuration, the substrate for fabricating the μ-LEDs may be used as the carrier structure. In such cases, a sacrificial layer may be provided. In this connection, the μ-LEDs are connected to the growth substrate during the manufacturing process. To expose the finished μ-LEDs, the intervening sacrificial layer is removed, for example, by a gas or plasma-based etching process, thereby creating a space between the μ-LEDs and the wafer. The thickness of the sacrificial layer is, for example, between 100 nm (nanometers) and 500 nm. This is intended so that, upon removal of the sacrificial layer, the pickup element takes over the function of holding the μ-LEDs on the carrier structure. In one configuration, the pickup element may have the shape of an anchor.

[0476] Typically, the μ-LEDs are pulled away from the carrier substrate with a force vector that is at least partially perpendicular to the carrier substrate plane (understood in the x-y direction), so that the pickup elements remain on the carrier substrate and are not particularly damaged. This ensures that no residues of the pickup elements remain on the μ-LEDs, which could be problematic for subsequent processing.

[0477] According to one embodiment, at least one pickup element is configured to simultaneously hold and / or support adjacently arranged μ-LEDs. A consideration of this feature can be summarized as follows: μ-LED support structures often take up space, which is ideally minimized to achieve a high yield on a wafer. Due to the manufacturing process, μ-LEDs are also arranged in a regular parallel structure on the wafer.

[0478] Due to the process, a space is created between them. Therefore, the inventors propose positioning a pickup element between two adjacent μ-LEDs, so that one pickup element supports or picks up multiple adjacent μ-LEDs. This has the advantage of realizing arithmetically less than one overall support structure per component. This reduces the total number of pickup elements, resulting in space savings and, therefore, cost reductions. Furthermore, since there is no need to sacrifice the number of μ-LEDs by adding space for support structures on the wafer, the overall chip yield remains substantially constant.

[0479] For example, the pickup elements may have contact surfaces arranged opposite each other, each in mechanical contact with a neighboring μ-LED in this direction. In this case, the pickup elements can be distributed across the surface of the carrier substrate so that a minimum number of pickup elements are required to securely hold the μ-LED. This can be advantageous, for example, for efficient use of a transfer tool to enable efficient and rapid pickup of μ-LEDs. According to one embodiment, the pickup elements are arranged on the carrier substrate so that exactly three pickup elements hold one μ-LED. The choice of three pickup elements represents an advantageous compromise between good spatial stability and a favorable distribution of the holding force. This effectively prevents lateral shifts and tilts, particularly on the carrier substrate. In this regard, the pickup elements can engage the microchip in different lateral regions in the X and Y directions, for example, at the center, off-center, or at an edge or corner. Multiple pickup elements may be arranged on the same surface of the μ-LED.

[0480] According to one embodiment, a delamination layer is provided on the μ-LED or on the pickup element to remove the μ-LED from the carrier structure. In this specification, the term delamination is intended to describe the delamination process that occurs when two surfaces come into contact, more generally when two layers come into contact. This can apply not only to materials of the same kind, but also to material connections or surfaces of different materials.

[0481] The purpose of intentionally creating a so-called delamination layer is to prevent damage, material destruction, or structural change processes and instead non-destructively delaminate layers or surfaces from each other. Certain material combinations can be used here, such as SiO2 and Al2O3, as well as non-oxidizing metals such as silver, gold, or similar materials in combination with dielectrics such as SiO2. Thus, in one embodiment, the surface of the pickup element is surrounded by a delamination layer, thereby forming a delamination layer between the μ-LED and the pickup element. The thickness of the delamination layer is only a few nanometers, for example, in the range of 5 nm to 50 nm. In one embodiment, the delamination layer can be formed as an etching stop layer and, optionally, can also extend to cover further parts of the carrier structure.

[0482] According to one embodiment, the pickup elements are arranged in mesa trenches on a semiconductor wafer. As mentioned above, optimal utilization of the space on the wafer is generally desirable for increasing yield. Support structures for μ-LEDs often require additional space. In the manufacturing process, various process steps create three-dimensional structures, where, for example, the μ-LEDs are ultimately formed as protrusions or mesas. So-called mesa trenches are formed between these individual μ-LEDs.

[0483] The term "mesa trench" refers to the relatively steep slopes on the sides of the μ-LED, with the trench, i.e., the epitaxy-free area, being a deep structure between them. For example, the mesa trench may have a flank steepness in the range of 30° to 75°, especially 45°. This allows for precise placement of pickup elements in the available area without taking up additional space on the wafer. This allows for more efficient use of the available space on the wafer.

[0484] According to one embodiment, the carrier structure and the pickup element are integrally formed. This means, for example, that the pickup element is part of a carrier substrate. Here, the carrier substrate may itself be a wafer, but also a structure such as a PCB board, a sheet, a frame, etc. In the latter case, this means that the pickup element itself consists of a material and / or structure different from that of the carrier substrate. This can be achieved, for example, during the manufacturing process, by specifically maintaining the wafer structures present at the beginning through various process steps in a locally defined manner and not removing them, for example, by an etching process. These structures then serve as pickup elements and support structures for the finished μ-LED.

[0485] In one embodiment, the pickup element is configured to hold the μ-LED laterally and from below the μ-LED. In one embodiment, it may be useful to create partial contact surfaces or contact areas that provide a mechanical stop in the Z-direction, i.e., in the direction of the carrier substrate, for holding the μ-LED on the underlying carrier substrate. At the same time, the additional lateral support allows for spatial fixation in the lateral direction, i.e., in the X- and Y-directions. In this way, on the one hand, a stable spatial fixation in the direction of the carrier substrate and in the lateral direction is possible, and on the other hand, an easy lift-up of the μ-LED in the Z-direction away from the carrier substrate is possible by a transfer process or transfer tool.

[0486] In one embodiment, the pick-up element has a μ-LED holding surface that moves away at an angle relative to the plane of the carrier substrate, such that the holding force on the μ-LED decreases as the μ-LED moves away from the pick-up element. In other words, the further the μ-LED moves away from the carrier substrate, the further the holding surface moves away from the μ-LED. This can also be understood as, for example, a progressive decrease in the holding force when the μ-LED is lifted off the carrier structure by the transfer tool. This advantageously reduces the force required to detach the μ-LED, with the main aim of, in particular, shortening the execution time of the process step and improving the quality of the transfer process.

[0487] Traditionally, there are various possibilities for transferring chips from a carrier wafer to a suitable target substrate.

[0488] In the prior art, transfer processes such as laser transfer printing, "self-assembly" of individual micro light-emitting diode chips from a solution, electrostatically activated or diamagnetic transfer processes are known.

[0489] An extension of these concepts is detailed using electrostatic transfer as disclosed herein, with the aim of defining a method capable of picking up and placing optoelectronic semiconductor chips, i.e. μ-LEDs, with particularly small dimensions, and simultaneously screening μ-LEDs with specific defects, and further, of creating a corresponding apparatus for picking up and placing optoelectronic semiconductor chips.

[0490] The proposed concept is based on the fact that electron-hole pairs are generated in μ-LEDs and in general optoelectronic semiconductor chips. μ-LEDs may in each case have a semiconductor layer with a photosensitive region, also called an optically active region. In the optically active region, charge carriers or electron-hole pairs can be generated by corresponding excitations, in particular incident light. Electron-hole pairs consist of defect electrons and electrons that have absorbed energy and transitioned from the ground state to an excited state in the crystal.

[0491] The right properties of semiconductor materials, such as two regions with different dopant concentrations (p-n junctions), can separate electron-hole pairs. This creates a charge on each semiconductor chip, generating a dipole field outside the chip. This process is also known as the photovoltaic effect. The strength of the dipole field generated on each semiconductor chip depends on the characteristics of the semiconductor chip. Semiconductor chips can have defects, such as shorts, shunts, or low efficiency, which accelerate the outflow of charge generated by excitation and weaken the dipole field.

[0492] Furthermore, the proposed method provides a pickup tool that can be used to pick up μ-LEDs or optoelectronic semiconductor chips and place them in a predetermined position or location, for example, on a circuit board on which the μ-LEDs will be mounted. This process is also referred to as "pick and place" in English technical literature. Furthermore, the pickup tool generates an electric field at least at certain locations, e.g., charges these locations. The μ-LEDs are picked up by the pickup tool during or after the generation of electron-hole pairs.

[0493] The electric field generated by the pickup tool interacts with the dipole field of the optoelectronic semiconductor chip, creating attractive and even repulsive forces between the pickup tool and the optoelectronic semiconductor chip. Even in the absence of an electric dipole field due to electron-hole pairs, electrostatic interactions or forces may be superimposed on those that exist between the pickup tool and the optoelectronic semiconductor chip. For example, even in the absence of dipole charges generated by excitation, van der Waals or electrostatic attractive forces may exist between the pickup tool and the respective optoelectronic semiconductor chip. The additional electrostatic attractive forces may detach the μ-LEDs from the carrier on which they are placed, exceeding the threshold for pickup by the pickup tool.

[0494] The force required to remove the optoelectronic semiconductor chip from the carrier may be greater than the force required to hold the removed optoelectronic semiconductor chip with a pick-up tool. Thus, in some situations, electrostatic force may only be required to remove the optoelectronic semiconductor chip, and not to hold it. As a result, the presence of a dipole electric field is only required to remove the optoelectronic semiconductor chip, and is not necessarily required for subsequent retention of the optoelectronic semiconductor chip.

[0495] μ-LEDs with certain defects, such as short circuits, shunts, or low efficiency, have a lower dipole field upon excitation than μ-LEDs without such defects. Accordingly, the electrostatic interaction between the pickup tool and the defective μ-LED is so small that it cannot be picked up by the pickup tool and remains on the carrier. In other words, the electrostatic interaction between the pickup tool and the μ-LED is selected so that the force acting on the μ-LED is strong enough only for functional μ-LEDs. In other words, the electric field generated by the pickup tool is selected so that only in interaction with functional μ-LEDs is there a sufficient electrostatic force to lift the μ-LED. For defective μ-LEDs with weak dipole fields, the interaction is not strong enough.

[0496] The concept presented here also makes it possible to avoid picking up defective μ-LEDs and thus avoid their assembly, significantly reducing the repair work caused by the assembly of defective optoelectronic semiconductor chips. In this regard, it should also be mentioned that this interaction also depends on the mass or size of the μ-LEDs, so that the nominal size must be selected accordingly to ensure accurate attachment of functional μ-LEDs.

[0497] Alternatively, with a suitable configuration, μ-LEDs or optoelectronic semiconductor chips with specific defects that weaken the dipole field can be picked up by the pick-up tool, while "good" μ-LEDs with stronger dipole fields can be repelled by the pick-up tool and remain on the carrier, again separating good and defective μ-LEDs and optoelectronic semiconductor chips.

[0498] The pickup tool may be made of a material suitable for generating an electric field. For example, the pickup tool may have polydimethylsiloxane (abbreviated as PDMS) with embedded metal contacts. The metal contacts may be connected to a voltage source to appropriately charge the PDMS material to generate the electric field. Additionally, the pickup tool may be made of a suitable charged material that generates its own electric field.

[0499] Another option for generating an electric field is to generate it via contacts and voltages in or on the surface of the pick-up tool. The electric field can also extend between the pick-up tool and the electrical contacts between which the μ-LED is located. The electrical contacts can be, for example, carriers on which the μ-LED or optoelectronic semiconductor chip is placed or can be integrated into them.

[0500] After being manufactured on a semiconductor wafer, the μ-LEDs can be singulated, for example by sawing. The singulated μ-LEDs can then be mounted on a circuit board or other carrier using the methods described herein. Similarly, not only individual μ-LEDs, but also μ-LED modules or smaller arrays of connected μ-LEDs can be transferred using this method. In this regard, reference is made to the μ-LED modules or structures described herein, which can be easily transferred using the proposed transfer method.

[0501] Due to the small size and potentially large number of μ-LEDs, the conventional method of first testing the LEDs and then mounting them on a circuit board is economically unfeasible. Unlike conventional methods, the method described here allows for the screening of defective μ-LEDs before assembly.

[0502] Excitation of μ-LEDs to generate electron-hole pairs can be achieved by irradiating them with light, especially UV light. The light spectrum must have a wavelength or wavelength range that allows excitation, especially photoluminescence excitation. In particular, the excitation light must have higher energy than the light emitted by the optoelectronic semiconductor chip so that electron-hole pairs can be directly generated. Consequently, the wavelength of the excitation light must be shorter than the wavelength of the light emitted by the optoelectronic semiconductor chip. For example, blue μ-LEDs emit light at approximately 460 nm. In this case, the excitation light preferably has a wavelength of 440 nm or less, e.g., approximately 420 nm.

[0503] The light used to generate electron-hole pairs can be incident on the μ-LED through the pickup tool. To enable this, the pickup tool may be at least partially made of a material that is transparent or transmissive to the light. Furthermore, the pickup tool may incorporate an opening or light guide through which the light can reach the μ-LED.

[0504] The μ-LED or semiconductor chip may be placed on a carrier or substrate before being picked up by the pick-up tool. Light for generating electron-hole pairs can be transmitted through the carrier or substrate to impinge on the μ-LED. For this purpose, at least a portion of the carrier or substrate may be made of a material that is at least partially transparent or transmissive to light, or the carrier or substrate may incorporate an opening or a light guide.

[0505] Alternatively, the μ-LED or all optoelectronic semiconductor chips may be illuminated with light from the side or oblique direction.

[0506] It may be specified that electron-hole pairs are not generated in all μ-LEDs or optoelectronic semiconductor chips, but are generated selectively only in some structural elements. For example, a large number of μ-LEDs fabricated on a wafer may be provided, and electron-hole pairs may be generated only in selected μ-LEDs among the large number of optoelectronic semiconductor chips. Then, these μ-LEDs, excluding the selected defective μ-LEDs, are also picked up using a pick-up tool. The selective excitation of the μ-LEDs can be achieved, for example, by passing light for generating electron-hole pairs through a mask.

[0507] Another possibility for picking up only selected μ-LEDs is for the pick-up tool to generate an electric field only in a predetermined area. This can be achieved, for example, by at least partially individually drivable metal contacts embedded in the pick-up tool. This selection allows for the formation of suitable spacings between the picked-up μ-LEDs (e.g., every third, every ninth, etc.). This spacing can be selected so that the picked μ-LEDs can be placed directly on the target matrix.

[0508] According to one configuration, the pick-up tool has a number of protrusions or stamps on its surface facing the μ-LEDs. When the pick-up tool is lowered, only the protrusions come into contact with the semiconductor optoelectronic chip, and therefore only the protrusions are able to pick up the μ-LEDs. Neither the areas between the protrusions nor the areas outside the protrusions will pick up the optoelectronic semiconductor chip. Again, the protrusions may be arranged at predefined intervals corresponding to the space occupied by the target matrix. Further concepts that further develop this aspect are disclosed in the present application.

[0509] Alternatively, the pick-up tool may have, in at least one area, a continuous flat surface designated for picking up μ-LEDs, which allows for greater flexibility in picking up μ-LEDs or optoelectronic semiconductor chips arranged in different patterns and / or spacings.

[0510] Furthermore, the pick-up tool may have the shape of a cylinder that rolls over the μ-LEDs to pick them up. For example, the pick-up tool may be shaped like a laser printer drum. The cylindrical pick-up tool may be moved over the μ-LEDs to pick them up. Alternatively, the rotation axis of the cylindrical pick-up tool may be fixed, and the carrier with the optoelectronic semiconductor chips may be slid under the pick-up tool.

[0511] To place the μ-LED, the charge of the pickup tool can be changed via the metal contacts. For example, the polarity of the metal contacts can be reversed. This creates a repulsive electrical interaction between the pickup tool and the μ-LED, which is polarized by the electron-hole pairs. This causes the μ-LED to fall or strike the target matrix.

[0512] Furthermore, it is possible to selectively place specific μ-LEDs by changing the charge only at specific locations or in specific regions of the pickup tool.

[0513] Another possibility for placing the μ-LED is that the carrier or substrate on which the μ-LED is applied generates an adhesive force that is greater than the attractive force between the pick-up tool and the μ-LED. For example, the surface of the carrier or substrate may be coated with a suitable material, such as an adhesive, a varnish, a solder material, etc. Furthermore, the μ-LED can be detached from the pick-up tool by mechanical forces, such as shear or acceleration forces.

[0514] According to one configuration, the pick-up tool directly contacts the μ-LED or optoelectronic semiconductor chip to pick it up, and when transferring the optoelectronic semiconductor chip, the pick-up tool holds the chip by van der Waals forces.

[0515] A further aspect relates to a device for picking and placing optoelectronic semiconductor chips, which may be, for example, an automated assembly machine or may be integrated into an automated assembly machine.

[0516] The device includes an excitation element for generating electron-hole pairs in the μ-LED or optoelectronic semiconductor chip, and a pickup tool for picking up and placing the μ-LED or optoelectronic semiconductor chip. The electron-hole pairs generate an electric dipole field in the vicinity of the μ-LED or optoelectronic semiconductor chip. The pickup tool is configured to generate an electric field that interacts with the electric dipole field of the μ-LED or optoelectronic semiconductor chip, allowing it to be picked up. The picked-up μ-LED or optoelectronic semiconductor chip is then transferred to a predetermined location and placed at that location.

[0517] According to one configuration, the excitation element is configured to generate light having a predetermined wavelength or range of wavelengths for generating electron-hole pairs in the μ-LED or optoelectronic semiconductor chip. For example, the excitation element may include a light source and / or a light guide.

[0518] The excitation element may be arranged so that light for generating electron-hole pairs is incident on the μ-LED through the pick-up tool or through a carrier on which the μ-LED is arranged. The pick-up tool may have a number of protrusions on its surface facing the μ-LED or the semiconductor optoelectronic chip. The μ-LED or the optoelectronic semiconductor chip can be picked up by the protrusions of the pick-up tool.

[0519] Alternatively, at least a portion of the surface of the pick-up tool facing the μ-LED or optoelectronic semiconductor chip may be generally planar and configured to pick up the μ-LED or optoelectronic semiconductor chip.

[0520] Furthermore, the device for picking up and placing a μ-LED or an optoelectronic semiconductor chip may have the configuration of the method for picking up and placing a μ-LED or an optoelectronic semiconductor chip described above.

[0521] A further aspect of the μ-Display implementation involves a solution using a dual transfer process for transferring and positioning μ-LEDs on a backplane substrate. In this case, an intermediate carrier is formed to the target size of the array, particularly the display, and this intermediate carrier has the same μ-LED density as the wafer on which the μ-LEDs are fabricated. During transfer to the target substrate, the microchips are thinned out, so that, in the best case, one color of microchips—red, green, and blue—is transferred from the intermediate carrier to the target substrate using a corresponding large transfer stamp in one transfer step. This two-step transfer process effectively reduces the average number of transfer steps per array, specifically by more than an order of magnitude. This allows the use of intermediate carriers to reduce the number of stamping steps and thus reduce costs when fabricating large-area μ-Displays.

[0522] According to some embodiments, a method for fabricating a large number (n or less) of arrays A of optoelectronic pixels, particularly μ-displays, is proposed. Furthermore, this method can be implemented for each of the colors red, green, and blue. In a first step, a plurality of μ-LEDs are produced on a wafer or carrier substrate at a first density. A first transfer step is then performed using a first transfer stamp to transfer the μ-LEDs to an intermediate carrier at the first density. This is followed by a second transfer step using a second transfer stamp. In this step, the μ-LEDs are transferred from the intermediate carrier to a target substrate at a second density that is n times smaller than the first density (where n is an integer, in particular). In this case, the target substrate provides each of the arrays, particularly an array area common to all three colors, with the intermediate carrier having a size equal to or larger than the size of the second transfer stamp, and the size of the second transfer stamp being equal to or k times smaller than the array area (where k is an integer, in particular).

[0523] In another embodiment, an intermediate carrier can be provided on which the module regions detached from the carrier substrate are placed by the first transfer stamp. The intermediate carrier can have multiple module regions. In this way, an intermediate carrier is provided on which the module regions can be temporarily and completely transferred, but which can also be detached again in a second transfer step to be transferred to the final target substrate.

[0524] μ-LEDs on a carrier substrate can be fabricated in such a way that they can be detached from the carrier substrate individually or in parallel using anchor elements. Here, the adhesion force of the μ-LEDs to the intermediate carrier must be stronger than the adhesion force of the μ-LEDs to the first transfer stamp. When the μ-LEDs are detached a second time from the intermediate carrier, the adhesion force of the μ-LEDs to the second transfer stamp must be correspondingly stronger than the adhesion force to the intermediate carrier. Similarly, the appropriate choice of adhesive, intervia, or solder attachment connections on the target substrate must enable transfer from the second transfer stamp to the final substrate surface. By appropriately selecting materials and performing appropriate process operations during the two-sta...

Claims

[Claim 1] An arrangement structure, At least one light emitting device, in particular at least one μ-LED, said light emitting device comprising: a conductive structure having an upper main surface and a lower main surface spaced apart from said upper main surface; a cavity provided in said conductive structure, said cavity having a width and a length; a semiconductor layer stack arranged in the cavity along a first main direction and extending at least beyond the upper main surface; the semiconductor layer stack comprising: an active layer; a first electrical contact; a second electrical contact; and having the length of the cavity is substantially based on n / 2 of the wavelength of the light emitted during operation, n being a natural number; at least one light emitting device, in particular at least one μ-LED; and / or at least one μ-LED or optoelectronic semiconductor arrangement comprising a three-dimensional light-emitting heterostructure having a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer, said light-emitting heterostructure comprises aluminium gallium arsenide and / or aluminium gallium indium phosphide and / or aluminium gallium indium phosphide, the light-emitting heterostructure is three-dimensionally formed by growth on a shaping layer comprising {110} oriented sidewalls selectively epitaxially deposited on a gallium arsenide (111)B epitaxial substrate, and can optionally be provided with a flat upper surface {111} (10); at least one μ-LED or optoelectronic semiconductor device; and / or at least two μ-LEDs, in particular an array of μ-LEDs, each μ-LED forming an active layer suitable for emitting light between an n-type doped layer and a p-type doped layer, between two adjacently formed μ-LEDs, material of the layer sequence is interrupted or removed from the n-doped and p-doped sides up to or into the cladding layer or up to or at least partially into the active zone, so that a material transition of maximum thickness dC is formed, as a result of which the electrical and / or optical conductivity in said material transition is reduced; at least two μ-LEDs, in particular an array of μ-LEDs; and / or a μ-LED module with at least one layer stack providing a base module, said layer stack having a first layer formed on a carrier, in particular a growth carrier, on which an active layer is formed and on which a second layer is formed, in which a first contact is connected to a surface area of ​​the second layer facing away from the carrier and a second contact is connected to a surface area of ​​the first layer facing away from the carrier, Optionally, the device comprises a generally planar target matrix formed on a first carrier, having rows and columns of μ-LEDs at occupiable locations; one or more μ-LED modules include at least two components of a size corresponding to said occupyable space; the μ-LED modules are positioned on the first carrier and electrically connected in such a way that a number of locations remain in the target matrix that are not occupied by components, at least partially at said locations at which at least one sensor element is positioned and electrically connected in each case, μ-LED module; and / or a μ-LED arrangement, said μ-LED arrangement comprising a combination of coated material volumes having the shape of a polyhedron or a prism with an active layer disposed therein; and μ-LED arrangement, characterized in that for emission of a specific color, a conversion material adapted to this color is formed between the material volumes of a combination. An arrangement comprising: the active layer of the μ-LED comprises at least one quantum well, a central region of the active layer being laterally surrounded by a second region of the active layer, the band gap of which is larger than the band gap of the central region, and a dopant being introduced into the second region, the dopant creating quantum well intermixing in at least one quantum well of the active layer located in the second region; and / or the μ-LED is part of an array which comprises at least the μ-LEDs, the μ-LEDs being fabricated vertically and a first contact of a light emitter on one side of the substrate being connected to the first contact area; a second contact of the light emitter, on the same side as the substrate and not facing the substrate, is connected to a second contact region by a transparent contact layer and a first metallic mirror layer; a reflector structure surrounds the light emitter, the reflector structure being provided with a second metallic mirror layer; and / or at least the μ-LED is arranged on a planar carrier substrate of the pixel element and is configured such that light is emitted in a direction transverse to the carrier substrate plane and away from said carrier substrate; the μ-LED has an electrical contact on its upper side facing away from the carrier substrate, the pixel element comprises, on the upper surface of the at least one μ-LED, an at least partially conductive planar contact layer electrically connected to the electrical contacts of the at least one μ-LED; the contact layer is constructed to be at least partially transparent for the light emitted by the at least one μ-LED, on which conductor tracks are provided which are electrically and planarly connected to the contact layer, the electrical conductivity of the conductor tracks is greater than the electrical conductivity of the contact layers, and / or The μ-LED is fixed to one side of a substrate; - a first electrical contact on the face opposite to said substrate, said first contact being electrically connected by a mirror coating to an electrical control contact on the front face of said substrate; - said mirror coating at least partially covers said substrate surface facing towards at least one die; and / or the μ-LED is a sub-pixel of a pixel element for generating a pixel of a display, the pixel element being formed in particular by means of the μ-LED and a further μ-LED from at least two sub-pixels emitting the same color, a subpixel separation element is provided between two adjacent subpixels of the same pixel element, said subpixel separation elements are configured to separate with regard to the electrical drive control of each subpixel and in each case to be optically coupled with regard to the light emitted by said subpixel, and / or the device comprises a pixel field having a substrate on which pixels are arranged in a field and for electrically contacting the pixels; the substrate provides a set of primary contacts for at least one pixel, the set of primary contacts of the pixel being provided for electrically contacting a group of sub-pixels, the substrate having a set of replacement contacts for the at least one pixel; - a primary contact of said pixel is populated with said sub-pixels, the sub-pixel group comprises defective inactive sub-pixels, a replacement sub-pixel is mounted on one replacement contact of the set of replacement contacts of said pixel in place of a defective, inactive sub-pixel; To improve the transfer of the light emitting device, the at least one μ-LED or the at least two μ-LEDs, the μ-LED arrangement or the μ-LED module, at least two pick-up elements are provided on a flat carrier substrate, said pick-up elements being - configured to hold the μ-LED, the μ-LED arrangement, the μ-LED module or the light-emitting device releasably between the at least two pick-up elements, so that the μ-LED can be moved with a defined minimum force in a direction perpendicular to the carrier structure plane, of the at least two pick-up elements, at least one pick-up element is configured to simultaneously hold and / or support a second μ-LED arranged adjacently; and / or - producing μ-LEDs on a carrier substrate at a first density, a first transfer step is carried out by means of a first transfer stamp which transfers said μ-LEDs onto an intermediate substrate at said first density, a second transfer step is carried out by means of a second transfer stamp which transfers from the intermediate carrier to a target substrate at a second density which is n times smaller than the first density, the target substrate providing a common array area for each one of the arrays, in particular for all three colors, the size of the intermediate carrier being equal to or larger than the size of the second transfer stamp, the size of the second transfer stamp being equal to or k times smaller than the array area, Here, the arrangement structure is: - a pixel array for a display, in particular in polar coordinates, said pixel array comprising: - comprising a plurality of light emitting devices, μ-LEDs, μ-LED arrangements or μ-LED modules, - are arranged in at least one row starting from a starting point on an axis line and passing through said starting point; the pixel elements have a height and a variable width, the width of the pixel elements increasing substantially with distance from the starting point; The arrangement structure further comprises: - a plurality of pixel structures arranged in rows and columns, said pixel structures being a first substrate structure (I) in or on which μ-LEDs, μ-LED arrangements, μ-LED modules or light-emitting devices are arranged, the first substrate structure having an edge length of less than 50 μm, in particular less than 20 μm, forming a pixel structure arranged in said rows and columns, the μ-LEDs, the μ-LED arrangement, the μ-LED module or the light emitting device are individually controllable; and a plurality of contacts are disposed on a surface of the first substrate structure facing a direction of irradiation of light; a second substrate structure (III) comprising at its surface a number of contacts corresponding to the contacts of said first substrate structure and comprising a number of digital circuits for addressing optoelectronic components, the first substrate structure and the second substrate structure are connected to each other, and a plurality of contacts are electrically connected to the corresponding contacts; the first substrate structure is formed from a first material system and the second substrate structure is formed from a second, in particular a different material system than the first material system, And the second substrate structure is - a device for electronically controlling the μ-LED pixel cells, in particular made in NMOS technology, said device comprising: - including data signal lines, threshold lines and select signal lines; the contacting of the second substrate structure with the μ-LED, the μ-LED arrangement, the μ-LED module or the light-emitting device is made in such a way that they are electrically connected together in series with a dual-gate transistor between a first potential terminal and a second potential terminal, the dual-gate transistor having its current line contacts arranged between a terminal of the μ-LED, the μ-LED arrangement, the μ-LED module or the light-emitting device and a potential terminal, a first control gate of the dual-gate transistor being connected to a threshold line, a select-and-hold circuit having a charge storage coupled to a second control gate of the dual-gate transistor and to a current line contact of the dual-gate transistor, and a control transistor having a control terminal connected to the select signal line; Including, and / or a supply circuit, the supply circuit comprising: an error correction detector having a reference signal input, an error signal input and a correction signal output; a controllable current source having a current output and a control signal terminal, said control signal terminal being connected to a correction signal output to form a control loop of the controllable current source, said current source being configured to provide a current to said current output in response to a signal at said control signal terminal; a backup source having an output configured to provide a backup signal; a switching device configured to supply, in response to a switching signal (VPWM), either a signal derived from the current of said current output or a backup signal to an error signal input, with additional isolation of the current output of said current source; having and / or a driver circuit for driving a plurality of μ-LEDs, a μ-LED arrangement, a μ-LED module or a light emitting device, said driver circuit comprising: a plurality of first memory cells each including a set input, a reset input and an output; each first memory cell is triggered to a first state at said output by a set signal at said set input and retains said first state until reset to a second state at said reset input; the output of each first memory cell is adapted to control a respective one of the μ-LEDs, the μ-LED arrangement, the μ-LED module or a light-emitting device; And / or the arrangement includes: an IC substrate component having a monolithic integrated circuit and IC substrate contacts arranged in a matrix; a monolithic pixelated optochip comprising a semiconductor layer sequence having a first semiconductor layer with a first doping and a second semiconductor layer with a second doping, the polarity of the charge carriers of the first semiconductor layer being different from the polarity of the charge carriers of the second semiconductor layer, the semiconductor layer sequence defining a stacking direction; It is equipped with Within the monolithic pixelated optochip are μ-LEDs arranged as a matrix; each μ-LED has a μ-LED back surface facing said IC substrate component and a first light source contact adjacent and in contact with said first semiconductor layer and in each case conductively connected with one of said IC substrate contacts; a projection area of ​​the first light source contact on the rear surface of the μ-LED corresponds to at most half the area of ​​the rear surface of the μ-LED, and the first light source contact is surrounded by a rear absorber in a lateral direction perpendicular to the stacking direction; The arrangement comprises a plurality of μ-LEDs, μ-LED arrangements, μ-LED modules or light emitting devices, and each μ-LED, μ-LED arrangement, μ-LED module or light emitting device has a size along at least one spatial direction of 70 micrometers or less.

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