Manufacturing method of display device
By using different evaporation sources to control the deposition angle of the material in the manufacturing process of OLED display equipment, the problem of inaccurate formation of the end surface of the organic layer is solved, and the performance of display elements and the reliability of the equipment is improved.
Patent Information
- Application Number
- JP2025006827
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-01-17
- Publication Date
- 2025-04-22
- Estimated Expiration
- 2041-01-25
AI Technical Summary
In the prior art, when manufacturing OLED display devices, due to the processing error of the precision mask and the deformation of the opening shape, the end face of the organic layer is inaccurately formed, which in turn affects the performance of the display elements.
During the manufacturing process, different evaporation source movement directions are used to control the deposition angle of the material when forming the first carrier adjustment layer and the light emitting layer, respectively, thereby ensuring that the end surface of the organic layer is accurately formed.
It effectively suppresses the degradation of display elements' performance and improves the overall performance and reliability of display devices.
Smart Images

Figure 2025066120000001_ABST
Abstract
Description
[Technical field]
[0001] An embodiment of the present invention relates to a method for manufacturing a display device. [Background technology]
[0002] In recent years, display devices using organic light-emitting diodes (OLEDs) as display elements have been put to practical use. The display element has an organic layer between a pixel electrode and a common electrode. The organic layer includes a light-emitting layer as well as functional layers such as a hole transport layer and an electron transport layer. Such an organic layer is formed, for example, by a vacuum deposition method.
[0003] For example, in the case of mask deposition, a fine mask having an opening corresponding to each pixel is applied. However, due to the processing accuracy of the fine mask, deformation of the opening shape, etc., the formation accuracy of the thin film formed by deposition may be reduced. For example, when forming an organic layer in which multiple functional layers are stacked, the end face of the organic layer may not be formed at the desired position, which may lead to deterioration of the performance of the display element. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2000-195677 A [Patent Document 2] JP 2004-207217 A [Patent Document 3] JP 2008-135325 A [Patent Document 4] JP 2009-32673 A [Patent Document 5] JP 2010-118191 A [Patent Document 6] International Publication No. 2019 / 026511 Summary of the Invention [Problem to be solved by the invention]
[0005] An object of the present invention is to provide a display device capable of suppressing deterioration in performance of a display element, and a method for manufacturing the display device. [Means for solving the problem]
[0006] A display device according to an embodiment includes: a first insulating layer disposed on the substrate; a lower electrode disposed on the first insulating layer; a second insulating layer disposed on the first insulating layer and having an opening overlapping the lower electrode; an organic layer having a light-emitting layer, disposed in the opening, covering the lower electrode; and an upper electrode covering the organic layer, wherein the light-emitting layer has a first bottom surface, a first end surface, and a second end surface intersecting the first end surface, and an angle between the first end surface and the first bottom surface in a cross-sectional view along a first direction is greater than an angle between the second end surface and the first bottom surface in a cross-sectional view along a second direction intersecting the first direction.
[0007] A method for manufacturing a display device according to an embodiment includes the steps of: A method for manufacturing a display device including a lower electrode, an organic layer disposed on the lower electrode, and an upper electrode disposed on the organic layer, wherein the step of forming the organic layer includes a step of forming a first carrier adjustment layer and a step of forming a light-emitting layer, and in the step of forming the first carrier adjustment layer, a first material is evaporated while a first evaporation source is moved in a first direction relative to a substrate to be processed on which the lower electrode has been formed, and in the step of forming the light-emitting layer, a second material is evaporated while a second evaporation source is moved in a second direction intersecting the first direction relative to the substrate to be processed on which the first carrier adjustment layer has been formed. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. [Diagram 2] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. [Diagram 3] FIG. 3 is a plan view showing an example of the pixel PX shown in FIG. [Figure 4] FIG. 4 is a diagram for explaining one method for controlling the radiation angle. [Diagram 5] FIG. 5 is a diagram for explaining another method for controlling the radiation angle. [Figure 6] FIG. 6 is a diagram for explaining another method for controlling the radiation angle. [Figure 7A] FIG. 7A shows the cross-sectional shape of the layer LY along the direction DR1. [Figure 7B] FIG. 7B shows the cross-sectional shape of the layer LY along the direction DR2. [Figure 8A] FIG. 8A shows another cross-sectional shape of the layer LY along the direction DR1. [Figure 8B] FIG. 8B shows another cross-sectional shape of the layer LY along the direction DR2. [Figure 9] FIG. 9 is a plan view showing an example of the display element 20. As shown in FIG. [Figure 10] FIG. 10 is a cross-sectional view showing an example of the display element 20 taken along the line AB shown in FIG. [Figure 11] FIG. 11 is a cross-sectional view showing an example of the display element 20 taken along line CD shown in FIG. [Figure 12] FIG. 12 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. [Figure 13] FIG. 13 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. [Figure 14] FIG. 14 is a plan view showing another example of the display element 20. As shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view showing an example of a display element 20E taken along the line AB shown in FIG. [Figure 16] FIG. 16 is a cross-sectional view showing an example of the display element 20 taken along line CD shown in FIG. [Figure 17] FIG. 17 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. [Figure 18] FIG. 18 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. [Figure 19] FIG. 19 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily conceive of while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, the drawings may be schematic in width, thickness, shape, etc. of each part compared to the actual embodiment in order to make the explanation clearer, but they are merely examples and do not limit the interpretation of the present invention. In this specification and each figure, components that perform the same or similar functions as those described above with respect to the previous figures are given the same reference numerals, and duplicate detailed descriptions may be omitted as appropriate.
[0010] In addition, in the drawings, an X-axis, a Y-axis, and a Z-axis that are orthogonal to each other are shown as necessary for ease of understanding. The direction along the X-axis is called the X-direction or the first direction, the direction along the Y-axis is called the Y-direction or the second direction, and the direction along the Z-axis is called the Z-direction or the third direction. The plane defined by the X-axis and the Y-axis is called the XY plane, the plane defined by the Y-axis and the Z-axis is called the YZ plane, and the plane defined by the X-axis and the Z-axis is called the XZ plane. Viewing the XY plane is called planar view.
[0011] The display device DSP according to this embodiment is an organic electroluminescence display device having an organic light-emitting diode (OLED) as a display element, and is mounted on a television, a personal computer, a mobile terminal, a mobile phone, etc. The display element described below can be applied as a light-emitting element of a lighting device, and the display device DSP can be diverted to other electronic devices such as a lighting device.
[0012] 1 is a diagram showing an example of the configuration of a display device DSP according to this embodiment. The display device DSP includes a display unit DA that displays an image on an insulating substrate 10. The substrate 10 may be glass or a flexible resin film.
[0013] The display unit DA includes a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y. Each pixel PX includes a plurality of sub-pixels SP1, SP2, and SP3. In one example, the pixel PX includes a red sub-pixel SP1, a green sub-pixel SP2, and a blue sub-pixel SP3. The pixel PX may include four or more sub-pixels including sub-pixels of other colors such as white in addition to the above three sub-pixels.
[0014] An example of the configuration of one sub-pixel SP included in a pixel PX will be briefly described. That is, the subpixel SP includes a pixel circuit 1 and a display element 20 whose driving is controlled by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a driving transistor 3, and a capacitor 4. The pixel switch 2 and the driving transistor 3 are switching elements constituted by, for example, thin film transistors.
[0015] With respect to the pixel switch 2, the gate electrode is connected to the scanning line GL, the source electrode is connected to the signal line SL, and the drain electrode is connected to one electrode constituting the capacitor 4 and the gate electrode of the drive transistor 3. With respect to the drive transistor 3, the source electrode is connected to the other electrode constituting the capacitor 4 and the power line PL, and the drain electrode is connected to the anode of the display element 20. The cathode of the display element 20 is connected to the power supply line FL. Note that the configuration of the pixel circuit 1 is not limited to the example shown in the figure.
[0016] The display element 20 is an organic light-emitting diode (OLED) that is a light-emitting element. For example, the subpixel SP1 includes a display element that emits light corresponding to a red wavelength, the subpixel SP2 includes a display element that emits light corresponding to a green wavelength, and the subpixel SP3 includes a display element that emits light corresponding to a blue wavelength. The pixel PX includes multiple subpixels SP1, SP2, and SP3 that have different display colors, thereby realizing multi-color display.
[0017] However, the display elements 20 of the subpixels SP1, SP2, and SP3 may be configured to emit light of the same color, thereby achieving a monochromatic display.
[0018] Furthermore, when the display element 20 of each of the subpixels SP1, SP2, and SP3 is configured to emit white light, a color filter may be disposed facing the display element 20. For example, the subpixel SP1 includes a red color filter facing the display element 20, the subpixel SP2 includes a green color filter facing the display element 20, and the subpixel SP3 includes a blue color filter facing the display element 20. This makes it possible to realize a multi-color display.
[0019] Alternatively, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit ultraviolet light, a light conversion layer is disposed opposite the display elements 20, thereby enabling multicolor display to be realized.
[0020] FIG. 2 is a diagram showing an example of the configuration of the display element 20. As shown in FIG. The display element 20 includes a lower electrode (first electrode) E1, an organic layer OR, and an upper electrode (second electrode) E2. The organic layer OR includes a carrier adjustment layer (first carrier adjustment layer) CA1, a light-emitting layer EL, and a carrier adjustment layer (second carrier adjustment layer) CA2. The carrier adjustment layer CA1 is located between the lower electrode E1 and the light-emitting layer EL, and the carrier adjustment layer CA2 is located between the light-emitting layer EL and the upper electrode E2. The carrier adjustment layers CA1 and CA2 include a plurality of functional layers. Here, an example will be described in which the lower electrode E1 corresponds to the anode and the upper electrode E2 corresponds to the cathode.
[0021] The carrier adjustment layer CA1 includes, as functional layers, a hole injection layer F11, a hole transport layer F12, a carrier generation layer F13, an electron blocking layer F14, etc. The hole injection layer F11 is disposed on the lower electrode E1, the hole transport layer F12 is disposed on the hole injection layer F11, the carrier generation layer F13 is disposed on the hole transport layer F12, the electron blocking layer F14 is disposed on the carrier generation layer F13, and the light-emitting layer EL is disposed on the electron blocking layer F14.
[0022] The carrier adjustment layer CA2 includes, as functional layers, a hole blocking layer F21, an electron transport layer F22, an electron injection layer F23, etc. The hole blocking layer F21 is disposed on the light-emitting layer EL, the electron transport layer F22 is disposed on the hole blocking layer F21, the electron injection layer F23 is disposed on the electron transport layer F22, and the upper electrode E2 is disposed on the electron injection layer F23.
[0023] In addition, in addition to the above-mentioned functional layers, the carrier adjustment layers CA1 and CA2 may include other functional layers as necessary, and at least one of the above-mentioned functional layers may be omitted in the carrier adjustment layers CA1 and CA2.
[0024] FIG. 3 is a plan view showing an example of the pixel PX shown in FIG. The sub-pixels SP1, SP2, and SP3 constituting one pixel PX are each formed in a substantially rectangular shape extending in the second direction Y, and are aligned in the first direction X. The outer shape of each sub-pixel corresponds to the outer shape of the light-emitting area EA in the display element 20, but is shown in a simplified form and does not necessarily reflect the actual shape. Here, it is assumed that the light-emitting area EA is formed in a rectangular shape having a short side extending in the first direction X and a long side extending in the second direction Y.
[0025] The insulating layer 12, which will be described in detail later, is formed in a lattice shape extending in the first direction X and the second direction Y in a plan view, and surrounds each of the subpixels SP1, SP2, and SP3 or the display elements 20 of each subpixel. Such an insulating layer 12 may be called a rib, a partition wall, a bank, etc. The light-emitting region EA is formed in an opening OP of the insulating layer 12, and corresponds to a region where an organic layer OR is interposed between a lower electrode E1 and an upper electrode E2.
[0026] As an example, when the display elements 20 of the subpixels SP1, SP2, and SP3 are configured to emit light of different colors, the first direction X corresponds to the direction in which the subpixels of the different display colors are arranged, and the second direction Y corresponds to the direction in which the subpixels of the same display color are arranged. Alternatively, the subpixels of the same display color may be arranged in an oblique direction different from the first direction X and the second direction Y.
[0027] Each layer of the organic layer OR shown in Fig. 2 is formed by a vapor deposition method. At this time, the radiation angle of the material emitted from the vapor deposition source can be controlled, for example, by the following method.
[0028] FIG. 4 is a diagram for explaining one method for controlling the radiation angle. The substrate to be processed SUB is disposed opposite the deposition source VS as indicated by the dotted line. The deposition source VS includes a crucible 50 for accommodating a material, and a nozzle 51 connected to the crucible 50. The crucible 50 is heated by a heating mechanism. The vapor of the material generated by heating the crucible 50 is emitted at a radiation angle θ.
[0029] 4 shows a method for controlling the radiation angle (or steam directivity) θ by the shape of the nozzle 51. Here, the nozzle shown on the left side of the figure is referred to as the first nozzle 51, and the nozzle shown on the right side of the figure is referred to as the second nozzle 51. The shape of the first nozzle 51 is different from the shape of the second nozzle 51.
[0030] That is, the first nozzle 51 is thicker and shorter than the second nozzle 51. The emission angle θ1 of the vapor of the material emitted from the first nozzle 51 is larger than the emission angle θ2 of the vapor of the material emitted from the second nozzle 51 (θ1 > θ2). That is, the vapor emitted from the first nozzle 51 is likely to spread (has a small directivity). On the other hand, the vapor emitted from the second nozzle 51 is less likely to spread (has a high directivity). FIG. 5 is a diagram for explaining another method of controlling the emission angle. Also in the example shown in FIG. 5, the shape of the first nozzle 51 is different from the shape of the second nozzle 51. Here, the opening diameter D1 of the first nozzle 51 is smaller than the opening diameter D2 of the second nozzle 51 (D1 < D2). Even in such an example, the vapor of the material emitted from the first nozzle 51 is likely to spread, and the vapor of the material emitted from the second nozzle 51 is less likely to spread.
[0031] FIG. 6 is a diagram for explaining another method of controlling the emission angle. In the example shown in FIG. 6, the crucible shown on the left side of the figure is referred to as the first crucible 50, and the crucible shown on the right side of the figure is referred to as the second crucible 50. The temperature distribution of the first crucible 50 is different from the temperature distribution of the second crucible 50. For example, the heating temperature on the bottom side of the first crucible 50 is set higher than the heating temperature on the nozzle side, and the heating temperature on the bottom side of the second crucible 50 is set lower than the heating temperature on the nozzle side. In this way, the emission angle of the vapor can also be controlled by adjusting the temperature distribution of the crucible. In the example shown in FIG. 6, the vapor of the material emitted from the first nozzle 51 is likely to spread, and the vapor of the material emitted from the second nozzle 51 is less likely to spread.
[0032] The vapor deposition of each layer constituting the organic layer OR is performed while the vapor deposition source VS moves relative to the substrate SUB to be processed. That is, the vapor deposition source VS may move relative to the fixed substrate SUB to be processed, the substrate SUB to be processed may move relative to the fixed vapor deposition source VS, or both the substrate SUB to be processed and the vapor deposition source VS may move.
[0033] The cross-sectional shape of the layer LY formed by the above-mentioned method will be described. Here, the direction in which the deposition source VS moves is defined as DR2, and the direction perpendicular to the direction DR2 is defined as DR1. As the deposition source VS moves in the direction DR2, the material emitted from the deposition source VS is deposited on the substrate SUB to be processed. As a result, a layer LY is formed on the surface of the substrate SUB to be processed.
[0034] 7A shows a cross-sectional shape of the layer LY along the direction DR1. The layer LY has a bottom surface LB and an end surface LS1. The angle between the bottom surface LB and the end surface LS1 is called the inclination angle θL1 of the end surface LS1. The end surface LS1 corresponds to the end surface along the direction DR2 in which the deposition source VS moves. 7B shows a cross-sectional shape of the layer LY along the direction DR2. The layer LY further has an end surface LS2. The angle between the bottom surface LB and the end surface LS2 is referred to as the inclination angle θL2 of the end surface LS2. The end surface LS2 corresponds to an end surface perpendicular to the direction DR2 in which the deposition source VS moves, or an end surface along the direction DR1. The inclination angle θL2 is smaller than the inclination angle θL1 (θL2<θL1).
[0035] 8A shows another cross-sectional shape of the layer LY along the direction DR1. In this example, the deposition source VS has a number of nozzles 51 spaced apart along the direction DR1. The end surface LS1 corresponds to the end surface along the direction DR2 in which the deposition source VS moves. The angle between the bottom surface LB and the end surface LS1 is referred to as the inclination angle θL1 of the end surface LS1. 8B shows another cross-sectional shape of the layer LY along the direction DR2. The end surface LS2 corresponds to the end surface perpendicular to the direction DR2 in which the deposition source VS moves as shown in FIG. 8A, or the end surface along the direction DR1. The angle between the bottom surface LB and the end surface LS2 is called the inclination angle θL2 of the end surface LS2. The inclination angle θL2 is greater than the inclination angle θL1 (θL2>θL1).
[0036] 9 is a plan view showing an example of the display element 20. Note that only the configuration necessary for the explanation is shown here. In a plan view, at least one layer OLY constituting the organic layer OR overlaps with the lower electrode E1 indicated by a dotted line. The layer OLY is, for example, an emitting layer EL, but may be another functional layer. The layer OLY has a pair of end faces (first end faces) SS1 facing each other in the first direction X, and a pair of end faces (second end faces) SS2 facing each other in the second direction Y. The end face SS1 extends along the second direction Y, and the end face SS2 extends along the first direction X. The end face SS1 and the end face SS2 intersect with each other.
[0037] FIG. 10 is a cross-sectional view showing an example of the display element 20 taken along the line AB shown in FIG. The pixel circuit 1 shown in FIG. 1 is disposed on a substrate 10 and covered with an insulating layer 11. In FIG. 10, only the drive transistor 3 included in the pixel circuit 1 is illustrated in a simplified manner. The insulating layer (first insulating layer) 11 corresponds to a base layer of the display element 20. The insulating layer (second insulating layer) 12 is disposed on the insulating layer 11. The insulating layers 11 and 12 are, for example, organic insulating layers.
[0038] The lower electrode E1 is disposed on the insulating layer 11. The lower electrode E1 is an electrode disposed for each sub-pixel or each display element, and is electrically connected to the drive transistor 3. Such a lower electrode E1 may be called a pixel electrode, an anode, or the like.
[0039] The lower electrode E1 is a metal electrode formed of a metal material such as silver or aluminum. The lower electrode E1 may be a transparent electrode formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The lower electrode E1 may be a laminate of a transparent electrode and a metal electrode. For example, the lower electrode E1 may be configured as a laminate in which a transparent electrode, a metal electrode, and a transparent electrode are laminated in this order, or may be configured as a laminate of three or more layers. In the top emission type display element 20, the lower electrode E1 includes a metal electrode as a reflective electrode.
[0040] The insulating layer 12 has an opening OP. The opening OP is a through-hole formed in a region overlapping the lower electrode E1 and penetrating the insulating layer 12 to the lower electrode E1. The peripheral portion of the lower electrode E1 is covered with the insulating layer 12, and the central portion of the lower electrode E1 is exposed from the insulating layer 12 at the opening OP.
[0041] The organic layer OR includes carrier adjustment layers CA1 and CA2 and an emitting layer EL. The organic layer OR is disposed in the opening OP and covers the lower electrode E1. The carrier adjustment layer CA1 is located between the lower electrode E1 and the emitting layer EL, and the carrier adjustment layer CA2 is located between the emitting layer EL and the upper electrode E2.
[0042] The illustrated carrier adjustment layer CA1 corresponds to at least one of the hole injection layer F11, the hole transport layer F12, the carrier generation layer F13, and the electron blocking layer F14 shown in Fig. 2. The carrier adjustment layer CA2 corresponds to at least one of the hole blocking layer F21, the electron transport layer F22, and the electron injection layer F23 shown in Fig. 2.
[0043] The upper electrode E2 covers the organic layer OR. The upper electrode E2 may be called a common electrode, a counter electrode, a cathode, or the like.
[0044] The upper electrode E2 is a semi-transparent metal electrode formed of a metal material such as magnesium or silver. The upper electrode E2 may be a transparent electrode formed of a transparent conductive material such as ITO or IZO. The upper electrode E2 may be a laminate of a transparent electrode and a metal electrode. The upper electrode E2 is electrically connected to a power supply line arranged in the display unit DA or a power supply line arranged outside the display unit DA.
[0045] A portion of the organic layer OR located between the lower electrode E1 and the upper electrode E2 without the insulating layer 12 can form a light-emitting region of the display element 20. In one example, the thickness of the organic layer OR along the third direction Z is set so that the peak wavelength of the emission spectrum of the light-emitting layer EL coincides with the effective optical path length between the lower electrode E1 and the upper electrode E2. This realizes a microcavity structure for obtaining a resonance effect.
[0046] Although not shown, an optical adjustment layer for improving light extraction efficiency, a sealing layer for protecting the display element 20 from moisture, etc. are provided on the upper electrode E2.
[0047] In Fig. 10, an area including an end face of the light-emitting layer EL is shown in an enlarged manner. Here, a case will be described in which the layer OLY shown in Fig. 9 is the light-emitting layer EL of Fig. 10. A bottom face (first bottom face) B1 of the light-emitting layer EL is in contact with the carrier adjustment layer CA1. In a cross-sectional view of the XZ plane defined by the first direction X and the third direction Z, the angle θ11 between the end face SS1 and the bottom face B1 (the inclination angle θ11 of the end face SS1) is an acute angle.
[0048] The end surface SS1 is located on the carrier adjustment layer CA1 and in contact with the carrier adjustment layer CA2. The carrier adjustment layer CA2 covers the carrier adjustment layer CA1 on the outside of the light-emitting layer EL and is in contact with the insulating layer 12. The upper electrode E2 is in contact with the insulating layer 12 on the outside of the carrier adjustment layer CA2.
[0049] FIG. 11 is a cross-sectional view showing an example of the display element 20 taken along line CD shown in FIG. In a cross-sectional view of the YZ plane defined by the second direction Y and the third direction Z, the angle θ12 between the end face SS2 and the bottom face B1 (the inclination angle θ12 of the end face SS2) is an acute angle. The inclination angle θ11 of the end face SS1 shown in FIG. 10 is greater than the inclination angle θ12 of the end face SS2 shown in FIG. 11 (θ12<θ11).
[0050] The end surface SS2 is located on the carrier adjustment layer CA1 and is in contact with the carrier adjustment layer CA2. As shown in Fig. 10 and Fig. 11, the carrier adjustment layer CA2 covers the entire light-emitting layer EL including the end surfaces SS1 and SS2. Also in the YZ plane, the carrier adjustment layer CA2 covers the carrier adjustment layer CA1 on the outside of the light-emitting layer EL and is in contact with the insulating layer 12. The upper electrode E2 is in contact with the insulating layer 12 on the outside of the carrier adjustment layer CA2.
[0051] Next, a method for forming the light-emitting layer EL having the above-mentioned cross-sectional shape will be described.
[0052] FIG. 12 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. First, the substrate to be processed SUB is prepared. The substrate to be processed SUB is obtained by forming an insulating layer 11 on a base material 10, forming a lower electrode E1 on the insulating layer 11, and then forming an insulating layer 12 having an opening OP overlapping the lower electrode E1.
[0053] The substrate SUB is placed so that the insulating layer 12 and the deposition source VS face each other. After that, each layer constituting the organic layer OR is formed by deposition. In FIG. 12, the carrier adjustment layer CA1 is not shown. The light-emitting layer EL is a mixed layer containing a host material and a light-emitting material as a guest material.
[0054] When the sublimation temperature of the host material is different from that of the luminescent material, the host material and the luminescent material are placed in separate crucibles and heated to a predetermined temperature, but only one crucible 50 is shown here for simplification. The direction in which the deposition source VS moves is the second direction Y. In a cross section in a direction perpendicular to the movement direction of the deposition source VS as shown in FIG. 12, the radiation angle of the vapor emitted from the deposition source VS is controlled by, for example, the method described with reference to FIGS. 4 to 6. As a result, an end surface SS1 with an inclination angle θ11 is formed at a position overlapping the insulating layer 12.
[0055] FIG. 13 is a diagram for explaining a method of manufacturing the display element 20 shown in FIG. The deposition source VS moves in the second direction Y while emitting vapor. As a result, a light-emitting layer EL having an end face SS2 with an inclination angle θ12 at a position overlapping the insulating layer 12 is formed. The inclination angle θ11 of the end face SS1 shown in FIG. 12 is larger than the inclination angle θ12 of the end face SS2 shown in FIG. 13 (θ12<θ11). However, as described with reference to FIGS. 7A and 7B or FIGS. 8A and 8B, depending on the deposition technique, the inclination angle θ11 may be smaller than the inclination angle θ12 (θ12>θ11).
[0056] When subpixels of different display colors are adjacent in the first direction X, the light-emitting layers EL of different emission colors are adjacent in the first direction X, and their end faces SS1 face each other. Since the inclination angle θ11 of the end face SS1 of each light-emitting layer EL is larger than the inclination angle θ12 of the end face SS2, the distance between adjacent light-emitting layers EL (the distance between the opposing end faces SS1) can be ensured. This makes it possible to suppress undesired light emission due to the movement of carriers between adjacent subpixels, and to obtain the desired chromaticity.
[0057] In addition, the carrier adjustment layer CA2 contacts the end faces SS1 and SS2 of the light-emitting layer EL and covers the light-emitting layer EL and the carrier adjustment layer CA1. This prevents undesired current leakage from the periphery of the organic layer OR. This prevents performance degradation of the display element 20.
[0058] 14 is a plan view showing another example of the display element 20. Note that only the configuration necessary for the explanation is shown here. The multiple display elements 20 aligned in the second direction Y are configured to emit light of the same color. In other words, the second direction Y corresponds to the direction in which sub-pixels of the same display color are aligned. Among the multiple display elements 20, the display element 20E is located at the outermost periphery of the display unit DA.
[0059] In the plurality of display elements 20, at least one layer OLY constituting the organic layer OR is a common layer overlapping the plurality of lower electrodes E1 indicated by dotted lines. The layer OLY is, for example, an emitting layer EL, but may be another functional layer. The layer OLY has an end surface (first end surface) SS1 extending along the second direction Y, and an end surface (second end surface) SS2 extending along the first direction X.
[0060] Fig. 15 is a cross-sectional view showing an example of a display element 20E taken along the line AB shown in Fig. 14. Note that the cross-sectional shape in the XZ plane is not limited to the display element 20E, but is similar for the other display elements 20.
[0061] The organic layer OR includes an emitting layer EL, a carrier adjustment layer CA1 between the lower electrode E1 and the emitting layer EL, and a carrier adjustment layer CA2 between the emitting layer EL and the upper electrode E2. The carrier adjustment layer CA1 corresponds to at least one of the hole injection layer F11, the hole transport layer F12, the carrier generation layer F13, and the electron block layer F14 shown in FIG. 2. The carrier adjustment layer CA2 corresponds to at least one of the hole block layer F21, the electron transport layer F22, and the electron injection layer F23 shown in FIG. 2.
[0062] 15, an area including an end face of the carrier adjustment layer CA1 and an area including an end face of the light-emitting layer EL are enlarged and shown. A bottom face (first bottom face) B1 of the light-emitting layer EL is in contact with the carrier adjustment layer CA1. In a cross-sectional view of the XZ plane, an angle θ11 between the end face SS1 and the bottom face B1 (inclined angle θ11 of the end face SS1) is an acute angle.
[0063] The carrier adjustment layer CA1 has a bottom surface (second bottom surface) B2 and an end surface (third end surface) SS3. The bottom surface B2 is in contact with the insulating layer 12. In a cross-sectional view of the XZ plane, the angle θ13 between the end surface SS3 and the bottom surface B2 (the inclination angle θ13 of the end surface SS3) is an acute angle. The inclination angle θ13 of the end surface SS3 is smaller than the inclination angle θ11 of the end surface SS1 (θ13<θ11). However, as described with reference to FIGS. 7A and 7B or FIGS. 8A and 8B, depending on the deposition technique, the inclination angle θ13 may be larger than the inclination angle θ11 (θ13>θ11).
[0064] The end surface SS1 is located on the carrier adjustment layer CA1 and in contact with the carrier adjustment layer CA2. The carrier adjustment layer CA2 is in contact with the carrier adjustment layer CA1 outside the light-emitting layer EL. The end surface SS3 is located on the insulating layer 12 and in contact with the upper electrode E2. The upper electrode E2 is in contact with the insulating layer 12 outside the carrier adjustment layer CA1.
[0065] FIG. 16 is a cross-sectional view showing an example of the display element 20 taken along line CD shown in FIG. The carrier adjusting layers CA1 and CA2 and the light emitting layer EL constituting the organic layer OR are common layers formed continuously across a plurality of display elements 20 including the outermost display element 20E.
[0066] In the cross-sectional view of the YZ plane, the inclination angle θ11 of the end surface SS1 shown in FIG. 15 is larger than the inclination angle θ12 of the end surface SS2 shown in FIG. 16 (θ12<θ11).
[0067] The end surface SS2 is located on the carrier adjustment layer CA1 and is in contact with the carrier adjustment layer CA2. The carrier adjustment layer CA2 covers the entire light-emitting layer EL including the end surfaces SS1 and SS2. The end surface SS4 of the carrier adjustment layer CA1 is located on the insulating layer 12 and is in contact with the upper electrode E2. The upper electrode E2 is in contact with the insulating layer 12 on the outside of the carrier adjustment layer CA1.
[0068] Next, a method for forming the light-emitting layer EL having the above-mentioned cross-sectional shape will be described.
[0069] FIG. 17 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. First, the substrate to be processed SUB is prepared. Then, the substrate to be processed SUB is placed so that the insulating layer 12 and the deposition source (first deposition source) VSA face each other.
[0070] Thereafter, a carrier adjusting layer CA1 is formed by vapor deposition. The vapor deposition source VSA includes a crucible 50A and a nozzle 51A connected to the crucible 50A. The crucible 50A contains a material (first material) for forming a functional layer. When forming a carrier adjusting layer CA1 including multiple functional layers, multiple crucibles containing the materials for each functional layer are required, but only one crucible 50A is shown here for simplicity.
[0071] The deposition source VSA moves in a first direction X while emitting vapor. As a result, the emitted material is deposited, and a carrier adjustment layer CA1 having an end face SS3 with an inclination angle θ13 at a position overlapping the insulating layer 12 is formed. In addition, in a cross section in a direction perpendicular to the moving direction of the deposition source VSA, the radiation angle of the vapor emitted from the deposition source VSA is controlled by, for example, the method described with reference to FIGS. 4 to 6.
[0072] FIG. 18 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. The substrate to be processed SUB on which the carrier adjustment layer CA1 shown in FIG. 17 has already been formed is placed so that the carrier adjustment layer CA1 and the deposition source (second deposition source) VSB face each other.
[0073] Thereafter, the light-emitting layer EL is formed by a vapor deposition method. The vapor deposition source VSB includes a crucible 50B and a nozzle 51B connected to the crucible 50B. The crucible 50B contains a material (second material) for forming the light-emitting layer EL. As described above, since the light-emitting layer EL is a mixed layer of a host material and a light-emitting material, multiple crucibles are required, but only one crucible 50B is illustrated here for simplicity.
[0074] 2, when the display colors of the sub-pixels aligned in the second direction Y are the same, the moving direction of the deposition source VSB when forming the light-emitting layer EL is set to the second direction Y. That is, the moving direction of the deposition source VSB (second direction Y) and the moving direction of the deposition source VSA (first direction X) are perpendicular to each other.
[0075] In addition, when the display colors of the sub-pixels arranged in a diagonal direction different from the first direction X and the second direction Y are the same, the moving direction of the deposition source VSB when forming the light-emitting layer EL is set to be a diagonal direction. In any case, the moving direction of the deposition source VSB and the moving direction of the deposition source VSA intersect with each other on the XY plane.
[0076] The deposition source VSB moves in the second direction Y while emitting vapor. As a result, the emitted material is deposited, and a light-emitting layer EL having an end surface SS2 with an inclination angle θ12 is formed at a position overlapping the carrier adjustment layer CA1. In addition, in a cross section perpendicular to the moving direction of the deposition source VSB, the radiation angle of the vapor emitted from the deposition source VSB is controlled by, for example, the method described with reference to FIGS. 4 to 6.
[0077] FIG. 19 is a diagram for explaining a method of manufacturing the plurality of display elements 20 shown in FIG. The substrate to be processed SUB on which the light-emitting layer EL shown in FIG. 18 has already been formed is placed so that the light-emitting layer EL and the deposition source (third deposition source) VSC face each other.
[0078] Thereafter, a carrier adjustment layer CA2 is formed by vapor deposition. The vapor deposition source VSC includes a crucible 50C and a nozzle 51C connected to the crucible 50C. The crucible 50C contains a material (third material) for forming a functional layer. When forming a carrier adjustment layer CA2 including multiple functional layers, multiple crucibles containing the materials for each functional layer are required, but only one crucible 50C is shown here for simplicity.
[0079] The deposition source VSC moves in the first direction X while emitting vapor. The emitted material is deposited to form a carrier adjustment layer CA2 covering the light-emitting layer EL. The carrier adjustment layer CA2 has an end surface SS5 with an inclination angle θ15. In addition, in a cross section perpendicular to the moving direction of the deposition source VSC, the radiation angle of the vapor emitted from the deposition source VSC is controlled by, for example, the method described with reference to FIGS. 4 to 6.
[0080] Even in such an example, the peripheral portion of the light-emitting layer EL, particularly the end surface SS1, is reliably covered with the carrier adjustment layer CA2, and therefore the same effects as those described above can be obtained.
[0081] In addition, the end surface SS2 of the light-emitting layer EL in the display element 20E located at the outermost periphery is also reliably covered with the carrier adjustment layer CA2, so that the light-emitting layer EL can be protected from the outside air and moisture.
[0082] According to the above-described embodiment, it is possible to provide a display device capable of suppressing deterioration in the performance of a display element, and a method for manufacturing the display device.
[0083] All display devices that can be implemented by those skilled in the art through appropriate design modifications based on the display devices described above as the embodiments of the present invention are within the scope of the present invention as long as they include the gist of the present invention.
[0084] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and such modifications are also understood to fall within the scope of the present invention. For example, those in which a person skilled in the art appropriately adds or removes components or modifies the design of the above-mentioned embodiment, or adds or omits steps or modifies conditions, are also included in the scope of the present invention as long as they include the gist of the present invention.
[0085] Furthermore, with regard to other effects and advantages brought about by the aspects described in the above-mentioned embodiments, those which are obvious from the description in this specification or which can be appropriately thought up by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]
[0086] DSP... Display device 10... Base material 11... Insulating layer (first insulating layer) 12…insulating layer (second insulating layer) OP…opening 20...Display element E1...Lower electrode E2...Upper electrode OR...Organic layer EL...Emitting layer B1...Bottom surface SS1...End surface (first end surface) SS2...End surface (second end surface)
Claims
1. A lower electrode; an organic layer disposed on the lower electrode; and an upper electrode disposed on the organic layer, The step of forming the organic layer includes a step of forming a first carrier adjustment layer and a step of forming a light-emitting layer, In the step of forming the first carrier adjustment layer, a first material is evaporated while a first evaporation source is moved in a first direction relative to the processing target substrate on which the lower electrode has been formed; In the process of forming the light-emitting layer, a second material is evaporated while a second evaporation source is moved in a second direction intersecting the first direction relative to the substrate to be processed on which the first carrier adjustment layer has been formed.
2. The step of forming the organic layer further includes a step of forming a second carrier adjustment layer, 2. The method for manufacturing a display device according to claim 1, wherein in the step of forming the second carrier adjustment layer, a third material is evaporated while a third evaporation source is moved in the first direction relative to the processing target substrate on which the light-emitting layer has been formed.
3. the first direction is a direction in which sub-pixels of different display colors are arranged; The method for manufacturing a display device according to claim 1 , wherein the second direction is a direction in which sub-pixels of the same display color are aligned.
Citation Information
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