Display processor and display processing method

The display processing device addresses frame loss issues by synchronizing the frame rate of OSD video with the lowest frame rate of input video, ensuring high-quality video output when superimposing variable frame rate input video with fixed frame rate OSD video.

JP2025070402APending Publication Date: 2025-05-02SHARP KK
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Patent Information

Application Number
JP2023180696
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-20
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

When input video with variable frame rate and OSD video with fixed frame rate are superimposed and displayed on one screen, frame loss can occur, leading to impaired video quality due to mismatched frame rates.

Method used

A display processing device that determines whether the input video is at a variable frame rate and generates OSD video with a frame rate matching the lowest frame rate of the input video, ensuring that the superimposed output video maintains the same frame rate as the input video.

Benefits of technology

This approach prevents frame loss of the OSD video and maintains consistent video quality by synchronizing the frame rate of the OSD video with the input video, even when the input video has a variable frame rate.

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Abstract

To provide a display processor which can suppress reduction of the quality of an output picture.SOLUTION: The display processor includes: a reception unit for receiving an input picture; a determination unit for determining whether the input picture is a variable frame rate; a generation unit for generating an OSD picture of the frame rate on the basis of the result of the determination by the determination unit; an overlapping unit for overlapping the input picture and the OSD picture with each other and generating an output picture with the same frame rate as that of the input picture; and a display unit for displaying the output picture.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a display processing device and a display processing method. [Background technology]

[0002] High-Definition Multimedia Interface (HDMI) 2.1 and other standards support high frame rates and variable frame rates, and support for HDMI 2.1 is progressing in television receivers, etc. Also, there are more and more opportunities to display high-quality On-Screen Display (OSD) images superimposed on variable frame rate images.

[0003] In addition, a technology is known in which an acquisition unit acquires multiple video signals, and a frame rate setting unit sets a frame rate corresponding to one of the frame intervals or a frame rate obtained by multiplying the frame rate by a constant when the videos are to be displayed on the same screen (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2019-186767 A Summary of the Invention [Problem to be solved by the invention]

[0005] When a variable frame rate input video and a fixed frame rate OSD video are superimposed on one screen, frames of one of the videos may be dropped depending on the display timing of the display panel, resulting in a loss of video quality. To address this issue, frame dropouts can be prevented by successively comparing the frame rates of the variable frame rate input video and the fixed frame rate OSD video, and displaying the video on the panel at the higher frame rate.

[0006] However, if the frame rate of the OSD video is higher, the frame rate of the OSD video is adopted as the frame rate of the superimposed video, so it is not dependent on the frame rate of the input video, there are no missing frames of the OSD video, and the quality of the OSD video remains constant. However, in this case, stuttering and tearing occur in the displayed video because the frame rate of the OSD video is adopted, and the quality of the displayed video (input video + OSD video) decreases.

[0007] Furthermore, in a display device that always uses the frame rate of the input video as the frame rate of the display video (input video + OSD video), if the frame rate of the input video is lower than the frame rate of the OSD video, there is a problem that frames of the OSD video are dropped in the display video, making the OSD video look choppy. In this way, the appearance of the OSD video changes depending on the frame rate of the input video, and the quality of the display video decreases.

[0008] An object of one aspect of the present invention is to provide a display processing device that suppresses deterioration in quality of an output video. [Means for solving the problem]

[0009] A display processing device according to one embodiment of the present invention includes a receiving unit that receives an input video, a determination unit that determines whether the input video has a variable frame rate, a generation unit that generates an OSD video with a frame rate based on a determination result of the determination unit, a superposition unit that superimposes the input video and the OSD video to generate an output video with the same frame rate as the frame rate of the input video, and a display unit that displays the output video.

[0010] A display processing method according to one embodiment of the present invention includes the steps of receiving an input video, determining whether the input video has a variable frame rate, generating an OSD video with a frame rate based on a result of the determination step, superimposing the input video and the OSD video to generate an output video with the same frame rate as the frame rate of the input video, and displaying the output video. [Brief description of the drawings]

[0011] [Figure 1] 1 is a functional block diagram of a display processing device according to an embodiment. [Diagram 2] 1 is a flowchart of a display processing method according to an embodiment. [Diagram 3] FIG. 11 is a diagram showing a display example of a display processing device according to a comparative example. [Figure 4] 1A and 1B are diagrams illustrating examples of displays on a display processing device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Hereinafter, embodiments will be described with reference to the drawings. In the drawings, the same or equivalent elements are designated by the same reference numerals, and duplicated explanations will be omitted.

[0013] FIG. 1 is a functional block diagram of a display processing device according to an embodiment.

[0014] The display processing device 101 according to the embodiment includes a receiving unit 111, a video processing unit 121, an OSD processing unit 131, a superimposing unit 141, and a display unit 151. The display processing device 101 supports a variable refresh rate and is capable of changing the refresh rate of the display unit 151 according to the frame rate of an input video. The display processing device 101 is, for example, a television receiver or a display device.

[0015] The receiving unit 111 receives an input video from an external device. The receiving unit 111 receives the input video from the external device, for example, using a High-Definition Multimedia Interface (HDMI). The input video has a variable frame rate where the frame interval varies, or a fixed frame rate where the frame interval is constant. The input video includes frame rate information indicating information about the input video. The frame rate information includes information indicating whether the input video has a variable frame rate. The frame rate information also includes a minimum frame rate that is the minimum value of the frame rate of the input video (for example, 48 fps (frames per second)). The frame rate information is an example of input video information.

[0016] The video processing unit 121 extracts frame rate information indicating information related to the input video from the input video, and outputs the frame rate information to the OSD processing unit 131. The video processing unit 121 outputs the input video received from the receiving unit 111 to the superimposing unit 141.

[0017] The OSD processing unit 131 generates an OSD image. The OSD image includes, for example, an animation of a rotating gear, etc. The OSD processing unit 131 includes a determination unit 132 and a generation unit 133.

[0018] The determination unit 132 determines whether or not the input video has a variable frame rate from the frame rate information received from the video processing unit 121. The determination unit 132 outputs the determination result to the generation unit 133. Furthermore, when the determination unit 132 determines that the input video has a variable frame rate, it outputs the frame rate information to the generation unit 133.

[0019] The generation unit 133 generates an OSD video with a frame rate based on the received determination result. In particular, if it is determined that the input video has a variable frame rate, the generation unit 133 generates an OSD video with a frame rate of the minimum frame rate (the minimum value of the frame rate of the input video) based on the frame rate information.

[0020] If it is determined that the input video is not a variable frame rate video, the generation unit 133 generates an OSD video with a preset frame rate (for example, 60 fps). Note that it is desirable that the preset frame rate is the same as or lower than the frame rate of the input video, which is a fixed frame rate.

[0021] Furthermore, generation unit 133 may generate an OSD video with a preset frame rate (e.g., 60 fps) and, if it is determined that the input video is a variable frame rate, convert the OSD video into an OSD video with a minimum frame rate (e.g., 48 fps) to generate an OSD video with a minimum frame rate. Since the preset frame rate is higher than the minimum frame rate, the quality of the OSD video when it is determined that the input video is not a variable frame rate is higher than the quality of the OSD video when it is determined that the input video is a variable frame rate.

[0022] The superimposing unit 141 superimposes the input video received from the video processing unit 121 and the OSD video received from the generation unit 133 to generate an output video. The frame rate of the output video is the same as the frame rate of the input video. That is, the OSD video is superimposed on the input video in synchronization with the frame rate of the input video received from the video processing unit 121. In detail, the superimposing unit 141 superimposes each frame of the input video and the OSD video at the time of receiving each frame to generate an output video. The superimposing unit 141 outputs the output video to the display unit 151.

[0023] The display unit 151 displays the output video received from the superimposition unit 141. The display unit 151 is, for example, a liquid crystal panel or an organic EL (Electro Luminescence) panel. The refresh rate of the display unit 151 is variable and can be changed in synchronization with the frame rate of the output video.

[0024] FIG. 2 is a flowchart of a display processing method according to the embodiment.

[0025] In step S201, the receiving unit 111 receives an input video from an external device. The video processing unit 121 extracts frame rate information indicating information related to the input video from the input video, and outputs the frame rate information to the OSD processing unit 131. The determining unit 132 determines whether the input video is a variable frame rate video from the frame rate information received from the video processing unit 121. If it is determined that the input video is a variable frame rate video, control proceeds to step S202, and if it is determined that the input video is not a variable frame rate video, control proceeds to S203.

[0026] In step S202, the generation unit 133 generates an OSD video having a minimum frame rate (the minimum value of the frame rate of the input video) based on the frame rate information.

[0027] If it is determined in step S203 that the input video does not have a variable frame rate, the generation unit 133 generates an OSD video with a preset frame rate (for example, 60 fps).

[0028] In step S204, the superimposing unit 141 superimposes the input video received from the video processing unit 121 and the OSD video received from the generating unit 133 to generate an output video. The frame rate of the output video is the same as the frame rate of the input video. The display unit 151 displays the output video received from the superimposing unit 141.

[0029] 3 is a diagram showing a display example of a display processing device according to a comparative example, in which a frame dropout occurs in an OSD video.

[0030] 3, the upper row shows the input video, the middle row shows the OSD video, and the lower row shows the output video displayed on display unit 151, with the horizontal axis showing time. The input video has a variable frame rate, and the OSD video has a fixed frame rate. The frame rate of the output video is the same as that of the input video, and the output video is generated in synchronization with the input video.

[0031] The frame rate of frames 1 to 3 of the input video is higher than the frame rate of the OSD video, and the frame rate of frames 4 to 6 of the input video is lower than the frame rate of the OSD video.

[0032] At the timing when each frame of the input video is input to the superimposing unit 141 (the left edge of each frame in FIG. 3), the OSD video at that timing is superimposed to generate the output video.

[0033] 3, first the OSD video (frame 1) is superimposed on the input video (frame 1), and output video 1 (input video (frame 1)+OSD video (frame 1)) is displayed on display unit 151. Next, the OSD video (frame 1) is superimposed on the input video (frame 2), and output video 2 (input video (frame 2)+OSD video (frame 1)) is displayed on display unit 151. Next, the OSD video (frame 2) is superimposed on the input video (frame 3), and output video 3 (input video (frame 3)+OSD video (frame 2)) is displayed on display unit 151.

[0034] Next, the OSD video (Frame 2) is superimposed on the input video (Frame 4), and output video 4 (input video (Frame 4)+OSD video (Frame 2)) is displayed on display unit 151. Next, the OSD video (Frame 4) is superimposed on the input video (Frame 5), and output video 5 (input video (Frame 5)+OSD video (Frame 4)) is displayed on display unit 151. Next, the OSD video (Frame 5) is superimposed on the input video (Frame 6), and output video 6 (input video (Frame 6)+OSD video (Frame 5)) is displayed on display unit 151.

[0035] As described above, in FIG. 3, frames 3 and 6 of the OSD image are not superimposed on the input image and are not displayed as the display image.

[0036] In this way, when the frame rate of the OSD video is fixed and the frame rate of the input video, which has a variable frame rate, is lower than the frame rate of the OSD video, frames of the OSD video will be dropped in the output video.

[0037] FIG. 4 is a diagram showing a display example of the display processing device according to the embodiment.

[0038] 4, the upper row shows the input video, the middle row shows the OSD video, and the lower row shows the output video displayed on display unit 151, with the horizontal axis showing time. The input video has a variable frame rate, and the OSD video has a fixed frame rate. The frame rate of the output video is the same as that of the input video, and the output video is generated in synchronization with the input video.

[0039] The frame rate of frames 1 to 3 of the input video is higher than the frame rate of the OSD video, and the frame rate of frames 4 to 6 of the input video is the minimum frame rate. In the display processing device 101 according to the embodiment, since the input video has a variable frame rate, the frame rate of the OSD video is the minimum frame rate of the input video (48 fps).

[0040] At the timing when each frame of the input video is input to the superimposing unit 141 (the left edge of each frame in FIG. 4), the OSD video at that timing is superimposed to generate the output video.

[0041] 4, first the OSD video (frame 1) is superimposed on the input video (frame 1), and output video 1 (input video (frame 1)+OSD video (frame 1)) is displayed on display unit 151. Next, the OSD video (frame 1) is superimposed on the input video (frame 2), and output video 2 (input video (frame 2)+OSD video (frame 1)) is displayed on display unit 151. Next, the OSD video (frame 1) is superimposed on the input video (frame 3), and output video 3 (input video (frame 3)+OSD video (frame 1)) is displayed on display unit 151.

[0042] Next, the OSD video (Frame 2) is superimposed on the input video (Frame 4), and output video 4 (input video (Frame 4)+OSD video (Frame 2)) is displayed on display unit 151. Next, the OSD video (Frame 3) is superimposed on the input video (Frame 5), and output video 5 (input video (Frame 5)+OSD video (Frame 3)) is displayed on display unit 151. Next, the OSD video (Frame 4) is superimposed on the input video (Frame 6), and output video 6 (input video (Frame 6)+OSD video (Frame 4)) is displayed on display unit 151.

[0043] As described above, in the display control device 101 according to the embodiment, no frame drop occurs in the OSD image in the displayed image.

[0044] In this way, when the input video has a variable frame rate, the frame rate of the OSD video is the minimum frame rate of the input video, so the frame rate of the input video will not be lower than the frame rate of the OSD video, and therefore no frames will be dropped from the OSD video in the displayed video.

[0045] According to the display control device of the embodiment, when the input video has a variable frame rate, the frame rate of the OSD video is the minimum frame rate of the input video. This prevents frames from being dropped from the OSD video when the input video and the OSD video are superimposed, thereby preventing degradation of the quality of the displayed video.

[0046] (Example of software implementation) The control blocks of the display processing device 101 (particularly, the receiving unit 111, the video processing unit 121, the OSD processing unit 131, and the superimposing unit 141) can be realized by a logic circuit (hardware) formed in an integrated circuit (IC (Integrated Circuit) chip) or the like, or may be realized by software using a processor such as a CPU (Central Processing Unit). In the latter case, for example, the display processing device 101, which is a computer, includes a CPU that executes instructions of a program, which is software that realizes each function, a ROM or storage device (these are referred to as "recording medium") in which the above program and various data are recorded so as to be readable by the computer (or CPU), and a RAM in which the above program is expanded. The computer (or CPU) reads and executes the above program from the recording medium, thereby operating as the receiving unit 111, the video processing unit 121, the OSD processing unit 131, and the superimposing unit 141, thereby achieving the object of the present invention. As the recording medium, a "non-transient tangible medium", for example, a tape, a disk, a card, a semiconductor memory, a programmable logic circuit, or the like can be used. Furthermore, the program may be supplied to the computer via any transmission medium capable of transmission.

[0047] The present invention is not limited to the above-described embodiment and may be modified, and the above configurations may be replaced with substantially the same configurations, configurations that achieve the same effects, or configurations that can achieve the same purpose. [Explanation of symbols]

[0048] 101 Display processing device 111 Receiving unit 121 Video Processing Unit 131 OSD processing section 132 Judgment section 141 Generation part 141 Overlapped section 151 Display section

Claims

1. A receiving unit that receives an input video; a determination unit that determines whether the input video has a variable frame rate; a generating unit that generates an OSD image having a frame rate based on a result of the determination by the determining unit; a superimposing unit that superimposes the input video and the OSD video to generate an output video having the same frame rate as that of the input video; a display unit that displays the output image; A display processing device comprising:

2. the input video includes input video information indicating a minimum frame rate of the input video; The display processing device according to claim 1 , wherein, when the input video has a variable frame rate, the generation section sets the frame rate of the OSD video to the minimum frame rate.

3. the input video information includes information indicating whether the input video is a variable frame rate video; The display processing device according to claim 2 , wherein the determination unit determines whether the input video has a variable frame rate based on the input video information.

4. receiving an input video; determining whether the input video is a variable frame rate; generating an OSD image having a frame rate based on a result of the determining step; superimposing the input video and the OSD video to generate an output video having the same frame rate as that of the input video; displaying the output image; A display processing method comprising:

Citation Information

Patent Citations

  • Video processing apparatus, video processing method, television receiver, control program, and recording medium

    JP2019186767A