Display device

Abstract

To provide a display device capable of reducing parasitic capacitance between wires, or a display device with improved display quality, or a display device capable of reducing power consumption.SOLUTION: The display device comprises a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode and a semiconductor film. The signal line intersects the scan line. The first electrode is electrically connected to the signal line. The first electrode has a region overlapping with the scan line. The second electrode faces the first electrode. The third electrode faces the first electrode. The first pixel electrode is electrically connected to the second electrode. The second pixel electrode is electrically connected to the third electrode. The semiconductor film is in contact with the first electrode, the second electrode and the third electrode. The semiconductor film is provided between the scan line and the first electrode through the third electrode.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One aspect of the present invention relates to a display device. The technical field of one embodiment of the invention disclosed in the present specification and the like is an object, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacturing method, It is about Cha, or composition of matter. More specifically, the technical field of one embodiment of the present invention disclosed in this specification is a semiconductor device, a display display device, liquid crystal display device, light emitting device, power storage device, imaging device, driving method thereof, or These manufacturing methods can be mentioned as examples. [Background technology]

[0002] In recent years, vertical alignment (VA) liquid crystal displays have been developed as liquid crystal displays with improved viewing angle characteristics and display quality. In addition, VA type liquid crystal display devices are also available. In a liquid crystal display device, a pixel has a plurality of pixel electrodes, and a pixel is connected to each pixel electrode. A liquid crystal display device having a multi-domain structure and having transistors for controlling the potential of electrodes is provided. By providing multiple pixel electrodes in one pixel, the orientation of the liquid crystal can be changed by each pixel electrode. This allows for a wider viewing angle than conventional VA LCD displays. It is possible to achieve this (see Patent Document 1).

[0003] In addition, the screen size of liquid crystal display devices is becoming larger, reaching 60 inches diagonally or more. Development is currently underway with a view to screen sizes of 120 inches or more diagonally. The screen resolution is also available in full HD (FHD, 1920 x 1080) and 4K ( 3840 x 2160), and the so-called 7680 x 4320 pixel count. The development of LCD displays with 8K high resolution is also underway.

[0004] In addition, the driving speed is doubled (also called double-speed driving) to reduce image retention and improve display quality. Currently, efforts are being made to achieve a high-speed drive of 10 times the normal speed, and even a high-speed drive of 4 times or more is being considered. In order to realize a 3D LCD display, images for the right and left eyes must be displayed. Since it is necessary to alternately display the two, the liquid crystal display device is operated at a high speed of more than double speed. It is required that. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2006-317867 A Summary of the Invention [Problem to be solved by the invention]

[0006] However, as liquid crystal displays become larger and higher resolution, the number of pixels required increases dramatically. The write time per pixel is shortened. Transistors are required to have high speed operation, high on-current, and the like.

[0007] In addition, an increase in parasitic capacitance between wiring lines causes a delay in signal transmission to the end of the signal line. This results in degradation of display quality, such as uneven display and poor gradation, and increased power consumption. cormorant.

[0008] In view of the above, an object of one embodiment of the present invention is to provide a display device in which parasitic capacitance between wirings can be reduced. Another object of the present invention is to provide a display device with improved display quality. Another object of one embodiment of the present invention is to provide a display device capable of reducing power consumption. Another object of one embodiment of the present invention is to provide a novel semiconductor device or a novel The object of the present invention is to provide a display device and the like.

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0010] One aspect of the present invention is a liquid crystal display device comprising: a signal line; a scanning line intersecting the signal line; and a a first electrode facing the first electrode; a second electrode facing the first electrode; and a third electrode facing the first electrode. a first pixel electrode electrically connected to the second electrode; and a second pixel electrode electrically connected to the third electrode. a second pixel electrode connected to the first electrode to the third electrode and connected to the scanning line and the first electrode to the third electrode; A semiconductor film is provided between the first electrode and the third electrode, and the first electrode overlaps with the scanning line. The display device is characterized by having:

[0011] In addition, in one embodiment of the present invention, a gate insulating film is provided between a scan line and a semiconductor film, The first transistor is formed by the gate insulating film, the semiconductor film, the first electrode, and the second electrode. The second transistor is formed by the scanning line, the gate insulating film, the semiconductor film, the first electrode, and the third electrode. The display device is characterized in that the display device comprises a transistor.

[0012] In addition, one aspect of the present invention is a pixel electrode including a first capacitance line electrically connected to a first pixel electrode; and a second capacitance wiring electrically connected to the second pixel electrode, and the signal line is connected to the first pixel electrode. and a second pixel electrode, and the signal line is a first capacitance wiring and a second capacitance wiring. The display device is characterized in that it does not have an area overlapping with wiring.

[0013] In one embodiment of the present invention, a first electrode is a second electrode and a third electrode when viewed from above. The display device is characterized in that the light-transmitting element is provided between the electrodes.

[0014] In one embodiment of the present invention, the semiconductor film is In,M (M is aluminum, gallium, or indium). The display device according to the present invention is characterized in that it contains an oxide having thorium or tin and Zn. It is.

[0015] In one embodiment of the present invention, a semiconductor film is a first semiconductor film and a region overlapping the first semiconductor film. and a second semiconductor film having a region, the first semiconductor film being more In than the second semiconductor film. The display device further comprises an oxide having a composition in which the atomic ratio of A is greater than the atomic ratio of M. Effect of the Invention

[0016] By applying one embodiment of the present invention, parasitic capacitance between wirings in a display device can be reduced. Moreover, by applying one embodiment of the present invention, the display quality of a display device can be improved. Moreover, by applying one embodiment of the present invention, power consumption of a display device can be reduced. Alternatively, by applying one embodiment of the present invention, a novel semiconductor device or a novel display device can be provided. In addition, the description of these effects does not preclude the existence of other effects. It is not something to be given up.

[0017] Note that one embodiment of the present invention does not necessarily have all of these effects. Effects other than those mentioned above will become apparent from the description, drawings, claims, etc. It is possible to extract other effects from the description, drawings, claims, etc. be. [Brief description of the drawings]

[0018] [Figure 1] 1A and 1B are a top view and a circuit diagram of one embodiment of a pixel. [Diagram 2] 1A and 1B are a top view and a circuit diagram of a pixel illustrating one embodiment of the present invention. [Diagram 3] 1A and 1B are a top view and a circuit diagram of one embodiment of a pixel. [Figure 4] FIG. 2 is a cross-sectional view of one embodiment of a pixel. [Diagram 5] FIG. 2 is a top view of one embodiment of a pixel. [Figure 6] FIG. 2 is a top view of one embodiment of a pixel. [Figure 7] 1A and 1B are a top view and a circuit diagram of one embodiment of a pixel. [Figure 8] 1A and 1B are a top view and a circuit diagram of one embodiment of a pixel. [Figure 9] FIG. 2 is a cross-sectional view of one embodiment of a pixel. [Figure 10] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 13] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device, and a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 15] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 16] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 17] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 18] FIG. 2 is a diagram for explaining a band structure. [Figure 19] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 20] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 21] 13A to 13C show structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 22] Electron diffraction pattern of CAAC-OS. [Figure 23] FIG. 1 shows the change in the crystal part of an In-Ga-Zn oxide due to electron irradiation. [Figure 24] FIG. 1 is a top view illustrating one embodiment of a display device. [Diagram 25] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Figure 26] FIG. 1 is a cross-sectional view showing one embodiment of a display device. [Figure 27] FIG. 2 is a diagram illustrating a display module. [Figure 28] 1A to 1C are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] The present invention will be described below with reference to the drawings. The present invention is not limited to the above description without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and detail may be made. Therefore, the present invention should not be construed as being limited to the following description of the embodiments. In describing the configuration of the present invention with reference to the drawings, the same elements are designated by different reference numerals. This is also used commonly between the drawings.

[0020] In this specification, the terms first, second, third, through nth (n is a natural number) refer to It is added to avoid confusion of the constituent elements, and is not a numerical limitation. do.

[0021] Also, the words "membrane" and "layer" may differ depending on the situation. For example, the term "conductive layer" may be replaced with "conductive Alternatively, for example, the term "insulating film" may be used. In some cases, the terminology may be changed to the term "insulating layer."

[0022] (Embodiment 1) In this embodiment mode, a structure of one pixel of a liquid crystal display device will be described with reference to FIGS. do.

[0023] FIG. 1A shows one pixel 100 of a liquid crystal display device having a multi-domain structure according to this embodiment. FIG. 1(B) is a top view of the pixel 100 shown in FIG. 1(A), and FIG. 2(B) is a circuit diagram of the pixel 100 shown in FIG. FIG. 2A is a top view of one pixel 200 of a conventional liquid crystal display device having a multi-domain structure. The circuit diagram of the pixel shown in (A) is shown in FIG. 2(B).

[0024] As shown in FIG. 1A and FIG. 1B, a pixel 100 includes a scanning line 103 and a scanning line 104. The signal line 121 extends in the same direction as the scanning line 103. The capacitor wiring 105a and the capacitor wiring 105b are connected to each other. There is a scanning line 103 between them.

[0025] In addition, a transistor 136 and a transistor The transistor 136 has a semiconductor film 135 overlapping the scan line 103. The first electrode 123 and the second electrode 125a overlap with the semiconductor film 135. The electrode 123 is electrically connected to the signal line 121. The first electrode 123 is a transistor The second electrode 125a functions as one of the source electrode and the drain electrode in 136. serves as the other of the source and drain electrodes of the transistor 136.

[0026] The transistor 137 includes a semiconductor film 135 overlapping the scan line 103 and a The first electrode 123 and the third electrode 125b are overlapped. The third electrode functions as one of the source electrode and the drain electrode in the transistor 137. Electrode 125b functions as the other of the source and drain electrodes in transistor 137. It works.

[0027] In FIG. 1A, a part of an end portion of the semiconductor film 135 is used as a gate electrode in the top view. Transistors 136 and 137 located outside the functional scan line 103 are shown. As shown in FIG. 1C, the pixel 100 has a transistor. In the transistor 136 and the transistor 137, the end of the semiconductor film 135 is aligned with the end of the scanning line 103. It may be located inside the part.

[0028] The second electrode 125a included in the transistor 136 is connected to the pixel electrode 125 via the opening 144a. That is, the transistor 136 is electrically connected to the second electrode 125a. The pixel electrode 139a is connected to the liquid crystal element 142 including the pixel electrode 139a. The electrode is electrically connected to the pixel electrode 139a and the second electrode 125a of the transistor 136. The other electrode is electrically connected to a capacitor wiring 105a (see FIG. 1B).

[0029] The third electrode 125b included in the transistor 137 is connected to the pixel electrode 125 via an opening 144b. That is, the transistor 137 is electrically connected to the third electrode 125b. The pixel electrode 139b is connected to the liquid crystal element 143. The electrode is electrically connected to the pixel electrode 139b and the third electrode 125b of the transistor 137. The other electrode is electrically connected to a capacitance wiring 105b (see FIG. 1B).

[0030] The openings 144a and 144b are provided in an insulating film 116, which will be described later. In order to avoid the drawings from becoming complicated, in FIG. 1(A) and FIG. 2(A), The pixel electrodes 139a and 139b are not hatched, and only the outline of the upper surface shape is shown by a dashed line. is doing.

[0031] The transistor 136 and the transistor 137 are disposed approximately at the center of the pixel 100 in the top view. 1, between the pixel electrodes 139a and 139b of each sub-pixel in the pixel 100. is formed.

[0032] One embodiment of the present invention is a liquid crystal display device including a signal line 121, a scanning line 103, a first electrode 123, and a second electrode 124. the electrode 125a, the third electrode 125b, the first pixel electrode 139a, and the second pixel electrode 13 9b and a semiconductor film 135. The signal line 121 crosses the scanning line 103. The first electrode 123 is electrically connected to the signal line 121, and the first electrode 125a overlaps with the scanning line 103. The second electrode 125a faces the first electrode 123 and the third electrode 12 5b faces the first electrode 123, and the first pixel electrode 139a is electrically connected to the second electrode 125a. the second pixel electrode 139b is electrically connected to the third electrode 125b; The semiconductor film 135 is connected to the first electrode 123, the second electrode 125a, and the third electrode 125b. The semiconductor film 135 is a layer between the scanning line 103 and the first electrode 123 to the third electrode 125b. A display device is provided between the display device and the display unit.

[0033] Also, the semiconductor device includes a gate insulating film 107, a transistor 136, and a transistor 137. The gate insulating film 107 is disposed between the scanning line 103 and the semiconductor film 135. The gate electrode 136 includes the scanning line 103, the gate insulating film 107, the semiconductor film 135, the first electrode 123, and a second electrode 125a. The transistor 137 is connected to the scanning line 103, the gate insulating film 1 07, the display device including a semiconductor film 135, a first electrode 123, and a third electrode 125b. The device is also an aspect of the present invention.

[0034] The transistor 136 and the transistor 137 have one of a source electrode and a drain electrode. A certain first electrode 123 is common, and the first electrode 123 overlaps with the scanning line 103 . By adopting such a configuration, in one pixel 100 constituting the display device, A parasitic capacitance is generated between one electrode of the transistor 136 and one electrode of the transistor 137 and the scanning line 103. The amount can be reduced.

[0035] As shown in FIG. 1B, in the transistor 136, the scan line 103 and A parasitic capacitance C1 occurs at the overlapping portion of the electrodes 125a of the transistor 137. In this case, a parasitic capacitance C2 occurs at the overlapping portion of the scanning line 103 and the third electrode 125b. In addition, the signal line 121, the scanning line 103, the capacitance line 105a, and the capacitance line 105b are At the overlapping points with these, parasitic capacitances C5, C6, and C7 occur, respectively. do.

[0036] As a comparative example, a pixel has two transistors each of which is connected to a signal line and a power supply. FIG. 2 is a top view of a pixel 200 in which electrodes electrically connected to different electrodes do not overlap with the scanning lines. FIG. 2(A) shows a circuit diagram of the pixel 200. The same components as those in the pixel 100 are designated by the same reference numerals, and the description of the components will be omitted.

[0037] As shown in FIG. 2B, the pixel 200 includes a scanning line 203 and a signal line intersecting the scanning line 203. The scanning line 203 has a capacitance wiring 105a and a capacitance A scanning line is provided between the capacitance line 105a and the capacitance line 105b. It has a line 203.

[0038] In addition, a transistor 236 and a transistor The transistor 236 has a gate electrode protruding from the scanning line 203, A fourth electrode 223a protruding from the signal line 221 and a second electrode 223b connected to the liquid crystal element 142 are One electrode of the capacitor element 140 is connected to a liquid crystal element 142. The pixel electrode 139a is electrically connected to the second electrode 125a of the transistor 236. The other electrode of the capacitor 140 is electrically connected to the capacitor wiring 105a (see FIG. 2B). Light. ).

[0039] The transistor 237 has a gate electrode protruding from the scanning line 203 and a gate electrode protruding from the signal line 121. A fifth electrode 223b connected to the liquid crystal element 143 and a third electrode 125b connected to the liquid crystal element 143. In addition, one electrode of the capacitor element 141 is connected to a pixel electrode 139b included in the liquid crystal element 143. and a third electrode 125b of the transistor 237. One electrode is electrically connected to a capacitance line 105b (see FIG. 2(B)).

[0040] The transistor 236 and the transistor 237 have a source electrode and a drain electrode, respectively. The point having the fourth electrode 223a and the fifth electrode 223b is the pixel 100. The transistors 136 and 137 are different from the transistors 136 and 137 protruding from the signal line 221. The corresponding fourth electrode 223 a and fifth electrode 223 b do not overlap with the scanning line 203 .

[0041] In the transistor 236, the overlapping portion of the scanning line 203 and the second electrode 125a A parasitic capacitance C11 occurs at the overlap of the scanning line 203 and the fourth electrode 223a. A parasitic capacitance C13 occurs at the portion where the scanning line 203 and the transistor 237 are connected. A parasitic capacitance C12 occurs at the overlapping portion of the scanning line 203 and the third electrode 125b. A parasitic capacitance C14 occurs at the overlapping portion of the signal line 22 and the fifth electrode 223b. In the overlapping portions of the scanning line 203, the capacitance wiring 105a, and the capacitance wiring 105b, As a result, parasitic capacitances C15, C16, and C17 are generated, respectively.

[0042] In the transistor 136 and the transistor 236, the scanning line 103 and the second electrode 1 The area of ​​the overlapping portion of the scanning line 203 and the second electrode 125a is approximately the same as the area of ​​the overlapping portion of the scanning line 203 and the second electrode 125a. If the parasitic capacitance C1 and the parasitic capacitance C11 are equal to each other, the parasitic capacitance C1 and the parasitic capacitance C11 are equal to each other. 7 and the transistor 237, the surface of the overlapping portion of the scanning line 103 and the third electrode 125b If the product is approximately equal to the area of ​​the overlapping portion of the scanning line 203 and the third electrode 125b, the parasitic The capacitance C2 and the parasitic capacitance C12 are approximately the same. If the area of ​​the overlapping portion and the area of ​​the overlapping portion of the signal line 221 and the scanning line 203 are substantially the same, the parasitic The capacitance C5 and the parasitic capacitance C15 are substantially the same. If the area of ​​the overlapping portion of the signal line 221 and the capacitance wiring 105a is approximately the same as the area of ​​the overlapping portion of the signal line 221 and the capacitance wiring 105a, For example, the parasitic capacitance C6 and the parasitic capacitance C16 are substantially the same. The area of ​​the overlapping portion of the signal line 221 and the capacitance wiring 105b is approximately the same as the area of ​​the overlapping portion of the signal line 221 and the capacitance wiring 105b. If they are one, the parasitic capacitances C7 and C17 are approximately the same.

[0043] In the pixel 200 as the comparative example, in the transistor 236 and the transistor 237, The electrodes that become one of the source electrode and the drain electrode are different electrodes (in the transistor 236, In the case of the transistor 236, it is the fourth electrode 223a, and in the case of the transistor 237, it is the fifth electrode 223b. Therefore, a parasitic capacitance C13 occurs between the scanning line 203 and the fourth electrode 223a. A parasitic capacitance C14 occurs between the first electrode 223a and the fifth electrode 223b.

[0044] However, in the pixel 100 shown in this embodiment, the transistor 136 and the transistor An electrode (first electrode 123) that serves as one of the source electrode and drain electrode of the transistor 137. The electrode is common to the signal line 121 and the scanning line 103 at the overlapping portion of the signal line 121 and the scanning line 103. Therefore, in the transistor 136 and the transistor 137, the electrodes and the scanning The parasitic capacitance occurring at the overlapping portion of the scan line 103 is included in the above-mentioned parasitic capacitance C5. Since the capacitance C5 is approximately the same as the parasitic capacitance C15, the capacitance C15 in the pixel 100 is approximately In this case, the parasitic capacitance is smaller by the amount of the parasitic capacitance C13 and the parasitic capacitance C14. In the display device according to one embodiment of the present invention, parasitic capacitance occurring between wirings in one pixel 100 is reduced. It can be reduced.

[0045] Note that the pixel 100 described in this embodiment includes the transistor 136 and the transistor 137. Since the transistor 136 and the transistor 137 have a common semiconductor film, In this case, the region where the first electrode 123 and the semiconductor film 135 are in contact with each other can be shared. As a result, the area occupied by the transistors 136 and 137 in the pixel 100 can be reduced. It is possible to reduce

[0046] As shown in FIG. 3A and FIG. 3B, in the pixel 100, the capacitance wiring 105 a and the capacitance wiring 105b may be shared with adjacent pixels. By adopting such a configuration, the number of capacitance wirings in the display device can be reduced. As shown in (A), the area of ​​the overlapping portion of the pixel electrode 139a and the capacitance wiring 105a is increased. This increases the capacitance of the capacitor 140. By increasing the area of ​​the overlapping portion of the capacitance wiring 105b and the capacitance element 141, the capacitance of the capacitance element 141 is increased. It is possible.

[0047] Next, the structure of a transistor and a capacitor included in the pixel 100 will be described with reference to FIG. Reveal.

[0048] FIG. 4 is a diagram showing a configuration of the transistor 136 and the capacitor 137 in the dashed line AB shown in FIG. It has a cross-sectional structure of 40.

[0049] The transistor 136 is formed on the substrate 101 by a scanning line 103, a semiconductor film 135, and a scanning line The gate insulating film 107 provided between the gate electrode 103 and the semiconductor film 135 and the semiconductor film 135 The semiconductor film 135 has a first electrode 123 in contact with the first electrode 123 and a second electrode 125 a in contact with the semiconductor film 135 .

[0050] The capacitive element 140 includes a capacitive wiring 105a, a second electrode 125a, and a capacitor on a substrate 101. and a gate insulating film 107 provided between the second wiring 105a and the second electrode 125a. .

[0051] In addition, the gate insulating film 107, the semiconductor film 135, the first electrode 123, and the second electrode 12 An insulating film 116 is provided on 5a. A pixel electrode 139a is electrically connected to the second electrode 125a through the opening 144a. It will be established.

[0052] Although not shown, the transistor 137 has the same structure as the transistor 136. The capacitance element 141 has a similar structure to that of the capacitance element 140.

[0053] The substrate 101 may be a glass substrate, a ceramic substrate, or any other substrate that can withstand the processing temperature of this manufacturing process. A plastic substrate having sufficient heat resistance can be used. In cases where this is not required, a metal substrate such as stainless steel with an insulating film on its surface is used. The glass substrate may be, for example, barium borosilicate glass or aluminoborosilicate glass. It is preferable to use a non-alkali glass substrate such as glass or aluminosilicate glass. The size of the substrate 101 is not limited. For example, the substrate 101 may be a 3rd generation or 1st generation substrate that is often used in liquid crystal display devices. A glass substrate of the 0th generation can be used. The material used for the substrate 502 described later in the second embodiment can be referred to.

[0054] A part of the scanning line 103 functions as a gate electrode of the transistor 136. are molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium The material is made of metals such as aluminum, scandium, nickel, etc., or alloys made of these materials. The insulating layer 10 can be formed as a single layer or a multilayer. Semiconductors such as polycrystalline silicon, Ag-Pd-Cu alloys, Al-Nd alloys, Al A nickel alloy or the like may also be used.

[0055] For example, the two-layered structure of the scanning line 103 is a molybdenum film on an aluminum film. A two-layer structure with a molybdenum film laminated on a copper film, or a two-layer structure with a molybdenum film laminated on a copper film, or a copper film A two-layer structure with a titanium nitride film or a tantalum nitride film laminated on top, a titanium nitride film and a molybdenum film A bilayer structure consisting of a copper-magnesium alloy film containing oxygen and a copper film. Structure, two-layer structure of laminated copper film and oxygen-containing copper-manganese alloy film, copper-manganese alloy film A two-layer structure in which a metal film and a copper film are laminated is preferable. A tungsten film or a tungsten nitride film and an aluminum-silicon alloy film or an aluminum The titanium nitride film or titanium film is laminated on the titanium-titanium alloy film to form a three-layer structure. It is preferable that a metal film that functions as a barrier film is laminated on a film with low electrical resistance. Therefore, the electrical resistance can be reduced and the diffusion of metal elements from the metal film to the semiconductor film can be prevented. In addition, the scanning line 103 may be made of a conductive film 5 described later in the second embodiment. Please refer to the materials used in 04.

[0056] The capacitance wiring 105a and the capacitance wiring 105b are made of the same material and laminated layer as the scanning line 103. It has a structure.

[0057] The gate insulating film 107 may be a silicon oxide film, a silicon oxynitride film, a silicon nitride film, or a nitride film. Silicon oxide film, aluminum oxide film, aluminum nitride film, aluminum oxynitride film, Alternatively, the aluminum nitride oxide film can be formed as a single layer or a multilayer. In this embodiment, the gate insulating film 107 is a product of the gate insulating film 107a and the gate insulating film 107b. The gate insulating film 107a and the gate insulating film 107b are made of a material As the materials, those used for the insulating film 506 and the insulating film 507 described later in the second embodiment are You can refer to the fee.

[0058] The semiconductor film 135 can be a silicon film or an oxide semiconductor film. The conductive film 135 may be formed of an amorphous structure, a polycrystalline structure, a single crystal structure, or any other crystal structure. It is possible.

[0059] In particular, an oxide semiconductor film can be suitably used as the semiconductor film 135. In-M (where M is aluminum, gallium, yttrium, or tin) oxide, I In particular, the semiconductor film 135 may be made of a material having the following composition: It is preferable to use the oxide semiconductor film 135a and the oxide semiconductor film 135b having different structures. The oxide semiconductor film 135a and the oxide semiconductor film 135b are formed from a material having a practical use. Materials used for the oxide semiconductor film 508a and the oxide semiconductor film 508b described later in embodiment 2 You can refer to the fee.

[0060] The first electrode 123 and the second electrode 125a are made of aluminum, copper, titanium, neodymium, A single layer of scandium, molybdenum, chromium, tantalum, or tungsten, etc. Alternatively, it may be formed by laminating an aluminum layer having an anti-hillock element added thereto. Alternatively, it may be formed of an alloy (such as an Al--Nd alloy that can be used for the scanning line 103). Crystalline silicon doped with an impurity element that serves as a donor may be used. The film on the side in contact with the crystalline silicon to which elements have been added is made of titanium, tantalum, molybdenum, or tantalum. The nitride is formed of tin or these elements, and aluminum or aluminum nitride is deposited on it. A laminated structure formed of aluminum or an aluminum alloy may also be used. The upper and lower surfaces of the titanium alloy are treated with titanium, tantalum, molybdenum, tungsten or The first electrode 123 and the second electrode 124 may have a laminated structure in which the first electrode 123 and the second electrode 124 are sandwiched between nitrides of the elements. The conductive film 512a and the conductive film 512b described later in the second embodiment are used as the material for the conductive film 512a. Please refer to materials in 2b.

[0061] The signal line 121 and the third electrode 125b are made of the same material and have the same thickness as the first electrode 123. It has a layered structure.

[0062] In the present embodiment, the insulating film 116 includes an insulating film 116a, an insulating film 116b, and an insulating film 116. The insulating films 116a, 116b, and 116c are formed as a stacked structure. The materials and the forming method thereof are the same as those of the insulating film 514 and the insulating film 5 The description of the insulating film 116 and the insulating film 518 can be referred to. The same materials may be used to form a single layer or a laminate.

[0063] The pixel electrode 139a is made of molybdenum, titanium, tantalum, tungsten, aluminum, Metal films of silver, copper, chromium, neodymium, scandium, etc., or alloys containing these metals A gold film or the like can be used as a single layer or a multilayer. Aluminum-nickel-lanthanum alloy, aluminum-titanium alloy, aluminum-neodymium Examples of alloys containing silver include silver-neodymium alloys, magnesium alloys, etc. Examples of the alloy include an alloy containing cadmium and silver. In addition, an alloy containing gold or copper can be used. In addition, metal nitride films including titanium nitride, molybdenum nitride, tungsten nitride, etc. are used. The pixel electrode 139a may be made of a conductive material as described later in the second embodiment. The pixel electrode 139b is made of the same material as the pixel electrode 139a. and has a laminated structure.

[0064] Alternatively, an oxide semiconductor film may be used as the pixel electrode. FIG. 6 shows a top view of pixel 100 having pixel electrode 148 and pixel electrode 149. 1 is a cross-sectional view of a transistor 136 and a capacitor 145 taken along a dashed line CD in FIG. .

[0065] In this specification and the like, the oxide conductor film is an oxide semiconductor having a high carrier density and low resistance. In other words, the oxide semiconductor film may be a conductive film, a conductive oxide semiconductor film, or a highly conductive oxide semiconductor film. It is also possible.

[0066] By using an oxide semiconductor film as the pixel electrode 148, the oxide semiconductor film When a conductive film is used, the semiconductor film 135 and the pixel electrode 148 can be formed in the same process. The oxide semiconductor film is preferably formed by removing oxygen vacancies or / and impurities such as hydrogen and water in the film. The resistance can be controlled by the concentration of impurities. A treatment for increasing oxygen vacancies or / and an impurity concentration in an oxide semiconductor film, or By selecting a process that reduces the impurity concentration, The resistivity of the conductive film 135 and the pixel electrode 148 can be controlled.

[0067] Specifically, the oxide conductor film 148a functioning as the pixel electrode 148 and the oxide conductor The island-shaped oxide semiconductor film to be the film 148b is subjected to plasma treatment, and oxygen in the oxide semiconductor film is removed. Increasing vacancies and / or increasing impurities such as hydrogen and water in the oxide semiconductor film By using the above-mentioned method, it is possible to provide an oxide semiconductor film having high carrier density and low resistance. The oxide semiconductor films 135a and 135b on the transistor 136 are exposed to the plasma treatment. Insulating films 116a and 116b are provided so that the insulating films 116a and 116b are not The regions of the oxide conductor films 148a and 148b that overlap the oxide conductor films 148a and 148b are selectively removed. It is set up as follows.

[0068] The oxide conductor films 148a and 148b are typically subjected to plasma treatment using a rare gas. selected from the group consisting of helium, ne, argon, kr, xenon, phosphorus, boron, hydrogen, and nitrogen. More specifically, a plasma treatment using a gas containing one or more of these is performed under an Ar atmosphere. Plasma treatment in a mixed gas atmosphere of Ar and hydrogen, and ammonia Plasma treatment under a mixed gas atmosphere of Ar and ammonia, or nitrogen Examples of the treatment include a plasma treatment under a certain atmosphere.

[0069] The pixel electrode 149 has the same material and laminated structure as the pixel electrode 148. In the pixel 100 shown in FIG. 5 and FIG. 6, the capacitance element 145 is connected to the capacitance wiring 105a and the pixel The gate insulating film 107 is provided between the electrode 148, the capacitance wiring 105a, and the pixel electrode 148. The capacitance element 146 includes a capacitance wiring 105b, a pixel electrode 149, and a capacitance The pixel electrode 149 is provided between the line 105 b and the gate insulating film 107 .

[0070] Note that the detailed structure and manufacturing method of the transistor 136 will be described in Embodiment 2. The transistor described in Embodiment 2 is used in the pixel 100 described in this embodiment. This can reduce power consumption of the display device of one embodiment of the present invention.

[0071] [Modification of pixel configuration] In the following, a pixel structure different from the pixel 100 described above in a liquid crystal display device will be described. The structure will be described with reference to FIGS.

[0072] FIG. 7A shows one pixel 30 of a liquid crystal display device having a multi-domain structure according to the present embodiment. 7(B) is a top view of the pixel 300 shown in FIG. 7(A), and FIG. 7(B) is a circuit diagram of the pixel 300 shown in FIG.

[0073] As shown in FIG. 7(A) and FIG. 7(B), the pixel 300 includes a scanning line 303 and a scanning line 304. The signal line 321 intersects with the pixel electrode 339a and the pixel electrode 339b. 339b. Also, the capacitance wiring 3 That is, the signal line 321 has the capacitance wiring 305a and The capacitance wiring 305a and the capacitance wiring 305b do not overlap each other. b are electrically connected to the pixel electrodes 339a and 339b, respectively. A signal line 321 is provided between the capacitance wiring 305a and the capacitance wiring 305b.

[0074] In addition, a transistor 336 and a transistor The transistor 336 has a semiconductor film 335 overlapping with the scan line 303. The sixth electrode 323a and the seventh electrode 325a overlap with the semiconductor film 335. The sixth electrode 323a is electrically connected to the signal line 321. The seventh electrode serves as one of the source electrode and the drain electrode in the transistor 336. 325a serves as the other of the source and drain electrodes of the transistor 336. do.

[0075] The transistor 337 includes a semiconductor film 335 overlapping with the scan line 303 and a The eighth electrode 323b and the ninth electrode 325b overlap each other. The eighth electrode 323b is The eighth electrode 323b is electrically connected to the signal line 321. The ninth electrode 325b functions as one of the source electrode and the drain electrode in the transistor. It functions as the other of the source electrode and drain electrode in transistor 337.

[0076] The seventh electrode 325a included in the transistor 336 is connected to the pixel electrode 325 via the opening 344a. That is, the transistor 336 is electrically connected to the seventh electrode 325a. The pixel electrode 339a is connected to the liquid crystal element 342. The electrode is electrically connected to the pixel electrode 339a and the seventh electrode 325a of the transistor 336. The other electrode 345a is electrically connected to the capacitance wiring 305a through an opening 346a. .

[0077] The ninth electrode 325b included in the transistor 337 is connected to the pixel electrode 325b through an opening 344b. That is, the transistor 337 is electrically connected to the ninth electrode 325b. The pixel electrode 339b is connected to the liquid crystal element 343. The electrode is electrically connected to the pixel electrode 339b and the ninth electrode 325b of the transistor 337. The other electrode 345b is electrically connected to the capacitance line 305b through an opening 346b. .

[0078] The openings 344a and 344b are provided in an insulating film 316, which will be described later. The opening 346a and the opening 346b are provided in a gate insulating film 307, which will be described later. In order to avoid the drawing becoming complicated, in FIG. 7(A), the pixel electrode 339a and the pixel The pole 339b is not hatched, and only the outline of the top surface shape is shown by a dashed line.

[0079] The transistor 336 and the transistor 337 are disposed approximately at the center of the pixel 300 in the top view. 3, between the pixel electrodes 339a and 339b of each sub-pixel in the pixel 300. is formed.

[0080] In the transistor 336 and the transistor 337, the source electrode and the drain electrode are The sixth electrode 323a and the eighth electrode 323b, which are one of the electrodes, are connected to the signal line 321 and the running At the overlapping portion of the scanning line 303, the scanning line 303 overlaps with the scanning line 303. In one pixel 300 constituting a display element, a transistor 336 and a transistor 337 It is possible to reduce the parasitic capacitance generated between one of the electrodes and the scanning line 303. , the source electrode and the drain electrode of the transistor 336 and the transistor 337, respectively The seventh electrode 325a and the ninth electrode 325b, which are the other of the scanning electrodes, overlap with the scanning line 303. do.

[0081] As shown in FIG. 7B, in the transistor 336, the scan line 303 and A parasitic capacitance C21 occurs at the overlapping portion of the electrodes 325a of the transistors 33 and 33. In FIG. 7, a parasitic capacitance C22 is generated at the overlapping portion of the scanning line 303 and the ninth electrode 325b. In addition, a parasitic capacitance C25 occurs at the overlapping portion of the signal line 321 and the scanning line 303. The sixth electrode 323a and the eighth electrode 323b are connected to the signal line 321 and the scanning line 303. In order to overlap with the scanning line 303 at the overlapping portion, the sixth electrode 323a and the eighth electrode 32 The parasitic capacitance occurring at the overlapping portion of the scanning line 303 and the scanning line 304 is included in the above-mentioned parasitic capacitance C25. can be.

[0082] Here, a pixel 300 has a transistor 336 and a transistor 337, Compare pixel 100 with seventh electrode 325 and transistor 136 and transistor 137. The area of ​​the overlapping portion of the second electrode 125a and the scanning line 303 is Since the area of ​​the ninth electrode 3 is larger than that of the parasitic capacitance C21, the parasitic capacitance C21 is larger than the parasitic capacitance C1. The area of ​​the overlapping portion of the third electrode 125b and the scanning line 303 is Since the area of ​​the scanning line 3 is larger than that of the scanning line 3, the parasitic capacitance C22 is larger than the parasitic capacitance C2. The area of ​​the overlapping portion of the scanning line 103 and the signal line 321, and the area of ​​the overlapping portion of the scanning line 103 and the signal line 121 are approximately the same, then the parasitic capacitance C25 and the parasitic capacitance C5 are approximately the same.

[0083] In the pixel 100, the signal line 121 overlaps with the capacitance wiring 105a and the capacitance wiring 105b. In the overlapping portion, parasitic capacitances C6 and C7 occur. In this case, the signal line 321 does not have an area overlapping the capacitance wiring 305a and the capacitance wiring 305b. Therefore, no parasitic capacitance occurs between the signal line 321 and the capacitance wiring 305a and between the signal line 321 and the capacitance wiring 305b. do not have.

[0084] In a liquid crystal display device having multiple pixels, this causes a delay in signal transmission through the signal lines. Parasitic capacitance tends to occur at the end of a signal transmission path rather than through a transistor. For example, in the pixel 100, the signal line 121 and the capacitor The parasitic capacitance C6 generated at the overlapping portion with the capacitance wiring 105a is smaller than that of the scanning line 103 and the second electrode The parasitic capacitance C1 occurring at the overlapping portion with the signal line 125a has a larger influence on the delay in signal transmission of the signal line 121. This is because the number of capacitance wirings overlapping one signal line 121 in the liquid crystal display device is small. The parasitic capacitance C6 is added only to the signal transmission, whereas the parasitic capacitance C1 is added to the signal When one transistor 136 connected to the line 121 is turned on, the signal transmission is affected. Therefore, compared to pixel 100, pixel 300 has a smaller parasitic Only the difference between the capacitance C21 and the parasitic capacitance C1 and the difference between the parasitic capacitance C22 and the parasitic capacitance C2 Although the parasitic capacitance C6 and the parasitic capacitance C7 generated in the pixel 100 are large, they are not generated. This reduces the parasitic capacitance that causes a delay in signal transmission in the signal lines of the liquid crystal display device. It is possible.

[0085] As shown in FIG. 7C, the end of the semiconductor film 335 is aligned in the direction in which the signal line 321 extends. The seventh electrode 325a and the overlapping portion of the scanning line 303, and the ninth electrode 325b and The seventh electrode 325a and the ninth electrode 303 are arranged so that the area of ​​the overlapping portion of the scanning line 303 is small. By adopting such a configuration, the above-mentioned parasitic capacitance C21 and the parasitic capacitance The capacitance C22 can be reduced. The semiconductor film 335 is formed so that an end of the semiconductor film 335 is positioned outside the overlapping portion of the signal line 321 and the scanning line 303. A conductive film 335 may be provided. A gate insulating film is provided between the signal line 321 and the scanning line 303. By forming the semiconductor film 335 in addition to the gate electrode 307, the signal line 321 and the scanning line 303 are overlapped. In some cases, it may be possible to reduce the parasitic capacitance generated in the portion.

[0086] As shown in FIG. 8A and FIG. 8B, in the pixel 300, the capacitance wiring 305 a and the capacitance wiring 305b may be shared with adjacent pixels. By adopting such a configuration, the number of capacitance wirings in the display device can be reduced. As shown in (A), the area of ​​the overlapping portion of the pixel electrode 339a and the capacitance wiring 305a is increased. This increases the capacitance of the capacitor 340. By increasing the area of ​​the overlapping portion of the capacitance wiring 305b and the capacitance element 341, the capacitance of the capacitance element 341 is increased. It is possible.

[0087] Next, the structure of a transistor and a capacitor included in the pixel 300 will be described with reference to FIG. Reveal.

[0088] FIG. 9 shows the transistor 336 and the capacitor element 337 in the dashed line CD shown in FIG. It has a cross-sectional structure of 40.

[0089] The transistor 336 is formed by forming a gate line 303, a semiconductor film 335, and a gate line A gate insulating film 307 provided between the semiconductor film 335 and the gate insulating film 303 is connected to the semiconductor film 335. The semiconductor film 335 has a sixth electrode 323 a in contact with the sixth electrode 323 a and a seventh electrode 325 a in contact with the semiconductor film 335 .

[0090] The capacitance element 340 includes an electrode 345a, a seventh electrode 325a, and a third electrode 325b on a substrate 301. and a gate insulating film 307 provided between the seventh electrode 325a and the seventh electrode 325a.

[0091] Also, on the gate insulating film 307, through an opening 346a provided in the gate insulating film 307, A capacitance wiring 305a is provided so as to be electrically connected to the electrode 345a. 7. On the semiconductor film 335, the sixth electrode 323a, the seventh electrode 325a and the capacitance wiring 305a An insulating film 316 is provided on the insulating film 316. An opening 344 is provided in the insulating film 316. A pixel electrode 339a is provided which is electrically connected to the seventh electrode 325a via a.

[0092] Although not shown, the transistor 337 has the same structure as the transistor 336. The capacitance element 341 has a similar structure to that of the capacitance element 340.

[0093] The layers constituting the transistor 336 and the capacitor 340 are the same as those of the transistor 136 and the capacitor The insulating film 316 and the insulating film 317 are made of the same material and have the same laminated structure as the layers constituting the capacitor 140. The insulating film 116 and the pixel electrode 339a are made of the same material as the insulating film 116 and the pixel electrode 139a, respectively. The electrode 345a and the capacitance wiring 305a can be made of a conductive material. The same materials as those of the scan line 303 and the sixth electrode 323a can be used.

[0094] Note that the detailed structure and manufacturing method of the transistor 336 will be described in Embodiment 2. The transistor described in Embodiment 2 is used in the pixel 300 described in this embodiment. This can reduce power consumption of the display device of one embodiment of the present invention.

[0095] By using the pixel 100 or the pixel 300 described in this embodiment, a multi-domain In the liquid crystal display device having this structure, the gate electrode of the transistor is formed between the scanning line and the signal line. A gate line is connected to the source electrode or drain electrode of a transistor, and a signal line is connected to the gate line. In addition, the parasitic capacitance can be reduced. By doing so, the liquid crystal display device with the multi-domain structure can prevent the generation of the capacitance between the signal line and the capacitance wiring. It is possible to reduce parasitic capacitance. This makes it possible to drive large liquid crystal displays at high speeds. The display quality can be improved in a liquid crystal display device having a high resolution. In addition, the power consumption of the liquid crystal display device can be reduced.

[0096] In this embodiment, a structure in which two transistors are provided in one pixel is shown. However, this is not limited to the above. It may have a number of pixel electrodes that are connected.

[0097] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done. (Embodiment 2) In this embodiment, a semiconductor device and a manufacturing method of the semiconductor device according to one embodiment of the present invention will be described. The following description will be given with reference to FIG. 10 to FIG.

[0098] <Configuration Example 1 of Semiconductor Device> FIG. 14C is a top view of a transistor 500 which is a semiconductor device of one embodiment of the present invention. FIG. 14B is a cross-sectional view taken along the dashed line X1-X2 in FIG. 14C. 10(A) and 10(B) are cross-sectional views taken along the dashed line Y1-Y2. FIG. 14A is a cross-sectional view illustrating a manufacturing process of the transistor 500 shown in FIG. It is.

[0099] In addition, in FIG. 14C, in order to avoid complication, the structure of the transistor 500 is Some of the components (such as an insulating film that functions as a gate insulating film) are omitted in the figure. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is the channel width direction. Note that the top view of a transistor is also shown in the following drawings. As with 14(C), some components may be omitted in the illustration.

[0100] The transistor 500 includes a conductive film 504 over a substrate 502, which functions as a gate electrode, and a An insulating film 506 on the plate 502 and the conductive film 504, and an insulating film 507 on the insulating film 506, An oxide semiconductor film 508 on the film 507 and a solenoid 508 electrically connected to the oxide semiconductor film 508 The conductive film 512a serving as a gate electrode and the oxide semiconductor film 508 and a conductive film 512b serving as a drain electrode. In more detail, an insulating film 514 is formed over the conductive films 512a and 512b and the oxide semiconductor film 508. , 516, and an insulating film 518 are provided. The insulating films 514, 516, and 518 are The insulating film 514 functions as a protective insulating film for the photoconductor 500. Insulating film 516 may be referred to as a second protective insulating film.

[0101] In addition, the oxide semiconductor film 508 is formed by disposing the first oxide semiconductor film 508 on the conductive film 504 side serving as a gate electrode. The first oxide semiconductor film 508a and the second oxide semiconductor film 50 The insulating film 506 and the insulating film 507 are formed on the gate of the transistor 500. It functions as an insulating film.

[0102] The oxide semiconductor film 508 is In-M (M is aluminum, gallium, yttrium, In particular, oxide semiconductors such as In-M-Zn oxides can be used. The conductive film 508 is preferably made of In-M-Zn oxide.

[0103] The first oxide semiconductor film 508a has a higher In content than the second oxide semiconductor film 508b. It is preferable that the oxide contains an oxide having a composition in which the atomic ratio of is greater than the atomic ratio of M.

[0104] The first oxide semiconductor film 508a has a composition in which the atomic ratio of In is larger than the atomic ratio of M. Therefore, the field effect mobility (sometimes simply referred to as μFE) of the transistor 500 is Specifically, the field effect mobility of the transistor 500 can be increased by 10 cm 2 / Vs, and more preferably the field effect mobility of the transistor 500 is greater than 30c m 2 / Vs can be exceeded.

[0105] For example, the above-mentioned high field effect mobility transistor is used as a gate driver for generating a gate signal. A driver (especially a demultiplexer connected to the output terminal of a shift register of a gate driver) By using the semiconductor device or display device in a semiconductor device having a narrow frame (also called a narrow frame), can be provided.

[0106] On the other hand, the first oxide semiconductor film 508a has a composition in which the atomic ratio of In is greater than the atomic ratio of M. By doing so, the electrical characteristics of the transistor 500 are likely to change when exposed to light. In the semiconductor device according to one embodiment of the present invention, the second oxide semiconductor film 508a is formed over the first oxide semiconductor film 508b. The second oxide semiconductor film 508b is formed on the first oxide semiconductor film 508b. Since the atomic ratio of In is smaller than that of the oxide semiconductor film 508a, the first oxide semiconductor The band gap Eg is larger than that of the conductive film 508a. The oxide semiconductor film 508 is a laminated structure of a first oxide semiconductor film 508a and a second oxide semiconductor film 508b. 8 has high resistance to negative bias light stress testing.

[0107] By using the oxide semiconductor film having the above structure, the oxide semiconductor film 508 can be prevented from being damaged by light irradiation. Therefore, the amount of absorption of the transistor 500 during light irradiation can be reduced. Fluctuations in electrical characteristics can be suppressed.

[0108] In addition, when oxygen vacancies are formed in the oxide semiconductor film 508 of the transistor 500, This generates electrons as carriers, making the transistor prone to normally-on characteristics. In this case, the normally-on characteristic is that the current (for example, the drain Therefore, the oxide semiconductor film 508 In particular, it is necessary to reduce oxygen vacancies in the first oxide semiconductor film 508a in order to stabilize the oxide semiconductor film. This is also important in obtaining good transistor characteristics. In the above structure, the insulating film on the oxide semiconductor film 508, Excess oxygen is introduced into the insulating film 514 and / or the insulating film 516, And / or, oxygen is transferred from the insulating film 516 to the oxide semiconductor film 508, and the oxide semiconductor film The oxygen vacancies in the insulating film 508, particularly in the first oxide semiconductor film 508a, are filled. When the first barrier film 531 is formed on the insulating film 516, excessive oxygen is formed in the insulating film 516. By introducing oxygen into the insulating film 516, oxygen is transferred into the oxide semiconductor film 508. Oxygen vacancies in the oxide semiconductor film 508, particularly in the first oxide semiconductor film 508a, are filled.

[0109] The insulating films 514 and 516 are made of a material having a region containing oxygen in excess of the stoichiometric composition. In other words, the insulating films 514 and 516 have The insulating films 514 and 516 are insulating films capable of releasing oxygen. In order to provide the oxygen-excess region, for example, oxygen is introduced into the insulating films 514 and 516 after film formation to form an oxygen-excess region. The oxygen introduction method includes ion implantation, ion doping, plasma Immersion ion implantation, plasma treatment, or the like can be used.

[0110] In order to fill the oxygen vacancies in the first oxide semiconductor film 508a, It is preferable to make the thickness of the semiconductor film 508b thin in the vicinity of the channel region. The thickness of the oxide semiconductor film 508b in the vicinity of the channel region is preferably 1 nm to 20 nm. nm or less, and more preferably, from 3 nm to 10 nm.

[0111] In order to fill the oxygen vacancies in the first oxide semiconductor film 508a, The semiconductor film 508b is preferably highly oxygen permeable. By forming the oxide semiconductor film 508b, the excess oxygen contained in the insulating films 514 and 516 is converted into the first oxide. Therefore, the light can be suitably transmitted into the compound semiconductor film 508a.

[0112] As described above, in the semiconductor device of one embodiment of the present invention, the oxide semiconductor film has a stacked structure. In addition, by using a structure in which excess oxygen is contained in the insulating film in contact with the oxide semiconductor film, A highly reliable semiconductor device can be provided. The temperature during the manufacturing process of a semiconductor device having the structure is kept low (typically less than 400° C. or 37 The temperature can be set to less than 5°C (preferably 340°C or higher and 360°C or lower). The process for fabricating the body device will be described later.

[0113] Other components included in the semiconductor device of this embodiment will be described in detail below. do.

[0114] <Substrate> There is no particular restriction on the material of the substrate 502, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 502. Also, a material such as silicon or silicon carbide may be used. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to use a substrate, an SOI substrate, etc., on which a semiconductor element is provided. The substrate 502 may be a glass substrate. When using large area substrates such as 6th generation, 7th generation, 8th generation, 9th generation, and 10th generation, By using such a large-area substrate, a large display device can be manufactured. This is preferable because it is possible to reduce the manufacturing cost.

[0115] In addition, a flexible substrate is used as the substrate 502, and the transistor 50 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 502 and the transistor 500. The release layer is preferably removed from the substrate 502 after a semiconductor device is partially or entirely completed thereon. The transistor 500 can be separated and transferred to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0116] <Conductive films functioning as gate electrode, source electrode, and drain electrode> A conductive film 504 functioning as a gate electrode and a conductive film 512 functioning as a source electrode. The conductive film 512b functioning as the drain electrode is made of chromium (Cr), copper (C u), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (M o), Tantalum (Ta), Titanium (Ti), Tungsten (W), Manganese (Mn), Ni A metal element selected from nickel (Ni), iron (Fe), and cobalt (Co), or the above-mentioned The alloys are made of metal elements or alloys combining the above metal elements. It can be formed.

[0117] The conductive films 504, 512a, and 512b may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, titanium on an aluminum film, A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, a titanium nitride film A two-layer structure in which a tungsten film is laminated on top of a tantalum nitride film or a tungsten nitride film A two-layer structure in which a tungsten film is laminated, a titanium film, and an aluminum film is laminated on the titanium film. There are three-layer structures, such as a titanium film on top of an aluminum film. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of these may be used.

[0118] The conductive films 504, 512a, and 512b are made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light transmitting properties, such as indium tin oxide doped with silicon oxide, is used. It is also possible.

[0119] The conductive films 504, 512a, and 512b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0120] <Insulating film that functions as a gate insulating film> The insulating film 506 and the insulating film 507 function as gate insulating films of the transistor 500. For this purpose, plasma enhanced chemical vapor deposition (PECVD) By using the (chemical vapor deposition) method, sputtering method, etc., silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide tetrium film, hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film film, tantalum oxide film, magnesium oxide film, lanthanum oxide film, cerium oxide film and naphthalene oxide film Insulating films containing one or more oxymer films can be used. Instead of a laminated structure of the insulating film 507 and the insulating film 508, a single insulating film selected from the above-mentioned materials or a triple insulating film may be used. An insulating film having a layer or more may be used.

[0121] The insulating film 506 also functions as a blocking film that suppresses oxygen permeation. For example, the insulating films 507, 114, and 516 and / or the oxide semiconductor film 508 may contain an excess of acid. When oxygen is supplied, the insulating film 506 can suppress the permeation of oxygen.

[0122] Note that the oxide semiconductor film 508 functioning as a channel region of the transistor 500 The insulating film 507 is preferably an oxide insulating film, and has an oxide content in excess of the stoichiometric composition. It is more preferable that the insulating film 5 has a region containing oxygen (an oxygen-excess region). The insulating film 507 is capable of releasing oxygen. In order to provide the insulating film 507, for example, the insulating film 507 may be formed in an oxygen atmosphere. Oxygen may be introduced into the insulating film 507 to form an oxygen excess region. These include ion implantation, ion doping, plasma immersion ion implantation, and plasma Zuma processing or the like can be used.

[0123] When hafnium oxide is used as the insulating film 507, the following effects are obtained. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared with the case where silicon oxide or silicon oxynitride is used, the thickness of the insulating film 507 can be made larger. Therefore, the leakage current due to the tunnel current can be reduced. Furthermore, hafnium oxide having a crystal structure can be used to realize a transistor with a small current. Hafnium oxide has a higher dielectric constant than hafnium oxide, which has an amorphous structure. In order to make a transistor with a small off-state current, hafnium oxide having a crystalline structure is used. Examples of the crystal structure include monoclinic and cubic. However, one aspect of the present invention is not limited to these.

[0124] In this embodiment, a silicon nitride film is formed as the insulating film 506, and a silicon nitride film is formed as the insulating film 507. The silicon oxide film is formed as a result of the above. The silicon nitride film has a lower dielectric constant than the silicon oxide film. The film thickness required to obtain the same capacitance as a silicon oxide film is large, so it is suitable for transistors. The gate insulating film of the DISTOR 500 is made physically thick by including a silicon nitride film. Therefore, the decrease in the dielectric strength of the transistor 500 can be suppressed, and the dielectric strength can be improved. The edge breakdown voltage can be improved and electrostatic breakdown of the transistor 500 can be suppressed.

[0125] <Oxide semiconductor film> The oxide semiconductor film 508 can be formed using the above-mentioned materials. In the case where 508 is In-M-Zn oxide, the sintered material used for depositing the In-M-Zn oxide is The atomic ratio of the metal elements in the sputtering target preferably satisfies In≧M and Zn≧M. The atomic ratio of the metal elements in such a sputtering target is preferably In:M: Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, I The preferred ranges are n:M:Zn=3:1:2 and In:M:Zn=4:2:4.1. When the semiconductor film 508 is an In-M-Zn oxide, the sputtering target is preferably It is preferable to use a target containing crystalline In-M-Zn oxide. By using a target containing Zn oxide, a crystalline oxide semiconductor film 508 was formed. Note that the atomic ratio of the oxide semiconductor film 508 to be formed is subject to an error and The atomic ratio of the metal elements contained in the sputtering target is ±4. For example, a sputtering target with an atomic ratio of In:Ga: When Zn=4:2:4.1 is used, the atomic ratio of the oxide semiconductor film 508 to be formed is I In some cases, the n:Ga:Zn ratio is approximately 4:2:3.

[0126] For example, the first oxide semiconductor film 508a may be formed using the above-mentioned In:M:Zn=2:1:3 , it may be formed using sputtering targets such as In:M:Zn = 3:1:2 and In:M:Zn = 4:2:4.1. Preferably, the first oxide semiconductor film 508a has an atomic ratio of In:M:Zn = 4:α1 (1.5 ≤ α1 ≤ 2.5):α2 (2.5 ≤ α2 ≤ 3.5). Also, for the second oxide semiconductor film 508b, it may be formed using sputtering targets such as In:M:Zn = 1:1:1 and In:M:Zn = 1:1:1.2 mentioned above. Preferably, the second oxide semiconductor film 508b has an atomic ratio of In:M:Zn = 1:β1 (0.8 ≤ β1 ≤ 1.2):β2 (0.8 ≤ β2 ≤ 1.2). Note that for the atomic ratio of the metal elements in the sputtering target used for the second oxide semiconductor film 508b, it is not necessary to satisfy In ≥ M and Zn ≥ M, and a composition satisfying In < M and / or Zn < M may also be used. Specifically, examples include In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, and In:M:Zn = 1:3:6. In addition, the oxide semiconductor film 508 has an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap in this way, the off-current of the transistor 500 can be reduced. In particular, for the first oxide semiconductor film 508a, an oxide semiconductor film with an energy gap of 2.0 eV or more, preferably 2.0 eV or more and 3.0 eV or less, is used, and for the second oxide semiconductor film 508b, an oxide semiconductor film with an energy gap of 2.5 eV or more and 3.5 eV or less is used.

[0127]

[0128] ​​​​​​​​​​​​​​In addition, the second oxide semiconductor film 508a is preferably formed by arranging the first oxide semiconductor film 508b in a 100% oxide semiconductor layer. It is preferable that the energy gap of 8b is large.

[0129] The thicknesses of the first oxide semiconductor film 508a and the second oxide semiconductor film 508b are Each of them is 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably Or, the thickness should be 3 nm or more and 50 nm or less.

[0130] The first oxide semiconductor film 508a is an oxide semiconductor film with low carrier density. For example, the first oxide semiconductor film 508a has a carrier density of 8×10 11 / cm 3 Less than 1 x 10 11 / cm 3 less than 1×10 10 / cm 3 Less than 1 x 10 -9 / cm 3 The second oxide semiconductor film 50 The second oxide semiconductor film 8b is formed of a low carrier density oxide semiconductor film. The body membrane 508b has a carrier density of 1×10 17 / cm 3 Less than or equal to 1×10 15 / cm 3 Less than 1×10, more preferably 13 / cm 3 Less than or equal to 1×10 11 / cm 3 The following would suffice.

[0131] In addition, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use a material with an appropriate composition according to the required properties (e.g., the resultant mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of the transistor, The carrier density, impurity concentration, defect density, metal element and oxygen atoms of the oxide semiconductor film 508b It is preferable to make the numerical ratio, interatomic distance, density, etc. appropriate.

[0132] Note that the first oxide semiconductor film 508a and the second oxide semiconductor film 508b are By using an oxide semiconductor film having a low impurity concentration and a low density of defect states, This is preferable because it allows the fabrication of a transistor with excellent electrical characteristics. The term "high purity intrinsic or substantially intrinsic" refers to a material with a low oxygen concentration and a low defect level density (low oxygen vacancies). A highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film is called a highly pure intrinsic oxide semiconductor film. Since the number of rear generation sources is small, the carrier density can be reduced. A transistor in which a channel region is formed in a semiconductor film has a negative threshold voltage. In addition, it is rare for the material to have a normally-on characteristic. Since the density of defect states in an oxide semiconductor film, which is essentially highly pure and intrinsic, is low, the density of trap states is also low. In addition, the oxide semiconductor film having a high purity intrinsic or substantially high purity intrinsic property may have a low conductivity. has a significantly smaller off-state current and a channel width of 1×10 6 μm and the channel length L is 10 μm. Even for elements, the voltage between the source and drain electrodes (drain voltage) is 1V to 10V In the range of 1, the off-state current is below the measurement limit of the semiconductor parameter analyzer, that is, 1 ×10 -13 It is possible to obtain a characteristic of A or less.

[0133] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film is provided with a channel. The transistors in which the regions are formed have small variations in electrical characteristics and are highly reliable. Note that charges trapped in the trap states of the oxide semiconductor film are dissipated. It takes a long time for the charge to reach a certain level, and it may behave as if it were a fixed charge. A transistor in which a channel region is formed in an oxide semiconductor film with a high density of trap states has a high current density. Impurities include hydrogen, nitrogen, alkali metals, or Alkaline earth metals, etc.

[0134] Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In this case, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters the electron carrier, it can generate electrons. It can combine with oxygen, which combines with metal atoms, to generate electrons, which are carriers. A transistor using an oxide semiconductor film containing hydrogen has normally-on characteristics. For this reason, it is preferable that the amount of hydrogen in the oxide semiconductor film 508 be reduced as much as possible. Specifically, in the oxide semiconductor film 508, a hydrogen concentration obtained by SIMS analysis is Degrees, 2 x 10 20 atoms / cm 3 Less than or equal to 5×10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than or equal to 5×1, more preferably 0 17 atoms / cm 3Less than 1×10, more preferably 16 atoms / cm 3 below Let us assume that.

[0135] The first oxide semiconductor film 508a has a higher hydrogen concentration than the second oxide semiconductor film 508b. It is preferable that the first oxide semiconductor film 508a has a portion in which the degree of oxidation is small compared to that of the second oxide semiconductor film 508b. By having a portion with a lower hydrogen concentration than the semiconductor film 508b, The present invention can be an apparatus.

[0136] In addition, the first oxide semiconductor film 508a contains silicon, which is one of the Group 14 elements. When carbon is contained, oxygen vacancies are increased in the first oxide semiconductor film 508a, and the first oxide semiconductor film 508a becomes n-type. As a result, the concentrations of silicon and carbon in the first oxide semiconductor film 508a and The concentrations of silicon and carbon in the vicinity of the interface with the first oxide semiconductor film 508a (measured by SIMS analysis) The concentration that can be obtained is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 a toms / cm 3 The following applies.

[0137] In addition, in the first oxide semiconductor film 508a, an alkali metal oxide film obtained by SIMS analysis The concentration of metal or alkaline earth metal is 1×10 18 atoms / cm 3 The following is preferably is 2 × 10 16 atoms / cm 3 The following are the alkali metals and alkaline earth metals: When a compound is bonded to an oxide semiconductor, carriers may be generated, increasing the off-state current of a transistor. For this reason, the alkali metal or It is preferable to reduce the concentration of alkaline earth metals.

[0138] When the first oxide semiconductor film 508a contains nitrogen, electrons serving as carriers This increases the carrier density and makes it easier to convert to n-type. A transistor using an oxide semiconductor film having such a structure tends to be normally on. It is preferable that nitrogen be reduced as much as possible in the oxide semiconductor film. The nitrogen concentration obtained by SIMS analysis is 5×10 18 atoms / cm 3 To be more specific: is preferred.

[0139] The first oxide semiconductor film 508a and the second oxide semiconductor film 508b are The non-single crystal structure may be, for example, CAAC-OS (CAx is Aligned Crystalline Oxide Semiconductor or), polycrystalline, microcrystalline, or amorphous structures. The crystalline structure has the highest density of defect states, while the CAAC-OS has the lowest density of defect states.

[0140] Here, the band structure of the oxide semiconductor film 508 and the insulating film in contact with the oxide semiconductor film 508 is The structure will be explained with reference to FIG.

[0141] FIG. 18 shows an insulating film 507, a first oxide semiconductor film 508a, a second oxide semiconductor film 50 8b, and an insulating film 514. For ease of understanding, the band structure is shown in FIG. The energy level (Ec) at the conduction band minimum of the oxide semiconductor film 508b and the insulating film 514 in Shows.

[0142] In the band structure shown in FIG. 18, the insulating films 507 and 514 are made of silicon oxide. The first oxide semiconductor film 508a is made of a metal element having an atomic ratio of In:Ga:Zn. The oxide semiconductor film was formed using a metal oxide target having a ratio of 4:2:4.1. The oxide semiconductor film 508b of No. 2 has an atomic ratio of metal elements of In:Ga:Zn=1:1:1. 1 is a band diagram of a structure using a metal oxide film formed using a metal oxide target of .2. do.

[0143] As shown in FIG. 18, a first oxide semiconductor film 508a and a second oxide semiconductor film 50 In 8b, the energy level at the bottom of the conduction band changes smoothly. In other words, In other words, the band structure changes to a continuous junction. At the interface between the first oxide semiconductor film 508a and the second oxide semiconductor film 508b, Assume that there are no impurities that form defect levels such as trap centers or recombination centers. .

[0144] A continuous junction is formed between the first oxide semiconductor film 508a and the second oxide semiconductor film 508b. In order to achieve this, a multi-chamber deposition system (sputtering system) equipped with a load lock chamber is required. The films can be laminated in succession using a lamination apparatus without exposing them to the air.

[0145] With the structure shown in FIG. 18, the first oxide semiconductor film 508a serves as a well. In the transistor using the above stacked structure, the channel region is the first oxide semiconductor film 5 It can be seen that it is formed in 08a.

[0146] Note that in the case where the second oxide semiconductor film 508b is not formed, the first oxide semiconductor film 508 A trap level may be formed in a. On the other hand, by forming the above-mentioned layered structure, the trap The trap level can be formed in the second oxide semiconductor film 508b. The trap level can be separated from the conductive film 508a.

[0147] In addition, the trap states in the first oxide semiconductor film 508a functioning as a channel region The energy level of the lower band edge (Ec) can be farther from the vacuum level, resulting in a trap level. Electrons tend to accumulate in the trap level. This becomes a fixed charge, and the threshold voltage of the transistor shifts in the positive direction. Therefore, the trap level is lower than the energy level (E c) It is preferable to use a structure closer to the vacuum level. This makes it difficult for electrons to accumulate in the top level, making it possible to increase the on-state current of the transistor. At the same time, the field effect mobility can be increased.

[0148] In addition, in FIG. 18, the second oxide semiconductor film 508b is a first oxide semiconductor film 50 The energy level of the conduction band minimum is closer to the vacuum level than that of 8a, and is typically the first oxide semiconductor. The energy level of the conduction band minimum of the conductive film 508a and the conduction band minimum of the second oxide semiconductor film 508b are The difference between the energy level at the lower band edge is 0.15 eV or more, or 0.5 eV or more and 2e V or less, or 1 eV or less. a difference between the electron affinity of the first oxide semiconductor film 508a and the electron affinity of the first oxide semiconductor film 508b is 0.15 eV or more; The electron transport intensity is 0.5 eV or more and 2 eV or less, or 1 eV or less.

[0149] With such a structure, the first oxide semiconductor film 508a serves as a main path for current. The second oxide semiconductor film 508b functions as a channel region. The first oxide semiconductor film 508a in which the region is formed is made of one or more metal elements. Since the first oxide semiconductor film 508a and the second oxide semiconductor film At the interface with 508b, interfacial scattering is unlikely to occur. Since the movement of the ions is not hindered, the field effect mobility of the transistor is increased.

[0150] In addition, the second oxide semiconductor film 508b is formed to prevent the second oxide semiconductor film 508b from functioning as part of a channel region. In order to prevent the second oxide semiconductor from being damaged, a material having a sufficiently low electrical conductivity is used. The film 508b has a first electron affinity (a difference between the vacuum level and the energy level at the bottom of the conduction band). The energy level of the conduction band minimum is smaller than that of the first oxide semiconductor film 508a. A material having a difference (band offset) with the conduction band minimum energy level of the semiconductor film 508a is used. In addition, a difference in threshold voltage occurs depending on the magnitude of the drain voltage. In order to suppress this, the energy level of the conduction band minimum of the second oxide semiconductor film 508b is set to The energy level of the first oxide semiconductor film 508a is 0.2 eV or higher than the bottom of the conduction band. It is preferable to use a material close to the vacuum level, preferably a material close to the vacuum level by 0.5 eV or more. stomach.

[0151] In addition, the second oxide semiconductor film 508b does not have a spinel crystal structure. In the case where the second oxide semiconductor film 508b has a spinel crystal structure, At the interface between the spinel type crystal structure and other regions, the structures of the conductive films 512a and 512b In some cases, the composition element may diffuse into the first oxide semiconductor film 508a. When the organic semiconductor film 508b is a CAAC-OS film, which will be described later, This is preferable because it enhances the blocking properties of the constituent elements, for example, copper element.

[0152] The thickness of the second oxide semiconductor film 508b is determined by the thickness of the conductive films 512a and 512b. The thickness of the insulating film 508b is thick enough to prevent the diffusion of the insulating film 508a into the semiconductor film 508b. The thickness of the second insulating film 508b is set to be less than the thickness at which supply of oxygen from the second insulating film 508b to the oxide semiconductor film 508b is suppressed. When the thickness of the oxide semiconductor film 508b in the second step is 10 nm or more, the conductive films 512a and 512b Diffusion of the constituent elements into the first oxide semiconductor film 508a can be suppressed. When the thickness of the second oxide semiconductor film 508b is 100 nm or less, the insulating films 514 and 51 Therefore, oxygen can be effectively supplied from the first oxide semiconductor film 508a to the second oxide semiconductor film 508b.

[0153] <An insulating film that functions as a protective insulating film for transistors> The insulating films 514 and 516 have a function of supplying oxygen to the oxide semiconductor film 508. The insulating film 518 functions as a protective insulating film for the transistor 500. The films 514 and 516 contain oxygen. The insulating film 514 is also impermeable to oxygen. The insulating film 514 is an insulating film formed by etching when forming an insulating film 516 to be formed later. It also functions as a film for reducing damage to the compound semiconductor film 508 .

[0154] The insulating film 514 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0155] In addition, it is preferable that the insulating film 514 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3×10 17 spins / cm 3 This is because the insulating film 514 is If the density of defects is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 514 will This is because the amount of transmission of the light is reduced.

[0156] In the insulating film 514, all of the oxygen that has entered the insulating film 514 from the outside is absorbed in the insulating film 51 Some oxygen does not move to the outside of the insulating film 514 and remains in the insulating film 514. At the same time, oxygen contained in the insulating film 514 moves to the outside of the insulating film 514, thereby forming an insulating film. Oxygen transfer may occur in the film 514. When the oxide insulating film capable of forming the insulating film 516 is formed over the insulating film 514, The desorbed oxygen can be transferred to the oxide semiconductor film 508 through the insulating film 514. .

[0157] The insulating film 514 is preferably formed using an oxide insulating film having a low density of nitrogen oxide levels. Note that the density of the nitrogen oxide level can be determined by the energy level at the top of the valence band of the oxide semiconductor film. Energy (E V_OS ) and the energy at the bottom of the conduction region of the oxide semiconductor film (E C_OS )and It may be possible for the formation of E v_os and E c_os The density of nitrogen oxide levels is As a low oxide insulating film, a silicon oxynitride film or a nitrogen oxide film having a low nitrogen oxide emission amount is used. An aluminum oxynitride film or the like that releases less oxide can be used.

[0158] In addition, the silicon oxynitride film, which emits a small amount of nitrogen oxide, is This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. The amount of molecules released is 1×10 18 molecule / cm 3 5×10 or more 19 molecule / cm 3 The following is the result. The amount of ammonia released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or lower. The amount released is determined by heat treatment at or above 550°C or below.

[0159] Nitrogen oxides (NO x , x is 0 or more and 2 or less, preferably 1 or more and 2 or less), typically NO 2 Alternatively, NO forms a level in the insulating film 514 or the like. 8. Therefore, the nitrogen oxide is in the insulating film 514 and the oxide When the electrons diffuse to the interface of the semiconductor film 508, the level traps the electrons on the insulating film 514 side. As a result, the trapped electrons may be trapped in the insulating film 514 and the oxide semiconductor film 515. 508The threshold voltage of the transistor is shifted in the positive direction to remain near the interface. Put away.

[0160] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 516 reacts with ammonia contained in the insulating film 516 during the heat treatment. Therefore, the amount of nitrogen oxide contained in the insulating film 514 is reduced. Electrons are less likely to be trapped at the interface between the oxide semiconductor film 506 and the oxide semiconductor film 508.

[0161] The insulating film 514 is made of E v_os and E c_os The nitrogen oxide level density is low during oxidation. By using a dielectric film, it is possible to reduce the shift in the threshold voltage of a transistor. As a result, the fluctuation in the electrical characteristics of the transistor can be reduced.

[0162] Heat treatment in the manufacturing process of a transistor is typically performed at a temperature of less than 400° C. or less than 375° C. By the heat treatment at a temperature of 340° C. or more and 360° C. or less, the insulating film 514 is heated to 10 In the spectrum obtained by ESR measurement below 0 K, the g value is 2.037 or more and 2.03 a first signal with a g value of 0.9 or less, a second signal with a g value of 0.25 or more and 0.3 or less, and A third signal with a g value between 1.964 and 1.966 is observed. The split width of the null and the second signal, and the split width of the second signal and the third signal The split width is about 5 mT in the X-band ESR measurement. The g value is 2.037. The first signal has a g value of 2.039 or more, and the second signal has a g value of 2.001 or more, and The sum of the spin densities of the third signal with g values ​​between 1.964 and 1.966 The total is 1 x 10 18 spins / cm 3 is less than 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 is less than.

[0163] In addition, the g value in the ESR spectrum below 100K is 2.037 to 2.039. The first signal has a g value of 2.001 to 2.003, and the second signal has a g value of 1 The third signal, between .964 and 1.966, is nitrogen oxide (NO x , x is 0 to 2 Representative examples of nitrogen oxides include: , nitrogen monoxide, nitrogen dioxide, etc. That is, the first group with a g value of 2.037 to 2.039. a signal with a g value between 2.001 and 2.003, and a second signal with a g value between 1.9 The lower the sum of the spin densities of the third signals (between 64 and 1.966), the higher the oxide insulation. It can be said that the nitrogen oxide content in the coating is low.

[0164] Also, E v_os and E c_os The oxide insulating film with low nitrogen oxide level density between the The nitrogen concentration measured by IMS is 6×10 20 atoms / cm 3 The following is the result.

[0165] The substrate temperature is between 220℃ and 350℃, and PEC using silane and nitrous oxide is used. Using the VD method, E v_os and E c_os Between the oxide insulators there is a low density of nitrogen oxide levels By forming the film, it is possible to form a dense film having high hardness.

[0166] The insulating film 516 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. The oxide insulating film containing more oxygen than the stoichiometric composition is formed using When heated, some of the oxygen is released. The oxygen content is greater than the stoichiometric composition. The oxide insulating film had a release of oxygen of 1.0×10 in terms of oxygen atoms as determined by TDS analysis. 1 9atoms / cm 3 More than 3.0×10 20 atoms / cm 3 That's all. The oxide insulating film is a thin film. The surface temperature of the film during the TDS analysis was 100°C or less. The temperature range is preferably from 100° C. to 500° C. or from 100° C. to 700° C.

[0167] The insulating film 516 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., having a thickness of 400 nm or less can be used.

[0168] In addition, it is preferable that the insulating film 516 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5×10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Note that the insulating film 516 is preferably an oxide semiconductor compared to the insulating film 514. Since it is separated from the insulating film 508, it may have a higher defect density than the insulating film 514.

[0169] In addition, the insulating films 514 and 516 can be made of the same material. In some cases, the interface between the film 514 and the insulating film 516 cannot be clearly seen. In this embodiment, the interface between the insulating film 514 and the insulating film 516 is shown by a dashed line. In the embodiment, the two-layer structure of the insulating film 514 and the insulating film 516 has been described. For example, the insulating film 514 or the insulating film 516 may have a single-layer structure without being limited thereto.

[0170] The insulating film 518 is a blocking material for oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 518, oxygen from the oxide semiconductor film 508 can be prevented from being released. Diffusion to the outside, diffusion of oxygen contained in the insulating films 514 and 516 to the outside, and oxidation from the outside The insulating film 518 can be made of a material such as a silicon oxide film, a silicon nitride ... For example, a nitride insulating film can be used. The nitride insulating film can be made of silicon nitride. , silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. In particular, insulating films If a silicon nitride oxide film or a silicon nitride film is used as 518, the diffusion of oxygen to the outside can be prevented. This is preferable because it can suppress scattering.

[0171] It also has a blocking effect against oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. Instead of a nitride insulating film, an oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like is used. An oxide film having a blocking effect against oxygen, hydrogen, water, and the like may be provided as the insulating film 518. The insulating film may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxynitride. Gallium, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride As an oxide insulating film having a blocking effect against oxygen, hydrogen, water, and the like, is particularly preferably aluminum oxide, hafnium oxide, or yttrium oxide. .

[0172] Note that the various films described above, such as the conductive film, the insulating film, and the oxide semiconductor film, are formed by sputtering. It can be formed by the CVD method or PECVD method, but other methods such as thermal CVD (Ch emical vapor deposition (ALD) method or Atomic The thermal CVD method may be used. OCVD(Metal Organic Chemical Vapor Deposit) tion method.

[0173] Thermal CVD is a film formation method that does not use plasma, so defects caused by plasma damage occur. This has the advantage that no additional steps are required.

[0174] In the thermal CVD method, the source gas and the oxidizing agent are fed into the chamber at the same time, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the reactants near or on the substrate under reduced pressure and depositing the reactants on the substrate. You may go.

[0175] In addition, in the ALD method, the pressure inside the chamber is set at atmospheric pressure or reduced pressure, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating the gas introduction sequence. For example, by switching between two or more switching valves (also called high-speed valves), The source gases are sequentially supplied to the chamber, and the first source gas is supplied to the chamber so as not to mix the source gases. Inert gas (argon, nitrogen, etc.) is introduced simultaneously with or after the feed gas. In addition, when an inert gas is introduced at the same time, the inert gas is The second source gas may be introduced simultaneously with the introduction of the inert gas. Also, instead of introducing an inert gas, the first source gas is discharged by evacuation. The first source gas is adsorbed on the surface of the substrate to form a first layer. The second layer is deposited on the first layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction sequence until a thin film of the desired thickness is formed. By doing so, a thin film with excellent step coverage can be formed. The thickness of the thin film depends on the order of gas introduction. The thickness can be precisely adjusted by changing the number of times the process is repeated. This is suitable for producing thin FETs.

[0176] Thermal CVD methods such as MOCVD can be used to form the conductive film, insulating film, oxide semiconductor film, It is possible to form various films such as metal oxide films. For example, an In-Ga-ZnO film can be formed. In this case, trimethylindium, trimethylgallium, and dimethylzinc are used. The chemical formula for trimethylindium is In(CH 3 ) 3 In addition, trimethyl The chemical formula for gallium is Ga(CH 3 ) 3 The chemical formula for dimethylzinc is Zn( CH 3 ) 2 In addition, the combination is not limited to these, and instead of trimethylgallium, Triethylgallium (chemical formula Ga(C) 2 H 5 ) 3 ) can also be used, and dimethyl zinc Instead of diethyl zinc (chemical formula Zn(C 2 H 5 ) 2 ) can also be used.

[0177] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and liquids containing hafnium precursor compounds (hafnium alkoxides, tetrakisdimethylamine, etc.) The raw material gas is vaporized hafnium amide (TDMAH, etc.) and oxidized As an agent, ozone (O 3 Two types of gases are used: tetrakisdimethylamide hafnium The chemical formula for nium is Hf[N(CH 3 ) 2 ] 4 In addition, other material liquids include tetrahydrofuran. Examples include kis(ethylmethylamido)hafnium.

[0178] For example, when forming an aluminum oxide film using an ALD deposition system, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Vaporized raw gas and H as oxidant 2 Two types of gases are used: trimethyl The chemical formula for aluminum is Al(CH 3 ) 3 In addition, other material liquids include Tris( Dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0179] For example, when forming a silicon oxide film using a deposition system that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, the chlorine contained in the adsorbed matter is removed, and the oxidizing gas (O 2 , nitrous oxide) radicals are supplied to react with the adsorbate.

[0180] For example, when forming a tungsten film using a deposition system that uses ALD, the WF 6 Gas and B 2 H 6 The gases are introduced repeatedly in sequence to form an initial tungsten film, and then WF 6 Gas and H 2 The gases are introduced repeatedly in sequence to form a tungsten film. 2 H 6 G Instead of silicon 4 A gas may also be used.

[0181] For example, an oxide semiconductor film, such as In-Ga-ZnO, can be formed by a film formation apparatus using ALD. When forming a film, In(CH 3 ) 3 Gas and O 3 Gases were introduced repeatedly in sequence to O layer, and then Ga(CH 3 ) 3 Gas and O 3 The gases were repeatedly introduced in sequence to form GaO layer, and then Zn(CH 3 ) 2 Gas and O 3 The gas was introduced repeatedly in sequence to form ZnO The order of these layers is not limited to this example. By forming mixed compound layers such as In-Ga-O layers, In-Zn-O layers, and Ga-Zn-O layers, It is okay to do so. 3 H obtained by bubbling inert gas such as Ar instead of gas 2 O Gas may be used, but it should not contain H. 3 It is preferable to use In(CH 3 ) 3 Instead of gas, In(C 2 H 5 ) 3 Gas may also be used. 3 ) 3 Instead of gas, Ga(C 2 H 5 ) 3 Gas may also be used. 3 ) 2 G A stencil may also be used.

[0182] <Configuration Example 2 of Semiconductor Device> Next, a configuration example different from that of the transistor 500 shown in FIG. The following will be explained using (A) and (B). Note that if the function is the same as the one previously explained, , the hatch patterns are the same and may not be designated by specific symbols.

[0183] FIG. 16A is a top view of a transistor 570 which is a semiconductor device of one embodiment of the present invention. FIG. 16B is a cross section taken along dashed line X3-X4 in FIG. 16(A) along dashed line Y3-Y4.

[0184] The transistor 570 includes a conductive film 504 over a substrate 502, the conductive film 504 serving as a first gate electrode. an insulating film 506 on the substrate 502 and the conductive film 504; and an insulating film 507 on the insulating film 506. , an oxide semiconductor film 508 over the insulating film 507, and an insulating film 514 over the oxide semiconductor film 508. , an insulating film 516 over the insulating film 514 and a source The conductive film 512a serving as an electrode and the drain electrically connected to the oxide semiconductor film 508 512b functioning as an in-electrode, an insulating film 514 on the oxide semiconductor film 508, and an insulating film An insulating film 516 on the insulating film 514, an insulating film 518 on the insulating film 516, and a conductive film on the insulating film 518. 520a and a conductive film 520b on the insulating film 518. The conductive film 18 functions as a second gate insulating film of the transistor 570. 520a is electrically connected to the conductive layer 542 through an opening 542c provided in the insulating films 514, 516, and 518. In the transistor 570, the conductive film 520a is electrically connected to the conductive film 512b. For example, the transistor 57 functions as a pixel electrode used in a display device. In FIG. 1, the conductive film 520b serves as a second gate electrode (also referred to as a back gate electrode). It works.

[0185] As shown in FIG. 16B, the conductive film 520b is formed by insulating films 506, 507, and The insulating film 514, the insulating film 516, and the insulating film 518 are provided with openings 542a and 542b. In this case, the conductive film 504 functions as the first gate electrode. The same potential is applied to 20b and the conductive film 504.

[0186] In this embodiment, openings 542a and 542b are provided, and the conductive film 520b and Although the configuration in which the conductive film 504 is connected has been illustrated, the present invention is not limited to this. Only one of the openings 542a and 542b is formed, and the conductive film 520b and The conductive film 504 is connected. Alternatively, the openings 542a and 542b are not provided, and the conductive film 504 is not connected. The conductive film 520b and the conductive film 504 may not be connected to each other. In the case where the conductive film 504 is not connected, the conductive film 520b and the conductive film 504 are each provided with different It is possible to apply a voltage to the

[0187] As shown in FIG. 16B, the oxide semiconductor film 508 functions as a gate electrode. and a conductive film 520b functioning as a second gate electrode. The second gate is sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction and the length in the channel width direction of the conductive film 520b functioning as an electrode are The length of the oxide semiconductor film 508 in the channel length direction and the length of the oxide semiconductor film 508 in the channel width direction are The entire oxide semiconductor film 508 is covered with the conductive film 514, 516, and 518 via the insulating films 514, 516, and 518. The gate electrode is covered with a conductive film 520b. The conductive film 504 functioning as a conductive electrode includes an insulating film 506, an insulating film 507, an insulating film 514, The insulating film 516 and the insulating film 518 are connected at openings 542a and 542b. Therefore, the side surface of the oxide semiconductor film 508 in the channel width direction is covered with the insulating film 514 and the insulating film 51. 6 and faces a conductive film 520b functioning as a second gate electrode via an insulating film 518. There are.

[0188] In other words, in the channel width direction of the transistor 570, The conductive film 504 functioning as the second gate electrode and the conductive film 520b functioning as the second gate electrode are used as a gate insulating film. and an insulating film 514 functioning as a second gate insulating film. , 516, 518 are connected in the openings and function as gate insulating films. and insulating films 506 and 507 functioning as second gate insulating films. 518 surrounds the oxide semiconductor film 508 .

[0189] With such a structure, the oxide semiconductor film 508 included in the transistor 570 The conductive film 504 functions as a gate electrode and the conductive film 505 functions as a second gate electrode. 520b. The gate, like transistor 570, can be electrically surrounded by the electric field of an oxide semiconductor film in which a channel region is formed by the electric field of the first electrode and the second gate electrode; The device structure of a transistor that electrically surrounds the This can be called an s-channel structure.

[0190] The transistor 570 has an s-channel structure and therefore functions as a gate electrode. The conductive film 504 is formed on the oxide semiconductor film 502, and the electric field for inducing the channel is effectively applied to the oxide semiconductor film 502. 08, the current driving capability of the transistor 570 is improved, and a high It is also possible to increase the on-current, It is possible to miniaturize the transistor 570. In addition, the transistor 570 has a gate A conductive film 504 serving as a first electrode and a conductive film 520b serving as a second gate electrode. Since the transistor 570 has a structure surrounded by the insulating film, the mechanical strength of the transistor 570 can be increased. Cut.

[0191] The other configuration of the transistor 570 is the same as that of the transistor 500 described above. It is similar and has the same effect.

[0192] In addition, the transistor according to the present embodiment can be freely combined with each of the above structures. For example, the transistor 500 shown in FIG. The transistor 570 shown in FIG. 16A and FIG. 16B is used as a transistor of the pixel of the display device. The transistors can be used in the gate drivers of the above-mentioned devices.

[0193] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing a transistor 500 which is a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be described in detail with reference to Figs. 10(A), (B), (C) to 14(A). 14B to 14A are cross-sectional views illustrating a method for manufacturing a semiconductor device.

[0194] First, a conductive film is formed on a substrate 502, and the conductive film is then subjected to a lithography process and an etching process. Then, the conductive film 504 is formed to function as a gate electrode. On the substrate 04, insulating films 506 and 507 are formed to function as gate insulating films (see FIG. 10(A)). see).

[0195] In this embodiment, a glass substrate is used as the substrate 502, and a conductive film is formed on the substrate 502 to function as a gate electrode. As the conductive film 504, a tungsten film having a thickness of 100 nm is formed by sputtering. In addition, a silicon nitride film having a thickness of 400 nm is formed as an insulating film 506 by the PECVD method. A silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 507 by the PECVD method. .

[0196] The insulating film 506 may have a laminated structure of a silicon nitride film. The insulating film 506 is made of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. A three-layer laminate structure with a silicon film can be formed. An example of the three-layer laminate structure is as follows: It can be formed as follows:

[0197] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PECVD was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gas. The pressure in the reaction chamber was controlled at 100 Pa, and a high-frequency wave of 27.12 MHz was generated. A power of 2000 W may be supplied using a microwave power source to form the film to a thickness of 50 nm. stomach.

[0198] For the second silicon nitride film, silane at a flow rate of 200 sccm, The nitrogen gas and the ammonia gas with a flow rate of 2000sccm were used as raw material gases in the PECVD equipment. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high-frequency power supply was used. A power of 2000 W may be supplied using the above method to form a film having a thickness of 300 nm.

[0199] The third silicon nitride film was prepared by using silane at a flow rate of 200 sccm and 5000 sccm. The pressure in the reaction chamber was kept at 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power source. It is sufficient to form it so that the thickness is 50 nm.

[0200] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during formation can be 350° C. or less.

[0201] By forming the insulating film 506 in a three-layered structure of silicon nitride films, for example, the conductive film 50 When a conductive film containing copper (Cu) is used for 4, the following effects are achieved.

[0202] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 504. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the insulating film. Hydrogen release from the silicon nitride film is small, and hydrogen released from the second silicon nitride film is diffused. can be suppressed.

[0203] The insulating film 507 is an oxide semiconductor film 508 (more specifically, a first In order to improve the interface characteristics with the oxide semiconductor film 508a), It would be preferable if this could be done.

[0204] Next, an oxide semiconductor film 509 is formed over the insulating film 507 at a first temperature. As the oxide semiconductor film 509, a first oxide semiconductor film 509a is formed, and then a second oxide semiconductor film 509b is formed. An oxide semiconductor film 509b is formed (see FIG. 10B).

[0205] The first temperature for forming the oxide semiconductor film 509 is preferably higher than or equal to room temperature and lower than 340° C. Preferably, the temperature is from room temperature to 300° C., more preferably from 100° C. to 250° C., and even more preferably The temperature is 100° C. or higher and 200° C. or lower. The crystallinity of the oxide semiconductor film 509 can be improved. When a glass substrate (for example, 6th generation to 10th generation) is used, the first temperature is 150° C. If the temperature is set to 340° C. or higher and lower than 340° C., the substrate 502 may be distorted. In the case of using the glass, the first temperature is set to 100° C. or more and less than 150° C. Distortion of the substrate can be suppressed.

[0206] Note that the first oxide semiconductor film 509a and the second oxide semiconductor film 509b were formed under the same conditions. The plate temperatures may be the same or different. The substrate temperature of the oxide semiconductor film 509b in the second embodiment is set to be the same as that of the oxide semiconductor film 509b in the second embodiment, thereby reducing manufacturing costs. This is preferable because it is possible to

[0207] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=4: 2:4.1 [atomic ratio]) by a sputtering method to form a first oxide semiconductor film 50 9a is deposited, and then, in vacuum, an In-Ga-Zn metal oxide target (In :Ga:Zn=1:1:1.2 [atomic ratio]) was used to form the second The oxide semiconductor film 509b is formed. The substrate temperature during deposition of the compound semiconductor film 509b is set to 170°C.

[0208] Note that in the case where the oxide semiconductor film 509 is formed by a sputtering method, a sputtering gas In the case of the above, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen is appropriately used. In the case of a mixed gas, it is preferable to increase the ratio of oxygen to rare gas. It is also necessary to increase the purity of the sputtering gas. For example, oxygen used as a sputtering gas The gas or argon gas has a dew point of -40°C or less, preferably -80°C or less, and more preferably By using gas that has been highly purified to temperatures below -100℃, and more preferably below -120℃, This can prevent moisture and the like from being absorbed into the oxide semiconductor film 509 as much as possible.

[0209] In addition, when the oxide semiconductor film 509 is formed by a sputtering method, The chamber is designed to remove water and other impurities that may be contained in the oxide semiconductor film 509 as much as possible. In order to remove the gas, a high vacuum (5×10 -7 Pa or more 1×10 -4 It is preferable to evacuate the gas to a temperature of about 1 Pa or less. Alternatively, turbo molecular A pump and a cold trap are combined to remove gases, especially carbon, from the exhaust system into the chamber. It is preferable to prevent the backflow of hydrogen-containing gas.

[0210] Subsequently, the oxide semiconductor film 509 is processed to form an island-shaped oxide semiconductor film 508. Note that the first oxide semiconductor film 509a is an island-shaped first oxide semiconductor film 508a, and the second oxide semiconductor film 509b is an island-shaped first oxide semiconductor film 508a. The oxide semiconductor film 509b becomes an island-shaped second oxide semiconductor film 508b (FIG. 10C). reference).

[0211] Subsequently, the insulating film 50 is formed without performing a process at a temperature higher than the first temperature. A conductive film 512 which becomes a source electrode and a drain electrode is formed on the oxide semiconductor film 508. It is formed by a sputtering method (see FIG. 11(A)).

[0212] In this embodiment, the conductive film 512 is a tungsten film having a thickness of 50 nm and a SiO 2 film having a thickness of 40 A laminate film in which a SiO2 film and a 0 nm aluminum film are laminated in this order is formed by sputtering. In this embodiment, the conductive film 512 has a two-layer structure, but the present invention is not limited to this. For example, the conductive film 512 may be a tungsten film having a thickness of 50 nm and a 400 nm thick The aluminum film with a thickness of 100 nm and the titanium film with a thickness of 100 nm were laminated in this order. You may do so.

[0213] Subsequently, masks 536a and 536b are formed in desired regions on the conductive film 512 (FIG. 11(B)).

[0214] In this embodiment, a photosensitive resin film is applied onto the conductive film 512, and the photosensitive resin The film is patterned by a lithography process to form masks 536a and 536b. do.

[0215] Subsequently, an etchant 538 is applied onto the conductive film 512 and the masks 536a and 536b. The conductive film 512 is processed using the above to form conductive films 512a and 512b that are separated from each other. 512b is formed (see FIG. 11(C)).

[0216] In this embodiment, the conductive film 512 is processed using a dry etching apparatus. However, the method for forming the conductive film 512 is not limited to this. For example, By using a chemical solution for the etching solution 538, the conductive film 512 and the The second oxide semiconductor film 508b may be processed using a wet etching apparatus. Therefore, rather than processing the conductive film 512, a dry etching apparatus is used to process the conductive film 512. On the other hand, dry etching equipment The conductive film 512 is processed by using a wet etching apparatus. Processing 2 can reduce manufacturing costs.

[0217] Subsequently, the second oxide semiconductor film 508b, the conductive films 512a and 512b, and a mask The second oxide semiconductor film 508 is etched from above the first and second oxide semiconductor films 536a and 536b using an etchant 539. The surface of b is cleaned (see FIG. 12(A)).

[0218] The above-mentioned cleaning method includes, for example, cleaning using a chemical solution such as phosphoric acid. By cleaning with a chemical solution such as ethyl alcohol, inclusions attached to the surface of the second oxide semiconductor film 508b can be removed. Impurities (eg, elements contained in the conductive films 512a and 512b) can be removed. It is not always necessary to perform the cleaning, and in some cases cleaning may not be required.

[0219] In addition, when forming the conductive films 512a and 512b and / or in the above cleaning step, The region of the oxide semiconductor film 508b that is exposed from the conductive films 512a and 512b is a first oxide semiconductor film. In some cases, the thickness of the insulating film 508a may be thinner than that of the semiconductor film 508a.

[0220] In addition, when forming the conductive films 512a and 512b and / or in the above-mentioned cleaning step, The oxide semiconductor film 508b is not thinned in a region exposed from the conductive films 512a and 512b. An example of this case is shown in Figure 15(A) and (B). FIG. 15(A) is a cross-sectional view showing an example of a semiconductor device. This is an example of the case where the second oxide semiconductor film 508b in FIG. As shown in FIG. 1B, the thickness of the second oxide semiconductor film 508b is previously determined by the thickness of the first oxide semiconductor film 508b. The thickness of the region exposed from the conductive films 512a and 512b is set to be thinner than that of the conductive films 508a and 512b shown in FIG. 4(B) may be used. In this manner, the thickness of the second oxide semiconductor film 508b is previously determined to be equal to the thickness of the first oxide semiconductor film 508a. Further, an insulating film 5 is formed on the second oxide semiconductor film 508b and the insulating film 507. In this case, the insulating film 519 may be formed of the second oxide semiconductor film 508b. The insulating film 519 has an opening for contacting the conductive film 512a and the conductive film 512b. It can be formed using the same material and method as the edge membrane 514 .

[0221] Next, the masks 536a and 536b are removed, so that the second oxide semiconductor film 508b is left The conductive film 512a serving as a source electrode of the second oxide semiconductor film 508 and the drain electrode of the second oxide semiconductor film 508 are A conductive film 512b serving as a gate electrode is formed. , a stacked structure of a first oxide semiconductor film 508a and a second oxide semiconductor film 508b is formed. (See Figure 12(B)).

[0222] Subsequently, a first protective insulating film is formed over the oxide semiconductor film 508 and the conductive films 512a and 512b. an insulating film 514 that functions as an insulating film; and an insulating film 516 that functions as a second protective insulating film. After forming the above, a first barrier film 531 is formed (see FIG. 12C).

[0223] After the insulating film 514 is formed, the insulating film 516 is successively formed without exposing the insulating film 514 to the air. After the insulating film 514 is formed, the flow rate, pressure, and temperature of the source gas are controlled without exposing the insulating film 514 to the atmosphere. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 516 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 514 and the insulating film 516. At the same time, oxygen contained in the insulating films 514 and 516 is transferred to the oxide semiconductor film 508. As a result, the amount of oxygen vacancies in the oxide semiconductor film 508 can be reduced.

[0224] For example, a silicon oxynitride film is formed as the insulating film 514 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. Representative examples of deposition gases containing silicon include silane, disilane, etc. Examples of oxidizing gases include nitrous oxide, nitrous oxide, and trisilane. In addition, the flow rate of the oxidizing gas is set to be 20 times or more larger than the flow rate of the deposition gas. The pressure in the treatment chamber is set to less than 100 times, preferably 40 times or more and 80 times or less, and the pressure in the treatment chamber is set to less than 100 Pa. By using the PECVD method at a pressure of 50 Pa or less, preferably 50 Pa or less, the insulating film 514 is The insulating film contains the above and has a small amount of defects.

[0225] In this embodiment, the insulating film 514 is formed by heating the substrate 502 at a temperature of 220° C. The source gases were silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm. The pressure in the treatment chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6×10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using this.

[0226] The insulating film 516 is formed by depositing a substrate in a vacuum-evacuated processing chamber of a PECVD apparatus. The temperature is kept at 180°C or higher and 350°C or lower, and the raw material gas is introduced into the treatment chamber to increase the pressure in the treatment chamber. is set to 100 Pa or more and 250 Pa or less, and more preferably set to 100 Pa or more and 200 Pa or less. 0.17 W / cm2 at the electrode installed in the treatment chamber 2 More than 0.5W / cm 2 Below are some more Preferably 0.25W / cm 2 More than 0.35W / cm 2 The following high frequency power supply conditions are met: In this way, a silicon oxide film or a silicon oxynitride film is formed.

[0227] The conditions for forming the insulating film 516 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas proceeds, the oxygen content in the insulating film 516 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An oxide that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated. An insulating film can be formed.

[0228] In the step of forming the insulating film 516, the insulating film 514 serves as a protection film for the oxide semiconductor film 508. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 508. The insulating film 516 can be formed using high radio frequency power.

[0229] In addition, in the film formation conditions of the insulating film 516, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the amount of defects in the insulating film 516. In the first place, ESR measurements revealed that the g value was 2.001, which is due to the dangling bonds of silicon. The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5×10 17 spins / cm 3 The following is a missing It is possible to form an oxide insulating film with few pits. As a result, the reliability of the transistor is improved. It can be done.

[0230] In addition, after the insulating films 514 and 516 are formed (in other words, after the insulating film 516 is formed and Heat treatment may be performed before the formation of the barrier film 531 in the first step. The nitrogen oxides contained in 14, 516 can be reduced. Then, part of the oxygen contained in the insulating films 514 and 516 is transferred to the oxide semiconductor film 508, and the oxide semiconductor film 508 is oxidized. Therefore, the amount of oxygen vacancies in the semiconductor film 508 can be reduced.

[0231] The temperature of the heat treatment for the insulating films 514 and 516 is typically up to 400° C., preferably Less than 375°C, more preferably 340°C or more and less than 360°C, and even more preferably 15 The temperature must be between 0 and 350℃. The heat treatment must be carried out in an atmosphere of nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less) or rare gas The above-mentioned nitrogen, oxygen, and ultra-dry air atmospheres can be used. It is preferable that the gas or rare gas does not contain hydrogen, water, etc. An RTA device or the like can be used.

[0232] The first barrier film 531 is made of oxygen and a metal (indium, zinc, titanium, aluminum, Selected from tungsten, tantalum, molybdenum, hafnium, or yttrium. The first barrier film 531 is made of indium tin oxide. Indium tin oxide (ITO: also known as indium tin oxide), indium tin silicon In the case of indium oxide (hereinafter referred to as ITSO) or indium oxide, the coating property for unevenness is excellent. This is preferable because it is good.

[0233] The first barrier film 531 can be formed by using a sputtering method. When the first barrier film 531 is thin, oxygen that may be released from the insulating film 516 to the outside is suppressed. On the other hand, if the first barrier film 531 is thick, the insulating film 51 Therefore, the thickness of the first barrier film 531 may not be sufficient to add oxygen to the first barrier film 531. is preferably 1 nm or more and 20 nm or less, and more preferably 2 nm or more and 10 nm or less. In this embodiment, the first barrier film 531 is formed of ITSO having a thickness of 5 nm. do.

[0234] Subsequently, oxygen 540 is formed through the first barrier film 531 to function as a second protective insulating film. The acid added to the insulating film 516 is shown in FIG. The element is represented as oxygen 540a (see FIG. 13(A)). Also, oxygen 540 is an insulating It may also be added to the veneer 514.

[0235] As a method for adding oxygen 540 to the insulating film 516 through the first barrier film 531, There are on-doping methods, ion implantation methods, plasma processing methods, etc. In addition, oxygen 540 is , excess oxygen, or oxygen radicals. By applying a bias to the side, oxygen 540 can be effectively added to the insulating film 516. The bias voltage is, for example, 1 W / cm 2 More than 5W / cm 2 The following By providing the first barrier film 531 over the insulating film 516 and adding oxygen, The barrier film 531 functions as a protective film that suppresses oxygen from being released from the insulating film 516. Therefore, more oxygen can be added to the insulating film 516.

[0236] Next, the first barrier film 531 or a part of the first barrier film 531 and the second protective insulating film 532 are A part of the insulating film 516 that functions as a film is removed by an etchant 542 (FIG. 13 (See (B)).

[0237] Removal of a part of the first barrier film 531 and the insulating film 516 functioning as the second protective insulating film The removal method may be a dry etching method, a wet etching method, or a dry etching method. A combination of dry etching and wet etching is also possible. In the case of the wet etching method, the etchant 542 is an etching gas. In this case, the etchant 542 is a chemical liquid. The first barrier film 531 is removed by a etching method. As the above, it is preferable to use a wet etching method since the manufacturing cost can be reduced.

[0238] Subsequently, an insulating film 518 that functions as a second barrier film is formed on the insulating film 516. (See FIG. 14(A)).

[0239] When the insulating film 518 is formed by the PECVD method, the substrate temperature is set to 400° C. or less, preferably 3 The temperature is less than 75° C., and more preferably 340° C. to 360° C. In this case, by setting the substrate temperature in the above range, the excess oxygen or the oxygen radicals can be eliminated. The insulating film 518 can be formed by diffusing the oxide semiconductor film 508. It is preferable to set the substrate temperature within the above range since a dense film can be formed.

[0240] For example, when a silicon nitride film is formed as the insulating film 518 by the PECVD method, the silicon It is preferable to use a deposition gas containing carbon, nitrogen, and ammonia as the source gas. By using a small amount of ammonia compared to nitrogen, ammonia dissociates in the plasma and becomes active. The active species are generated by reacting with silicon and hydrogen contained in the deposition gas containing silicon. This breaks the triple bond between silicon and nitrogen, promoting the bonding of silicon and nitrogen. To form a dense silicon nitride film with few bonds between silicon and hydrogen and few defects. On the other hand, if the amount of ammonia relative to nitrogen is large, the deposition gas containing silicon and Nitrogen decomposition does not progress, silicon and hydrogen bonds remain, defects increase, and roughness is generated. For these reasons, the source gas should be ammonia-free. The flow rate ratio of nitrogen to oxygen is preferably 5 to 50 times, more preferably 10 to 50 times. .

[0241] In this embodiment, the insulating film 518 is formed by depositing silane, nitrogen, etc., using a PECVD apparatus. A silicon nitride film with a thickness of 50 nm is formed using nitrogen and ammonia as source gases. The flow rates were 50 sccm for silane, 5000 sccm for nitrogen, and 100 for ammonia. The pressure in the processing chamber was 100 Pa, the substrate temperature was 350°C, and the flow rate was 27.12 MWh. A high-frequency power supply of 1000 W is supplied to the parallel plate electrodes. The device has an electrode surface area of ​​6000 cm 2 The parallel plate type PECVD equipment is The force can be converted to power per unit area (power density) of 1.7 x 10 -1 W / cm 2 is .

[0242] After the insulating film 518, which functions as a second barrier film, is formed, heat treatment may be performed. By heat treatment after the formation of the insulating film 518, excess oxygen in the insulating film 516 and The oxygen radicals are diffused into the oxide semiconductor film 508, and oxygen vacancies in the oxide semiconductor film 508 are formed. Alternatively, the insulating film 518 can be formed by heating, so that the insulating film 5 Excess oxygen or oxygen radicals contained in the oxide semiconductor film 508 are diffused into the oxide semiconductor film 508. This makes it possible to compensate for oxygen vacancies in the oxide semiconductor film 508.

[0243] Through the above steps, the transistor 500 illustrated in FIG. 14B can be formed.

[0244] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistor 500 shown in FIGS. The method and different fabrication methods are described below.

[0245] First, similarly to the <Method 1 for manufacturing a semiconductor device>, the semiconductor device shown in FIG. 10(A), (B), (C) and FIG. 12(A), (B), and (C). Then, the steps shown in FIG. 13( A), (B) and the steps shown in FIG. 14(A) are not performed. That is, the structure shown in FIG. In terms of structure, the transistor 500 has a similar function to that of the transistor 500 shown in FIGS.

[0246] In this case, a metal oxide film is used as the first barrier film 531. It is preferable to deposit a film of aluminum oxide, hafnium oxide, or yttrium oxide.

[0247] The first barrier film 531 is made of aluminum oxide, hafnium oxide, or When forming a film using yttrium by sputtering, the sputtering gas should be at least In forming the first barrier film 531, the sputtering gas By using oxygen, the oxygen becomes oxygen radicals in the plasma, and the oxygen or the Either or both of the oxygen radicals may be added to the insulating film 516 . Therefore, the step of adding oxygen 540 shown in FIG. During the formation of the first barrier film 531, oxygen addition processing and The first barrier film 531 can be formed by the deposition of the first barrier film. During the deposition (particularly in the initial stage of deposition), the first barrier film 53 has a function of adding oxygen. After the formation of 1, it has the function of blocking oxygen.

[0248] The first barrier film 531 is formed by sputtering aluminum oxide, for example. In the case of forming the film, a mixed layer is formed near the interface between the insulating film 516 and the first barrier film 531. When the insulating film 516 is a silicon oxynitride film, the mixed layer may include Al. x S y O z can be formed.

[0249] The first barrier film 531 is made of aluminum oxide, hafnium oxide, or When yttrium is used, aluminum oxide, hafnium oxide, and yttrium oxide are used. has high insulating properties and high oxygen barrier properties. 14(A) is a process of removing the barrier film 531 of FIG. 1 and a process of forming an insulating film 518 of FIG. Therefore, the first barrier film 531 has the same function as the insulating film 518. Yes.

[0250] The substrate temperature during the formation of the first barrier film 531 is set to 400° C., preferably 375° C. More preferably, the insulating film 516 is formed by heating at a temperature of 340° C. or more and 360° C. or less. Excess oxygen or oxygen radicals added to the oxide semiconductor film 508 are diffused into the oxide semiconductor film 508. Alternatively, after the first barrier film 531 is formed, the temperature is increased to 400° C., preferably 3 When the heat treatment is performed at a temperature lower than 75° C., more preferably at 340° C. or higher and 360° C. or lower, the insulating film 51 The excess oxygen or oxygen radicals added to the oxide semiconductor film 506 are diffused into the oxide semiconductor film 508. This can be done.

[0251] In this way, the first barrier film 531 may be made of aluminum oxide, hafnium oxide, or By using yttrium oxide, it is possible to shorten the manufacturing process of semiconductor devices. This allows production costs to be reduced.

[0252] <Method 3 for manufacturing semiconductor device> Next, a method for manufacturing the transistor 570 of one embodiment of the present invention will be described with reference to FIG. 17(A), (B), and (C) are diagrams showing the structure of a semiconductor device. 1A to 1C are cross-sectional views illustrating a manufacturing method.

[0253] First, a process similar to that of the method for manufacturing the transistor 500 described above (FIGS. 10A to 14A to 14C) is performed. (Up to step (A)).

[0254] Next, a mask is formed on the insulating film 518 by a lithography process, and the insulating films 514 and 51 An opening 542c is formed in a desired region of the insulating film 518. A mask is formed by a photolithography process, and the desired insulating films 506, 507, 514, 516, and 518 are formed. In this region, openings 542a and 542b are formed. The openings 542a and 542b are formed so as to reach the conductive film 50 4 (see FIG. 17(A)).

[0255] The openings 542a, 542b and the opening 542c may be formed in the same process or in different processes. The openings 542a, 542b and the opening 542c may be formed in the same process. When forming the insulating film, for example, a gray-tone mask or a half-tone mask may be used. The openings 542a and 542b may be formed in a plurality of steps. For example, First, the insulating films 506 and 507 are processed, and then the insulating films 514, 516 and 518 are processed.

[0256] Next, a conductive film 52 is formed on the insulating film 518 so as to cover the openings 542a, 542b, and 542c. 0 (see FIG. 17(B)).

[0257] The conductive film 520 may be made of, for example, indium (In), zinc (Zn), or tin (Sn). In particular, the conductive film 520 may be made of a material containing one selected from the group consisting of oxide, Tungsten-containing indium oxide, tungsten oxide-containing indium zinc oxide, Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium Tin Oxide (ITO), Indium Zinc Oxide, Indium Tin Silicon Oxide (IT A light-transmitting conductive material such as SO can be used as the conductive film 520. For example, a sputtering method can be used. The ITSO layer is formed to a thickness of 110 nm by sputtering.

[0258] Next, a mask is formed on the conductive film 520 by a lithography process, and the conductive film 520 is By processing the conductive film into this shape, conductive films 520a and 520b are formed (see FIG. 17C).

[0259] The conductive films 520a and 520b can be formed by dry etching or wet etching. Examples of the method include a combination of dry etching and wet etching. In this embodiment, the conductive film 520 is formed by wet etching. The conductive films 520a and 520b are then processed.

[0260] Through the above process, a transistor 570 illustrated in FIGS.

[0261] The structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiment modes. They can be used in combination. (Embodiment 3) In this embodiment, a structure of an oxide semiconductor included in a semiconductor device of one embodiment of the present invention will be described. A detailed explanation will be given below.

[0262] <Structure of oxide semiconductor> Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductor, nc-OS (nanocrystalline oxide semiconductor uctor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous l Examples include amorphous oxide semiconductors, amorphous oxide semiconductors, etc.

[0263] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC- These include OS, polycrystalline oxide semiconductor, and nc-OS.

[0264] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond length is short. In other words, it is a structure that has discrete order but does not have long-range order.

[0265] On the other hand, in the case of an essentially stable oxide semiconductor, In addition, it cannot be called an oxide semiconductor because it is not isotropic. The oxide semiconductor, which is not amorphous (for example, has a periodic structure in a microscopic region), is transformed into a completely amorphous oxide. However, a-like OS is a semiconductor that can be used in a small area. Although it has a periodic structure, it has voids and is an unstable structure. In terms of physical properties, it can be said that the semiconductor is close to an amorphous oxide semiconductor.

[0266] <caac-os> First, let me explain about CAAC-OS.

[0267] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0268] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, it is difficult to clearly confirm the presence of the CAAC-OS at the grain boundaries. It can be said that the decrease in electron mobility caused by the above phenomenon is unlikely to occur.

[0269] The following describes the CAAC-OS observed by TEM. 1 shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction approximately parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. The spherical aberration corrector function was used. , specifically called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images are obtained, for example, This is performed using an atomic resolution analytical electron microscope such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible.

[0270] A Cs-corrected high-resolution TEM image of the enlarged area (1) in Figure 19(A) is shown in Figure 19(B). From FIG. 19(B), it can be confirmed that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also called the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0271] As shown in FIG. 19(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of a single pellet can be 1 nm or more, or 3 nm or more. It can be seen that the size of the gap caused by the inclination between the plate and the pellet is about 0.8 nm. Therefore, the pellets can also be called nanocrystals (nc). CAAC-OS is also used as a C-Axis Aligned Nanoclip The semiconductor may also be referred to as an oxide semiconductor having metal ions.

[0272] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 19(D)). Between the pellets observed in FIG. 19(C), The portion where the inclination occurs corresponds to an area 5161 shown in FIG.

[0273] FIG. 20(A) shows the C 20(A) shows the s-corrected high-resolution TEM images of regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 20(B), (C) and (D), respectively. As shown in Figure 20(D), Figure 20(B), Figure 20(C) and Figure 20(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0274] Next, C was analyzed by X-ray diffraction (XRD). AAC-OS will be explained. For example, InGaZnO 4 CAAC-O When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 21(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. ZnO 4 Since the crystal orientation of CAAC-OS is attributed to the (009) plane of the crystal, it is considered that the crystal orientation of CAAC-OS is c-axis oriented. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0275] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS contains crystals that do not have the c-axis orientation. The more preferable CAAC-OS is a structure obtained by the out-of-plane method. The analysis shows a peak at 2θ around 31° and no peak at 2θ around 36°.

[0276] On the other hand, in-pla, X-rays are incident on CAAC-OS from a direction nearly perpendicular to the c-axis. When the structure is analyzed by the NE method, a peak appears at 2θ of about 56°. This peak is I nGaZnO 4 In the case of CAAC-OS, 2θ is set to 5 The sample was fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears as shown in FIG. In contrast, InGaZnO 4 In the case of a single crystal oxide semiconductor, 2θ is fixed to about 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane, as shown in FIG. 21(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and the b-axis is irregular.

[0277] Next, we will explain the CAAC-OS analyzed by electron diffraction. ZnO 4 For CAAC-OS with a crystal of 300 nm, a probe diameter of 300 nm was used parallel to the sample surface. When an electron beam is incident on the sample, a diffraction pattern (selected area transmission electron diffraction) as shown in FIG. This diffraction pattern may appear due to the InGaZnO 4 The spots due to the (009) plane of the crystal are included. Therefore, even by electron diffraction, The pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis faces the surface to be formed or the upper surface. On the other hand, when the probe was applied perpendicular to the sample surface, The diffraction pattern when an electron beam with a diameter of 300 nm was incident is shown in FIG. 2(B) shows a ring-shaped diffraction pattern. Therefore, electron diffraction also It can be seen that the a-axis and b-axis of the pellets contained in CAAC-OS do not have any orientation. The first ring in FIG. 22(B) is made of InGaZnO 4 The (010) face of the crystal This is thought to be due to the (100) plane and the like. This is thought to be due to the (110) surface, etc.

[0278] As described above, the CAAC-OS is an oxide semiconductor with high crystallinity. Crystallinity can be reduced by the inclusion of impurities or the generation of defects, so the opposite view can be taken. Therefore, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies).

[0279] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0280] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or In addition, oxygen vacancies in oxide semiconductors can act as carrier traps and In some cases, the SiO 2 can become a carrier generation source by capturing hydrogen.

[0281] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. Such an oxide semiconductor is a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. CAAC-OS has low impurity concentration and low defect level density. In other words, it has stable characteristics. It can be said that the oxide semiconductor has the above structure.

[0282] <nc-os> Next, we will explain nc-OS.

[0283] In the high-resolution TEM image, the nc-OS is divided into two regions: one where the crystals can be confirmed, and the other where the clear The crystalline parts in nc-OS are In most cases, the size is between 1 nm and 10 nm, or greater than 1 nm. The oxide semiconductor having a size of 10 nm or more and 100 nm or less is called a microcrystalline oxide semiconductor. For example, in high-resolution TEM images, the grain boundaries of the nc-OS are clearly identified. In addition, the nanocrystals may have the same origin as the pellets in CAAC-OS. Therefore, in the following, the crystalline part of nc-OS is sometimes called a pellet. be.

[0284] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. For example, the nc-OS may be a pellet with a larger diameter than the pellet. When X-rays are used, the peaks that indicate the crystal planes are In addition, for nc-OS, the probe diameter is larger than the pellet (e.g., 50 When electron diffraction is performed using an electron beam of 1 nm or more, a halo-like diffraction pattern is produced. On the other hand, for nc-OS, pellets with sizes close to or smaller than the pellets were observed. When nanobeam electron diffraction is performed using an electron beam with a lobe diameter, spots are observed. When nanobeam electron diffraction was performed on nc-OS, high brightness regions were observed in a circular (ring-like) pattern. In addition, multiple spots may be observed within a ring-shaped area. There may be cases where this occurs.

[0285] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0286] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS has a higher density of defect states than the CAAC-OS.

[0287] <a-like OS> The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0288] In a-like OS, pores may be observed in high-resolution TEM images. In the high-resolution TEM image, there are areas where crystals can be clearly seen, and areas where crystals can be seen. and areas where it is not possible to

[0289] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the change in structure due to electron irradiation.

[0290] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS (hereinafter referred to as sample B) and CAAC-OS (hereinafter referred to as sample C) are prepared. Both samples are In-Ga-Zn oxides.

[0291] First, high-resolution cross-sectional TEM images of each sample are obtained. It can be seen that all the materials have crystalline parts.

[0292] The determination of which part is regarded as one crystal part can be made as follows. For example, , InGaZnO 4 The unit cell of the crystal has three In-O layers and one Ga-Zn-O layer. It is known that the structure has a total of nine layers, six of which are layered in the c-axis direction. The spacing between these adjacent layers is approximately the same as the lattice spacing (also called the d value) of the (009) plane. The value is calculated to be 0.29 nm from crystal structure analysis. The areas where the spacing between the InGaZnO 4 The crystal part of The lattice fringes can be seen as 4 This corresponds to the ab plane of the crystal.

[0293] Figure 23 shows the average size of the crystals (22 to 45 points) in each sample. This is an example of investigating the size of the lattice fringes. From Fig. 23, the a-like OS is The crystal size increases according to the mul-tiative electron dose. Specifically, as shown in FIG. 23 (1), in the early stage of TEM observation, The crystal part (also called the initial nucleus), which was about 1.2 nm in size, grew to 4.2 nm after a cumulative irradiation dose of 4.2 ×10 8 e - / nm 2 It can be seen that the size of the crystals grows to about 2.6 nm. On the other hand, for nc-OS and CAAC-OS, the cumulative amount of electron irradiation from the start of electron irradiation was 4 .2×10 8 e - / nm 2 It was found that there was no change in the size of the crystals within the range Specifically, as shown in (2) and (3) in FIG. 23, the cumulative dose of electrons The sizes of the crystal parts of the nc-OS and CAAC-OS are approximately 1.4 nm and 1.5 nm, respectively. It can be seen that the average particle size is approximately 2.1 nm.

[0294] Thus, in a-like OS, the growth of crystals can be observed by electron irradiation. On the other hand, in the case of nc-OS and CAAC-OS, the growth of the crystals due to electron irradiation is almost nonexistent. In other words, a-like OS is not seen as a nc-OS or CAAC-OS. It is clear that it has an unstable structure compared to the OS.

[0295] In addition, because of the porosity, a-like OS is more difficult to treat than nc-OS and CAAC-OS. Specifically, the density of the a-like OS is The density of the nc-OS and the CAA The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0296] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, Single-crystal InGaZnO with a rhombohedral crystal structure 4 The density of is 6.357g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 It will be less than. For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0297] In some cases, single crystals of the same composition do not exist. In such cases, crystals of different compositions may be prepared in any ratio. By combining single crystals of the desired composition, the density equivalent to that of a single crystal of the desired composition can be estimated. The density corresponding to a single crystal of a desired composition can be obtained by combining single crystals of different compositions. The weighted average of the proportion of It is preferable to estimate the size of the single crystal by combining different types of single crystals.

[0298] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0299] (Embodiment 4) In this embodiment, a display device including the transistor described in the above embodiment will be An example will be described below with reference to FIGS.

[0300] 24 is a top view showing an example of a display device. The display device 700 shown in FIG. A pixel portion 702 is provided on the first substrate 701, and a source driver is provided on the first substrate 701. A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, A sealant 712 is disposed so as to surround the path portion 704 and the gate driver circuit portion 706. and a second substrate 705 disposed so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 24, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0301] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. and an FPC terminal portion 708 (FPC: Flexible Printed Circuit portion 706) electrically connected to the In addition, the FPC terminal portion 708 is provided with a The FPC 716 is connected to the pixel section 702 and the source driver circuit Various signals are supplied to the pixel section 704 and the gate driver circuit section 706. 02, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section 7 08 are connected to wiring 710. Various signals, etc., supplied by FPC 716 The pixel section 702, the source driver circuit section 704, the gate driver It is provided to a circuit portion 706 and an FPC terminal portion 708 .

[0302] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is mounted on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0303] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit section 706 has a plurality of transistors. A transistor can be applied.

[0304] The display device 700 may also take a variety of forms or have a variety of display elements. The display element can be, for example, a liquid crystal element, an LED (white LED, red LED, green LED, etc.), EL (electroluminescence) elements (organic and EL elements containing inorganic substances, organic EL elements, inorganic EL elements), transistors (emitting light in response to electric current) light-emitting transistor), electron emitter, electrophoretic element, grating light valve (G LV), Digital Micromirror Device (DMD), DMS (Digital Microsystem Scattering element, MIRASOL (registered trademark) display, IMOD (Interface Modulation Display) Microelectromechanical systems (MEMS) such as piezoelectric ceramic displays and Display element using electromechanical system, electrowetting In addition to these, there are other devices that can be used to create contrast by electrical or magnetic effects. The display element may have a display medium whose luminance, reflectance, transmittance, etc. change. Quantum dots may be used as the liquid crystal display. Play (transmissive LCD, semi-transmissive LCD, reflective LCD) LCDs using EL elements include direct-view LCDs and projection LCDs. An example of a display device is an EL display. One example is a field emission display (FED) or SED type flat panel display. Display (SED: Surface-conduction Electron-em Examples of display devices using quantum dots include , quantum dot displays, etc. Display devices using electronic ink or electrophoretic elements An example is electronic paper. When realizing a display, a part or all of the pixel electrodes are used as reflective electrodes. For example, a part or the whole of the pixel electrode may be made of aluminum. In this case, the SRAM may be formed under the reflective electrode. It is also possible to provide a memory circuit such as a memory cell. This can further reduce power consumption. This can be done.

[0305] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB form one color element, and different two colors are generated depending on the color element. You can also select colors to configure the color. Or, you can select one or more colors such as yellow, cyan, and magenta for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used in monochrome display devices. The present invention can also be applied to display devices.

[0306] In addition, the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) is white light ( In order to display full color on a display device, a colored layer (also called a color filter) is used. The colored layer may be, for example, red (R), green (G), blue (B) , yellow (Y), etc. can be used in appropriate combination. The color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light from the colored layer may be directly used for display. This reduces the decrease in brightness caused by the colored layer during bright display, reducing power consumption by 20%. However, it may be possible to reduce the light emission by about 30% when using self-luminous elements such as organic EL elements and inorganic EL elements. When using a full-color display, R, G, B, Y, and white (W) are generated by It is also possible to emit light from an element having a certain color. In some cases, power consumption can be reduced even further than when the

[0307] In this embodiment, a display device using a VA (vertical alignment) type liquid crystal element as a display element is used. The structure of the device will be described with reference to Figures 25 and 26. The VA type is a liquid crystal display device. It is a type of method for controlling the arrangement of molecules. VA type liquid crystal display devices are Normally black display device in which the liquid crystal molecules are oriented perpendicular to the panel surface when the light is off. In the display device shown in this embodiment, one pixel is divided into several regions (sub-regions). The liquid crystal molecules are tilted in a different direction in each pixel. This is called multi-domain or multi-domain design.

[0308] Fig. 25 is a cross-sectional view taken along the dashed line QR shown in Fig. 24. 700 includes a wiring section 711, a pixel section 702, a source driver circuit section 704, The FPC terminal portion 708 includes a wiring 710. The pixel portion 702 also includes a transistor 750 and a capacitor 790. The driver circuit portion 704 includes a transistor 752 .

[0309] The transistors 750 and 752 are the transistors described in Embodiment 2. There can be.

[0310] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. Therefore, the retention time of electric signals such as image signals can be extended, and the power supply When the write interval is on, it is possible to set it longer. This reduces the frequency of refresh operations. This has the effect of reducing power consumption.

[0311] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0312] The capacitor 790 has a structure having a dielectric between a pair of electrodes. One electrode of the transistor 790 is a conductive film that functions as a gate electrode of the transistor 750. The other electrode of the capacitor 790 is formed using a conductive film formed in the same process as that of the transistor. A conductive film is used to function as the source electrode and the drain electrode of the transistor 750. The dielectric sandwiched between the electrodes functions as the gate insulating film of the transistor 750. An insulating film is used.

[0313] 25, a transistor 750, a transistor 752, and a capacitor 79 0, insulating films 764, 766, and 768, and a planarization insulating film 770 are provided.

[0314] The insulating films 764, 766, and 768 are the insulating films 514 and 516 shown in Embodiment 2, respectively. The same materials and manufacturing methods as those of 516 and 518 can be used to form the same. The insulating film 770 may be made of a polyimide resin, an acrylic resin, a polyimide amide resin, or a benzo Uses heat-resistant organic materials such as cyclobutene resin, polyamide resin, and epoxy resin. In addition, by stacking multiple insulating films made of these materials, flattening can be achieved. An insulating film 770 may be formed. Alternatively, the planarization insulating film 770 may not be provided. .

[0315] The wiring 710 serves as a source electrode and a drain electrode of the transistors 750 and 752. The wiring 710 is formed in the same process as the conductive film that functions as the transistor 750. A conductive film formed in a process different from that of the source electrode and drain electrode of 752, for example, a gate electrode The wiring 710 may be formed of, for example, a material containing copper. When used, signal delays caused by wiring resistance are reduced, making it possible to display on a large screen.

[0316] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed in the same process as the conductive film that functions as the drain electrode. The terminal of the PC 716 is electrically connected via an anisotropic conductive film 780 .

[0317] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be the same as those shown in the embodiment mode 2. The same material as the substrate 502 can be used.

[0318] On the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and a color A colored layer 736 that functions as a filter, a light-shielding film 738, and an insulating film in contact with the colored layer 736 734 will be provided.

[0319] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0320] Also, as shown in FIG. 26, a plurality of colored layers 736 are laminated instead of the structure 778. The display device 700 shown in FIG. The light-shielding layer 736 has a green color layer 736R, a green color layer 736G, and a blue color layer 736B. The colored layer 736G and the colored layer 736B are formed on the colored layer 736R at a position where the colored layer 736G and the colored layer 736B overlap with the light film 738. With this configuration, the step of forming the structure 778 can be omitted. In addition, the display device 700 shown in FIG. 26 does not include the insulating film 734. As the spacer, the colored layer 736R, the colored layer 736G and the colored layer 7 A laminate of any two of 36B may be used.

[0321] In this embodiment, the structure 778 is provided on the first substrate 701 side. However, the present invention is not limited to this. For example, a structure 778 is provided on the second substrate 705 side. or a structure in which the structures 778 are provided on both the first substrate 701 and the second substrate 705. It may also be composed of.

[0322] The display device 700 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film 772, a conductive The conductive film 774 is provided on the second substrate 705 side. The conductive film 772 and the conductive film 774 function as a counter electrode. Depending on the applied voltage, the orientation state of the liquid crystal layer 776 changes, causing light to pass or not to pass. A protrusion 744 is provided on the conductive film 774.

[0323] The conductive film 772 serves as a source electrode and a drain electrode of the transistor 750. The conductive film 772 is connected to a conductive film that functions as a pixel electrode. The conductive film 772 functions as a reflective electrode, that is, one of the electrodes of the display element. The display device 700 uses external light and reflects the light at the conductive film 772 to light up the display device 700. This is a so-called reflective color liquid crystal display device that displays images via a color layer 736 .

[0324] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a reflectivity can be used. For example, a material containing one of the elements indium (In), zinc (Zn), and tin (Sn) As a conductive film that is reflective in visible light, for example, aluminum In this embodiment, the conductive film 772 may be formed of A conductive film that is reflective in visible light is used.

[0325] In addition, when a conductive film that is reflective to visible light is used as the conductive film 772, the conductive film The film may have a laminated structure. For example, an aluminum film having a thickness of 100 nm is formed on the lower layer, A 30 nm thick silver alloy film (e.g., an alloy film containing silver, palladium, and copper) is formed on the upper layer. The above-mentioned structure provides the following excellent effects.

[0326] (1) The adhesiveness between the base film and the conductive film 772 can be improved. (2) By using a chemical solution, It is possible to etch the aluminum film and the silver alloy film at the same time. (3) Conductivity The cross-sectional shape of the membrane 772 can be made to have a good shape (for example, a tapered shape). (3) The reason is that the etching rate of the aluminum film by the chemical solution is slower than that of the silver alloy film. Or, when the lower aluminum film is exposed after etching the upper silver alloy film, the silver alloy The electrons are drawn from aluminum, which is a metal that is less noble than the membrane, in other words, has a high ionization tendency. Therefore, etching of the silver alloy film is suppressed and etching of the underlying aluminum film progresses. This is because the journey will be faster.

[0327] The display device 700 shown in FIGS. 25 to 27 is a reflective color liquid crystal display device. However, the present invention is not limited to this. For example, the conductive film 772 may be a light-transmitting film that transmits visible light. By using a conductive film, the display device 700 may be a transmissive color liquid crystal display device. In the case of a transmissive liquid crystal display device, a pair of electrodes of the capacitor 790 is formed by a conductive film 772. The light is incident from the substrate 701 and is disposed at a position not overlapping the liquid crystal element 775 and the colored layer 73. Each layer provided on the path of the light emitted through 6 is a layer that is transparent to visible light. It is preferable that

[0328] The conductive film 772 has slits 725. The slits 725 control the alignment of liquid crystal molecules. In addition, the conductive film 772, the planarization insulating film 770, and the structure 778 are provided with an orientation film. A film 746 is provided, and similarly, an alignment film 748 is provided over the conductive film 774 .

[0329] When a voltage is applied to the conductive film 772 having the slits 725, The electric field is distorted (diagonal electric field). By arranging the layers so that they interdigitate with each other, a diagonal electric field is effectively generated to orient the liquid crystal. The liquid crystal orientation is controlled to vary depending on the location. By tilting the liquid crystal molecules in a different direction for each of the multiple sub-pixels, multi-domain display is achieved. The viewing angle of the LCD panel has been increased.

[0330] Although not shown in FIG. 25, optical members such as a polarizing member, a phase difference member, and an anti-reflection member may be used. For example, a circular polarization of a polarizing substrate and a retardation substrate may be provided. Alternatively, a backlight, a sidelight, or the like may be used as the light source.

[0331] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done.

[0332] (Embodiment 5) In this embodiment, a display module and an electronic device each including a semiconductor device according to one embodiment of the present invention will be described. This will be described with reference to FIG. 27 and FIG.

[0333] The display module 8000 shown in FIG. 27 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003, A display panel 8006, a backlight 8007, a frame 8009, and a printed circuit board 801 0, has battery 8011.

[0334] The display device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0335] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as appropriate to match the size of 8006.

[0336] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of the display panel 006 to make it into an optical touch panel.

[0337] The backlight 8007 has a light source 8008. In FIG. In the above embodiment, the light source 8008 is disposed on the light source 8007, but the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light-emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 need not be provided.

[0338] The frame 8009 protects the display panel 8006 and also supports the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the frame. The frame 8009 may also function as a heat sink.

[0339] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal, and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. , this can be omitted when using a commercial power source.

[0340] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may be added.

[0341] 28(A) to 28(G) are diagrams showing electronic devices. These electronic devices are A body 5000, a display unit 5001, a speaker 5003, an LED lamp 5004, and an operation key 50 05 (including a power switch or an operation switch), a connection terminal 5006, a sensor 5007 ( Force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances , sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, 5008, etc.) can.

[0342] FIG. 28(A) shows a mobile computer, which includes, in addition to the above, a switch 5009 , an infrared port 5010, etc. FIG. 28(B) shows a mobile phone equipped with a recording medium. A portable image reproducing device (e.g., a DVD reproducing device) and, in addition to the above, the following devices are also included: The display unit 5002, the recording medium reading unit 5011, etc. In addition to the above, the display includes a second display unit 5002 and a support unit 5012. , earphones 5013, etc. FIG. 28(D) shows a portable game machine. In addition to the above, the recording medium reading unit 5011 and the like can be included. This is a digital camera with a television receiving function, and in addition to the above, it also has an antenna 5014, The mobile phone may have a shutter button 5015, an image receiving unit 5016, etc. This is a slot machine, and in addition to the above, it has a second display unit 5002, a recording medium reading unit 5011, , etc. FIG. 28(G) shows a portable television receiver, In addition to the above, it may have a charger 5017 capable of transmitting and receiving signals, etc.

[0343] The electronic devices shown in FIGS. 28(A) to 28(G) can have various functions. For example, the function to display various information (still images, videos, text images, etc.) on the display, Panel function, calendar, date or time display function, various software (platform A function to control processing by a program, a wireless communication function, and a function to control various Functions for connecting to computer networks, wireless communication functions for transmitting various data, The function of receiving, reading out the program or data recorded on the recording medium and displaying it on the display Furthermore, in an electronic device having multiple display units, In this case, one display section is used mainly to display image information, and the other display section is used mainly to display text information. A function to display images with parallax taken into account on multiple displays to create a stereoscopic effect. Furthermore, in electronic devices having an image receiving unit, These include functions for taking still images, taking videos, and automatically or manually correcting the images. The camera has a function to correct the captured image, a function to save the captured image on a recording medium (external or built-in to the camera), The image displayed on the display unit can have a function of displaying the image. The functions that the electronic device shown in 8(G) can have are not limited to these, and various functions may be possible. It is possible to have.

[0344] The electronic device described in this embodiment has a display unit for displaying some information. The display device described in the fourth embodiment can be used for the display portion. do.

[0345] The structure described in this embodiment may be used in appropriate combination with structures described in other embodiments. can be done. [Explanation of symbols]

[0346] 100 pixels 101 Substrate 103 scan lines 105a Capacitive wiring 105b Capacitive wiring 107 Gate insulating film 107a Gate insulating film 107b Gate insulating film 114 Insulating film 116 Insulating film 116a Insulating film 116b Insulating film 116c Insulating film 121 Signal Line 123 Electrode 125a electrode 125b electrode 135 Semiconductor Film 135a Oxide semiconductor film 135b Oxide semiconductor film 136 Transistor 137 Transistor 139a Pixel electrode 139b Pixel electrode 140 Capacitive element 141 Capacitive element 142 Liquid crystal element 143 Liquid crystal element 144a aperture 144b aperture 145 Capacitive element 146 Capacitive element 148 Pixel electrode 148a Oxide Conductor Film 148b Oxide conductor film 149 Pixel electrode 200 pixels 203 scan lines 221 Signal Line 223a electrode 223b Electrode 236 Transistor 237 Transistor 300 pixels 301 Substrate 303 Scan Lines 305a capacitive wiring 305b capacitor wiring 307 Gate insulating film 316 Insulating Film 321 Signal Line 323a electrode 323b electrode 325a electrode 325b electrode 335 Semiconductor Film 336 Transistor 337 Transistor 339a Pixel electrode 339b Pixel electrode 340 Capacitive element 341 Capacitive element 342 Liquid crystal element 343 Liquid crystal elements 344a aperture 344b aperture 345a electrode 345b electrode 346a aperture 346b aperture 500 transistors 502 Substrate 504 Conductive film 506 Insulating film 507 Insulating film 508 Oxide Semiconductor Film 508a Oxide semiconductor film 508b Oxide semiconductor film 509 Oxide Semiconductor Film 509a Oxide semiconductor film 509b Oxide semiconductor film 512 Conductive film 512a Conductive film 512b Conductive film 514 Insulating film 516 Insulating film 518 Insulating film 519 Insulating film 520 Conductive Film 520a Conductive film 520b Conductive film 531 Barrier membrane 536a Mask 536b Mask 538 Etchant 539 Etchant 540 Oxygen 540a Oxygen 542 Etchant 542a opening 542b opening 542c opening 570 Transistor 700 Display device 701 Substrate 702 Pixel section 704 Source driver circuit section 705 Substrate 706 Gate driver circuit section 708 FPC terminal section 710 Wiring 711 Wiring section 712 Sealing material 716 FPC 725 Slit 734 Insulating film 736 Colored layer 736B Colored layer 736G colored layer 736R colored layer 738 Light-shielding film 744 Protrusion 746 Orientation Film 748 Orientation Film 750 Transistors 752 Transistor 760 Connection electrode 764 Insulating film 766 Insulating Film 768 Insulating Film 770 Planarizing Insulating Film 772 Conductive Film 774 Conductive Film 775 Liquid crystal elements 776 Liquid crystal layer 778 Structure 780 Anisotropic Conductive Film 790 Capacitive element 5000 cabinet 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5100 pellets 5120 Circuit Board 5161 area 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery

Claims

1. a pixel portion including at least a first pixel electrode, a second pixel electrode disposed adjacent to the first pixel electrode in a first direction, a first transistor electrically connected to the first pixel electrode, and a second transistor electrically connected to the second pixel electrode; a first conductive layer having a function as a gate electrode of the first transistor and a function as a gate electrode of the second transistor; a second conductive layer that functions as one of a source electrode and a drain electrode of the first transistor and as one electrode of a first capacitor; a third conductive layer having a function as the other of the source electrode and the drain electrode of the first transistor and a function as a signal line; a fourth conductive layer having the same material as the first conductive layer and functioning as the other electrode of the first capacitor; a fifth conductive layer having a region overlapping with the fourth conductive layer and functioning as one of a source electrode and a drain electrode of the second transistor and as one electrode of a second capacitor; a sixth conductive layer having a region in contact with the fourth conductive layer and a region intersecting the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the conductive layer of the fourth conductive layer; a second insulating layer having a region in contact with an upper surface of the second conductive layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with the fifth conductive layer; the first pixel electrode is electrically connected to the second conductive layer through a first opening of the second insulating layer; the second pixel electrode is electrically connected to the fifth conductive layer through a second opening of the second insulating layer; the fourth conductive layer functions as the other electrode of the second capacitor; A display device, wherein the sixth conductive layer does not have an area overlapping with the third conductive layer.

2. a pixel portion including at least a first pixel electrode, a second pixel electrode disposed adjacent to the first pixel electrode in a first direction, a first transistor electrically connected to the first pixel electrode, and a second transistor electrically connected to the second pixel electrode; a first conductive layer having a function as a gate electrode of the first transistor and a function as a gate electrode of the second transistor; a second conductive layer that functions as one of a source electrode and a drain electrode of the first transistor and as one electrode of a first capacitor; a third conductive layer having a function as the other of the source electrode and the drain electrode of the first transistor and a function as a signal line; a fourth conductive layer having the same material as the first conductive layer and functioning as the other electrode of the first capacitor; a fifth conductive layer having a region overlapping with the fourth conductive layer and functioning as one of a source electrode and a drain electrode of the second transistor and as one electrode of a second capacitor; a sixth conductive layer having a region in contact with the fourth conductive layer and a region intersecting the first conductive layer; a first insulating layer having a region in contact with an upper surface of the first conductive layer and a region in contact with an upper surface of the conductive layer of the fourth conductive layer; a second insulating layer having a region in contact with an upper surface of the second conductive layer, a region in contact with an upper surface of the third conductive layer, and a region in contact with the fifth conductive layer; the first pixel electrode is electrically connected to the second conductive layer through a first opening of the second insulating layer; the second pixel electrode is electrically connected to the fifth conductive layer through a second opening of the second insulating layer; the fourth conductive layer functions as the other electrode of the second capacitor; the sixth conductive layer does not have an area overlapping with the third conductive layer, The fourth conductive layer overlaps with the first opening.

3. In claim 1 or 2, The pixel portion includes a liquid crystal layer located above the first pixel electrode, and a counter electrode located above the liquid crystal layer and overlapping with the first pixel electrode.

Images