Controller for inverter

Abstract

To enable gate interruption of a switching element of an inverter before the switching element is damaged by overcurrent and keep costs low while securing noise resistance.SOLUTION: A controller for an inverter having upper and lower arms of multiple phases, comprises a control unit that monitors a voltage of a first element connected to an upper arm element of the inverter, and monitors a voltage of a second element connected to a lower arm element of the inverter. When it is determined that the voltage of the first element is larger than zero and the voltage of the second element is larger than zero in any of the phases, the control unit outputs a signal for requesting a gate interruption of the upper arm element and the lower arm element in that phase.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a control device for an inverter.

Background Art

[0002] Patent Document 1 discloses that when performing abnormality determination of an inverter, a value detected by a current detection element connected to a switching element and a threshold value set according to the duty ratio of the switching element are used.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] When an overcurrent occurs in an inverter system, it is necessary to gate-off the switching element before the switching element is damaged. In order to gate-off before the switching element is damaged, it is important to increase the detection speed of the overcurrent and suppress the component variations around the protection circuit. When the switching elements of the upper and lower arms are short-circuited, the current waveform becomes steep, so a design that emphasizes the detection speed of the overcurrent and the variation management around the protection circuit are required.

[0005] However, in order to increase the detection speed of the overcurrent, it is necessary to reduce the noise filter performance. As a result of increasing the detection speed, the noise resistance decreases. Also, if we try to suppress the variations during manufacturing, the cost of the components increases. Thus, if we emphasize the detection speed, the noise resistance decreases, and if we try to suppress the component variations, the cost increases.

[0006] The present invention has been made in view of the above circumstances, and an object thereof is to provide a control device for an inverter that can cut off the gate of a switching element before the switching element of the inverter is damaged by overcurrent, ensure noise resistance, and suppress costs.

Means for Solving the Problems

[0007] The present invention is a control device for an inverter having upper and lower arms of a plurality of phases, and includes a control unit that monitors the voltage of a first element connected to an upper arm element of the inverter and monitors the voltage of a second element connected to a lower arm element of the inverter. When it is determined that the voltage of the first element is greater than zero and the voltage of the second element is greater than zero in any phase, the control unit outputs a signal requesting gate cutoff of the upper arm element and the lower arm element in that phase.

Effects of the Invention

[0008] In the present invention, the gate of the switching element can be cut off before the switching element of the inverter is damaged by overcurrent, noise resistance can be ensured, and costs can be suppressed.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Modes for Carrying Out the Invention

[0010] Hereinafter, the control device of the inverter in the embodiment of the present invention will be specifically described. Note that the present invention is not limited to the embodiments described below.

[0011] FIG. 1 is a diagram showing a vehicle in the embodiment. The vehicle 1 includes a motor 2, an inverter 3, a battery 4, and a control device 5. The vehicle 1 is an electric vehicle such as a hybrid electric vehicle (HEV), a plug-in hybrid electric vehicle (PHEV), or a battery electric vehicle (BEV).

[0012] The motor 2 is a three-phase alternating current motor that functions as a power source for driving, and is a motor generator having the functions of an electric motor and a generator. In the vehicle 1, the wheels are driven by the power output from the motor 2. The motor 2 is a synchronous motor including a rotor in which permanent magnets are embedded and a stator around which a three-phase coil is wound. The three-phase coils (U-phase, V-phase, W-phase) wound around the stator of the motor 2 are electrically connected to the inverter 3. When a three-phase voltage is applied to the motor 2 by the inverter 3, a three-phase current flows through the coils of the motor 2, and torque is generated in the motor 2.

[0013] The inverter 3 converts the DC power from the battery 4 into AC power and supplies it to the motor 2. The inverter 3 drives the motor 2. The inverter 3 is configured by an inverter circuit including a plurality of switching elements so that three-phase currents can be supplied to the three-phase coils of the motor 2. The inverter 3 includes first to sixth switching elements. A diode is connected in anti-parallel to each switching element. Each switching element of the inverter 3 is constituted by an IGBT.

[0014] The upper and lower arms in which the first switching element and the second switching element are connected in series constitute the U-phase arm. In the U-phase arm, the first switching element is the upper arm element and the second switching element is the lower arm element. The upper and lower arms in which the third switching element and the fourth switching element are connected in series constitute the V-phase arm. In the V-phase arm, the third switching element is the upper arm element and the fourth switching element is the lower arm element. The upper and lower arms in which the fifth switching element and the sixth switching element are connected in series constitute the W-phase arm. In the W-phase arm, the fifth switching element is the upper arm element and the sixth switching element is the lower arm element. The U-phase arm composed of the first switching element and the second switching element, the V-phase arm composed of the third switching element and the fourth switching element, and the W-phase arm composed of the fifth switching element and the sixth switching element are connected in parallel. In the inverter 3, each of the three-phase coils of the motor 2 is connected to each of the connection points of the paired switching elements. Each switching element of the inverter 3 performs a switching operation according to a control signal from the control device 5.

[0015] The battery 4 is a DC power supply capable of charging and discharging. The battery 4 is composed of a secondary battery such as nickel-hydrogen or lithium-ion. The battery 4 discharges power to the inverter 3 side or charges the power supplied from the inverter 3 side.

[0016] The control device 5 is an electronic control device that controls the inverter 3. The control device 5 includes a processor and a memory. The control device 5 loads the program stored in the storage unit into the working area of the memory and executes it, and controls each component through the execution of the program to realize a function that meets a predetermined purpose. Signals from various sensors are input to the control device 5. The control device 5 executes inverter control based on the signals input from various sensors and outputs a control signal to the inverter 3. The control device 5 is the control device of the inverter 3.

[0017] As shown in FIG. 2, a protection circuit 40 having an overcurrent protection function using a shunt resistor is connected to the inverter 3. The protection circuit 40 has a shunt resistor connected to the sense emitter of the switching element as a detection element for detecting the current flowing through the switching element of the inverter 3. The protection circuit 40 includes a first shunt resistor 41, a second shunt resistor 42, and capacitors 43 and 44. Note that in FIG. 2, only the upper and lower arms 10 of the U phase among the three-phase upper and lower arms of the inverter 3 are illustrated.

[0018] In the upper and lower arms 10 of the U phase of the inverter 3, a first switching element 20 and a second switching element 30 are connected in series. The first switching element 20 is an upper arm element. The second switching element 30 is a lower arm element. One end of the U-phase coil of the motor 2 is electrically connected to the connection point 11 between the first switching element 20 and the second switching element 30.

[0019] The first switching element 20 has an emitter 21 and a sense emitter 22. When a voltage is applied to the gate of the first switching element 20, most of the main current flows from the collector through the emitter 21, and a small sense current flows from the collector through the sense emitter 22. The main current is much larger than the sense current. The magnitude of the sense current has a correlation with the magnitude of the main current. In the first switching element 20, the gate, the connector, and the emitter 21 function as a normal switching element, and the sense emitter 22 is used for overcurrent detection and short-circuit detection of the first switching element 20.

[0020] A first shunt resistor 41 is connected to the sense emitter 22. The other end of the first shunt resistor 41 is connected to the ground. The voltage generated across both ends of the first shunt resistor 41 is the shunt voltage V1. The shunt voltage V1, which is proportional to the magnitude of the sense current flowing through the sense emitter 22, is realized on the high potential side of the first shunt resistor 41. The shunt voltage V1 is detected as a detection value related to the main current. Since the magnitude of the sense current has a correlation with the magnitude of the main current, the magnitude of the shunt voltage V1 has a correlation with the magnitude of the main current. The protection circuit 40 has a capacitor 43 connected to the sense emitter 22. The other end of the capacitor 43 is connected to the ground.

[0021] The second switching element 30 has an emitter 31 and a sense emitter 32. When a voltage is applied to the gate of the second switching element 30, most of the main current flows from the collector through the emitter 31, and a small sense current flows from the collector through the sense emitter 32. In the second switching element 30, the gate, the connector, and the emitter 31 function as a normal switching element, and the sense emitter 32 is used for overcurrent detection and short - circuit detection of the second switching element 30.

[0022] A second shunt resistor 42 is connected to the sense emitter 32. The other end of the second shunt resistor 42 is connected to the ground. The voltage generated across both ends of the second shunt resistor 42 is the shunt voltage V2. The shunt voltage V2, which is proportional to the magnitude of the sense current flowing through the sense emitter 32, is realized on the high potential side of the second shunt resistor 42. The shunt voltage V2 is detected as a detection value related to the main current. Since the magnitude of the sense current has a correlation with the magnitude of the main current, the magnitude of the shunt voltage V2 has a correlation with the magnitude of the main current. The protection circuit 40 has a capacitor 44 connected to the sense emitter 32. The other end of the capacitor 44 is connected to the ground.

[0023] The control device 5 detects an abnormality in the main current flowing through the emitter 21 based on the shunt voltage V1 generated across both ends of the first shunt resistor 41 when the sense current from the sense emitter 22 flows through the first shunt resistor 41. An abnormality in the main current flowing through the emitter 21 indicates that an abnormal current is flowing through the emitter 21. This abnormal current is an overcurrent or a short-circuit current.

[0024] The control device 5 detects an abnormality in the main current flowing through the emitter 31 based on the shunt voltage V2 generated across both ends of the second shunt resistor 42 when the sense current from the sense emitter 32 flows through the second shunt resistor 42. An abnormality in the main current flowing through the emitter 31 indicates that an abnormal current is flowing through the emitter 31.

[0025] The control device 5 is configured to monitor the shunt voltages V1 and V2 to detect overcurrents and short circuits in order to protect the first switching element 20 and the second switching element 30. The control device 5 includes a control unit that monitors the voltage of the shunt resistor connected to the sense emitter of the upper arm element of the inverter 3 and also monitors the voltage of the shunt resistor connected to the sense emitter of the lower arm element of the inverter 3. This control unit monitors the voltage of the shunt resistor connected to the upper arm element and also monitors the voltage of the shunt resistor connected to the lower arm element for each of the U-phase arm, V-phase arm, and W-phase arm.

[0026] For example, regarding the U-phase arm, the control device 5 determines whether or not the shunt voltage V1 of the first shunt resistor 41 connected to the first switching element 20 is equal to or higher than a threshold value. When it is determined that the shunt voltage V1 is equal to or higher than the threshold value, the control unit determines that an overcurrent is flowing through the first switching element 20. Thereby, the overcurrent of the first switching element 20 is detected. Further, the control device 5 determines whether or not the shunt voltage V2 of the second shunt resistor 42 connected to the second switching element 30 is equal to or higher than a threshold value. When it is determined that the shunt voltage V2 is equal to or higher than the threshold value, the control unit determines that an overcurrent is flowing through the second switching element 30. Thereby, the overcurrent of the second switching element 30 is detected. This threshold value is an abnormality determination threshold value and is set to a value greater than zero.

[0027] When the control device 5 determines that an overcurrent is flowing through the switching element of the inverter 3, it protects the switching element from the overcurrent by gate-cutting the switching element. The control device 5 outputs a signal for gate-cutting the gate of the switching element to be controlled to the inverter 3.

[0028] When an overcurrent occurs in the inverter system configured as described above, it is necessary to cut off the gate before the switching element is damaged. When a short circuit between the upper and lower arms is detected, where the upper arm element and the lower arm element are short-circuited, or when an inter-phase short circuit is detected where the switching elements of different phases are short-circuited, the switching element is gate-cut off. That is, the control device 5 has a function of detecting a short circuit between the upper and lower arms and a function of detecting an inter-phase short circuit. Since the short circuit between the upper and lower arms has a particularly steep current waveform, it is important to suppress the variation around the protection circuit 40 and increase the detection speed of the short circuit between the upper and lower arms. However, if the filter performance is lowered by emphasizing the detection speed, the EMC performance will deteriorate, so it is necessary to avoid this. Also, if an attempt is made to suppress the variation in components of the protection circuit 40, it will lead to an increase in cost, so this also needs to be avoided. Therefore, the control device 5 is configured to be able to cut off the upper and lower arm elements at a higher speed by comparing the voltages at both ends of the shunt resistor between the upper and lower arms. Conventionally, after a short circuit between the upper and lower arms occurs, the gate is cut off by the flow of an overcurrent. In contrast, the control device 5 can determine the necessity of gate cut-off before the overcurrent occurs.

[0029] Figure 3 is a flowchart showing the protection control flow. The control shown in Figure 3 is implemented by the control device 5. In the description of Figure 3, the upper and lower arms 10 of the U phase will be described as an example.

[0030] The control device 5 detects the shunt voltage of the shunt resistor connected to the switching element of the inverter 3 (step S11). In step S11, for each of the upper and lower arms of the U phase, V phase, and W phase, the voltage of the shunt resistor connected to the sense emitter of the upper arm element and the voltage of the shunt resistor connected to the sense emitter of the lower arm element are detected. For the U phase arm, the shunt voltage V1 of the first shunt resistor 41 is detected, and the shunt voltage V2 of the second shunt resistor 42 is detected.

[0031] The control device 5 determines whether or not the shunt voltage is equal to or higher than a threshold value (step S12). In step S12, it is determined whether or not the shunt voltage of each switching element of the inverter 3 exceeds the abnormal determination threshold value. Thereby, it is determined whether or not an overcurrent has occurred in the switching element. The threshold value used in step S12 is the abnormal determination threshold value. The abnormal determination threshold value is set to a value greater than zero. In step S12, it is determined whether or not a phase-to-phase short circuit has occurred in the inverter 3. The control device 5 determines for each phase whether or not the shunt voltage V1 of the first shunt resistor 41 connected to the upper arm element is equal to or higher than the threshold value, and also determines whether or not the shunt voltage V2 of the second shunt resistor 42 connected to the lower arm element is equal to or higher than the threshold value.

[0032] When it is determined that the shunt voltage is equal to or higher than the threshold value (step S12: Yes), the control device 5 detects that an overcurrent is flowing through the switching element of the inverter 3 (step S13). In step S13, gate cutoff is performed on the switching element in which the overcurrent is detected. The control device 5 outputs a signal for gate cutoff of the target switching element to the inverter 3. When the process of step S13 is performed, this control routine ends.

[0033] When it is determined that the shunt voltage is not equal to or higher than the threshold value (step S12: No), the control device 5 compares the shunt voltages of the upper and lower arms (step S14). In step S14, for each of the U phase, V phase, and W phase, it is confirmed whether or not the shunt voltage V1 in the upper arm element is greater than zero, and it is also confirmed whether or not the shunt voltage V2 in the lower arm element is greater than zero.

[0034] The control device 5 determines whether or not the shunt voltage V1 in the upper arm element is greater than zero and the shunt voltage V2 in the lower arm element is greater than zero for each phase (step S15). In step S15, for the upper and lower arms of each phase, it is determined whether or not the shunt voltage V1 of the upper arm element is greater than zero and the shunt voltage V2 of the lower arm element is greater than zero. In step S15, it is determined whether or not a short circuit has occurred between the upper and lower arms in any of the phases. Thereby, it is possible to determine the presence or absence of a short circuit between the upper and lower arms before an overcurrent flows through the switching element. The control device 5 determines whether or not voltages are simultaneously applied to the first shunt resistor 41 of the upper arm and the second shunt resistor 42 of the lower arm.

[0035] If it is determined that the shunt voltage V1 of the upper arm element is not greater than zero and the shunt voltage V2 of the lower arm element is not greater than zero in any phase of the inverter 3 (step S15: No), this control routine returns to step S11.

[0036] If it is determined that the shunt voltage V1 of the upper arm element is greater than zero and the shunt voltage V2 of the lower arm element is greater than zero in any phase of the inverter 3 (step S15: Yes), this control routine proceeds to step S13. In this case, in step S13, the control device 5 determines that a short circuit has occurred between the upper and lower arms of that phase, and outputs a signal for gate-cutoff of the switching element of the upper arm and the switching element of the lower arm of that phase.

[0037] When proceeding from step S12 to step S13, it means that an inter-phase short circuit has been detected, and an overcurrent due to the inter-phase short circuit has been detected. When proceeding from step S15 to step S13, it means that a short circuit between the upper arm element and the lower arm element has been detected, and a current due to the short circuit between the upper and lower arms has been detected.

[0038] As described above, according to the embodiment, by comparing the voltages at both ends of the shunt resistor with the upper and lower arms, it becomes possible to determine the necessity of gate cutoff corresponding to the upper and lower short circuits before an overcurrent due to a phase short circuit occurs, and the upper and lower arm elements can be cutoff at a higher speed. As a result, the conventionally existing overcurrent detection function can be used for detecting a phase short circuit, and a design focused on the phase short circuit can be achieved. As a result, the cost can be suppressed while ensuring noise resistance.

[0039] Further, the detection element for detecting the current flowing through the switching element of the inverter 3 is not limited to the shunt resistor. In a modified example of the inverter 3, the detection element can be constituted by a DESAT terminal.

[0040] As shown in FIG. 4, in the inverter 3 of the modified example, the first gate driver 50 that outputs a signal to the gate of the first switching element 20 and the second gate driver 60 that outputs a signal to the gate of the second switching element 30 are used to protect the switching element.

[0041] The first gate driver 50 is a drive circuit for the first switching element 20. The first gate driver 50 has a first DESAT terminal 51 and a VE terminal 52. The first gate driver 50 is connected to the connector and the emitter of the first switching element 20 via a protection circuit 70. The first DESAT terminal 51 is electrically connected to the connector of the first switching element 20. The first DESAT terminal 51 is connected to the connector of the first switching element 20 via a diode 71 and a resistor 72 of the protection circuit 70. The diode 71 and the resistor 72 are connected in series. The anode of the diode 71 is connected to the resistor 72, and the cathode of the diode 71 is connected to the connector of the first switching element 20. The VE terminal 52 is connected to the emitter 21 of the first switching element 20. The switching element of this modified example does not have a sense emitter. The protection circuit 70 has a capacitor 73. The capacitor 73 is connected to the wiring between the first DESAT terminal 51 and the resistor 72 and the wiring between the VE terminal 52 and the emitter 21.

[0042] The second gate driver 60 is a drive circuit for the second switching element 30. The second gate driver 60 has a second DESAT terminal 61 and a VE terminal 62. The second gate driver 60 is connected to the connector and the emitter of the second switching element 30 via a protection circuit 70. The second DESAT terminal 61 is electrically connected to the connector of the second switching element 30. The second DESAT terminal 61 is connected to the connector of the second switching element 30 via a diode 74 and a resistor 75 of the protection circuit 70. The diode 74 and the resistor 75 are connected in series. The anode of the diode 74 is connected to the resistor 75, and the cathode of the diode 74 is connected to the connector of the second switching element 30. The VE terminal 62 is connected to the emitter 31 of the second switching element 30. The protection circuit 70 has a capacitor 76. The capacitor 76 is connected to the wiring between the second DESAT terminal 61 and the resistor 75 and the wiring between the VE terminal 62 and the emitter 31.

[0043] The voltage generated at the first DESAT terminal 51 is voltage V3. The voltage V3 is detected as a detection value related to the current of the first switching element 20. The magnitude of the voltage V3 has a correlation with the magnitude of the current of the first switching element 20.

[0044] The voltage generated at the second DESAT terminal 61 is voltage V4. The voltage V4 is detected as a detection value related to the current of the second switching element 30. The magnitude of the voltage V4 has a correlation with the magnitude of the current of the second switching element 30.

[0045] The control device 5 detects an abnormality in the current flowing through the first switching element 20 based on the voltage V3 of the first DESAT terminal 51. The control device 5 detects an abnormality in the current flowing through the second switching element 30 based on the voltage V4 of the second DESAT terminal 61. The control device 5 monitors the voltages V3 and V4 to detect overcurrent and short circuit in order to protect the first switching element 20 and the second switching element 30 from overcurrent. The control unit of the control device 5 monitors the voltage of the DESAT terminal connected to the connector of the upper arm element of the inverter 3 and monitors the voltage of the DESAT terminal connected to the connector of the lower arm element of the inverter 3. The control device 5 executes protection control using the voltage V3 of the first DESAT terminal 51 and the voltage V4 of the second DESAT terminal 61 instead of the shunt voltages V1 and V2.

[0046] FIG. 5 is a flowchart showing a protection control flow in a modified example. The control shown in FIG. 5 is performed by the control device 5.

[0047] The control device 5 detects the voltage of the DESAT terminal connected to the switching element of the inverter 3 (step S21). In step S21, for each of the upper and lower arms of the U-phase, V-phase, and W-phase, the voltage V3 of the first DESAT terminal 51 connected to the connector of the upper arm element and the voltage V3 of the second DESAT terminal 61 connected to the connector of the lower arm element are detected.

[0048] The control device 5 determines whether the voltage of the DESAT terminal is equal to or higher than the threshold value (step S22). In step S22, for each switching element of the inverter 3, it is determined whether the voltage of the DESAT terminal exceeds the abnormal determination threshold value. Thereby, it is determined whether an overcurrent has occurred in the switching element. The threshold value used in step S22 is the abnormal determination threshold value. The abnormal determination threshold value is set to a value greater than zero. In step S22, it is determined whether a phase-to-phase short circuit has occurred in the inverter 3. The control device 5 determines, for each phase, whether the voltage V3 of the first DESAT terminal 51 connected to the upper arm element is equal to or higher than the threshold value, and also determines whether the voltage V4 of the second DESAT terminal 61 connected to the lower arm element is equal to or higher than the threshold value.

[0049] When it is determined that the voltage of the DESAT terminal is equal to or higher than the threshold value (step S22: Yes), the control device 5 detects that an overcurrent is flowing through the switching element of the inverter 3 (step S23). In step S23, gate cutoff is performed on the switching element in which the overcurrent is detected. The control device 5 outputs a signal for gate cutoff of the target switching element to the inverter 3. When the process of step S23 is performed, this control routine ends.

[0050] When it is determined that the voltage of the DESAT terminal is not equal to or higher than the threshold value (step S22: No), the control device 5 compares the voltages of the DESAT terminals of the upper and lower arms (step S24). In step S24, for each of the U phase, V phase, and W phase, it is confirmed whether the voltage V3 of the first DESAT terminal 51 in the upper arm element is greater than zero, and it is also confirmed whether the voltage V4 of the second DESAT terminal 61 in the lower arm element is greater than zero.

[0051] The control device 5 determines whether the voltage V3 of the DESAT terminal in the upper arm element is greater than zero and the voltage V4 of the DESAT terminal in the lower arm element is greater than zero for each phase (step S25). In step S25, for the upper and lower arms of each phase, it is determined whether the voltage V3 of the first DESAT terminal 51 on the upper arm element side is greater than zero and the voltage V4 of the second DESAT terminal 61 on the lower arm element side is greater than zero. In step S25, it is determined whether a short circuit between the upper and lower arms has occurred in any of the upper and lower arms. Thereby, it is possible to determine the presence or absence of a short circuit between the upper and lower arms before an overcurrent flows through the switching element. The control device 5 determines whether voltages are simultaneously applied to the first DESAT terminal 51 of the upper arm and the second DESAT terminal 61 of the lower arm.

[0052] If it is determined that the voltage V3 of the DESAT terminal on the upper arm element side is not greater than zero and the voltage V4 of the DESAT terminal on the lower arm element side is not greater than zero in any phase of the inverter 3 (step S25: No), this control routine returns to step S21.

[0053] If it is determined that the voltage V3 of the DESAT terminal on the upper arm element side is greater than zero and the voltage V4 of the DESAT terminal on the lower arm element side is greater than zero in any phase of the inverter 3 (step S25: Yes), this control routine proceeds to step S23. In this case, in step S23, the control device 5 determines that a short circuit between the upper and lower arms has occurred in that phase and outputs a signal for gate cutoff of the switching element of the upper arm and the switching element of the lower arm of that phase.

[0054] When proceeding from step S22 to step S23, it means that an inter-phase short circuit has been detected and an overcurrent due to the inter-phase short circuit has been detected. When proceeding from step S25 to step S23, it means that a short circuit between the upper arm element and the lower arm element has been detected and a current due to the short circuit between the upper and lower arms has been detected.

Explanation of Signs

[0055] 1 Vehicle 2 Motor 3 Inverter 4 Battery 5 Control device 10 Upper and lower arms 20 First switching element 21 Emitter 22 Sense emitter 30 Second switching element 31 Emitter 32 Sense emitter 40 Protection circuit 41 First shunt resistor 42 Second shunt resistor

Claims

1. A control device for an inverter having upper and lower arms of multiple phases, comprising: a control unit that monitors the voltage of a first element connected to the upper arm element of the inverter and monitors the voltage of a second element connected to the lower arm element of the inverter; when it is determined that the voltage of the first element is greater than zero and the voltage of the second element is greater than zero in any one phase, the control unit outputs a signal requesting gate cutoff of the upper arm element and the lower arm element in that phase A control device for an inverter, characterized in that.

2. The first element is a first shunt resistor connected to the sense emitter of the upper arm element of the inverter, The second element is a second shunt resistor connected to the sense emitter of the lower arm element of the inverter The control device for an inverter according to claim 1, characterized in that.

3. The control unit, when it is determined that the voltage of the first shunt resistor is equal to or greater than a threshold value, determines that an overcurrent is flowing through the upper arm element and outputs a signal requesting gate cutoff of the upper arm element; when it is determined that the voltage of the second shunt resistor is equal to or greater than a threshold value, determines that an overcurrent is flowing through the lower arm element and outputs a signal requesting gate cutoff of the lower arm element; in a state where no overcurrent detection based on the threshold value is performed for any of the upper arm elements and the lower arm elements, determines whether the voltage of the first shunt resistor is greater than zero and the voltage of the second shunt resistor is greater than zero for each phase; The threshold value is set to a value greater than zero The control device for an inverter according to claim 2, characterized in that.

4. The first element is a first DESAT terminal electrically connected to the connector of the upper arm element of the inverter, The second element is a second DESAT terminal electrically connected to the connector of the lower arm element of the inverter, The first DESAT terminal is a terminal of a first drive circuit that outputs a control signal to the gate of the upper arm element, The second DESAT terminal is a terminal of a second drive circuit that outputs a control signal to the gate of the lower arm element The control device for an inverter according to claim 1, characterized in that.

5. The control unit, When it is determined that the voltage of the first DESAT terminal is equal to or higher than the threshold value, it is determined that an overcurrent is flowing through the upper arm element, and a signal requesting gate cutoff of the upper arm element is output. When it is determined that the voltage of the second DESAT terminal is equal to or higher than the threshold value, it is determined that an overcurrent is flowing through the lower arm element, and a signal requesting gate cutoff of the lower arm element is output. In a state where no overcurrent detection based on the threshold value is performed for any of the upper arm elements and the lower arm elements, it is determined whether the voltage of the first DESAT terminal is greater than zero and the voltage of the second DESAT terminal is greater than zero for each phase. The threshold value is set to a value greater than zero. The control device for an inverter according to claim 4, characterized by the above.

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