Display device

Abstract

To provide a novel semiconductor device using an oxide semiconductor, in particular, to provide a planar type semiconductor device using an oxide semiconductor, or to provide a semiconductor device using an oxide semiconductor and that has a large on-state current.SOLUTION: A display device comprises: an oxide insulating film; an oxide semiconductor film on the oxide insulating film; a source electrode and a drain electrode contacted with the oxide semiconductor film; a gate insulating film between the source electrode and the drain electrode; and a gate electrode overlapped with the oxide semiconductor film via the gate insulating film. The oxide semiconductor film has: a first region overlapped with the gate electrode; and a second region not overlapped with the gate electrode, nor the source electrode, nor the drain electrode. Impurity element concentrations of the first region and the second region are different from each other. The gate electrode, the source electrode, and the drain electrode contain the same metal element.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device using an oxide semiconductor film and a display device using the semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. Alternatively, the present invention relates to a process, a machine, a manufacture, or a composition of matter. In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof. In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a driving method thereof, or a manufacturing method thereof.

[0003] Note that in this specification and the like, the semiconductor device generally refers to a device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and storage devices are one aspect of semiconductor devices. An imaging device, a display device, a liquid crystal display device, a light-emitting device, an electro-optical device, a power generation device (including a thin-film solar cell, an organic thin-film solar cell, etc.), and an electronic device may have a semiconductor device.

Background Art

[0004] Techniques for constructing a transistor (also referred to as a thin-film transistor (TFT)) using a semiconductor thin film formed on a substrate having an insulating surface have attracted attention. The transistor is widely applied to electronic devices such as an integrated circuit (IC) and an image display device (display device). Semiconductor materials represented by silicon are widely known as semiconductor thin films applicable to transistors, but oxide semiconductors are attracting attention as other materials.

[0005] ​​​​​​​​​​​​ For example, as the oxide semiconductor, an amorphous oxide containing In, Zn, Ga, Sn, etc. is used to fabricate a transistor, which is disclosed in Patent Document 1.

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] As transistors using an oxide semiconductor film, for example, an inverted staggered type (also referred to as a bottom gate structure) or a planar type (also referred to as a top gate structure) can be mentioned. When applying a transistor using an oxide semiconductor film to a display device, the inverted staggered type transistor is more frequently used because the manufacturing process is relatively simple and the manufacturing cost can be suppressed compared to the planar type transistor. However, as the size of the display screen of the display device increases, or the image quality of the display device becomes higher definition (for example, high-definition display devices typified by 4k×2k (number of horizontal pixels = 3840 pixels, number of vertical pixels = 2048 pixels) or 8k×4k (number of horizontal pixels = 7680 pixels, number of vertical pixels = 4320 pixels)) progresses, in the case of an inverted staggered type transistor, there is a parasitic capacitance between the gate electrode and the source and drain electrodes, so signal delay and the like increase due to the parasitic capacitance, resulting in a problem that the image quality of the display device deteriorates. In addition, in the case of an inverted staggered type transistor, there is a problem that the occupied area of the transistor becomes larger compared to a planar type transistor. Therefore, a planar type using an oxide semiconductor film transistor has a parasitic capacitance between the gate electrode and the source and drain electrodes, so signal delay and the like increase due to the parasitic capacitance, resulting in a problem that the image quality of the display device deteriorates. Also, in the case of an inverted staggered type transistor, there is a problem that the occupied area of the transistor becomes larger compared to a planar type transistor. Therefore, a planar type using an oxide semiconductor film Regarding a planar-type transistor, a structure having stable semiconductor characteristics and high reliability, and development of a transistor formed by a simple manufacturing process is desired.

[0008] In view of the above problems, one aspect of the present invention provides a novel semiconductor device using an oxide semiconductor. In particular, a planar-type semiconductor device using an oxide semiconductor is provided. Or a semiconductor device using an oxide semiconductor having a large on-current is provided, or a semiconductor device using an oxide semiconductor having a small off-current is provided, or a semiconductor device using an oxide semiconductor having a small occupied area is provided, or a semiconductor device using an oxide semiconductor having stable electrical characteristics is provided, or a semiconductor device using an oxide semiconductor having high reliability is provided, or a novel semiconductor device is provided, or a novel display device is provided. This is one of the problems.

[0009] Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be naturally clarified from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like.

Means for Solving the Problems

[0010] One aspect of the present invention includes an oxide insulating film, an oxide semiconductor film on the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping the oxide semiconductor film via the gate insulating film. The oxide semiconductor film includes a first region overlapping the gate electrode, the gate electrode, the source electrode, and the drain electrode. ​​​​​​​​​​​a second region that does not overlap, and the first region and the second region have a concentration of impurity elements of different, and the gate electrode, the source electrode, and the drain electrode contain the same metal element, characterized semiconductor device.

[0011] Also, another aspect of the present invention is an oxide insulating film, an oxide semiconductor film on the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, and between the source electrode and the drain electrode a gate insulating film, and a gate electrode overlapping the oxide semiconductor film via the gate insulating film, and having the oxide semiconductor film has a first region overlapping with the gate electrode and a second region not overlapping with the gate electrode, the source electrode, and the drain electrode, and the first region and the second region have different impurity element concentrations, and a nitride insulating film is provided in contact with the second region, and the gate electrode, the source electrode, and the drain electrode contain the same metal element. a second region that does not overlap, and the first region and the second region have different impurity element concentrations, and in the second region, a nitride insulating film is provided in contact, and the gate electrode, the source electrode, and the drain electrode are characterized semiconductor devices containing the same metal element .

[0012] Also, in each of the above configurations, it is preferable that the concentration of impurity elements in the second region is higher than that in the first region. Also, in each of the above configurations, the impurity element is preferably any one selected from hydrogen, boron, carbon, nitrogen, fluorine , aluminum, silicon, phosphorus, or chlorine.

[0013] Also, in the above configuration, the nitride insulating film is preferably a silicon nitride film.

[0014] Also, another aspect of the present invention is an oxide insulating film, an oxide semiconductor film on the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, and between the source electrode and the drain electrode a gate insulating film, and a gate electrode overlapping the oxide semiconductor film via the gate insulating film, and having ​​The oxide semiconductor film has a first region overlapping with the gate electrode and a second region not overlapping with the gate electrode, the source electrode, and the drain electrode, and the hydrogen concentration in the second region is higher than that in the first region. The semiconductor device is characterized in that the gate electrode, the source electrode, and the drain electrode contain the same metal element. The second region does not overlap with the gate electrode, the source electrode, and the drain electrode. The hydrogen concentration in the second region is higher than that in the first region. The gate electrode, the source electrode, and the drain electrode contain the same metal element. This is a semiconductor device characterized by the above.

[0015] Another aspect of the present invention includes an oxide insulating film, an oxide semiconductor film on the oxide insulating film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a gate insulating film between the source electrode and the drain electrode, and a gate electrode overlapping with the oxide semiconductor film through the gate insulating film. The oxide semiconductor film has a first region overlapping with the gate electrode and a second region not overlapping with the gate electrode, the source electrode, and the drain electrode. The crystallinity of the first region is higher than that of the second region. The semiconductor device is characterized in that the gate electrode, the source electrode, and the drain electrode contain the same metal element. The oxide semiconductor film has a first region overlapping with the gate electrode and a second region not overlapping with the gate electrode, the source electrode, and the drain electrode. The crystallinity of the first region is higher than that of the second region. The semiconductor device is characterized in that the gate electrode, the source electrode, and the drain electrode contain the same metal element. The oxide semiconductor film has a first region overlapping with the gate electrode and a second region not overlapping with the gate electrode, the source electrode, and the drain electrode. The crystallinity of the first region is higher than that of the second region. The gate electrode, the source electrode, and the drain electrode contain the same metal element. The crystallinity of the first region is higher than that of the second region. The gate electrode, the source electrode, and the drain electrode contain the same metal element. This is a semiconductor device characterized by the above.

[0016] In each of the above configurations, it is preferable that at least a part of the gate electrode, the source electrode, and the drain electrode is formed on the same plane. In each of the above configurations, it is preferable that at least a part of the gate electrode, the source electrode, and the drain electrode is formed on the same plane.

[0017] In each of the above configurations, the oxide semiconductor film is preferably an In-M-Zn oxide (where M represents Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). In each of the above configurations, the oxide semiconductor film is preferably an In-M-Zn oxide (where M represents Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). In each of the above configurations, it is preferable that the oxide semiconductor film includes a crystalline part and the c-axis of the crystalline part is parallel to the normal vector of the surface on which the oxide semiconductor film is formed. In each of the above configurations, it is preferable that the oxide semiconductor film includes a crystalline part and the c-axis of the crystalline part is parallel to the normal vector of the surface on which the oxide semiconductor film is formed.

[0018] Another aspect of the present invention is a display device using the semiconductor device described in any one of the above configurations. Another aspect of the present invention is a display device using the semiconductor device described in any one of the above configurations.

Advantages of the Invention

[0019] According to one aspect of the present invention, a novel semiconductor device using an oxide semiconductor can be provided. In particular, a planar semiconductor device using an oxide semiconductor can be provided. Further, a semiconductor device having a large on-current using an oxide semiconductor can be provided. Also, a semiconductor device having a small off-current using an oxide semiconductor can be provided. Or, a semiconductor device having a small occupied area using an oxide semiconductor can be provided. Or, a semiconductor device having stable electrical characteristics using an oxide semiconductor can be provided. Or a highly reliable semiconductor device using an oxide semiconductor can be provided. Or, a novel semiconductor device can be provided. Or, a novel display device can be provided.

[0020] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have to have all of these effects. Note that other effects will be obvious from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0021]

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Embodiments for Carrying Out the Invention

[0022] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not construed as being limited to the description of the following embodiments.

[0023] Also, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. The drawings are schematic representations of ideal examples and are not limited to the shapes or values shown in the drawings.

[0024] In addition, the ordinal numbers "first", "second", "third", etc. used in this specification are attached to avoid confusion of components, and it should be noted that they are not numerically limiting.

[0025] Also, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components appropriately changes according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0026] In addition, in this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current flows through the drain, the channel region, and the source. It is possible. In this specification and the like, the channel region refers to the region where current mainly flows.

[0027] Also, the functions of the source and drain may be interchanged when transistors of different polarities are employed, or when the direction of current changes during circuit operation. For this reason, in this specification and the like, the terms source and drain are considered to be interchangeable.

[0028] Also, in this specification and the like, "electrically connected" includes cases where connection is made through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the exchange of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistive elements, inductors, capacitors, and other elements having various functions.

[0029] (Embodiment 1) In this embodiment, one form of a semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIGS. 1 to 11.

[0030] <Configuration 1 of Semiconductor Device> FIG. 1 shows an example of a transistor included in a semiconductor device, a transistor having a top gate structure.

[0031] FIGS. 1(A) to 1(C) show a top view and a cross-sectional view of a transistor 150 included in the semiconductor device. FIG. 1(A) is a top view of the transistor 150, and FIG. 1(B) is a cross-sectional view taken along the line A-A' in FIG. 1(A). ) is a cross-sectional view between the dashed-dotted lines Y1 - Y2, and FIG. 1(C) is a cross-sectional view between the dashed-dotted lines X1 - X2 of FIG. 1(A). In FIG. 1(A), for clarity, the substrate 102, the insulating film 10 4, the insulating film 108, the insulating film 116, the insulating film 118, etc. are omitted. In the top view of the transistor, similar to the transistor 150 in the subsequent drawings, some of the components may be omitted in the illustration. Also, the direction of the dashed-dotted line X1 - X2 may be referred to as the channel length direction, and the direction of the dashed-dotted line Y1 - Y2 may be referred to as the channel width direction.

[0032] The transistor 150 shown in FIG. 1 includes an oxide semiconductor film 106 on the insulating film 104 formed on the substrate 102, an insulating film 108 in contact with the oxide semiconductor film 106, a conductive film 110 in contact with the oxide semiconductor film 106 in a part of the opening 140a of the insulating film 108, a conductive film 112 in contact with the oxide semiconductor film 106 in a part of the opening 140b of the insulating film 108, and a conductive film 114 overlapping the oxide semiconductor film 106 via the insulating film 108. The transistor 150 shown in FIG. 1 has a structure in which an insulating film 116 and an insulating film 118 are provided on the transistor 150.

[0033] In the oxide semiconductor film 106, the region that does not overlap with the conductive film 110, the conductive film 112, and the conductive film 114 has an element that forms an oxygen deficiency. Hereinafter, the element that forms an oxygen deficiency will be described as an impurity element. Representative examples of impurity elements include hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, noble gas elements, etc. Representative examples of noble gas elements include helium, neon, argon, krypton, and xenon.

[0034] ​​​​​​​​​When an impurity element is added to an oxide semiconductor film, the metal element and oxygen in the oxide semiconductor film are The bond is broken, and oxygen vacancies are formed. Alternatively, an impurity element is added to the oxide semiconductor film. When the oxide semiconductor film is heated, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the metal element is As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The carrier density increases and the conductivity becomes higher.

[0035] In addition, when hydrogen is added to an oxide semiconductor in which oxygen vacancies are formed by the addition of an impurity element, Hydrogen enters the oxygen vacancy site and a donor level is formed near the conduction band. As a result, The conductivity of the semiconductor increases and it becomes a conductor. The oxide semiconductor that has become a conductor is called an oxide conductor. In general, oxide semiconductors have a large energy gap and can be On the other hand, oxide conductors have a donor level near the conduction band. Therefore, the effect of absorption due to the donor level is small, and it is The light-transmitting property of the oxide semiconductor is comparable to that of an oxide semiconductor.

[0036] Here, the resistance of a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film) The temperature dependency of resistivity will be explained with reference to FIG.

[0037] Here, a sample having an oxide conductor film was prepared. The oxide conductor film (OC_SiN x ) In the doping apparatus, argon is added to the oxide semiconductor film, and the silicon nitride film is The oxide conductor film (OC_Ar dope+SiN x ), or In a plasma treatment apparatus, an oxide semiconductor film is exposed to argon plasma and a silicon nitride oxide conductor film (OC_Ar plasma+SiN x ) is formed by contacting with the film. The silicon nitride film contains hydrogen.

[0038] A method for producing a sample containing an oxide conductor film (OC_SiN x ) is shown below. On a glass substrate , a silicon oxynitride film with a thickness of 400 nm is formed by plasma CVD method, and then exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film, thereby forming a silicon oxynitride film that releases oxygen by heating. Next, an In-Ga-Zn oxide film with a thickness of 100 nm is formed on the silicon oxynitride film that releases oxygen by heating by sputtering method using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, heat-treated in a nitrogen atmosphere at 450 °C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450 °C. Next, a silicon nitride film with a thickness of 100 nm is formed by plasma CVD method. Next, it is heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 350 °C.

[0039] A method for producing a sample containing an oxide conductor film (OC_Ar dope+SiN x ) is shown below . On a glass substrate, a silicon oxynitride film with a thickness of 400 nm is formed by plasma CVD method, and then exposed to oxygen plasma to add oxygen ions to the silicon oxynitride film, thereby forming a silicon oxynitride film that releases oxygen by heating. Next, an In-Ga-Zn oxide film with a thickness of 100 nm is formed on the silicon oxynitride film that releases oxygen by heating by sputtering method using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, In-Ga-Zn acid...​​ A chemical film was formed and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, using a doping device, argon with an acceleration voltage of 10 kV and a dose amount of 5×10 / cm 14 was added to the In-Ga-Zn oxide 2 film to form oxygen vacancies in the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. A method for fabricating a sample containing an oxide conductor film (OC_Ar plasma + SiN 00 nm) is shown below. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C.

[0040] Next, the results of measuring the resistivity of each sample are shown in FIG. 41. Here, the resistivity was measured using a four-terminal method. x ) is shown below. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. After forming a 400-nm-thick silicon oxynitride film on a glass substrate by plasma CVD, the silicon oxynitride film that releases oxygen by heating was formed by exposing it to oxygen plasma. Next, on the silicon oxynitride film that releases oxygen by heating, a 100-nm-thick In-Ga-Zn oxide film was formed by sputtering using a sputtering target with an atomic ratio of In:Ga:Zn = 1:1:1.2, and heat-treated in a nitrogen atmosphere at 450°C, and then heat-treated in a mixed gas atmosphere of nitrogen and oxygen at 450°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C. Next, in a plasma processing apparatus, an argon plasma was generated, and oxygen vacancies were formed by colliding the accelerated argon ions with the In-Ga-Zn oxide film. Next, a 100-nm-thick silicon nitride film was formed by plasma CVD. Next, heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen at 350°C.

[0041] Next, the results of measuring the resistivity of each sample are shown in FIG. 41. Here, the resistivity was measured using a four-terminal method. ​In FIG. 41, the horizontal axis indicates the measurement temperature, and the vertical axis indicates indicates resistivity. Also, the oxide conductor film (OC_SiN x ) measurement results are indicated by square marks, Oxide conductor film (OC_Ar doped + SiN x The measurement results of oxide conductors are shown with circles. Electrical film (OC_Ar plasma+SiN x ) The measurement results are indicated by triangles.

[0042] Although not shown, the oxide semiconductor film that is not in contact with the silicon nitride film has a high resistivity. Therefore, it is considered that the oxide conductor film has a higher resistivity than the oxide semiconductor film. It is clear that it is low.

[0043] As can be seen from FIG. 41, the oxide conductor film (OC_Ar doped+SiN x ) and acid Compound conductor film (OC_Ar plasma+SiN x ) contains oxygen vacancies and hydrogen The resistivity fluctuation is small. Typically, the resistivity fluctuation is small at temperatures between 80K and 290K. The resistivity variation is less than ±20% between 150K and 250K. The rate is less than ±10%. In other words, oxide conductors are degenerate semiconductors, and the conduction band edge and the ferroelectric It is estimated that the luminescence level of the oxide conductor film is equal to or approximately equal to the luminescence level of the oxide conductor film. By using it as the source and drain regions of a transistor, the oxide conductor film and the source The contact with the conductive film that functions as the electrode and drain electrode is an ohmic contact, and the oxide conductive The contact resistance between the conductive film and the conductive film functioning as the source electrode and the drain electrode can be reduced. In addition, since the resistivity of the oxide conductor has low temperature dependence, the oxide conductor film and the source electrode and drain electrode can be easily formed. It is possible to fabricate a highly reliable transistor with little variation in the contact resistance with the conductive film functioning as the rain electrode. is made.

[0044] Here, an enlarged view of the vicinity of the oxide semiconductor film 106 is shown in FIG. 2. As shown in FIG. 2, the oxide semiconductor film 106 has a region 106a in contact with the conductive films 110 and 112, a region 106b in contact with the insulating film 11 6, and regions 106c and 106d overlapping with the insulating film 108. has.

[0045] Region 106a functions as a source region and a drain region. When the conductive films 110 and 11 2 are formed using a conductive material that easily combines with oxygen, such as tungsten, titanium, aluminum, copper, molybdenum, chromium, or tantalum alone or an alloy, the oxygen contained in the oxide semiconductor film combines with the conductive material contained in the conductive films 110 and 112, and oxygen deficiency is formed in the oxide semiconductor film. Also, in some cases, a part of the constituent elements of the conductive material for forming the conductive films 11 0 and 112 may be mixed into the oxide semiconductor film. As a result of these the region 106a in contact with the conductive films 110 and 112 has increased conductivity and functions as a source region and a drain region. functions.

[0046] Regions 106b and 106c function as low-resistance regions. Impurity elements are contained in regions 106b and 106c. Note that the impurity element concentration in region 106b is higher than that in region 106c. Also, when the side surface of the conductive film 114 has a tapered shape, a part of region 106c may overlap with the conductive film 114.

[0047] The impurity element is a noble gas element, and the oxide semiconductor film 106 is formed by a sputtering method When this occurs, regions 106a to 106d each contain a noble gas element, and in region 106 compared with regions 106a and 106d, regions 106b and 106c have a higher concentration of noble gas elements This is because when the oxide semiconductor film 106 is formed by sputtering, since a noble gas is used as the sputtering ring gas, the noble gas is contained in the oxide semiconductor film 106, and in regions 106b and 106c, it is because a noble gas is intentionally added to form oxygen vacancies. Note that in regions 106b and 106c, noble gas elements different from those in regions 106a and 106d may be added.

[0048] When the impurity element is boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or chlorine, it has the impurity element only in regions 106b and 106c. Therefore, compared with regions 106a and 106d, regions 106b and 106c have a higher concentration of impurity elements. Note that in regions 106b and 106c, the concentration of impurity elements obtained by secondary ion mass spectrometry (SIMS:Secondary Ion Mass Spectrometry) is 5×10 18 atoms / cm 3 or more and 1×10 22 at oms / cm 3 or less, or 1×10 19 atoms / cm 3 or more and 1×10 21 atom s / cm 3 or less, or 5×10 19 atoms / cm 3 or more and 5×10 20 atoms / cm 3 or less can be achieved. ​​

[0049] When the impurity element is hydrogen, the impurity element concentration in regions 106b and 106c is higher than that in regions 106a and 106d. In regions 106b and 106c, the concentration of the impurity element is high. In regions 106b and 106c, the concentration of hydrogen obtained by secondary ion mass spectrometry is 8×10 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 or more, or 5×10 20 ato ms / cm 3 or more.

[0050] Since regions 106b and 106c have impurity elements, oxygen deficiency increases and the carrier density increases. As a result, regions 106b and 106c become highly conductive and function as low resistance regions.

[0051] Note that the impurity element may be one or more of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or chlorine and one or more of noble gases. In this case, in regions 1 06b and 106c, due to the oxygen deficiency formed by the noble gas and the interaction with one or more of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or chlorine added to the region, regions 106b and 106c may have even higher conductivity. added hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or chlorine regions 106b and 106c may have even higher conductivity.

[0052] Region 106d functions as a channel.

[0053] In the insulating film 108, the region overlapping with the oxide semiconductor film 106 and the conductive film 114 functions as a gate insulating film. Also, in the insulating film 108, between the oxide semiconductor film 106 and the conductive film ​The region where 110 and the conductive film 112 overlap functions as an interlayer insulating film.

[0054] The conductive film 110 and the conductive film 112 function as a source electrode and a drain electrode. Also the conductive film 114 functions as a gate electrode.

[0055] The transistor 150 shown in this embodiment has a region 106d that functions as a channel, and between the region 106a that functions as a source region and a drain region, there are regions 106b and 106c that function as low-resistance regions. The resistance between the channel and the source region and the drain region can be reduced, and the transistor 150 has a large on-current and a high field-effect mobility.

[0056] Also, in the manufacturing process of the transistor 150, the conductive film 11 4 that functions as a gate electrode and the conductive films 110 and 112 that function as a source electrode and a drain electrode are formed in the same process. Therefore, in the transistor 150, the conductive film 114 and the conductive films 110 and 112 do not overlap, and it is possible to reduce the parasitic capacitance between the conductive film 114 and the conductive films 110 and 112 As a result, when a large-area substrate is used as the substrate 102, it is possible to reduce the signal delay in the conductive films 110, 112, and 114

[0057] Also, in the transistor 150, using the conductive films 110, 112, and 114

[0058] as a mask, impurity elements are added to the oxide semiconductor film 106. That is, a low-resistance region can be formed by self-alignment lines.

[0058] The details of other configurations shown in FIG. 1 will be described below.

[0059] As the substrate 102, various substrates can be used and are not limited to specific ones. As an example of the substrate, there are a semiconductor substrate (e.g., a single crystal substrate or a silicon substrate), an SO I substrate, a glass substrate, a quartz substrate, a plastic substrate, a metal substrate, a stainless steel substrate , a substrate having a stainless steel foil, a tungsten substrate, a substrate having a tungsten foil , a flexible substrate, a bonded film, a paper containing a fibrous material, or a base film , etc. As an example of the glass substrate, there are barium borosilicate glass, aluminoboro silicate glass, or soda lime glass, etc. Examples of the flexible substrate, the bonded film , the base film, etc. include the following. For example, there are plastics represented by polyethylene terephthalate (PET), polyethylene naphthalate (PEN), and polyethersulfone (PES). Or, as an example, there are synthetic resins such as acrylic, etc. . Or, as an example, there are polypropylene, polyester, polyvinyl fluoride , or polyvinyl chloride, etc. Or, as an example, there are polyamide, poly imide, aramid, epoxy, an inorganic vapor deposition film, or papers, etc. In particular, by manufacturing a transistor using a semiconductor substrate, a single crystal substrate, or an SOI substrate, etc., variations in characteristics, size, or shape, etc. are small, the current capacity is high, and a small-sized transistor can be manufactured. By configuring a circuit with such a transistor, low power consumption of the circuit or high integration of the circuit can be achieved.

[0060] Further, a flexible substrate may be used as the substrate 102, and transistors may be formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistors. After partially or fully completing a semiconductor device on the release layer, it can be separated from the substrate 102 and transferred to another substrate. At this time, the transistors can be transferred onto a substrate with poor heat resistance or a flexible substrate. Note that, for example, a laminated structure of inorganic films such as a tungsten film and a silicon oxide film, or a structure in which an organic resin film such as polyimide is formed on a substrate can be used for the above-described release layer. Alternatively, a release layer may be provided between the substrate 102 and the transistors. After partially or fully completing a semiconductor device on the release layer, it can be separated from the substrate 102 and transferred to another substrate. After partially or fully completing a semiconductor device on the release layer, it can be separated from the substrate 102 and transferred to another substrate. At this time, the transistors can be transferred onto a substrate with poor heat resistance or a flexible substrate. Note that, for example, a laminated structure of inorganic films such as a tungsten film and a silicon oxide film, or a structure in which an organic resin film such as polyimide is formed on a substrate can be used for the above-described release layer. Note that, for example, a laminated structure of inorganic films such as a tungsten film and a silicon oxide film, or a structure in which an organic resin film such as polyimide is formed on a substrate can be used for the above-described release layer. Note that, for example, a laminated structure of inorganic films such as a tungsten film and a silicon oxide film, or a structure in which an organic resin film such as polyimide is formed on a substrate can be used for the above-described release layer.

[0061] As an example of the substrate onto which the transistors are transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), a leather substrate, or a rubber substrate, etc. can be used. By using these substrates, it is possible to form transistors with good characteristics, form transistors with low power consumption, manufacture a device that is difficult to break, impart heat resistance, reduce weight, or make the device thinner. As an example of the substrate onto which the transistors are transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), a leather substrate, or a rubber substrate, etc. can be used. As an example of the substrate onto which the transistors are transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), a leather substrate, or a rubber substrate, etc. can be used. As an example of the substrate onto which the transistors are transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), a leather substrate, or a rubber substrate, etc. can be used. As an example of the substrate onto which the transistors are transferred, in addition to the substrate on which the above-described transistors can be formed, a paper substrate, a cellophane substrate, an aramid film substrate, a polyimide film substrate, a stone substrate, a wood substrate, a cloth substrate (including natural fibers (silk, cotton, linen), synthetic fibers (nylon, polyurethane, polyester), or recycled fibers (acetate, cupra, rayon, recycled polyester)), a leather substrate, or a rubber substrate, etc. can be used. By using these substrates, it is possible to form transistors with good characteristics, form transistors with low power consumption, manufacture a device that is difficult to break, impart heat resistance, reduce weight, or make the device thinner. By using these substrates, it is possible to form transistors with good characteristics, form transistors with low power consumption, manufacture a device that is difficult to break, impart heat resistance, reduce weight, or make the device thinner. By using these substrates, it is possible to form transistors with good characteristics, form transistors with low power consumption, manufacture a device that is difficult to break, impart heat resistance, reduce weight, or make the device thinner.

[0062] The insulating film 104 can be formed by a single layer or a laminate of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor film 106, it is preferable that at least the region in the insulating film 104 that contacts the oxide semiconductor film 106 is formed of an oxide insulating film. Further, an oxide insulating film that releases oxygen by heating can be used as the insulating film 104. The insulating film 104 can be formed by a single layer or a laminate of an oxide insulating film or a nitride insulating film. In order to improve the interface characteristics with the oxide semiconductor film 106, it is preferable that at least the region in the insulating film 104 that contacts the oxide semiconductor film 106 is formed of an oxide insulating film. In order to improve the interface characteristics with the oxide semiconductor film 106, it is preferable that at least the region in the insulating film 104 that contacts the oxide semiconductor film 106 is formed of an oxide insulating film. In order to improve the interface characteristics with the oxide semiconductor film 106, it is preferable that at least the region in the insulating film 104 that contacts the oxide semiconductor film 106 is formed of an oxide insulating film. Then, oxygen contained in the insulating film 104 is transferred to the oxide semiconductor film 106 by heat treatment. It is possible.

[0063] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or The thickness of the insulating film 104 can be set to 200 nm or more and 1000 nm or less. This can increase the amount of oxygen released from the insulating film 104 and also can prevent the insulating film 104 and the oxide semiconductor from The interface state at the interface with the conductive film 106 and the region 106d of the oxide semiconductor film 106 It is possible to reduce the oxygen vacancies contained therein.

[0064] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitrogen. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The above may be used, and the layer may be formed as a single layer or a multilayer.

[0065] The oxide semiconductor film 106 is typically made of In-Ga oxide, In-Zn oxide, or In- M-Zn oxide (M is Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or The oxide semiconductor film 106 is formed of a metal oxide such as Hf. do.

[0066] In addition, when the oxide semiconductor film 106 is an In-M-Zn oxide, the atomic ratio of In to M is When the sum of In and M is 100 atomic %, In is 25 atomic % or more, M is less than 75 atomic %, or In is 34 atomic % or more, and M is 66 atomic % or more Less than ic%.

[0067] The oxide semiconductor film 106 has an energy gap of 2 eV or more, or 2.5 eV or more. Or it is 3 eV or more.

[0068] The thickness of the oxide semiconductor film 106 is 3 nm or more and 200 nm or less, or 3 nm or more and 100 nm or less, or 3 nm or more and 50 nm or less.

[0069] When the oxide semiconductor film 106 is an In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used for forming the In-M-Zn oxide is preferably In≧M and Zn≧M being satisfied. With such an atomic ratio of the metal elements of the sputtering target, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:1.5, In:M:Zn = 2:1:2.3, In:M:Zn = 2:1:3, I n:M:Zn = 3:1:2 etc. are preferable. Note that the atomic number ratio of the formed oxide semiconductor film 106 includes fluctuations of plus or minus 40% of the atomic number ratio of the metal elements contained in the above sputtering target as an error respectively.

[0070] Further, in the oxide semiconductor film 106, when silicon or carbon, which is one of the Group 14 elements, is contained, oxygen deficiency increases in the oxide semiconductor film 106 and it becomes n-type. For this reason, in the oxide semiconductor film 106, particularly in the region 106d, the concentration (concentration obtained by secondary ion mass spectrometry) of silicon or carbon is 2×10 atoms / cm 18 or less, or 2×10 3 atoms / cm or less. As a result, the transistor has electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive. 17 3

[0071] Also, in the oxide semiconductor film 106, particularly in the region 106d, the concentration of an alkali metal or an alkaline earth metal obtained by secondary ion mass spectrometry is set to 1×10 ato 18 ato ms / cm 3 or less, or 2×10 16 atoms / cm 3 or less. Alkali metals and alkaline earth metals may generate carriers when combined with the oxide semiconductor, and the off-current of the transistor may increase. Therefore, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the region 106d. As a result, the transistor has electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive. When an alkali metal and an alkaline earth metal combine with the oxide semiconductor, carriers may be generated, and the off-current of the transistor may increase. For this reason, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the region 106d. As a result, the transistor has electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive. Also, if the oxide semiconductor film 106 contains nitrogen, particularly in the region 106d, electrons as carriers may be generated, the carrier density may increase, and it may become n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen tends to have normally-on characteristics. Therefore, it is preferable that nitrogen is reduced as much as possible in the oxide semiconductor film, particularly in the region 106d. For example, the nitrogen concentration obtained by secondary ion mass spectrometry can be set to 5×10 Also, if nitrogen is contained in the oxide semiconductor film 106, particularly in the region 106d, electrons as carriers may be generated, the carrier density may increase, and it may become n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen tends to have normally-on characteristics. Therefore, it is preferable that nitrogen is reduced as much as possible in the oxide semiconductor film, particularly in the region 106d. For example, the nitrogen concentration obtained by secondary ion mass spectrometry can be set to 5×10 Also, if the oxide semiconductor film 106 contains nitrogen, particularly in the region 106d, electrons as carriers may be generated, the carrier density may increase, and it may become n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen tends to have normally-on characteristics. Therefore, it is preferable that nitrogen is reduced as much as possible in the oxide semiconductor film, particularly in the region 106d. For example, the nitrogen concentration obtained by secondary ion mass spectrometry can be set to 5×10 atoms / cm

[0072] Also, by reducing the impurity elements in the oxide semiconductor film 106, particularly in the region 106d, the carrier density of the oxide semiconductor film can be reduced. Therefore, in the oxide semiconductor film 106, particularly in the region 106d, the carrier density is 1×10 atoms / cm or less. Also, by reducing the impurity elements in the oxide semiconductor film 106, particularly in the region 106d, the carrier density of the oxide semiconductor film can be reduced. Therefore, in the oxide semiconductor film 106, particularly in the region 106d, the carrier density is 1×10 or less. atoms / cm 18 or less. 3 This can be achieved.

[0073] Also, by reducing the impurity elements in the oxide semiconductor film 106, particularly in the region 106d, the carrier density of the oxide semiconductor film can be reduced. Therefore, in the oxide semiconductor film 106, particularly in the region 106d, the carrier density is 1×10 atoms / cm or less. 17 or less. 3 The following, or 1×10 15 pieces / cm 3 The following, or 1×10 13 pieces / cm 3 The following, or is 1×10 11 pieces / cm 3 can be set to be the following.

[0074] As the oxide semiconductor film 106, an oxide semiconductor film with a low impurity concentration and a low density of defect levels is used to fabricate a transistor having even more excellent electrical characteristics. Here, a low impurity concentration and a low density of defect levels (few oxygen deficiencies) are referred to as high-purity intrinsic or substantially high-purity intrinsic. An oxide semiconductor that is high-purity intrinsic or substantially high-purity intrinsic may be able to reduce the carrier density because there are few carrier generation sources. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film is likely to have electrical characteristics (also referred to as normally-off characteristics) in which the threshold voltage is positive. Also, an oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has a low density of defect levels, so the trap level density may also be low. Also, an oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has an extremely small off-current, and when the voltage between the source electrode and the drain electrode ( drain voltage) is in the range of 1 V to 10 V, the off-current can be below the measurement limit of a semiconductor parameter analyzer, that is, 1×10 A or less. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film may have small fluctuations in electrical characteristics and be a highly reliable transistor.

[0075] -13 A or less. Thus, a transistor in which a channel region is formed in the oxide semiconductor film may have small fluctuations in electrical characteristics and be a highly reliable transistor. is small and may become a highly reliable transistor.

[0075] Also, the oxide semiconductor film 106 may have, for example, a non-single crystal structure. The non-single crystal structure, for example then it includes CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) to be described later, a polycrystalline structure, a microcrystalline structure to be described later, and also an amorphous structure. In the non-single crystal structure, the amorphous structure has the highest density of defect levels, and C AAC-OS has the lowest density of defect levels.

[0076] Note that the oxide semiconductor film 106 may be a mixed film having two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region. The mixed film may be, for example, a single-layer structure having any two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CA AC-OS region, and a single crystal structure region. Further, the mixed film may be, for example, a structure in which any two or more of an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC-OS region, and a single crystal structure region are laminated.

[0077] Note that in the oxide semiconductor film 106, the crystallinity of the region 106b and the region 106d may be different. Further, in the oxide semiconductor film 106, the crystallinity of the region 106c and the region 106d may be different. This is because when an impurity element is added to the region 106b or the region 106c, the region 106b or the region 106c is damaged, and the crystallinity decreases.

[0078] The insulating film 108 can be formed by laminating a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor film 106, at least the region in the insulating film 108 that contacts the oxide semiconductor film 106 is formed using an oxide insulating film. ​ is preferable. As the insulating film 108, for example, silicon oxide, silicon oxynitride, nitrided silicon oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide can be used, and it can be provided as a single layer or a laminate. -Zn oxide or the like can be used, and it can be provided as a single layer or a laminate.

[0079] Further, by providing an insulating film having a blocking effect on oxygen, hydrogen, water, etc. as the insulating film 108, diffusion of oxygen from the oxide semiconductor film 106 to the outside and intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor film 106 can be prevented. Examples of the insulating film having a blocking effect on oxygen, hydrogen, water, etc. include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc.

[0080] Further, by using hafnium silicate (HfSiO x ), hafnium silicate (HfSi O x O y N z ) with nitrogen added, hafnium aluminate (HfAl O x O y N z ) with nitrogen added, or high-k materials such as hafnium oxide and yttrium oxide as the insulating film 108, gate leakage of the transistor can be reduced.

[0081] Further, by using an oxide insulating film that releases oxygen by heating as the insulating film 108, it is possible to move the oxygen contained in the insulating film 108 to the oxide semiconductor film 106 by heat treatment.

[0082] ​​​​​​Further, as the insulating film 108, a silicon oxynitride film with few defects can be used. The silicon oxynitride film with few defects, after heat treatment, is measured by ESR at 100 K or lower In the spectrum obtained, a first signal with a g value of 2.037 or more and 2.039 or less , a second signal with a g value of 2.001 or more and 2.003 or less, and a g value of 1.964 or more and 1 .966 or less of the third signal are observed. Note that the split widths of the first signal and the second signal , as well as the split widths of the second signal and the third signal, are about 5 mT in the ESR measurement of the X band . Also, the first signal with a g value of 2.037 or more and 2.039 or less , the second signal with a g value of 2.001 or more and 2.003 or less, and the g value of 1. 964 or more and 1.966 or less of the total spin density of the third signal is 1×10 18 spi ns / cm 3 Less than, typically 1×10 17 spins / cm 3 Or more and 1×10 18 spins / cm 3 Less than.

[0083] Note that in the ESR spectrum at 100 K or lower, the first signal with a g value of 2.037 or more and 2.039 or less , the second signal with a g value of 2.001 or more and 2.003 or less, and the g value of 1 .964 or more and 1.966 or less of the third signal correspond to signals caused by nitrogen oxides (NO x , x is 0 or more and 2 or less , or 1 or more and 2 or less). That is, the first signal with a g value of 2.037 or more and 2. 039 or less, the second signal with a g value of 2.001 or more and 2.003 or less, And the total spin density of the third signal with a g value of 1.964 or more and 1.966 or less is small It can be said that the content of nitrogen oxides contained in the silicon oxynitride film is less.

[0084] In addition, a silicon oxynitride film with few defects has a nitrogen concentration measured by secondary ion mass spectrometry of 6×10 20 atoms / cm 3 or less. By using a silicon oxynitride film with few defects as the insulating film 108, it becomes difficult for nitrogen oxides to be generated, and it is possible to reduce carrier traps at the interface between the oxide semiconductor film 1 06 and the insulating film. In addition, it is possible to reduce the shift of the threshold voltage of the transistors included in the semiconductor device, and it is possible to reduce fluctuations in the electrical characteristics of the transistors.

[0085] The thickness of the insulating film 108 can be 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less or 10 nm or more and 250 nm or less.

[0086] Since the conductive film 110, the conductive film 112, and the conductive film 114 are formed in the same process, they have the same material and the same laminated structure. The conductive film 110, the conductive film 112, and the conductive film 114 can be formed using a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, nickel, iron, cobalt, tungsten, or an alloy containing the above-described metal elements as a component, or an alloy combining the above-described metal elements. In addition, a metal element selected from any one or more of manganese and zirconium may be used. Further, the conductive film 1 10, the conductive film 112, and the conductive film 114 may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a single-layer structure of a copper film containing manganese A two-layer structure with a titanium film laminated on an aluminum film, and a titanium film laminated on a titanium nitride film A two-layer structure with a tungsten film on a titanium nitride film, a two-layer structure with a tantalum nitride film or a two-layer structure in which a tungsten film is laminated on a tungsten nitride film; A two-layer structure in which a copper film is laminated on top of a titanium film, and an aluminum film is laminated on top of the titanium film, A three-layer structure is formed by forming a titanium film on top of the titanium film, laminating a copper film on a copper film containing manganese, and There are three-layer structures, such as a copper film containing manganese on top of the aluminum. Select from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film made by combining one or more of these may be used.

[0087] The conductive films 110, 112, and 114 are formed of indium tin oxide (ITO). Tungsten-containing indium oxide, tungsten oxide-containing indium zinc oxide, Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium A conductive material having light transmitting properties, such as zinc oxide or indium tin oxide containing silicon oxide, is used. In addition, a laminate structure of the conductive material having light transmitting properties and the metal element may be used. It can also be done like this.

[0088] The thickness of the conductive film 110, the conductive film 112, and the conductive film 114 is 30 nm or more and 500 nm or less. or from 100 nm to 400 nm.

[0089] The insulating film 116 is formed by using a single layer or a stacked layer of an oxide insulating film or a nitride insulating film. Note that in order to improve the interface characteristics with the oxide semiconductor film 106, Preferably, at least the region in contact with the oxide semiconductor film 106 is formed of an oxide insulating film. Further, an oxide insulating film that releases oxygen by heating is used as the insulating film 116, and by heat treatment, the oxygen contained in the insulating film 116 is moved to the oxide semiconductor film 106. This is possible.

[0090] As the insulating film 116, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, or Ga-Zn oxide etc. can be used, and it can be provided as a single layer or a laminate.

[0091] Preferably, the insulating film 118 is a film that functions as a barrier film against hydrogen, water, etc. from the outside. As the insulating film 118, for example, silicon nitride, silicon nitride oxide, aluminum oxide, etc. can be used, and it can be provided as a single layer or a laminate.

[0092] The thicknesses of the insulating film 116 and the insulating film 118 can each be 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less.

[0093] <Configuration of the semiconductor device 2> Next, another configuration of the semiconductor device will be described with reference to FIG. 3.

[0094] FIGS. 3(A) to 3(C) show a top view and a cross-sectional view of the transistor 151 included in the semiconductor device. FIG. 3(A) is a top view of the transistor 151, and FIG. 3(B) is a cross-sectional view between the dashed lines Y1-Y2 in FIG. 3(A). FIG. 3(C) is a cross-sectional view between the dashed lines X1-X2 in FIG. 3(A).

[0095] ​The transistor 151 shown in FIG. 3 is characterized in that the conductive film 110, the conductive film 112, and the conductive film 114 each have a three-layer structure. Also, the insulating film 104 has a laminated structure of a nitride insulating film 10 4a and an oxide insulating film 104b. Other configurations are the same as those of the transistor 150 and have the same effects. 4a and an oxide insulating film 104b. Other configurations are the same as those of the transistor 150 and have the same effects. 4a and an oxide insulating film 104b. Other configurations are the same as those of the transistor 150 and have the same effects.

[0096] First, the conductive film 110, the conductive film 112, and the conductive film 114 will be described.

[0097] The conductive film 110 has the conductive film 110a, the conductive film 110b, and the conductive film 110c laminated in this order, and the conductive film 110a and the conductive film 110c cover the surface of the conductive film 110b. That is, the conductive film 110a and the conductive film 110c function as protective films for the conductive film 110b. That is, the conductive film 110a and the conductive film 110c function as protective films for the conductive film 110b. That is, the conductive film 110a and the conductive film 110c function as protective films for the conductive film 110b.

[0098] Similar to the conductive film 110, the conductive film 112 has the conductive film 112a, the conductive film 112b, and the conductive film 112c laminated in this order, and the conductive film 112a and the conductive film 112c cover the surface of the conductive film 112b. Similar to the conductive film 110, the conductive film 112 has the conductive film 112a, the conductive film 112b, and the conductive film 112c laminated in this order, and the conductive film 112a and the conductive film 112c cover the surface of the conductive film 112b. Similar to the conductive film 110, the conductive film 112 has the conductive film 112a, the conductive film 112b, and the conductive film 112c laminated in this order, and the conductive film 112a and the conductive film 112c cover the surface of the conductive film 112b.

[0099] Similar to the conductive film 110, the conductive film 114 has the conductive film 114a, the conductive film 114b, and the conductive film 114c laminated in this order, and the conductive film 114a and the conductive film 114c cover the surface of the conductive film 114b. Similar to the conductive film 110, the conductive film 114 has the conductive film 114a, the conductive film 114b, and the conductive film 114c laminated in this order, and the conductive film 114a and the conductive film 114c cover the surface of the conductive film 114b. Similar to the conductive film 110, the conductive film 114 has the conductive film 114a, the conductive film 114b, and the conductive film 114c laminated in this order, and the conductive film 114a and the conductive film 114c cover the surface of the conductive film 114b.

[0100] The conductive film 110a, the conductive film 112a, and the conductive film 114a are formed using a material that prevents the metal elements contained in the conductive film 110b, the conductive film 112b, and the conductive film 114b from diffusing into the oxide semiconductor film 106. As the conductive film 110a, the conductive film 112a, and the conductive film 114a The conductive film 110a, the conductive film 112a, and the conductive film 114a are formed using a material that prevents the metal elements contained in the conductive film 110b, the conductive film 112b, and the conductive film 114b from diffusing into the oxide semiconductor film 106. As the conductive film 110a, the conductive film 112a, and the conductive film 114a The conductive film 110a, the conductive film 112a, and the conductive film 114a are formed using a material that prevents the metal elements contained in the conductive film 110b, the conductive film 112b, and the conductive film 114b from diffusing into the oxide semiconductor film 106. As the conductive film 110a, the conductive film 112a, and the conductive film 114a , titanium, tantalum, molybdenum, tungsten in single form or alloy, or titanium nitride , tantalum nitride, molybdenum nitride, tantalum nitride, etc. can be used for formation. Also the conductive films 110a, 112a, and 114a can be formed using a Cu-X alloy (X is M n, Ni, Cr, Fe, Co, Mo, Ta, or Ti), etc. .

[0101] Incidentally, for the Cu-X alloy (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) , a coating film may be formed in a region in contact with the oxide semiconductor film or a region in contact with the insulating film by heat treatment. The coating film is formed of a compound containing X. As an example of the compound containing X , there are oxides of X, In-X oxides, Ga-X oxides, In-Ga-X oxides, In- Ga-Zn-X oxides, etc. By forming a coating film on the surfaces of the conductive films 110a, 112a, and 114a, the coating film becomes a blocking film, and entry of Cu in the Cu-X alloy film into the oxide semiconductor film can be suppressed.

[0102] Incidentally, by setting the copper concentration in the region of the oxide semiconductor film 106 that functions as a channel to 1×1 0 18 atoms / cm 3 or less, it is possible to reduce the density of electron trap levels at the interface between the insulating film 108 that functions as a gate insulating film and the oxide semiconductor film 106. As a result, it is possible to fabricate a transistor with an excellent subthreshold swing value (S value).

[0103] The conductive films 110b, 112b, and 114b are formed using a low-resistance material. They can be formed. As the conductive films 110b, 112b, and 114b, copper, aluminum , gold, silver, or the like in the form of a single element or an alloy, or a compound containing these as a main component can be used to form them .

[0104] The conductive films 110c, 112c, and 114c are formed using a film in which the metal elements contained in the conductive films 110b, 112b, and 114b are passivated , so that the metal elements contained in the conductive films 110b, 112b, and 114b can be prevented from moving to the oxide semiconductor film 106 in the formation process of the insulating film 11 6. As the conductive films 110c, 112c, and 114c, metal silicides, metal silicon nitride compounds, etc. can be used to form them. Typically, CuSi (x>0), CuSi x x (x>0), CuSi x N y (x>0, y>0), etc. are available

[0105] Here, the formation method of the conductive films 110c, 112c, and 114c will be described . Note that the conductive films 110b, 112b, and 114b are formed using copper . Also, the conductive films 110c, 112c, and 114c are formed using CuSi x N y (x>0, y>0).

[0106] The conductive films 110b, 112b, and 114b are exposed to plasma generated in a reducing atmosphere such as hydrogen, ammonia, and carbon monoxide to reduce the oxides on the surfaces of the conductive films 110b, 112b, and 114b .

[0107] Next, while heating at 200°C or higher and 400°C or lower, expose the conductive film 110b, the conductive film 112b, and the conductive film 114b to silane. As a result, the copper contained in the conductive film 110b, the conductive film 112b, and the conductive film 114b acts as a catalyst, and silane is decomposed into Si and H 2 and, at the same time, CuSi x (x> 0) is formed on the surfaces of the conductive film 110b, the conductive film 112b, and the conductive film 114b.

[0108] Next, expose the conductive film 110b, the conductive film 112b, and the conductive film 114b to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, so that CuSi formed on the surfaces of the conductive film 110b, the conductive film 112b, and the conductive film 114b reacts with the nitrogen contained in the plasma, and Cu x (x>0) Si Si x N y (x>0, y>0) is formed as the conductive film 110c, the conductive film 112c, and the conductive film 114c.

[0109] In addition, in the above process, after exposing the conductive film 110b, the conductive film 112b, and the conductive film 114b to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, while heating at 200°C or higher and 400°C or lower, expose the conductive film 110b, the conductive film 112b, and the conductive film 114b to silane, so that Cu Si Si x N y (x>0, y>0) may be formed as the conductive film 110c, the conductive film 112c, and the conductive film 114c.

[0110] Next, the insulating film 104 in which the nitride insulating film 104a and the oxide insulating film 104b are laminated will be described. Hereinafter.

[0111] For example, the nitride insulating film 104a can be formed using silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride, etc. Also, as the oxide insulating film 104b, silicon oxide, silicon oxynitride, aluminum oxide, etc. can be used. By providing the nitride insulating film 104a on the substrate 102 side, it is possible to prevent hydrogen, water, etc. from the outside from diffusing into the oxide semiconductor film 106.

[0112] <Configuration 3 of the semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIGS. 4, 5, and 11.

[0113] FIGS. 4(A) to 4(C) show a top view and a cross-sectional view of the transistor 152 included in the semiconductor device. FIG. 4(A) is a top view of the transistor 152, FIG. 4(B) is a cross-sectional view taken along the dashed line Y1 - Y2 in FIG. 4(A), and FIG. 4(C) is a cross-sectional view taken along the dashed line X1 - X2 in FIG. 4(A).

[0114] The transistor 152 shown in FIG. 4 is characterized in that the oxide semiconductor film 106 has a multilayer structure. Specifically, the oxide semiconductor film 106 includes an oxide semiconductor film 107a in contact with the insulating film 104, an oxide semiconductor film 107b in contact with the oxide semiconductor film 107a, and an oxide semiconductor film 107c in contact with the oxide semiconductor film 107b, the conductive film 110, the conductive film 112, the insulating film 108, and the insulating film 116. Other configurations are the same as those of the transistor 150 and exhibit the same effects.

[0115] The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c are typically In - Ga oxide, In - Zn oxide, In - M - Zn oxide (M is Mg ​​​​​​​​​​​​​Metal oxides such as those represented by Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf formed thereby.

[0116] Also, the oxide semiconductor films 107a and 107c are typically In-G a oxide, In-Zn oxide, In-Mg oxide, Zn-Mg oxide, In-M-Zn acid oxide (M represents Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf ), and the energy of the lower end of the conduction band is closer to the vacuum level than that of the oxide semiconductor film 107b , typically, the difference between the energy of the lower end of the conduction band of the oxide semiconductor films 107a and 107c and the energy of the lower end of the conduction band of the oxide semiconductor film 107b is 0.05 eV or more, 0.07 eV or more, 0.1 eV or more, or 0.2 eV or more, and 2 eV or less, 1e V or less, 0.5 eV or less, or 0.4 eV or less. Note that the energy difference between the vacuum level and the lower end of the conduction band is also referred to as the electron affinity.

[0117] When the oxide semiconductor film 107b is In-M-Zn oxide (M represents Mg, Al, Ti, Ga, Y , Zr, La, Ce, Nd, or Hf), in the target used to form the oxide semiconductor film 107b , if the atomic ratio of the metal elements is In:M:Zn = x 1 :y 1 :z 1 then 、 x 1 / y 1 is 1 / 3 or more and 6 or less, more preferably 1 or more and 6 or less, and z 1 / y 1 is preferably 1 / 3 or more and 6 or less, more preferably 1 or more and 6 or less. Note that z 1 / y 1By setting it to be 1 or more and 6 or less, a CAAC-OS can be formed as the oxide semiconductor film 107b. As a representative example of the atomic ratio of the metal elements in the target, In:M :Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 2:1:1. 5, In:M:Zn = 2:1:2.3, In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, etc.

[0118] When the oxide semiconductor film 107a and the oxide semiconductor film 107c are In-M-Zn oxides (M represents Mg, Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf), for the targets used to form the oxide semiconductor film 107a and the oxide semiconductor film 107c, if the atomic ratio of the metal elements is In:M:Zn = x 2 :y 2 :z 2 then 、 x 2 / y 2 <x 1 / y 1 and z 2 / y 2 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. Note that by setting z 2 / y 2 to 1 or more and 6 or less, a CAAC-OS film is likely to be formed as the oxide semiconductor film 107 a and the oxide semiconductor film 107c. Representative examples of the atomic ratio of the metal elements in the target include In:M:Zn = 1:3:2, In:M:Z n = 1:3:4, In:M:Zn = 1:3:6, In:M:Zn = 1:3:8, In:M :Zn = 1:4:3, In:M:Zn = 1:4:4, In:M:Zn = 1:4:5, In :M:Zn = 1:4:6, In:M:Zn = 1:6:3, In:M:Zn = 1:6:4, :M:Zn = 1:6:5, In:M:Zn = 1:6:6, etc. In:M:Zn = 1:6:5, In:M:Zn = 1:6:6, In:M:Zn = 1:6: 7, In:M:Zn = 1:6:8, In:M:Zn = 1:6:9, etc.

[0119] Also, when the oxide semiconductor film 107a and the oxide semiconductor film 107c are In-Ga oxides , for example, they can be formed by sputtering using an In-Ga metal oxide target (In:Ga = 7:93). Also, when forming the oxide semiconductor film 107a and the oxide semiconductor film 107c by a sputtering method using DC discharge, the In-Ga oxide target should have y / (x + y) ≤ 0.96, preferably ≤ 0.95, for example, 0.93 when In:Ga = x:y [atomic ratio].

[0120] Note that the atomic ratios of the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107 c each include a variation of ±40% of the above atomic ratios as an error.

[0121] Note that the atomic ratios are not limited to these, and appropriate atomic ratios can be used according to the required semiconductor characteristics.

[0122] Also, the oxide semiconductor film 107a and the oxide semiconductor film 107c may have the same composition. For example, as the oxide semiconductor film 107a and the oxide semiconductor film 107c, an In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn = 1: 3:2, 1:3:4, 1:4:5, 1:4:6, 1:4:7, or 1:4:8 can be used.

[0123] Or, the oxide semiconductor film 107a and the oxide semiconductor film 107c may have different compositions. . For example, as the oxide semiconductor film 107a, In:Ga:Zn = 1:3:2 in atomic ratio of I n-Ga-Zn oxide is used, and as the oxide semiconductor film 107c, In:Ga:Zn = 1:3 :4 or In-Ga-Zn oxide with an atomic ratio of 1:4:5 may be used.

[0124] The thicknesses of the oxide semiconductor film 107a and the oxide semiconductor film 107c are 3 nm or more and 100 nm or less, or 3 nm or more and 50 nm or less. The thickness of the oxide semiconductor film 107b is 3 nm or more and 200 nm or less, or 3 nm or more and 100 nm or less, or 3 nm or more and 50 nm or less is set. Note that by making the oxide semiconductor film 107a and the oxide semiconductor film 107c thinner than the oxide semiconductor film 107b respectively, the fluctuation amount of the threshold voltage of the transistor can be reduced .

[0125] The interfaces of the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c respectively can sometimes be observed using STEM (Scanning Transmission Electr on Microscopy).

[0126] For the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c , the crystal structure of the oxide semiconductor film 106 shown above can be appropriately used.

[0127] By providing the oxide semiconductor film 107a and the oxide semiconductor film 107c, which are less likely to have oxygen deficiency compared to the oxide semiconductor film 107b, in contact with the upper surface and the lower surface of the oxide semiconductor film 107b respectively , the oxygen deficiency in the oxide semiconductor film 107b can be reduced. Also, the oxide semiconductor film 107b has one or more of the metal elements constituting the oxide semiconductor film 107b ​​​ Since it is in contact with the oxide semiconductor film 107a and the oxide semiconductor film 107c, the interface state density at the interface between the oxide semiconductor film 10 7a and the oxide semiconductor film 107b, and at the interface between the oxide semiconductor film 107b and the oxide semiconductor film 10 7c is extremely low. Therefore, it is possible to reduce the oxygen deficiency contained in the oxide semiconductor film 107b.

[0128] In addition, when the oxide semiconductor film 107b is in contact with an insulating film having different constituent elements (for example, an insulating film containing a silicon oxide film ), interface states are formed, and these interface states may form a channel. In such a case, transistors with different threshold voltages may appear, and the apparent threshold voltage of the transistor may vary. However, since the oxide semiconductor film 107a containing one or more metal elements constituting the oxide semiconductor film 107b is in contact with the oxide semiconductor film 107b , it becomes difficult to form interface states at the interface between the oxide semiconductor film 107a and the oxide semiconductor film 107b. Therefore, by providing the oxide semiconductor film 107a, variations in electrical characteristics such as the threshold voltage of the transistor can be reduced. threshold voltage of the transistor can be reduced. Also, when a channel is formed at the interface between the insulating film 108 and the oxide semiconductor film 107b, interface scattering occurs at this interface, and the field-effect mobility of the transistor decreases. However,

[0129] since the oxide semiconductor film 107c containing one or more metal elements constituting the oxide semiconductor film 107b is provided in contact with the oxide semiconductor film 107b , carrier scattering hardly occurs at the interface between the oxide semiconductor film 107b and the oxide semiconductor film 107c, and the field-effect mobility of the transistor can be increased. can be increased. can be increased.

[0130] ​​In addition, the oxide semiconductor films 107a and 107c also function as barrier films for suppressing the formation of levels due to impurities caused by the constituent elements of the insulating films 104 and 108 or the constituent elements of the conductive films 110 and 112 being mixed into the oxide semiconductor film 107b. For example, in the case where the insulating films 104 and 108 are insulating films containing silicon or insulating films containing carbon, silicon in the insulating films 104 and 108 or carbon mixed into the insulating films 104 and 108 may be mixed into the oxide semiconductor films 107a and 107c from the interface up to about several nanometers. When impurities such as silicon and carbon enter the oxide semiconductor film 107b, impurity levels are formed, and the impurity levels may become donors and generate electrons, resulting in n-type conversion. However, if the film thicknesses of the oxide semiconductor films 107a and 107c are thicker than several nanometers, the mixed impurities such as silicon and carbon do not reach the oxide semiconductor film 107b, so the influence of the impurity levels is reduced. From the above, the transistor shown in this embodiment is a transistor with reduced variations in electrical characteristics such as threshold voltage.

[0131] A transistor having a structure different from that in FIG. 4 is shown in FIG. 5. FIGS. 5(A) to 5(C) show a top view and a cross-sectional view of the transistor 153 included in the semiconductor device. FIG. 5(A) is a top view of the transistor 153, and FIG. 5(B) is a cross-sectional view taken along line A-A' in FIG. 5(A).

[0132]

[0133]

[0134]

[0135] ) is a cross-sectional view between the dashed-dotted lines Y1 - Y2, and Fig. 5(C) is a cross-sectional view between the dashed-dotted lines X1 - X2.

[0136] As in the transistor 153 shown in Fig. 5, the oxide semiconductor film 106 may have a laminated structure of an oxide semiconductor film 107b in contact with the insulating film 104, and an oxide semiconductor film 107c in contact with the oxide semiconductor film 107b and the insulating film 108. Other configurations are the same as those of the transistor 150 and exhibit the same effects.

[0137] <Band Structure> Here, the band structures of the transistors shown in Figs. 4 and 5 will be described. Fig. 11(A) is the band structure of the transistor 153 shown in Fig. 4. For easy understanding, the energy (Ec) of the lower end of the conduction band of the insulating film 104, the oxide semiconductor film 107a, the oxide semiconductor film 107b, the oxide semiconductor film 107c, and the insulating film 108 is shown. Also, Fig. 11(B) is the band structure of the transistor 154 shown in Fig. 5. For easy understanding, the energy (Ec) of the lower end of the conduction band of the insulating film 104, the oxide semiconductor film 107b, the oxide semiconductor film 107c, and the insulating film 108 is shown.

[0138] As shown in Fig. 11(A), in the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c, the energy of the lower end of the conduction band changes continuously. This is also understood from the fact that the elements constituting the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c are common, and oxygen diffuses easily among them. Therefore, the oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107 ​​​​​​​​Although c is a laminate of films with different compositions, it can be said to be physically continuous.

[0139] Oxide semiconductor films laminated with a common main component are not simply laminated layer by layer but are continuously joined (here, a U-shaped well (U Shape Well) structure) is formed so that the energy at the lower end of the conduction band changes continuously between layers. That is, a laminated structure is formed so that there are no defect levels such as trap centers or recombination centers for the oxide semiconductor, or impurities that inhibit the flow of carriers, at the interface between each layer. If impurities are mixed between the layers of the laminated oxide semiconductor film, the continuity of the energy band is lost, and carriers disappear due to trapping or recombination at the interface. At the interface, there are no defect levels such as trap centers or recombination centers for the oxide semiconductor, or impurities that inhibit the flow of carriers. If impurities are mixed between the layers of the laminated oxide semiconductor film, the continuity of the energy band is lost, and carriers disappear due to trapping or recombination at the interface. If impurities are mixed between the layers of the laminated oxide semiconductor film, the continuity of the energy band is lost, and carriers disappear due to trapping or recombination at the interface. At the interface, carriers disappear due to trapping or recombination.

[0140] In addition, in FIG. 11(A), the case where the Ec of the oxide semiconductor film 107a and the oxide semiconductor film 107c is the same is shown, but they may be different from each other.

[0141] From FIG. 11(A), it can be seen that the oxide semiconductor film 107b becomes a well, and in the transistor 1 52, the channel is formed in the oxide semiconductor film 107b. The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c have a continuously changing energy at the lower end of the conduction band, so the channel of the U-shaped well structure can also be called an embedded channel. The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c have a continuously changing energy at the lower end of the conduction band, so the channel of the U-shaped well structure can also be called an embedded channel. The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c have a continuously changing energy at the lower end of the conduction band, so the channel of the U-shaped well structure can also be called an embedded channel. The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c have a continuously changing energy at the lower end of the conduction band, so the channel of the U-shaped well structure can also be called an embedded channel.

[0142] Also, as shown in FIG. 11(B), in the oxide semiconductor film 107b and the oxide semiconductor film 107 c, the energy at the lower end of the conduction band may change continuously.

[0143] As shown in Fig. 11(B), the oxide semiconductor film 107b serves as a well, and it can be seen that in transistor 1 53, the channel is formed in the oxide semiconductor film 107b.

[0144] The transistor 152 shown in Fig. 4 has the oxide semiconductor film 107a and the oxide semiconductor film 107c that contain at least one kind of metal element constituting the oxide semiconductor film 107b. Therefore, it is difficult to form interface levels at the interface between the oxide semiconductor film 107a and the oxide semiconductor film 107b, and at the interface between the oxide semiconductor film 1 07c and the oxide semiconductor film 107b. Thus, by providing the oxide semiconductor film 107a and the oxide semiconductor film 107c, variations and fluctuations in electrical characteristics such as the threshold voltage of the transistor can be reduced.

[0145] The transistor 153 shown in Fig. 5 has the oxide semiconductor film 107c that contains at least one kind of metal element constituting the oxide semiconductor film 107b. Therefore, it is difficult to form interface levels at the interface between the oxide semiconductor film 107c and the oxide semiconductor film 107b. Thus, by providing the oxide semiconductor film 107c, variations and fluctuations in electrical characteristics such as the threshold voltage of the transistor can be reduced.

[0146] <Configuration 4 of the semiconductor device> Next, another configuration of the semiconductor device will be described with reference to Fig. 6.

[0147] Top views and cross-sectional views of the transistor 154 included in the semiconductor device are shown in Figs. 6(A) to 6(D). Fig. 6(A) is a top view of the transistor 154, Figs. 6(B) and 6(D ) are cross-sectional views taken between the dashed-dotted line Y1 - Y2 in Fig. 6(A), and Fig. 6(C) is a cross-sectional view taken between the dashed-dotted line X1 - X2 in Fig. 6(A). ​

[0148] The transistor 154 shown in Fig. 6 is characterized by having a conductive film 120 overlapping with the oxide semiconductor film 106 via an insulating film 104. That is, the conductive film 120 functions as a gate electrode. Further, the transistor 154 is a transistor having a dual gate structure. The other configurations are the same as those of the transistor 150 and exhibit the same effects. By not connecting the conductive film 114 and the conductive film 120 and applying different potentials to them, the threshold voltage of the transistor 154 can be controlled. An example of the cross-sectional view in that case is shown in Fig. 6(D). Note that when the conductive film 114 and the conductive film 120 are not connected, a signal for turning the transistor on and off may be supplied to one of them, and a constant potential may be supplied to the other. Or, as shown in Fig. 6(B), by connecting the conductive film 114 and the conductive film 120 and applying the same potential, it is possible to reduce the variation in initial characteristics, suppress the deterioration in the -GBT (-Gate Bias -Temperature) stress test, and suppress the variation in the turn-on voltage of the on-current at different drain voltages. Also, since the region where carriers flow in the oxide semiconductor film 106 becomes larger in the film thickness direction, the amount of carrier movement increases. As a result, both the on-current of the transistor 154 increases and the field-effect mobility becomes higher. By setting the channel length of the transistor to less than 2.5 μm or 1.45 μm or more and 2.2 μm or less, the on-current can be further increased and the field-effect mobility can be enhanced. Note that the conductive film 120, the conductive film 110, and the conductive film 112 do not overlap with each other.

[0149] By not connecting the conductive film 114 and the conductive film 120 and applying different potentials to them, the threshold voltage of the transistor 154 can be controlled. An example of the cross-sectional view in that case is shown in Fig. 6(D). Note that when the conductive film 114 and the conductive film 120 are not connected, a signal for turning the transistor on and off may be supplied to one of them, and a constant potential may be supplied to the other. Or, as shown in Fig. 6(B), by connecting the conductive film 114 and the conductive film 120 and applying the same potential, it is possible to reduce the variation in initial characteristics, suppress the deterioration in the -GBT (-Gate Bias -Temperature) stress test, and suppress the variation in the turn-on voltage of the on-current at different drain voltages. Also, since the region where carriers flow in the oxide semiconductor film 106 becomes larger in the film thickness direction, the amount of carrier movement increases. As a result, both the on-current of the transistor 154 increases and the field-effect mobility becomes higher. By setting the channel length of the transistor to less than 2.5 μm or 1.45 μm or more and 2 .2 μm or less, the on-current can be further increased and the field-effect mobility can be enhanced. Note that the conductive film 120, the conductive film 110, and the conductive film 112 do not overlap with each other. Note that the conductive film 120, the conductive film 110, and the conductive film 112 do not overlap with each other. By setting the channel length of the transistor to less than 2.5 μm or 1.45 μm or more and 2 .2 μm or less, the on-current can be further increased and the field-effect mobility can be enhanced.

[0150] Note that the conductive film 120, the conductive film 110, and the conductive film 112 do not overlap with each other. may be used. An example in that case is shown in Fig. 39(A). When the conductive film 114 and the conductive film 120 are connected, it is possible to make it difficult for noise to enter from the conductive film 120.

[0151] Alternatively, the conductive film 120, the conductive film 110, and the conductive film 112 may overlap each other. An example in that case is shown in Fig. 39(B). When the conductive film 114 and the conductive film 120 are not connected and a certain potential is supplied to the conductive film 120, a potential can be supplied to the entire oxide semiconductor film 106.

[0152] <Fabrication method of semiconductor device 1> Next, a method for manufacturing the transistor 150 shown in Fig. 1 will be described with reference to Figs. 7 to 9.

[0153] The films (insulating film, oxide semiconductor film, conductive film, etc.) constituting the transistor 150 can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, or a pulsed laser deposition (PLD) method. Alternatively, they can be formed by a coating method or a printing method. Representative film formation methods include a sputtering method and a plasma chemical vapor deposition (PECVD) method, but a thermal CVD method may also be used. As an example of the thermal CVD method, an MOCVD (metalorganic chemical vapor deposition) method or an ALD (atomic layer deposition) method may be used.

[0154] In the thermal CVD method, the inside of the chamber is set to atmospheric pressure or reduced pressure, and a raw material gas and an oxidizing agent are simultaneously fed into the chamber and reacted near or on the substrate to deposit a film on the substrate. Thus, since the thermal CVD method is a film formation method that does not generate plasma, it has the advantage that defects are not generated due to plasma damage. ​

[0155] In addition, in the ALD method, the inside of the chamber is set at atmospheric pressure or reduced pressure, and the raw material gas for the reaction is sequentially introduced into the chamber, and film formation is performed by repeating the order of gas introduction. For example, , by switching each switching valve (also called a high-speed valve), two or more types of raw material gases are supplied to the chamber in sequence, and an inert gas (such as argon or nitrogen) is introduced simultaneously or afterwards with the first raw material gas so that the plurality of types of raw material gases do not mix, and then the second raw material gas is introduced. When an inert gas is introduced simultaneously, the inert gas becomes a carrier gas, and an inert gas may also be introduced simultaneously when the second raw material gas is introduced. Alternatively, instead of introducing an inert gas, after evacuating the first raw material gas by vacuum exhaust, the second raw material gas may be introduced. The first raw material gas adsorbs on the surface of the substrate to form the first single atomic layer, and reacts with the second raw material gas introduced later, so that the second single atomic layer is laminated on the first single atomic layer to form a thin film. By repeating this gas introduction sequence a plurality of times until the desired thickness is reached while controlling the gas introduction sequence, a thin film with excellent step coverage can be formed. Since the thickness of the thin film can be adjusted by the number of times the gas introduction sequence is repeated, precise film thickness adjustment is possible, which is suitable for manufacturing fine transistors.

[0156]

[0157] As shown in FIG. 7(C), an insulating film 104 is formed on a substrate 102.

[0157]

[0158] The insulating film 104 can be formed by appropriately using a sputtering method, a CVD method, a vapor deposition method, a pulsed laser deposition (PLD ) method, a printing method, a coating method, or the like. Also, an insulating After forming the film, oxygen can be added to the insulating film to form the insulating film 104. Ins Examples of the oxygen added to the insulating film include oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, etc. Further, examples of the addition method include ion doping method, ion implantation method, plasma treatment method, etc. Further, after forming a film for suppressing the desorption of oxygen on the insulating film, oxygen may be added to the insulating film through the film. Also, after forming a film for suppressing the desorption of oxygen on the insulating film, oxygen may be added to the insulating film through the film. Examples of the oxygen added to the insulating film include oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, etc. Further, examples of the addition method include ion doping method, ion implantation method, plasma treatment method, etc. Further, after forming a film for suppressing the desorption of oxygen on the insulating film, oxygen may be added to the insulating film through the film. Also, after forming a film for suppressing the desorption of oxygen on the insulating film, oxygen may be added to the insulating film through the film.

[0159] Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. 2 Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. 2 Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. 2 Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. 2 Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104. Further, the substrate placed in the vacuum-exhausted processing chamber of the plasma CVD apparatus is held at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower, and the raw material gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 Pa or lower, and high-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, or 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber. Under these conditions, a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 104.

[0160] Here, a method of adding oxygen to the insulating film through the film after forming a film for suppressing the desorption of oxygen on the insulating film will be described with reference to FIGS. 7(A) and 7(B). Here, a method of adding oxygen to the insulating film through the film after forming a film for suppressing the desorption of oxygen on the insulating film will be described with reference to FIGS. 7(A) and 7(B).

[0161] As shown in FIG. 7(A), an insulating film 103 is formed on a substrate 102.

[0162] Next, as shown in FIG. 7(B), a film 119 for suppressing the desorption of oxygen is formed on the insulating film 103. Next, oxygen 121 is added to the insulating film 103 through the film 119. Next, as shown in FIG. 7(B), a film 119 for suppressing the desorption of oxygen is formed on the insulating film 103. Next, oxygen 121 is added to the insulating film 103 through the film 119.

[0163] As the film 119 for suppressing the desorption of oxygen, a metal element selected from aluminum, chromium, tantalum, titanium, molybdenum, niobium, nickel, iron, cobalt, tungsten, an alloy containing the above-described metal element as a component, an alloy combining the above-described metal elements, a metal nitride having the above-described metal element, a metal oxide having the above-described metal element, a metal oxynitride having the above-described metal element, etc., a conductive material is used to form it. The thickness of the film 119 for suppressing the desorption of oxygen can be 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less.

[0164] As a method for adding oxygen 121 to the insulating film 103 through the film 119, there are an ion doping method, an ion implantation method, a plasma treatment method, etc. By providing the film 119 on the insulating film 103 and adding oxygen, the film 119 functions as a protective film that suppresses the desorption of oxygen from the insulating film 103. Therefore, more oxygen can be added to the insulating film 103.

[0165] Also, when introducing oxygen by plasma treatment, by exciting oxygen with microwaves and generating high-density oxygen plasma, the amount of oxygen introduced into the insulating film 103 can be increased.

[0166] After that, by removing the film 119, as shown in FIG. 7(C), an insulating film 104 with oxygen added on the substrate 102 can be formed. Note that when an insulating film 104 with sufficient oxygen added can be formed after film formation, the process of adding oxygen shown in FIG. 7(B) may not be performed.

[0167]

[0168] ​​​​​​​Next, as shown in FIG. 7(D), an oxide semiconductor film 106 is formed on the insulating film 104. Next, an insulating film 108 is formed on the insulating film 104 and the oxide semiconductor film 106.

[0169] The method for forming the oxide semiconductor film 106 will be described below. A sputtering ring method, a coating method, a pulsed laser deposition method, a laser ablation method, a thermal CVD method, etc. is used to form an oxide semiconductor film. Next, a mask is formed on the oxide semiconductor film by a lithography process, and then, by using the mask to etch a part of the oxide semiconductor film, as shown in FIG. 7 (D), the oxide semiconductor film 106 can be formed. After that, the mask is removed. Note that after etching a part of the oxide semiconductor film to form the oxide semiconductor film 106, a heat treatment may be performed.

[0170] Also, by using a printing method for the oxide semiconductor film 106, the element-isolated oxide semiconductor film 106 can be directly formed.

[0171] When forming an oxide semiconductor film by a sputtering method, a power supply device for generating plasma can be appropriately used, such as an RF power supply device, an AC power supply device, or a DC power supply device. Note that by using an AC power supply device or a DC power supply device, a CAAC-OS film can be formed It is possible. Also, when forming an oxide semiconductor film by a sputtering method using an RF power supply device, compared to forming an oxide semiconductor film by a sputtering method using an AC power supply device or a DC power supply device, forming an oxide semiconductor film by a sputtering method using an AC power supply device or a DC power supply device is preferable because the distribution of film thickness, the distribution of film composition, or the distribution of crystallinity becomes uniform. Yes.

[0172] The sputtering gas may be an inert gas (typically argon), oxygen, or a mixture of an inert gas and oxygen. In the case of a mixture of an inert gas and oxygen, it is preferable to increase the gas ratio of oxygen relative to the inert gas.

[0173] Also, the target may be appropriately selected according to the composition of the oxide semiconductor film to be formed. .

[0174] When forming an oxide semiconductor film, for example, when using the sputtering method, the substrate temperature is set to 150°C or higher and 750°C or lower, or 150°C or higher and 450°C or lower, or 200°C or higher and 350°C or lower, and the oxide semiconductor film is formed to form a CAAC-OS film. Also, by setting the substrate temperature to 25°C or higher and lower than 150°C, a microcrystalline oxide semiconductor film can be formed.

[0175] Also, in order to form the CAAC-OS film described later, it is preferable to apply the following conditions.

[0176] By suppressing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, or -100°C or lower is used.

[0177] Also, it is preferable to reduce the plasma damage during film formation by increasing the oxygen ratio in the film formation gas and optimizing the power. The oxygen ratio in the film formation gas is 30% by volume or higher, or 100% by volume.

[0178] ​​​​​​​​​​After forming the oxide semiconductor film, heat treatment may be performed to dehydrogenate or dehydrate the oxide semiconductor film. The temperature of the heat treatment is typically 150°C or higher and lower than the substrate distortion point, or 250°C or higher and 450°C or lower, or 300°C or higher and 450°C or lower.

[0179] The heat treatment is performed in an inert gas atmosphere containing a noble gas such as helium, neon, argon, xenon, krypton, or nitrogen. Alternatively, after heating in an inert gas atmosphere, it may be heated in an oxygen atmosphere. Note that it is preferable that the above inert atmosphere and oxygen atmosphere do not contain hydrogen, water, etc. The treatment time is 3 minutes or more and 24 hours or less.

[0180] For the heat treatment, an electric furnace, an RTA apparatus, etc. can be used. By using an RTA apparatus, heat treatment can be performed at a temperature equal to or higher than the substrate distortion point for a limited time. Therefore, the heat treatment time can be shortened.

[0181] By forming the film while heating the oxide semiconductor film, and further by performing heat treatment after forming the oxide semiconductor film, in the oxide semiconductor film, the hydrogen concentration obtained by secondary ion mass spectrometry is 5×10 atoms / cm 19 3 or less, or 1×10 19 atoms / c m 3 or less, 5×10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5×10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 or less. ​​​​

[0182] When forming an oxide semiconductor film, such as InGaZnO X (X>0) film using an ALD film-forming apparatus, In(CH 3 ) 3 gas and O 3 gas are sequentially introduced repeatedly to form an InO 2 layer. Then, Ga(CH 3 ) 3 gas and O 3 gas are introduced simultaneously to form a GaO layer After that, Zn(CH 3 ) 2 and O 3 gas are introduced simultaneously to form a ZnO layer. Note that the order of these layers is not limited to this example. Also, these gases can be mixed to form a mixed compound layer such as an InGaO 2 layer or an InZnO 2 layer, a GaInO layer, a ZnInO layer, a GaZnO layer, etc. In addition, instead of O gas, H 3 gas bubbled with an inert gas such as Ar 2 can be used, but it is preferable to use O gas without H. Also, instead of In(CH 3 ) 3 gas, In(C 3 ) 2 H 5 ) 3 gas can be used. Also, instead of Ga(CH 3 ) 3 gas Ga(C 2 H 5 ) 3 gas can be used. Also, Zn(CH 3 ) 2 gas can be used as well.

[0183] Here, after forming an oxide semiconductor film with a thickness of 35 nm by sputtering, heat Perform heat treatment to move the oxygen contained in the insulating film 104 to the oxide semiconductor film. Next, Form a mask on the oxide semiconductor film and selectively etch a part of the oxide semiconductor film to form the oxide semiconductor film 106.

[0184] Note that the heat treatment is performed at a temperature higher than 350°C and equal to or lower than 650°C, or at a temperature equal to or higher than 450°C and equal to or lower than 600°C so that the CAAC ratio described later is 60% or more and less than 100%, or 80% or more and less than 100%, or 90% or more and less than 100%, or 95% or more and 98% or less, and an oxide semiconductor film can be obtained. In addition, an oxide semiconductor film with a reduced content of hydrogen, water, etc. can be obtained. That is, an oxide semiconductor film with a low impurity concentration and a low density of defect levels can be formed.

[0185] For the insulating film 108, the formation method of the insulating film 104 can be appropriately used.

[0186] As the insulating film 108, a silicon oxide film or a silicon oxynitride film can be formed using the CVD method. In this case, as the source gas, it is preferable to use a depositable gas containing silicon and an oxidizing gas. Representative examples of the depositable gas containing silicon include silane, di silane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc.

[0187] Also, as the insulating film 108, the oxidizing gas with respect to the depositable gas is made greater than 20 times and less than 100 times, or 40 or more and 80 or less, and the pressure in the processing chamber is made less than 100 Pa, or 50 P a or less, and by using the CVD method, a silicon oxynitride film with a small amount of defects can be formed. ​

[0188] Also, as the insulating film 108, a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is held at 280°C or higher and 400°C or lower, and a source gas is introduced into the processing chamber. The pressure in the processing chamber is set to 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. By supplying high-frequency power to an electrode provided in the processing chamber, a dense silicon oxide film or silicon oxynitride film can be formed as the insulating film 108. Also, the insulating film 108 can be formed by using a plasma CVD method using microwaves. Microwaves refer to the frequency range from 300 MHz to 300 GHz. In microwaves, the electron temperature is low and the electron energy is small. Also, in the supplied power, the ratio used for accelerating electrons is small, and it is possible to use more for dissociation and ionization of molecules, and it is possible to excite a plasma with high density (high-density plasma). Therefore, plasma damage to the film-forming surface and the deposited material is small, and an insulating film 108 with few defects can be formed. Also, the insulating film 108 can be formed by using a CVD method using an organic silane gas. Examples of the organic silane gas include tetraethyl orthosilicate (TEOS: chemical formula Si(OC H )

[0189] , tetramethylsilane (TMS: chemical formula Si(CH ) ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH(OC H ), etc.

[0190] 2 H 5 ) 4 4 ) tetramethylsilane (TMS: chemical formula Si(CH 3 ) 4 ), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (SiH(OC H H 2 ), etc.5 ) 3 ) or a bird Dimethylaminosilane (SiH(N(CH 3 ) 2 ) 3 ) and other silicon-containing compounds can be used. By using the CVD method with organic silane gas, a highly coating insulating film 108 can be formed.

[0191] Also, when forming a gallium oxide film as the insulating film 108, it can be formed by using the MOCVD (Metal Organic Chemical Vapor Deposition) method.

[0192] Also, when forming a hafnium oxide film as the insulating film 108 by using a thermal CVD method such as the MOCVD method or the ALD method, a liquid containing a solvent and a hafnium precursor compound (haf nium alkoxide solution, typically tetrakis(dimethylamido)hafnium (TDMA H)) vaporized raw material gas and two types of gases, ozone (O ) as an oxidizing agent, are used. 3 ) Note that the chemical formula of tetrakis(dimethylamido)hafnium is Hf[N(CH 3 ) 2 4 is . Also, as other material liquids, there are tetrakis(ethylmethylamido)hafnium and the like.

[0193] Also, when forming an aluminum oxide film as the insulating film 108 by using a thermal CVD method such as the MOCVD method or the ALD method, a liquid containing a solvent and an aluminum precursor compound (such as trimethylaluminum TMA) vaporized raw material gas and H as an oxidizing agent 2 O ​Two types of gas are used. The chemical formula for trimethylaluminum is Al(CH 3 ) 3 Yes Other liquid materials include tris(dimethylamido)aluminum and triisobutyrate. Aluminum tris(2,2,6,6-tetramethyl-3,5-hepta) By forming the film using the ALD method, the coating rate is high and the film thickness is thin. It is possible to form a thin insulating film 108.

[0194] The insulating film 108 is formed by a thermal CVD method such as MOCVD or an ALD method. When forming a silicon film, hexachlorodisilane is adsorbed onto the surface to be formed, and the adsorbed material The chlorine contained in the gas is removed, and the oxidizing gas (O 2 , nitrous oxide) radicals to adsorb and react with.

[0195] Here, a silicon oxynitride film is formed as the insulating film 108 by the plasma CVD method. do.

[0196] Next, as shown in FIG. 8(A), a mask is formed on the insulating film 108 by a lithography process. After the formation of the insulating film 108, part of the insulating film 108 is etched so that part of the oxide semiconductor film 106 is exposed. An opening 140a and an opening 140b are formed.

[0197] The method for etching the insulating film 108 is a wet etching method or / and a dry etching method. The Ching method can be used as appropriate.

[0198] Next, as shown in FIG. 8B, a conductive film 1 is formed over the oxide semiconductor film 106 and the insulating film 108. Form 09.

[0199] When using, for example, a low-resistance material as the conductive film 109, if the low-resistance material is mixed into the oxide semiconductor film, the electrical characteristics of the transistor will deteriorate. In this embodiment, by forming the insulating film 108 before forming the conductive film 109, the channel of the oxide semiconductor film 106 does not come into contact with the conductive film 109, so the electrical characteristics of the transistor, typically the variation in the threshold voltage, can be suppressed. The conductive film 109 can be formed by using a sputtering method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, a thermal CVD method, or the like. Before forming the conductive film 109, the insulating film 108 is formed so that the channel of the oxide semiconductor film 106 does not contact the conductive film 109, thus suppressing the variation in the electrical characteristics of the transistor, typically the threshold voltage. The conductive film 109 can be formed by using a sputtering method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, a thermal CVD method, or the like. Also, a tungsten film can be formed as the conductive film 109 by a film-forming apparatus using ALD. In this case, WF gas and B H gas are sequentially introduced repeatedly to form an initial tungsten film, and then WF gas and H gas are introduced simultaneously to form a tungsten film. Note that SiH gas may be used instead of B H gas.

[0200] The conductive film 109 can be formed by using a sputtering method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, a thermal CVD method, or the like. Before forming the conductive film 109, the insulating film 108 is formed so that the channel of the oxide semiconductor film 106 does not contact the conductive film 109, thus suppressing the variation in the electrical characteristics of the transistor, typically the threshold voltage.

[0201] Also, a tungsten film can be formed as the conductive film 109 by a film-forming apparatus using ALD. In this case, WF gas and B H gas are sequentially introduced repeatedly to form an initial tungsten film, and then WF gas and H gas are introduced simultaneously to form a tungsten film. Note that SiH gas may be used instead of B H gas. When using, for example, a low-resistance material as the conductive film 109, if the low-resistance material is mixed into the oxide semiconductor film, the electrical characteristics of the transistor will deteriorate. In this embodiment, by forming the insulating film 108 before forming the conductive film 109, the channel of the oxide semiconductor film 106 does not come into contact with the conductive film 109, so the electrical characteristics of the transistor, typically the variation in the threshold voltage, can be suppressed. 6 gas and B 2 H 6 gas are sequentially introduced repeatedly to form an initial tungsten film, and then WF gas and H 6 gas are introduced simultaneously to form a tungsten film. Note that SiH 2 gas may be used instead of B H 2 gas. 6 gas may be used instead of B 4 H gas.

[0202] Next, as shown in FIG. 8(C), after forming the mask 111 on the conductive film 109 by a lithography process, the conductive film 109 is exposed to an etching solution or / and an etching gas 123 to form the conductive film 110, the conductive film 112, and the conductive film 114. Note that the conductive film 110, the conductive film 112, and the conductive film 114 are formed by processing the conductive film 109, so they have the same metal structure, in other words, they contain the same metal element. After forming the mask 111 on the conductive film 109 by a lithography process, the conductive film 109 is exposed to an etching solution or / and an etching gas 123 to form the conductive film 110, the conductive film 112, and the conductive film 114. Note that the conductive film 110, the conductive film 112, and the conductive film 114 are formed by processing the conductive film 109, so they have the same metal structure, in other words, they contain the same metal element. After forming the mask 111 on the conductive film 109 by a lithography process, the conductive film 109 is exposed to an etching solution or / and an etching gas 123 to form the conductive film 110, the conductive film 112, and the conductive film 114. Note that the conductive film 110, the conductive film 112, and the conductive film 114 are formed by processing the conductive film 109, so they have the same metal structure, in other words, they contain the same metal element. Since the conductive film 110, the conductive film 112, and the conductive film 114 are formed by processing the conductive film 109, they have the same metal structure, in other words, they contain the same metal element. Since the conductive film 110, the conductive film 112, and the conductive film 114 are formed by processing the conductive film 109, they have the same metal structure, in other words, they contain the same metal element.

[0203] The conductive film 109 is etched by a wet etching method or / and a dry etching method. After the conductive film 109 is etched, the insulating film 1 A cleaning step may be performed to remove residues on the sides of the gate electrode and the Therefore, leakage current between the conductive film 114 functioning as a conductive film and the oxide semiconductor film 106 can be reduced. It is Noh.

[0204] Note that the conductive films 110, 112, and 114 can be formed by the following method instead of the above method. It may be formed by electrolytic plating, printing, inkjet printing, or the like.

[0205] Next, as shown in FIG. 8D, the oxide semiconductor film 106 is treated with the mask 111. The impurity element 117 is added. As a result, the oxide semiconductor film covered with the mask 111 The impurity element 117 is added to the region where the oxide is not formed. Oxygen vacancies are formed in the semiconductor film.

[0206] The impurity element 117 can be added by ion doping, ion implantation, plasma In the case of plasma treatment, the plasma is heated in a gas atmosphere containing the impurity element to be added. Impurity elements can be added by generating a plasma and performing a plasma treatment. The plasma generating device may be a dry etching device or a plasma CVD device. A high-density plasma CVD apparatus or the like can be used.

[0207] The source gas for the impurity element 117 is B 2 H 6 , PH 3 , C.H. 4 , N 2 , N.H. 3 , AlH3 、AlCl 3 、SiH 4 、Si 2 H 6 、F 2 、HF、H 2 and one or more of noble gases can be used. Or, B diluted with noble gas H 2 H 6 、PH 3 、N 2 、NH 3 、 AlH 3 、AlCl 3 、F 2 、HF、and H 2 of one or more can be used. Diluted with noble gas B 2 H 6 、PH 3 、N 2 、NH 3 、AlH 3 、AlCl 3 、F 2 、HF、and H 2 By adding impurity element 117 to the oxide semiconductor film 106 using one or more of them, noble gas and one or more of hydrogen, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, and chlorine can be added to the oxide semiconductor film 106 simultaneously.

[0208] Or, after adding noble gas to the oxide semiconductor film 106, B 2 H 6 、PH 3 、CH 4 、N 2 、NH 3 、AlH 3 、AlCl 3 、SiH 4 、Si 2 H 6 、F 2 、HF、and H 2 of one or more can be added to the oxide semiconductor film 106.

[0209] Or, B 2 H 6 , PH 3 , CH 4 , N 2 , NH 3 , AlH 3 , AlCl 3 , SiH 4 , Si 2 H 6 , F 2 , HF, and H 2 of one or more are added to the oxide semiconductor film 106, and then dilute gas may be added to the oxide semiconductor film 106.

[0210] The addition of the impurity element 117 may be controlled by appropriately setting the implantation conditions such as the acceleration voltage and the dose amount. For example, when adding argon by the ion implantation method, the acceleration voltage is 10 kV and the dose amount is 1×10 ions / cm 13 or more and 1×10 2 ions / cm 16 or less, for example, 1×10 2 ions / cm will do, for example, 1×10 14 ions / cm 2 will do. Also, when adding phosphorus ions by the ion implantation method, the acceleration voltage is 30 kV and the dose amount is 1×10 ions / cm 13 or more and 5×10 2 ions / cm or less, for example, 1×10 16 ions / cm 2 will do, for example, 1×10 15 ions / c m 2 will do.

[0211] Here, a conceptual diagram of the region where the impurity element is added in the film thickness direction when the impurity element 117 is added to the oxide semiconductor film 106 is shown in FIGS. 10(A)(B)(C). FIG. 10(A) (B)(C) are enlarged views near the oxide semiconductor film 106. (B)(C) are enlarged views near the oxide semiconductor film 106.

[0212] As shown in FIG. 10(A), the addition region of the impurity element 117 may be formed in the insulating film 104, the oxide semiconductor film 106, and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 135 of the addition region is located in the insulating film 104. Here, the depth direction is parallel to the film thickness direction of the oxide semiconductor film 106 and is the direction from the insulating film 108 toward the insulating film 104. The addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 136 of the addition region is located at the interface between the insulating film 104 and the oxide semiconductor film 106. Or, as shown in FIG. 10(B), the addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 136 of the addition region is located at the interface between the insulating film 104 and the oxide semiconductor film 106. The addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 136 of the addition region is located at the interface between the insulating film 104 and the oxide semiconductor film 106. Here, the depth direction is parallel to the film thickness direction of the oxide semiconductor film 106 and is the direction from the insulating film 108 toward the insulating film 104.

[0213] Or, as shown in FIG. 10(C), the addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 137 of the addition region is located in the oxide semiconductor film 106. The addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 137 of the addition region is located in the oxide semiconductor film 106. Here, the depth direction is parallel to the film thickness direction of the oxide semiconductor film 106 and is the direction from the insulating film 108 toward the insulating film 104. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed.

[0214] Or, as shown in FIG. 10(C), the addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 137 of the addition region is located in the oxide semiconductor film 106. The addition region of the impurity element 117 may be formed in the oxide semiconductor film 106 and the insulating film 108. Note that in the depth direction of the region where the oxide semiconductor film 106 is exposed, the end portion 137 of the addition region is located in the oxide semiconductor film 106. Here, the depth direction is parallel to the film thickness direction of the oxide semiconductor film 106 and is the direction from the insulating film 108 toward the insulating film 104. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed.

[0215] As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed. As a result, a low-resistance region can be formed in the oxide semiconductor film 106. Specifically, the regions 106b and 106c shown in FIG. 2 can be formed. Note that since the region 106c is added to the oxide semiconductor film 106 through the insulating film 108, the concentration of the impurity element is lower than that of the region 106b. After that, as shown in FIG. 9(A), the mask 111 is removed.

[0216] Here, the impurity element 117 is added to the oxide semiconductor film 106 using the mask 111. However, after removing the mask 111, impurity element 117 may be added to the oxide semiconductor film 106 using the conductive film 110, the conductive film 112, and the conductive film 11 4 as a mask.

[0217] After that, heat treatment may be performed to further increase the conductivity of the region where the impurity element 117 is added. The temperature of the heat treatment is typically 150 °C or higher and less than the substrate distortion point, or 250 °C or higher and 450 °C or lower, or 300 °C or higher and 450 °C or lower.

[0218] Next, as shown in FIG. 9(B), an insulating film 116 is formed on the oxide semiconductor film 106, the insulating film 108, the conductive film 110 , the conductive film 112, and the conductive film 114, and an insulating film 118 is formed on the insulating film 116.

[0219] The insulating film 116 and the insulating film 118 can appropriately use the formation methods of the insulating film 104 and the insulating film 108.

[0220] Note that the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is maintained at 180 °C or higher and 280 °C or lower, or 200 °C or higher and 240 °C or lower, and a source gas is introduced into the processing chamber to make the pressure in the processing chamber 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 P a or lower, and high-frequency power of 0.17 W / cm 2 or higher and 0.5 W / cm 2 or lower , or 0.25 W / cm 2 or higher and 0.35 W / cm 2 or lower is supplied to the electrode provided in the processing chamber, and under these conditions , a silicon oxide film or a silicon oxynitride film capable of releasing oxygen by heat treatment can be formed as the insulating film 116.

[0221] Alternatively, over the oxide semiconductor film 106, the conductive film 110, the conductive film 112, and the conductive film 114, After forming an aluminum film or an aluminum oxide film, a heat treatment is performed to form the aluminum film. In the region 106b, oxygen contained in the oxide semiconductor film 106 is oxidized to an aluminum film or reacts with the aluminum oxide film to form an aluminum oxide film as the insulating film 116. In both cases, oxygen vacancies are formed in the region 106b in FIG. It is possible to increase the conductivity of 06b.

[0222] After that, a heat treatment is performed to further increase the conductivity of the region to which the impurity element 117 is added. The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, or 250° C. or lower. ℃ or higher and 450℃ or lower, or 300℃ or higher and 450℃ or lower.

[0223] Through the above steps, a transistor can be manufactured.

[0224] <Method 2 for manufacturing semiconductor device> A method for manufacturing the transistor 151 shown in FIG. The conductive film 110, the conductive film 112, and the conductive film 110c included in the conductive film 114 of 151, and forming the conductive film 112c and the conductive film 114c, and adding an impurity element 1 to the oxide semiconductor film 106. The step of adding 17 will now be described.

[0225] 7 and 8(A) to 8(C), an insulating film 104 and an oxide film 105 are formed on a substrate 102. The semiconductor film 106, the insulating film 108, the conductive film 110, the conductive film 112, the conductive film 114, and the Form Sq 111.

[0226] Next, as shown in FIG. 8D, an impurity element 117 is added to the oxide semiconductor film 106. 。

[0227] Next, the mask 111 is removed.

[0228] Next, the conductive films 110b included in the conductive films 110, 112, and 114 respectively b, the conductive film 112b, and the conductive film 114b are exposed to plasma generated in a reducing atmosphere to reduce the oxides on the surfaces of the conductive films 110b, 112b, and 114b. Next, while heating at 200°C or higher and 400°C or lower, the conductive films 110b, 112b, and the conductive film 114b are exposed to silane. Next, the conductive films 110b, 112b, and 114b are exposed to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, so that the conductive films 110c, 112c, and 114c are formed as CuSi N x N y (x > 0, y > 0) can be formed.

[0229] Note that when exposing to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, since the oxide semiconductor film 106 is exposed to the plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, it is possible to add nitrogen or / and hydrogen to the oxide semiconductor film 106. Note that when exposing to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, since the oxide semiconductor film 106 is exposed to the plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, it is possible to add nitrogen or / and hydrogen to the oxide semiconductor film 106. Note that when exposing to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, since the oxide semiconductor film 106 is exposed to the plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, it is possible to add nitrogen or / and hydrogen to the oxide semiconductor film 106. is possible.

[0230] Note that before adding the impurity element 117 to the oxide semiconductor film 106, the mask 111 is removed and the conductive films 110c, 112c, and 114c included in the conductive films 110, 112, and 114 may be formed. and the conductive films 110c, 112c, and 114c included in the conductive films 110, 112, and 114 may be formed.

[0231] After this, the transistor 151 can be manufactured through the process of FIG. 9(B).

[0232] The transistor shown in this embodiment includes a conductive film 110, a conductive film 112, and a conductive film 114 Since they do not overlap, the parasitic capacitance can be reduced, and the on-current is large. Also, The transistor shown in this embodiment can stably form a low-resistance region. Therefore, compared with the conventional case, the on-current is improved, and the variation in the electrical characteristics of the transistor is reduced.

[0233] In this embodiment, an example in which an oxide semiconductor film is used in a channel or the like has been shown. However, one aspect of the embodiment of the present invention is not limited to this. For example, in a channel or in the vicinity thereof, a source region, a drain region, etc., depending on the case or situation, it may be formed of a material containing Si (silicon), Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), etc.

[0234] As described above, the configurations and methods shown in this embodiment can be appropriately combined with the configurations and methods shown in other embodiments and used.

[0235] (Embodiment 2) In this embodiment, one form of a semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIGS. 12 to 2 2. Note that, compared with Embodiment 1, this embodiment has a different method for manufacturing a low-resistance region.

[0236] <Configuration 5 of semiconductor device> FIG. 12 shows a top-gate structure transistor as an example of a transistor included in a semiconductor device.

[0237] FIGS. 12(A) to 12(C) show a top view of a transistor 190 included in a semiconductor device and ​​​​and a cross-sectional view are shown. FIG. 12(A) is a top view of the transistor 190, and FIG. 12(B) is a cross-sectional view taken between the dashed-dotted lines Y1 - Y2 in FIG. 12(A), and FIG. 12(C) is a cross-sectional view taken between the dashed-dotted lines X1 - X2 in FIG. 12(A).

[0238] The transistor 190 shown in FIG. 12 includes an oxide semiconductor film 166 on an insulating film 164 formed on a substrate 162, an insulating film 168 in contact with the oxide semiconductor film 166, a conductive film 170 in contact with the oxide semiconductor film 166 at a part of the opening 180a of the insulating film 168, a conductive film 172 in contact with the oxide semiconductor film 166 at a part of the opening 180b of the insulating film 168, and a conductive film 174 overlapping the oxide semiconductor film 166 via the insulating film 168. Note that an insulating film 176 is provided on the transistor 190. Further, an insulating film 178 may be provided on the insulating film 176.

[0239] In the oxide semiconductor film 166, regions that do not overlap with the conductive film 170, the conductive film 172, and the conductive film 174 have elements that form oxygen vacancies. Hereinafter, elements that form oxygen vacancies will be described as impurity elements. Representative examples of impurity elements include hydrogen, noble gas elements, etc. Representative examples of noble gas elements include helium, neon, argon, krypton, and xenon. Further, boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, chlorine, etc. may be included in the oxide semiconductor film 166 as impurity elements.

[0240] Further, the insulating film 176 is a film containing hydrogen, and typically a nitride insulating film. When the insulating film 176 is in contact with the oxide semiconductor film 166, hydrogen contained in the insulating film 176 enters the oxide semiconductor film 166. ​​​​​​​​​​​​​It diffuses into the body film 166. As a result, in the region of the oxide semiconductor film 166 that is in contact with the insulating film 176, a large amount of hydrogen is contained.

[0241] When a noble gas element is added to the oxide semiconductor film as an impurity element, the bond between the metal element and oxygen in the oxide semiconductor film is broken, and oxygen vacancies are formed. Due to the interaction between the oxygen vacancies and hydrogen contained in the oxide semiconductor film, the conductivity of the oxide semiconductor film increases. Specifically, when hydrogen enters the oxygen vacancies contained in the oxide semiconductor film, carriers, i.e., electrons, are generated. As a result, the conductivity increases.

[0242] Here, an enlarged view of the vicinity of the oxide semiconductor film 166 is shown in FIG. 13. As shown in FIG. 13, the oxide semiconductor film 166 has a region 166a in contact with the conductive film 170 or the conductive film 172, a region 166b in contact with the insulating film 176, and regions 166c and 166d overlapping with the insulating film 168.

[0243] Region 166a functions as a source region and a drain region. The region 166a in contact with the conductive film 170 and the conductive film 172 has increased conductivity, similar to the region 106a shown in Embodiment 1, and functions as a source region and a drain region.

[0244] Regions 166b and 166c function as low-resistance regions. Regions 166b and 166c contain at least a noble gas and hydrogen as impurity elements. Note that the impurity element concentration in region 166b is higher than that in region 166c. Also, when the side surface of the conductive film 174 has a tapered shape, a part of region 166c may overlap with the conductive film 174.

[0245] In the case where the oxide semiconductor film 166 is formed by a sputtering method, the regions 166a to 166c are 66d each contain a rare gas element, and compared to region 166a and region 166d, regions The regions 166b and 166c have higher concentrations of the rare gas element. When 66 is formed by sputtering, a rare gas is used as the sputtering gas. Therefore, a rare gas is contained in the oxide semiconductor film 166 and the regions 166b and 166c are not included in the oxide semiconductor film 166. In c, rare gases are intentionally added to form oxygen vacancies. In addition, the regions 166b and 166c are different from the regions 166a and 166d. A rare gas element may be added.

[0246] In addition, in the regions 166b and 166c, the amount of oxygen vacancies is greater than the amount of hydrogen. In this case, the carrier density in the regions 166b and 166c can be controlled by controlling the amount of hydrogen. Alternatively, the amount of oxygen vacancies in the regions 166b and 166c can be controlled. When the amount of hydrogen is relatively large, the amount of oxygen vacancies in the regions 166b and 16 The carrier density of the region 166b and the region 166c can be controlled. Carrier density 5×10 18 pieces / cm 3 More than 1×10 19 pieces / cm 3 That's all. More preferably, 1×10 20 pieces / cm 3 By setting the above, the channel, source region, and drain It is possible to fabricate transistors with small resistance between the drain region and the gate, and large on-state current. It is.

[0247] In addition, since the region 166b is in contact with the insulating film 176, it is smaller than the regions 166a and 166d. In comparison, the concentration of hydrogen is higher in region 166b. Also, when hydrogen diffuses from region 166b to region 166c, region 166c has a higher hydrogen concentration compared to regions 166a and 166d. However, the hydrogen concentration in region 166b is higher than that in region 166c. When hydrogen diffuses from region 166b to region 166c, region 166c has a higher hydrogen concentration compared to regions 166a and 166d. However, the hydrogen concentration in region 166b is higher than that in region 166c. When hydrogen diffuses from region 166b to region 166c, region 166c has a higher hydrogen concentration compared to regions 166a and 166d. However, the hydrogen concentration in region 166b is higher than that in region 166c.

[0248] In regions 166b and 166c, the concentration of hydrogen obtained by secondary ion mass spectrometry can be 8×10 atoms / cm 19 atoms / cm 3 or more, or 1×10 20 atoms / cm 3 or more, or 5×10 20 atoms / cm 3 or more. Note that the hydrogen concentration obtained by secondary ion mass spectrometry in regions 16 6a and 166d can be 5×10 19 atoms / cm 3 or less, or 1×10 19 atoms / cm 3 or less, or 5×10 18 atoms / cm 3 or less, or 1×10 18 atoms / cm 3 or less, or 5× 10 17 atoms / cm 3 or less, or 1×10 16 atoms / cm 3 or less. That is possible.

[0249] Also, when boron, carbon, nitrogen, fluorine, aluminum, silicon, phosphorus, or chlorine is added to the oxide semiconductor film 166 as an impurity element, the impurity element is present only in regions 166b and 166 c. Therefore, compared to regions 166a and 166d, the regions 166b and 166c have the impurity element. Regions 166b and 166c have a higher concentration of impurity elements. Note that in regions 166b and region 166c, the concentration of impurity elements obtained by secondary ion mass spectrometry is 5×1 0 18 atoms / cm 3 or more and 1×10 22 atoms / cm 3 or less, or 1×10 1 9 atoms / cm 3 or more and 1×10 21 atoms / cm 3 or less, or 5×10 19 a toms / cm 3 or more and 5×10 20 atoms / cm 3 or less can be set.

[0250] Compared with region 166d, regions 166b and 166c have a higher hydrogen concentration and a larger amount of oxygen deficiency due to the addition of noble gas elements. Therefore, the conductivity increases and it functions as a low-resistance region. Typically, the resistivity of regions 166b and 166c can be 1×10 -3 Ωcm or more and less than 1×10 4 Ωcm, or 1×10 -3 Ωcm or more and less than 1×10 -1 Ωcm. can be satisfied.

[0251] Note that in regions 166b and 166c, the amount of hydrogen is the same as or less than the amount of oxygen deficiency, and hydrogen is easily trapped by oxygen deficiency and does not easily diffuse into region 166d which is the channel. As a result, a normally-off characteristic transistor can be fabricated.

[0252] Region 166d functions as a channel.

[0253] In the insulating film 168, the region overlapping with the oxide semiconductor film 166 and the conductive film 174 functions as a gate. In the insulating film 168, the region where the oxide semiconductor film 166 overlaps with the conductive films 170 and 172 functions as an interlayer insulating film.

[0254] The conductive films 170 and 172 function as source electrodes and drain electrodes. Also, the conductive film 174 functions as a gate electrode.

[0255] The transistor 190 shown in this embodiment has a low-resistance region 166b and a region 166c that function as a low-resistance region between a region 166d that functions as a channel and a region 166a that functions as a source region and a drain region. It is possible to reduce the resistance between the channel and the source region and the drain region, and the transistor 190 has a large on-current and a high field-effect mobility. Also, in the manufacturing process of the transistor 190, the conductive film 17 4 that functions as a gate electrode and the conductive films 170 and 172 that function as source electrodes and drain electrodes are formed simultaneously. For this reason, in the transistor 190, the conductive film 174 does not overlap with the conductive films 17 0 and 172, and it is possible to reduce the parasitic capacitance between the conductive film 174 and the conductive films 170 and 172. As a result, when a large-area substrate is used as the substrate 162, it is possible to reduce the signal delay in the conductive films 170, 172, and 174.

[0256] Also, in the transistor 190, the conductive films 170, 172, and 174 are formed simultaneously. For this reason, in the transistor 190, the conductive film 174 does not overlap with the conductive films 17 0 and 172, and it is possible to reduce the parasitic capacitance between the conductive film 174 and the conductive films 170 and 172. As a result, when a large-area substrate is used as the substrate 162, it is possible to reduce the signal delay in the conductive films 170, 172, and 174. 0 and 172, and it is possible to reduce the parasitic capacitance between the conductive film 174 and the conductive films 170 and 172. As a result, when a large-area substrate is used as the substrate 162, it is possible to reduce the signal delay in the conductive films 170, 172, and 174. are formed simultaneously. For this reason, in the transistor 190, the conductive film 174 does not overlap with the conductive films 17 0 and 172, and it is possible to reduce the parasitic capacitance between the conductive film 174 and the conductive films 170 and 172. As a result, when a large-area substrate is used as the substrate 162, it is possible to reduce the signal delay in the conductive films 170, 172, and 174. is possible.

[0257] Also, in the transistor 190, the conductive films 170, 172, and 174 A rare gas element is added to the oxide semiconductor film 166 using the mask, whereby Furthermore, a region having oxygen vacancies is formed in contact with the insulating film 176 containing hydrogen. Therefore, hydrogen contained in the insulating film 176 diffuses into the region having oxygen vacancies, resulting in a low resistance That is, a low resistance region can be formed in a self-aligned manner.

[0258] In addition, in the transistor described in this embodiment, a rare gas is added to the regions 166b and 166c. By adding hydrogen, oxygen vacancies are formed and hydrogen is added. It is possible to increase the conductivity in the regions 166b and 166c, and to It is possible to reduce the variation in conductivity of the region 166b and the region 166c for each sensor. That is, by adding a rare gas and hydrogen to the region 166b and the region 166c, The conductivity of 166b and region 166c can be controlled.

[0259] The configuration shown in FIG. 12 will be described in detail below.

[0260] As the substrate 162, the substrate 102 described in Embodiment 1 can be used as appropriate.

[0261] The insulating film 164 can be formed using any of the materials for the insulating film 104 in Embodiment 1. can be done.

[0262] The oxide semiconductor film 166 can be formed using the material shown in the oxide semiconductor film 106 in Embodiment 1. and structures can be used as appropriate.

[0263] The insulating film 168 can be formed using any of the materials for the insulating film 118 in Embodiment 1. can be done.

[0264] As the conductive films 170, 172, and 174, the materials shown for the conductive films 110, 112, and 114 shown in Embodiment 1 can be appropriately used.

[0265] The insulating film 176 is a film containing hydrogen, and typically there is a nitride insulating film. As the nitride insulating film it can be formed using silicon nitride, aluminum nitride, or the like.

[0266] As the insulating film 178, the materials shown for the insulating film 118 shown in Embodiment 1 can be appropriately used as well.

[0267] <Configuration 6 of the semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIG. 14.

[0268] FIGS. 14(A) to 14(C) show a top view and a cross-sectional view of the transistor 191 included in the semiconductor device. FIG. 14(A) is a top view of the transistor 191, and FIG. 14(B) is a cross-sectional view between the dashed-dotted line Y1 - Y2 in FIG. 14(A), and FIG. 14(C) is a cross-sectional view between the dashed-dotted line X1 - X2 in FIG. 14(A).

[0269] The transistor 191 shown in FIG. 14 is characterized in that the conductive films 170, 172, and 174 each have a three-layer structure. Also, the insulating film 164 is characterized in that it has a laminated structure of a nitride insulating film 1 64a and an oxide insulating film 164b. Other configurations are the same as those of the transistor 190 and exhibit the same effects.

[0270] First, the conductive films 170, 172, and 174 will be described.

[0271] The conductive film 170 has the conductive film 170a, the conductive film 170b, and the conductive film 170c laminated in this order. Moreover, the conductive films 170a and 170c cover the surface of the conductive film 170b. That is, the conductive films 170a and 170c function as protective films for the conductive film 170b. Function.

[0272] Similar to the conductive film 170, the conductive film 172 has the conductive film 172a, the conductive film 172b, and the conductive film 172c laminated in this order, and the conductive films 172a and 172c cover the surface of the conductive film 172b.

[0273] Similar to the conductive film 170, the conductive film 174 has the conductive film 174a, the conductive film 174b, and the conductive film 174c laminated in this order, and the conductive films 174a and 174c cover the surface of the conductive film 174b.

[0274] As the conductive films 170a, 172a, and 174a, similar to the conductive films 110a, 112a, and 114a shown in Embodiment 1, materials that prevent the metal elements contained in the conductive films 170b, 172b, and 174b from diffusing into the oxide semiconductor film 166 can be appropriately used. As the conductive films 170b, 172b, and 174b, similar to the conductive films 110b, 112b, and 114b shown in Embodiment 1, low-resistance materials can be appropriately used. membrane 172b, and conductive film 174b can be appropriately used. To prevent.

[0275] As the conductive films 170b, 172b, and 174b, similar to the conductive films 110b, 112b, and 114b shown in Embodiment 1, low-resistance materials can be appropriately used. Can be used.

[0276] As the conductive films 170c, 172c, and 174c, similar to the conductive films 110c, 112c, and 114c shown in Embodiment 1, the conductive films 170b, 172b, and 174b can be appropriately used. The conductive film 172b and the conductive film 174b are formed using a film in which the metal elements contained therein are passivated. As a result, the conductive film 170b, the conductive film 172b, and the conductive film 174b The metal element contained in the insulating film 176 moves to the oxide semiconductor film 166 in the process of forming the insulating film 176. This can prevent the following from happening:

[0277] Next, the insulating film 164 in which the nitride insulating film 164a and the oxide insulating film 164b are stacked is I will explain it below.

[0278] The nitride insulating film 164a and the oxide insulating film 164b can be formed by the same method as those described in Embodiment 1. The materials shown in the nitride insulating film 104a and the oxide insulating film 104b can be used as appropriate. .

[0279] <Configuration 7 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIGS.

[0280] 15A to 15C are top views and 15A is a top view of a transistor 192, and FIG. 15(A) is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 15(A), and FIG. 15(C) is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 1 is a cross-sectional view taken along dashed line X1-X2.

[0281] The transistor 192 illustrated in FIG. 15 is characterized in that the oxide semiconductor film 166 has a multilayer structure. Specifically, the oxide semiconductor film 166 is in contact with the insulating film 164. 167a, an oxide semiconductor film 167b in contact with the oxide semiconductor film 167a, and an oxide semiconductor The acid in contact with the film 167b, the conductive film 170, the conductive film 172, the insulating film 168, and the insulating film 176 The other configurations are similar to those of the transistor 190. It has a similar effect.

[0282] The oxide semiconductor films 167a, 167b, and 167c are The oxide semiconductor film 107a, the oxide semiconductor film 107b, and the oxide semiconductor film 107c, which are described in Embodiment 1, The material and crystal structure shown in the compound semiconductor film 107c can be used appropriately.

[0283] The oxide semiconductor films 167a and 167b are less likely to have oxygen vacancies than the oxide semiconductor films 167a and 167b. The oxide semiconductor film 167c is provided in contact with the upper surface and the lower surface of the oxide semiconductor film 167b. By this, oxygen vacancies in the oxide semiconductor film 167b can be reduced. The oxide semiconductor film 167b includes one or more metal elements constituting the oxide semiconductor film 167b. Since the oxide semiconductor film 167a and the oxide semiconductor film 167c are in contact with each other, 7a and the oxide semiconductor film 167b, and the interface between the oxide semiconductor film 167b and the oxide semiconductor film 16 The interface state density at the interface with the oxide semiconductor film 167b is extremely low. It is possible to reduce the oxygen vacancies contained therein.

[0284] In addition, by providing the oxide semiconductor film 167a, the threshold voltage of the transistor and the like can be reduced. It is possible to reduce the variation in electrical characteristics.

[0285] In addition, the oxide semiconductor film 167b includes one or more metal elements. Since the oxide semiconductor film 7c is provided in contact with the oxide semiconductor film 167b, the oxide semiconductor film 167b and the oxide At the interface with the semiconductor film 167c, carrier scattering is unlikely to occur, and the field effect of the transistor is The resultant mobility can be increased.

[0286] The oxide semiconductor film 167a and the oxide semiconductor film 167c are formed between the insulating film 164 and the insulating The constituent elements of the film 168 or the conductive films 170 and 172 are oxide semiconductor films. It acts as a barrier film to prevent impurities from entering 167b and forming levels due to impurities. It also works.

[0287] From the above, the transistor described in this embodiment has the following electrical characteristics, such as a threshold voltage: This is a transistor with reduced variation.

[0288] FIG. 16 shows a transistor having a different structure from that shown in FIG.

[0289] 16A to 16C are top views and 16A is a top view of a transistor 193, and FIG. 16(A) is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 16(A), and FIG. 16(C) is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 1 is a cross-sectional view taken along dashed line X1-X2.

[0290] In a transistor 193 illustrated in FIG. 16 , an oxide semiconductor film 166 is The oxide semiconductor film 167b is in contact with the insulating film 168. The other configuration may be the same as that of the transistor 19. It is the same as 0 and has the same effect.

[0291] <Configuration 8 of Semiconductor Device> Next, another configuration of the semiconductor device will be described with reference to FIG.

[0292] 17A to 17C are top views and and a cross-sectional view are shown. FIG. 17(A) is a top view of the transistor 194, and FIG. 17(B) is a cross-sectional view between the dashed-dotted lines Y1 - Y2 in FIG. 17(A), and FIG. 17(C) is a cross-sectional view between the dashed-dotted lines X1 - X2 in FIG. 17(A).

[0293] The transistor 194 shown in FIG. 17 is characterized by having a conductive film 181 that overlaps with the oxide semiconductor film 166 via the insulating film 164. That is, the conductive film 181 functions as a gate electrode. Also, the transistor 194 is a transistor with a dual gate structure.

[0294] By applying different potentials without connecting the conductive film 174 and the conductive film 181, the threshold voltage of the transistor 194 can be controlled. Or, as shown in FIG. 17(B), by connecting the conductive film 174 and the conductive film 181 via the opening 183 and applying the same potential, it is possible to reduce the variation in initial characteristics, suppress the deterioration in the -GBT stress test, and suppress the variation in the turn-on voltage of the on-current at different drain voltages. Also, since the region where carriers flow in the oxide semiconductor film 166 becomes larger in the film thickness direction, the amount of carrier movement increases. As a result, both the on-current of the transistor 194 increases and the field-effect mobility becomes higher. By setting the channel length of the transistor to less than 2.5 μm or between 1.45 μm and 2.2 μm, the on-current can be further increased and the field-effect mobility can be enhanced.

[0295] <Configuration 9 of the semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIGS. 25 and 26.

[0296] ​​​​​​​​​​​​Figures 25(A) to 25(C) show a top view of transistor 150A included in the semiconductor device. And a cross-sectional view. Fig. 25(A) is a top view of transistor 150A, and Fig. 25(B) is a cross-sectional view taken between the dashed-dotted line Y1 - Y2 in Fig. 25(A), and Fig. 25(C) is a cross-sectional view taken between the dashed-dotted line X1 - X2 in Fig. 25(A ). Also, Figs. 26(A) to 26(C) show a top view and a cross-sectional view of transistor 190A included in the semiconductor device. Fig. 26(A) is a top view of transistor 190A, and Fig. 26(B) is a cross-sectional view taken between the dashed-dotted line Y1 - Y2 in Fig. 26(A), and Fig. 26(C) is a cross-sectional view taken between the dashed-dotted line X1 - X2 in Fig. 26(A ). is a cross-sectional view taken between the dashed-dotted line Y1 - Y2 in Fig. 26(A), and Fig. 26(C) is a cross-sectional view taken between the dashed-dotted line X1 - X2 in Fig. 26(A ).

[0297] Transistor 150A shown in Fig. 25 is a modified example of transistor 150 shown in Fig. 1 and is different from the shape of the insulating film 108 that transistor 150 has. In transistor 150A shown in Fig. 25 , the insulating film 108 is configured to be separated into island shapes. Other configurations are the same as those of transistor 150 and exhibit the same effects.

[0298] Transistor 190A shown in Fig. 26 is a modified example of transistor 190 shown in Fig. 12 and is different from the shape of the insulating film 168 that transistor 190 has. In transistor 190A shown in Fig. 26 , the insulating film 168 is configured to be separated into island shapes. Other configurations are the same as those of transistor 190 and exhibit the same effects.

[0299] By separating the insulating film 108 into island shapes, the contact area between the oxide semiconductor film 106, the conductive film 110, and the conductive film 112 can be increased. Therefore, between the oxide semiconductor film 106 and the conductive The contact resistance between the electroconductive film 110 and the conductive film 112 can be reduced. Or, by separating the insulating film 16 8 into island shapes, the contact area between the oxide semiconductor film 166 and the conductive films 170 and 172 can be increased. Therefore, the contact resistance between the oxide semiconductor film 166 and the conductive films 170 and 172 can be reduced. Note that, like the transistor 1 50 shown in FIG. 1 or the transistor 190 shown in FIG. 12, when a structure in which the insulating film 108 or the insulating film 168 is not separated into island shapes is used, the outer peripheral portion of the oxide semiconductor film 106 or the oxide semiconductor film 16 6 can be covered with the insulating film 108 or the insulating film 168. In the case of this structure, it is preferable because impurities that can enter the oxide semiconductor film 106 or the oxide semiconductor film 166 can be suppressed. Note that when the insulating film 108 is not separated into island shapes, the conductive film 114 that functions as a gate electrode, the conductive film 110 that functions as a source electrode, and the conductive film 112 that functions as a drain electrode are formed such that at least a part of them is on the same plane. Also, when the insulating film 168 is not separated into island shapes, the conductive film 174 that functions as a gate electrode, the conductive film 170 that functions as a source electrode, and the conductive film 172 that functions as a drain electrode are formed such that at least a part of them is on the same plane.

[0300]

[0301] <Configuration 10 of the semiconductor device> Next, another configuration of the semiconductor device will be described with reference to FIG. 38.

[0301] FIG. 38(A) shows a cross-sectional view of a transistor 190B included in a semiconductor device. FIG. 38(B) shows a conceptual diagram in the film thickness direction when an impurity element is added to the oxide semiconductor film 166. Note that the top view and the channel width of the transistor 190B shown in FIG. 38(A) are not shown. The cross-sectional views in the direction are shown in FIG. 12(A) and FIG. 12(B). Since this is similar to the cross-sectional view, the explanation will be omitted here.

[0302] The transistor 190B shown in FIG. 38(A) is a modification of the transistor 190 shown in FIG. For example, the conductive film 170, the conductive film 172, and the conductive film 174 of the transistor 190 are The structure of the transistor 190B shown in FIG. 90 has insulating films 168, 176, and 178. In the transistor 190B illustrated in FIG. 38(A), the conductive film 170, the conductive film 172, and The conductive film 174 has a two-layer laminate structure, and the insulating film 168, the insulating film 176, and the insulating The edge of the insulating film 178 has a curvature. It is the same as 0 and has the same effect.

[0303] The conductive film 170 has a laminated structure of a conductive film 170d and a conductive film 170e. , a conductive film 172d and a conductive film 172e are laminated together, and the conductive film 174 is a conductive film 174d The conductive film 170d, the conductive film 174d, and the conductive film 174e are stacked. Examples of 2d include tantalum nitride, titanium nitride, molybdenum nitride, and tungsten nitride. A metal nitride film such as the above can be used.

[0304] The conductive films 170e, 172e, and 174e are made of a low-resistance metal material. The low resistance metal material can be, for example, aluminum, copper, The conductive film 170e, the conductive film 172e, and the conductive film 174e may be made of silver. In addition to the above low-resistance metal material, tungsten or molybdenum may also be used.

[0305] Further, in the conductive film 170, the end portion of the conductive film 170d protrudes outward more than the conductive film 170e. Also, in the conductive film 172, the end portion of the conductive film 172d protrudes outward more than the conductive film 172e. Also, in the conductive film 174, the end portion of the conductive film 174d protrudes outward more than the conductive film 174e. Thus, the shapes of the conductive film 170, the conductive film 172, and the conductive film 174 can be a two-layer laminated structure, and the lower conductive film can have a protruding shape. By making the lower conductive film have a protruding shape, when adding impurities, the lower conductive film may be able to suppress the passage of impurities. When the lower conductive film has a protruding shape, when adding impurities, the lower conductive film may be able to suppress the passage of impurities.

[0306] Further, as a processing method of the conductive film 170, the conductive film 172, and the conductive film 174, for example, a dry etching method can be mentioned. When processing the conductive film 170, the conductive film 172, and the conductive film 174 using the dry etching method, a part of the end portion of the insulating film 168 may be scraped off, and the shape of the end portion may become a shape having a curvature. Also, when the shape of the end portion of the insulating film 168 becomes a shape having a curvature, the shapes of the insulating film 176 and the insulating film 178 formed above the insulating film 168 may also have a curvature at a part of the end portion due to the influence of the insulating film 168. When the shape of the end portion of the insulating film 168 becomes a shape having a curvature, the shapes of the insulating film 176 and the insulating film 178 formed above the insulating film 168 may also have a curvature at a part of the end portion due to the influence of the insulating film 168. When the shape of the end portion of the insulating film 168 has a curvature, the shapes of the insulating film 176 and the insulating film 178 formed above the insulating film 168 may also have a curvature at a part of the end portion due to the influence of the insulating film 168.

[0307] Next, with reference to FIG. 38(B), a conceptual diagram in the film thickness direction when an impurity element is added to the oxide semiconductor film 166 of the transistor 190B shown in FIG. 38(A) will be described below. When an impurity element is added to the oxide semiconductor film 166 of the transistor 190B shown in FIG. 38(A), a conceptual diagram in the film thickness direction will be described below. Explanation will be given below.

[0308] In FIG. 38(B), the oxide semiconductor film 166 has a region 166x and a region 166y. This is the case. For example, when the oxide semiconductor film 166 is a crystalline oxide semiconductor film, the region 166y has higher crystallinity than the region 166x. This difference in crystallinity is due to the fact that when adding impurity elements, the region 166x is damaged and its crystallinity decreases.

[0309] <Fabrication method of semiconductor device 3> Next, the fabrication method of the transistor 190 shown in FIG. 12 will be described with reference to FIGS. 18 to 20.

[0310] As shown in FIG. 18(A), an insulating film 164 is formed on the substrate 162.

[0311] The insulating film 164 can be formed by appropriately using the method for forming the insulating film 104 shown in Embodiment 1.

[0312] Next, as shown in FIG. 18(B), an oxide semiconductor film 166 is formed on the insulating film 164. Next, an insulating film 168 is formed on the insulating film 164 and the oxide semiconductor film 166. The oxide semi- conductor film 166 and the insulating film 168 can be formed by appropriately using the methods for forming the oxide semiconductor film 106 and the insulating film 108 shown in Embodiment 1, respectively.

[0313] Next, as shown in FIG. 19(A), after forming a mask by a lithography process on the insulating film 168, a part of the insulating film 168 is etched to form openings 180a and 180b that expose a part of the oxide semiconductor film 166.

[0314] Next, as shown in FIG. 19(B), a conductive film 169 is formed on the oxide semiconductor film 166 and the insulating film 168.

[0315] The conductive film 169 can be formed by appropriately using the method for forming the conductive film 109 shown in Embodiment 1.​​​​​ It is.

[0316] Next, as shown in FIG. 19(C), on the conductive film 169, a mask 111 is formed by a lithography process, and then the conductive film 169 is exposed to an etching solution or / and an etching gas 167 to form a conductive film 170, a conductive film 172, and a conductive film 174.

[0317] As a method for etching the conductive film 169, a wet etching method or / and a dry etching method can be appropriately used.

[0318] Note that the conductive film 170, the conductive film 172, and the conductive film 174 may be formed by an electrolytic plating method, a printing method, an inkjet method, etc., instead of the above-described forming method.

[0319] Next, as shown in FIG. 19(D), while leaving the mask 111, a rare gas is added as an impurity element 177 to the oxide semiconductor film 166. As a result, the impurity element is added to the region of the oxide semiconductor film that is not covered by the mask 111. Note that due to the addition of the impurity element 177, oxygen vacancies are formed in the oxide semiconductor film.

[0320] As a method for adding the impurity element 177, the method for adding the impurity element 117 shown in Embodiment 1 can be appropriately used.

[0321] Here, a conceptual diagram of the region where the impurity element is added in the film thickness direction when the impurity element 177 is added to the oxide semiconductor film 166 is shown in FIG. 21. FIG. 21 is an enlarged view near the oxide semiconductor film 166.

[0322] As shown in FIG. 21(A), the addition region of the impurity element 177 is the insulating film 164, the oxide semiconductor It may be formed on the conductor film 166 and the insulating film 168. Note that in the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 195 of the addition region is located in the insulating film 164. In the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 195 of the addition region is located in the insulating film 164.

[0323] Alternatively, as shown in FIG. 21(B), the addition region of the impurity element 177 may be formed on the oxide semiconductor film 166 and the insulating film 168. Note that in the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 196 of the addition region is located at the interface between the insulating film 164 and the oxide semiconductor film 166. Alternatively, as shown in FIG. 21(B), the addition region of the impurity element 177 may be formed on the oxide semiconductor film 166 and the insulating film 168. Note that in the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 196 of the addition region is located at the interface between the insulating film 164 and the oxide semiconductor film 166. In the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 196 of the addition region is located at the interface between the insulating film 164 and the oxide semiconductor film 166.

[0324] Alternatively, as shown in FIG. 21(C), the addition region of the impurity element 177 may be formed on the oxide semiconductor film 166 and the insulating film 168. Note that in the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 197 of the addition region is located in the oxide semiconductor film 166. Alternatively, as shown in FIG. 21(C), the addition region of the impurity element 177 may be formed on the oxide semiconductor film 166 and the insulating film 168. Note that in the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 197 of the addition region is located in the oxide semiconductor film 166. In the depth direction of the region where the oxide semiconductor film 166 is exposed, the end portion 197 of the addition region is located in the oxide semiconductor film 166.

[0325] After that, as shown in FIG. 20(A), the mask 111 is removed.

[0326] Here, the impurity element 177 is added to the oxide semiconductor film 166 using the mask 111. However, after removing the mask 111, the impurity element 177 may be added to the oxide semiconductor film 166 using the conductive film 170, the conductive film 172, and the conductive film 174 as masks. Here, the impurity element 177 is added to the oxide semiconductor film 166 using the mask 111. However, after removing the mask 111, the impurity element 177 may be added to the oxide semiconductor film 166 using the conductive film 170, the conductive film 172, and the conductive film 174 as masks.

[0327] Also, in the process of forming the conductive film 169, the etching process of the conductive film 169, or the subsequent process of forming the insulating film 176, if the oxide semiconductor film 166 is damaged and oxygen vacancies are formed, the addition of the impurity element 177 may not be performed. Also, in the process of forming the conductive film 169, the etching process of the conductive film 169, or the subsequent process of forming the insulating film 176, if the oxide semiconductor film 166 is damaged and oxygen vacancies are formed, the addition of the impurity element 177 may not be performed.

[0328] ​​​​​Next, as shown in FIG. 20(B), an insulating film 176 is formed on the oxide semiconductor film 166, the insulating film 168, the conductive film 17 0, the conductive film 172, and the conductive film 174, and an insulating film 178 may be formed on the insulating film 176.

[0329] Examples of the method for forming the insulating film 176 include a sputtering method, a CVD method, a vacuum evaporation method, a pulse laser deposition (PLD) method, etc. Note that a silicon nitride film containing hydrogen can be formed by a plasma CVD method using silane and ammonia, or silane and nitrogen as source gases. Further, by using the plasma CVD method, it is possible to damage the oxide semiconductor film 166 and form oxygen vacancies in the oxide semiconductor film 166.

[0330] Since the insulating film 176 contains hydrogen, in the oxide semiconductor film 166, when the region doped with impurity elements is in contact with the insulating film 176, the hydrogen contained in the insulating film 176 moves to the region of the oxide semiconductor film doped with impurity elements. Since the region doped with impurity elements contains oxygen vacancies, a low-resistance region can be formed in the oxide semiconductor film 166. Specifically, regions 166b and 166c shown in FIG. 13 can be formed. Note that since the region 166c is added to the oxide semiconductor film 166 via the insulating film 168, the concentration of impurity elements is lower than that of the region 166b.

[0331] Note that by forming the insulating film 176 while heating, the hydrogen contained in the oxide semiconductor film diffuses. However, when hydrogen moves to the oxygen vacancies, the hydrogen becomes energetically stable and it becomes difficult for the hydrogen to desorb from the oxygen vacancies. Further, due to the interaction between the oxygen vacancies and hydrogen, Electrons serving as carriers are generated. For these reasons, the insulating film 176 is formed while heating. By doing so, a low-resistance region with little variation in conductivity can be formed.

[0332] After that, a heat treatment may be performed to further increase the conductivity of the region doped with the impurity element 177. The temperature of the heat treatment is typically 150°C or higher and lower than the substrate distortion point, or 250 °C or higher and 450°C or lower, or 300°C or higher and 450°C or lower. As a result, it is possible to increase the conductivity of the low-resistance region and reduce the variation in the conductivity of the low-resistance region. It is possible, and it is possible to reduce the variation in the conductivity of the low-resistance region.

[0333] As the insulating film 178, the formation methods of the insulating films 164 and 168 can be appropriately used. It is possible.

[0334] Note that the substrate placed in the evacuated processing chamber of the plasma CVD apparatus is maintained at 180°C or higher and 280°C or lower, or 200°C or higher and 240°C or lower. A raw material gas is introduced into the processing chamber, and the pressure in the processing chamber is set to 100 Pa or higher and 250 Pa or lower, or 100 Pa or higher and 200 P a or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm 2 or lower 2 or 0.25 W / cm 2 or higher and 0.35 W / cm 2 or lower is supplied to the electrodes provided in the processing chamber. Under these conditions it is possible to form a silicon oxide film or a silicon oxynitride film that can release oxygen by heat treatment as the insulating film 178.

[0335] Through the above steps, a transistor can be fabricated.

[0336] <Fabrication Method of Semiconductor Device 4> ​​​A method for manufacturing the transistor 191 shown in FIG. 14 will be described. Here, the conductive films 170c, 172c, and 174c included in the conductive films 170, 172, and 174 of the transistor 191, the forming process of the conductive films 170c, 172c, and 174c, and the process of adding the impurity element 177 to the oxide semiconductor film 166 will be described.

[0337] Through the processes of FIGS. 18 and 19(A) to 19(C), an insulating film 164, an oxide semiconductor film 166, an insulating film 168, a conductive film 170, a conductive film 172, a conductive film 174, and a mask 111 are formed on the substrate 162.

[0338] Next, as shown in FIG. 19(D), the impurity element 177 is added to the oxide semiconductor film 166.

[0339] Next, the mask 111 is removed.

[0340] Next, the conductive films 170b, 172b, and 174b included in each of the conductive films 170, 172, and 174 are exposed to plasma generated in a reducing atmosphere to reduce the oxides on the surfaces of the conductive films 170b, 172b, and 174b. Next, while heating at 2 00°C or higher and 400°C or lower, the conductive films 170b, 172b, and 174b are exposed to silane. Next, the conductive films 170b, 172b, and 174b are exposed to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, so that the conductive films 170c, 172c, and 174c can be formed as CuSi 00°C or higher and 400°C or lower, the conductive films 170b, 172b, and 174b are exposed to silane. Next, the conductive films 170b, 172b, and 174b are exposed to plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, so that the conductive films 170c, 172c, and 174c can be formed as CuSi N (x>0, x N y (x>0, y>0) can be formed.

[0341] ​When exposing to the plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, since the oxide semiconductor film 166 is exposed to the plasma generated in an atmosphere containing nitrogen such as ammonia or nitrogen, it is possible to add nitrogen and / or hydrogen to the oxide semiconductor film 166 because it is exposed to the plasma. It is possible.

[0342] Before adding the impurity element 177 to the oxide semiconductor film 166, the mask 111 is removed, and conductive films 170c, 172c, and 174c included in the conductive film 170, conductive film 172, and conductive film 174 may be formed. After that, the transistor 191 can be manufactured through the process of FIG. 20(B).

[0343] After that, the transistor 191 can be manufactured through the process of FIG. 20(B).

[0344] <Fabrication method of semiconductor device 5> Another manufacturing method of the transistor 190 shown in FIG. 12 will be described. Here, the process of adding the impurity element and the process of manufacturing the insulating film 176 will be described with reference to FIG. 22. After that, the insulating film 164, oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, conductive film 174, and mask 111 are formed on the substrate 162 through the processes of FIGS. 18 and 19(A) to 19(C). After that, as shown in FIG. 22(A), the mask 111 is removed.

[0345] After that, as shown in FIG. 22(A), the mask 111 is removed. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks.

[0346] Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks. Next, as shown in FIG. 22(B), after forming the insulating film 176 on the oxide semiconductor film 166, insulating film 168, conductive film 170, conductive film 172, and conductive film 174, the impurity element 177 is added to the oxide semiconductor film 166 through the insulating film 176 using the conductive film 170, conductive film 172, and conductive film 174 as masks.

[0347] Next, as shown in FIG. 22(C), an insulating film 178 may be formed. Through the above steps , the transistor 190 can be fabricated.

[0348] The transistor shown in this embodiment has a conductive film 170, a conductive film 172, and a conductive film 174 which do not overlap, so it is possible to reduce the parasitic capacitance and the on-current is large. Also, the transistor shown in this embodiment can stably form a low-resistance region, so compared with the conventional case, the on-current is improved and the variation in the electrical characteristics of the transistor is reduced.

[0349] As described above, the configurations and methods shown in this embodiment can be appropriately combined with the configurations and methods shown in other embodiments and used.

[0350] (Embodiment 3) In this embodiment, one form of a semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIGS. 23 and 2 4.

[0351] <Configuration 11 of the semiconductor device> FIG. 23 shows the structure of a transistor 150 included in a semiconductor device and a capacitor element 159 connected to the transistor 150.

[0352] FIGS. 23(A) and 23(B) show a top view and a cross-sectional view of the transistor 150 and the capacitor element 159 included in the semiconductor device. FIG. 23(A) is a top view of the transistor 150 and the capacitor element 159, and FIG. 23(B) is a cross-sectional view between the dashed-dotted line X1-X2 and the dashed-dotted line X3-X4 in FIG. 23(A). In FIG. 23(A), for clarity, the substrate 102, the insulating film 104, the insulating film 108, the insulating film 116, the insulating film 118, the insulating film 159. FIG. 23(B) is a cross-sectional view between the dashed-dotted line X1-X2 and the dashed-dotted line X3-X4 in FIG. 23(A). Note that in FIG. 23(A), for clarity, the substrate 102, the insulating film 104, the insulating film 108, the insulating film 116, the insulating film 118, the insulating film and the cross-sectional view between the dashed-dotted line X3-X4. In FIG. 23(A), for clarity, the substrate 102, the insulating film 104, the insulating film 108, the insulating film 116, the insulating film 118, the insulating film 104, the insulating film 108, the insulating film 116, the insulating film 118, the insulating film Numbers such as 122 are omitted.

[0353] The transistor 150 shown in FIG. 23 has the same structure as the transistor 150 shown in Embodiment 1. It has a structure.

[0354] In addition, the capacitive element 159 includes an oxide semiconductor film 156 on the insulating film 104, an insulating film 118 in contact with the oxide semiconductor film 156, and a conductive film 124 on the insulating film 118. It has an insulating film 118 in contact with the oxide semiconductor film 156, and a conductive film 124 on the insulating film 118.

[0355] An insulating film 122 is formed on the insulating film 118. At the opening 142a of the insulating film 116, the insulating film 118, and the insulating film 122, the conductive film 124 is in contact with the conductive film 112. At the opening 142b of the insulating film 108, the insulating film 116, the insulating film 118, and the insulating film 122, the conductive film 124 is in contact with the insulating film 118. At the opening 142a of the insulating film 116, the insulating film 118, and the insulating film 122, the conductive film 124 is in contact with the conductive film 112. At the opening 142b of the insulating film 108, the insulating film 116, the insulating film 118, and the insulating film 122, the conductive film 124 is in contact with the insulating film 118. 08, the insulating film 116, the insulating film 118, and the insulating film 122, the conductive film 124 is in contact with the insulating film 118. The conductive film 124 is in contact with the insulating film 118.

[0356] As the insulating film 122, for example, an organic resin film such as polyimide, acrylic, polyamide, or epoxy can be used. The insulating film 122 preferably has a thickness of 500 nm or more and 10 μm or less. The insulating film 122 preferably has a thickness of 500 nm or more and 10 μm or less. It is preferably so.

[0357] As the conductive film 124, a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide containing silicon oxide, etc. can be used to form it. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide containing silicon oxide, etc. can be used to form it. Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide containing silicon oxide, etc. can be used to form it. The conductive film 124 can be formed using a conductive material having translucency such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, indium tin oxide containing silicon oxide, etc.

[0358] In addition, as the conductive film 124, it can be formed using a metal element that reflects light such as silver, aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, etc. In addition, as the conductive film 124, it can be formed using a metal element that reflects light such as silver, aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, etc. Further, a film formed using a metal element that reflects light and a film formed using the above-described light-transmissive conductive material may be laminated.

[0359] Since the oxide semiconductor film 156 is formed simultaneously with the oxide semiconductor film 106, it has light-transmittance. In addition, impurity elements are added in the same manner as in the region 106b included in the oxide semiconductor film 106. Therefore, the oxide semiconductor film 156 has conductivity.

[0360] When the conductive film 124 is formed using a light-transmissive conductive material, the capacitor element 15 9 has light-transmittance. Therefore, by providing the capacitor element 159 in the pixel of the display device, the aperture ratio in the pixel can be increased.

[0361] <Configuration 12 of the semiconductor device> FIG. 24 shows the structure of the transistor 190 included in the semiconductor device and the capacitor element 199 connected to the transistor 190.

[0362] FIGS. 24(A) and 24(B) show a top view and a cross-sectional view of the transistor 190 and the capacitor element 199 included in the semiconductor device. FIG. 24(A) is a top view of the transistor 190 and the capacitor element 1 99, and FIG. 24(B) is a cross-sectional view between the dashed-dotted line X1-X2 in FIG. 24(A) and a cross-sectional view between the dashed-dotted line X3-X4. In FIG. 24(A), for clarity, the substrate 162, the insulating film 164, the insulating film 168, the insulating film 176, the insulating film 178, the insulating film 182, etc. are omitted.

[0363] The transistor 190 shown in FIG. 24 has the same structure as the transistor 190 shown in Embodiment 2.

[0364] The capacitor 199 includes an oxide semiconductor film 198 over the insulating film 164 and an oxide semiconductor film The insulating film 176 is in contact with the insulating film 198 , and the conductive film 184 is on the insulating film 176 .

[0365] An insulating film 182 is formed on the insulating film 178. In the opening 182a of the insulating film 182, the conductive film 184 contacts the conductive film 172. 68, the insulating film 176, the insulating film 178, and the opening 182b of the insulating film 182. The film 184 contacts the insulating film 176 .

[0366] The insulating film 182 can be formed using the same material as the insulating film 122 shown in FIG.

[0367] The conductive film 184 can be formed using the material of the conductive film 124 shown in FIG.

[0368] The oxide semiconductor film 198 is formed through the same process as the oxide semiconductor film 166. In addition, the impurity element is not contained in the oxide semiconductor film 166 like the region 166b. Therefore, the oxide semiconductor film 198 has conductivity.

[0369] When the conductive film 184 is formed using a light-transmitting conductive material, Therefore, by providing a capacitor element 199 in a pixel of a display device, It is possible to increase the aperture ratio in the

[0370] In addition, one electrode of the capacitor is formed in the same process as the oxide semiconductor film included in the transistor. Therefore, the number of masks can be increased. In addition, a transistor and a capacitor can be formed at the same time.

[0371] As described above, the configurations and methods shown in this embodiment can be used in appropriate combination with those shown in other embodiments.

[0372] (Embodiment 4) In this embodiment, the configuration of the oxide semiconductor film included in the semiconductor device of one aspect of the present invention will be described in detail below.

[0373] First, the possible structures of the oxide semiconductor film will be described below.

[0374] <Regarding the structure of the oxide semiconductor> Oxide semiconductors can be divided into single-crystalline oxide semiconductors and other non-single-crystalline oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS, polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, and amorphous oxide semiconductors.

[0375] From another perspective, oxide semiconductors can be divided into amorphous oxide semiconductors and other crystalline oxide semiconductors. Examples of crystalline oxide semiconductors include single-crystalline oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and microcrystalline oxide semiconductors.

[0376] <caac-os> First, CAAC-OS will be described. Note that CAAC-OS can also be called an oxide semiconductor having CANC (C- Axis Aligned nanocrystals).

[0377] CAAC-OS is one of the oxide semiconductors having a plurality of crystal parts (also referred to as pellets) oriented in the c-axis direction.

[0378] When a composite analysis image (also referred to as a high-resolution TEM image) of a bright-field image and a diffraction pattern of CAAC-OS is observed by a transmission electron microscope (TEM: Transmission Electron Micr oscope), a plurality of pellets can be confirmed. On the other hand, in a high-resolution TEM image, the boundary between pellets, that is, the grain boundary (also referred to as a grain boundary), cannot be clearly confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is unlikely to occur.

[0379] Hereinafter, CAAC-OS observed by TEM will be described. FIG. 34(A) shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction substantially parallel to the sample surface. For the observation of a high-resolution TEM image, a spherical aberration correction (Spherical Aberratio n Corrector) function was used. A high-resolution TEM image using a spherical aberration correction function is particularly referred to as a Cs-corrected high-resolution TEM image. The acquisition of a Cs-corrected high-resolution TEM image can be performed, for example, by a JEOL JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd.

[0380] A Cs-corrected high-resolution TEM image obtained by enlarging the region (1) in FIG. 34(A) is shown in FIG. 34(B).​​​​​​​​ From FIG. 34(B), it can be confirmed that in the pellet, metal atoms are arranged in layers. The arrangement of each layer of metal atoms reflects the unevenness of the surface (also referred to as the surface to be formed) or the upper surface of the CAAC-OS, and is parallel to the surface to be formed or the upper surface of the CAAC-OS.

[0381] As shown in FIG. 34(B), CAAC-OS has a characteristic atomic arrangement. FIG. 34(C) shows the characteristic atomic arrangement indicated by auxiliary lines. From FIGS. 34(B) and 34(C), the size of one pellet is about 1 nm or more and 3 nm or less, and the size of the gap generated by the inclination between pellets is about 0.8 nm. Therefore, the pellet can also be called a nanocrystal (nc).

[0382] Here, based on the Cs-corrected high-resolution TEM image, when the arrangement of the pellets 5100 of CAAC-OS on the substrate 5120 is schematically shown, it has a structure like bricks or blocks stacked (see FIG. 34(D)). The location where an inclination occurs between the pellets observed in FIG. 34(C) corresponds to the region 5161 shown in FIG. 34(D).

[0383] Also, FIG. 35(A) shows a Cs-corrected high-resolution TEM image of the plane of CAAC-OS observed from a direction substantially perpendicular to the sample surface. The Cs-corrected high-resolution TEM images of the regions (1), (2), and (3) in FIG. 35(A) are enlarged and shown in FIGS. 35(B), 35(C), and FIG. 35(D), respectively. From FIGS. 35(B), 35(C), and 35(D), it can be confirmed that in the pellet, metal atoms are arranged in a triangular, square, or hexagonal shape. However, However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0384] Next, C analyzed by X-ray diffraction (XRD) AAC-OS will be described. For example, InGaZnO 4 having a crystal of CAAC-O S, when performing a structural analysis by the out-of-plane method, a peak may appear at around a diffraction angle (2θ) of 31° as shown in Fig. 36(A). This peak is attributed to the (009) plane of the InGa ZnO 4 crystal, so it can be confirmed that the crystal of CAAC-OS has c-axis orientation and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface.

[0385] In the structural analysis of CAAC-OS by the out-of-plane method, in addition to the peak at around 2θ of 31 °, a peak may also appear at around 2θ of 36°. The peak at around 2θ of 36 ° indicates that a part of CAAC-OS contains crystals without c-axis orientation. A more preferable CAAC-OS shows a peak at around 2θ of 31° and does not show a peak at around 2θ of 36° in the structural analysis by the out-of-plane method.

[0386] On the other hand, when performing a structural analysis of CAAC-OS by the in-plane method in which X-rays are incident from a direction substantially perpendicular to the c-axis, a peak appears at around 2θ of 56°. This peak is attributed to the (110) plane of the InGaZnO crystal. In the case of CAAC-OS, even when the analysis 4 (φ scan) is performed while rotating the sample with the normal vector of the sample surface as the axis (φ axis) with 2θ fixed at around 5 6°, no distinct peak appears as shown in Fig. 36(B). To this On the other hand, for a single crystal oxide semiconductor of InGaZnO 4 if 2θ is fixed near 56° and φ is scanned, six peaks attributed to crystal planes equivalent to the (110) plane are observed as shown in Fig. 36(C). Therefore, from the structural analysis using XRD, it can be confirmed that in CAAC-OS the orientations of the a-axis and b-axis are irregular.

[0387] Next, CAAC-OS analyzed by electron diffraction will be described. For example, for CAAC-OS having a crystal of InGa ZnO 4 when an electron beam with a probe diameter of 300 nm is incident parallel to the sample surface, a diffraction pattern (also referred to as a limited field transmission electron diffraction pattern) as shown in Fig. 42(A) may appear. This diffraction pattern contains spots due to the (009) plane of the InGaZnO crystal. Therefore, also by electron diffraction it can be seen that the pellets included in CAAC-OS have c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the formed surface or the upper surface. On the other hand, for the same sample, the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicular to the sample surface is shown in Fig. 42(B). From Fig. 4 4 2(B), a ring-shaped diffraction pattern is confirmed. Therefore, also by electron diffraction it can be seen that the a-axis and b-axis of the pellets included in CAAC-OS do not have orientation . Note that the first ring in Fig. 42(B) is considered to be due to the (010) plane and (100) plane etc. of the InGaZnO crystal. Also, the second ring in Fig. 42(B) is considered to be due to the (110) plane etc. . 4 of the InGaZnO crystal.

[0388] In addition, CAAC-OS is an oxide semiconductor with a low density of defect levels. Defects in the oxide semiconductor include, for example, defects caused by impurities and oxygen deficiencies. Therefore, CA AC-OS can also be said to be an oxide semiconductor with a low impurity concentration. Also, CAAC-O S can also be said to be an oxide semiconductor with few oxygen deficiencies.

[0389] Impurities contained in the oxide semiconductor may become carrier traps or carrier generation sources. Also, oxygen deficiencies in the oxide semiconductor may become carrier traps or become carrier generation sources by capturing hydrogen.

[0390] Note that impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metal elements. For example, elements with a stronger binding force to oxygen than the metal elements constituting the oxide semiconductor, such as silicon, take oxygen from the oxide semiconductor and disrupt the atomic arrangement of the oxide semiconductor, becoming a factor in reducing crystallinity. Also, heavy metals such as iron and nickel, argon, carbon dioxide, etc., have a large atomic radius (or molecular radius), so they disrupt the atomic arrangement of the oxide semiconductor and become a factor in reducing crystallinity.

[0391] Also, an oxide semiconductor with a low density of defect levels (few oxygen deficiencies) can have a low carrier density. Such an oxide semiconductor is called a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect levels. That is it is likely to become a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Therefore, a transistor using CA AC-OS has electrical characteristics (normally where the threshold voltage becomes negative) ​​​It is less likely to become (also referred to as -on). Also, high-purity genuine or substantially high-purity genuine The oxide semiconductor has few carrier traps. The charges trapped in the carrier traps of the oxide semiconductor take a long time to be released and behave like fixed charges. Therefore, a transistor using an oxide semiconductor with a high impurity concentration and a high defect level density may have unstable electrical characteristics. On the other hand, a transistor using CAAC-OS has small fluctuations in electrical characteristics and becomes a highly reliable transistor.

[0392] Also, since CAAC-OS has a low defect level density, carriers generated by light irradiation or the like are less likely to be trapped in defect levels. Therefore, a transistor using CAAC-OS has small fluctuations in electrical characteristics due to visible light or ultraviolet light irradiation.

[0393] <Microcrystalline Oxide Semiconductor> Next, the microcrystalline oxide semiconductor will be described.

[0394] The microcrystalline oxide semiconductor has a region where crystal parts can be confirmed in a high-resolution TEM image and a region where clear crystal parts cannot be confirmed. The crystal parts contained in the microcrystalline oxide semiconductor are often 1 nm or more and 100 nm or less, or 1 nm or more and 10 nm or less in size. In particular, an oxide semiconductor having nanocrystals that are microcrystals of 1 nm or more and 10 nm or less, or 1 nm or more and 3 nm or less is called nc-OS (nanocrystalline Oxide Semiconductor). Nc-OS, for example, in a high-resolution TEM image, may not clearly show grain boundaries. Note that nanocrystals are CAA e Oxide Semiconductor) and is called. Nc-OS, for example, in a high-resolution TEM image, may not clearly show grain boundaries. Note that nanocrystals are CAA ​​It is possible that the origin of the pellets in C-OS is the same as that of the pellets in C-OS. The crystalline part of the OS is sometimes called a pellet.

[0395] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD apparatus that uses X-rays with a diameter larger than that of the pellet for nc-OS may be used. When the structure was analyzed using the out-of-plane method, the crystal plane was not shown. In addition, the probe diameter ( For example, electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 50 nm or more. On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron circuits are used that use an electron beam with a probe diameter close to the size of the pellet or smaller than the pellet. When the nc-OS is folded, spots are observed. In some cases, a bright area with a circular (ring-like) appearance may be observed. Multiple spots may be observed within a ring-like region.

[0396] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) The oxide semiconductor or NANC (Non-Aligned Nanocrystal The semiconductor may also be referred to as an oxide semiconductor having a structure including a metal oxide layer.

[0397] nc-OS is an oxide semiconductor with higher regularity than an amorphous oxide semiconductor. Therefore , the density of defect levels in nc-OS is lower than that in amorphous oxide semiconductors. However, nc-O S shows no regularity in crystal orientation among different pellets. Therefore, nc-OS has a higher density of defect levels than C AAC-OS.

[0398] <Amorphous oxide semiconductor> Next, the amorphous oxide semiconductor will be described.

[0399] An amorphous oxide semiconductor is an oxide semiconductor in which the atomic arrangement in the film is irregular and has no crystalline part . An oxide semiconductor having an amorphous state such as quartz is an example.

[0400] No crystalline part can be confirmed in the high-resolution TEM image of an amorphous oxide semiconductor.

[0401] When performing structural analysis on an amorphous oxide semiconductor using an XRD apparatus, no peak indicating a crystal plane is detected in the analysis by the out-of-p lane method. Also, when performing electron diffraction on an amorphous oxide semiconductor, a halo pattern is observed. Also, when performing nano-beam electron diffraction on an amorphous oxide semiconductor , no spots are observed, and only a halo pattern is observed. Regarding the amorphous structure, various views have been presented. For example, a structure with no order at all in the atomic arrangement is sometimes called a completely amorphous structure

[0402] . Also, a structure that has order in the nearest-neighbor atomic distance or the second-nearest-neighbor atomic distance and has no long-range order is sometimes called an amorphous structure. Thus a structure with no order at all in the atomic arrangement is sometimes called a completely amorphous structure (completely amorphous str ucture). Also, a structure that has order in the nearest-neighbor atomic distance or the second-nearest-neighbor atomic distance and has no long-range order is sometimes called an amorphous structure. Thus and sometimes a structure that has order in the nearest-neighbor atomic distance or the second-nearest-neighbor atomic distance and has no long-range order is called an amorphous structure. Thus Thus, according to the strictest definition, an oxide semiconductor having even a slight order in the atomic arrangement cannot be called an amorphous oxide semiconductor. Also, at least, an oxide semiconductor having long-range order cannot be called an amorphous oxide semiconductor. Therefore, since it has a crystalline part, for example, CAAC-OS and nc-OS cannot be called amorphous oxide semiconductors or complete amorphous oxide semiconductors.

[0403] <Amorphous-like Oxide Semiconductor> In addition, an oxide semiconductor may have a structure between nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (a-l ike OS:amorphous-like Oxide Semiconducto r).

[0404] Void may be observed in the high-resolution TEM image of a-like OS. Also, in the high-resolution TEM image, it has a region where a crystalline part can be clearly confirmed and a region where a crystalline part cannot be confirmed.

[0405] Since it has void, a-like OS has an unstable structure. Hereinafter, to show that a-lik e OS has an unstable structure compared to CAAC-OS and nc-OS, the change in structure due to electron irradiation is shown.

[0406] As samples for electron irradiation, a-like OS (denoted as sample A), nc-OS (denoted as sample B) and CAAC-OS (denoted as sample C) are prepared. Any of the samples is an In-Ga-Zn oxide.

[0407] First, obtain the high-resolution cross-sectional TEM images of each sample. From the high-resolution cross-sectional TEM images, it can be seen that each sample has a crystalline part.

[0408] Note that the determination of which part is regarded as one crystalline part can be carried out as follows. For example, , the unit cell of the InGaZnO 4 crystal is known to have a structure in which three In-O layers and six Ga-Zn-O layers, a total of nine layers, are stacked in the c-axis direction. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, a portion where the lattice fringe spacing is between 0.28 nm and 0.30 nm can be regarded as the crystalline part of InGaZnO . Note that the lattice fringe corresponds to the a-b plane of the InGaZnO crystal. 4 4

[0409] Figure 43 shows an example of investigating the average size of the crystalline parts (from 22 to 45 locations) of each sample. However, the length of the above-mentioned lattice fringe is regarded as the size of the crystalline part. From Figure 43, it can be seen that a-like OS shows that the crystalline part grows as the cumulative electron irradiation dose increases. Specifically, as shown by (1) in Figure 43, at the initial stage of observation by TEM, the crystalline part (also referred to as the initial nucleus) with a size of about 1.2 nm grows to a size of about 2.6 nm when the cumulative irradiation dose is 4.2×10 e / nm . On the other hand, nc-OS and CAAC-OS show that from the start of electron irradiation to when the cumulative electron irradiation dose is 4.2×10 e 8 / nm - 2 , it can be seen that they do not show significant growth. 8 e - / nm 2 ​​​​​​​​​It can be seen that within the range up to, there is no change in the size of the crystal part. Specifically, As shown in (2) and (3) in FIG. 43, regardless of the cumulative electron irradiation dose, nc-OS and the sizes of the crystal parts of CAAC-OS are about 1.4 nm and about 2.1 nm, respectively. It can be seen that.

[0410] Thus, crystal growth of a-like OS may be observed by electron irradiation. On the other hand, it can be seen that nc-OS and CAAC-OS hardly show crystal growth by electron irradiation. That is, it can be seen that a-like OS has an unstable structure compared with nc-OS and CAAC- OS. OS.

[0411] Also, because it has looseness, a-like OS has a lower density structure compared with nc-OS and CAAC-OS. Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal of the same composition. Also, the density of nc-OS and the density of CAA C-OS are 92.3% or more and less than 100% of the density of a single crystal of the same composition. An oxide semiconductor having a density of less than 78% of the density of a single crystal is difficult to form a film itself. For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a single crystal InGaZnO having a rhombohedral crystal structure is 6.357 g / cm . Therefore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio],

[0412] the density of a-like OS is 5.0 g / cm or more and less than 5.9 g / cm 4 . 3 Thus, For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a-like OS is 5.0 g / cm 3 or more and less than 5.9 g / cm 3 . For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 .

[0413] Note that there may be no single crystal with the same composition. In that case, by combining single crystals with different compositions in any ratio, the density corresponding to the single crystal in the desired composition can be estimated . The density corresponding to the single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible . .

[0414] As described above, the oxide semiconductor has various structures, each having various characteristics . Note that the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, a microcrystalline oxide semiconductor, and CAAC-OS .

[0415] <Film formation model> Hereinafter, an example of the film formation models of CAAC-OS and nc-OS will be described

[0416] FIG. 44(A) is a schematic diagram of a film formation chamber showing how CAAC-OS is formed by sputtering .

[0417] The target 5130 is adhered to the backing plate. A plurality of magnets are arranged at positions facing the target 5130 via the backing plate. A magnetic field is generated by the plurality of magnets. The film formation rate is increased using the magnetic field of the magnets . . ​The sputtering method is called the magnetron sputtering method.

[0418] The substrate 5120 is arranged to face the target 5130, and the distance d ( also referred to as the target-substrate distance (T-S distance).) is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The film formation chamber is mostly filled with a film formation gas (for example, oxygen, argon, or a mixed gas containing oxygen at a ratio of 5% by volume or more), and is controlled to be 0.0 1 Pa or more and 100 Pa or less, preferably 0.1 Pa or more and 10 Pa or less. Here, by applying a voltage equal to or higher than a certain level to the target 5130, discharge starts and plasma is confirmed. In the vicinity of the target 5130, a high-density plasma region is formed by a magnetic field. In the high-density plasma region, the film formation gas is ionized to generate ions 5101. The ions 5101 are, for example, positive ions of oxygen (O + ) or positive ions of argon ( Ar + ), etc.

[0419] Here, the target 5130 has a polycrystalline structure having a plurality of crystal grains, and any one of the crystal grains contains a cleavage plane. In FIG. 45(A), as an example, the structure of the crystal contained in the target 5130 is shown. InGaZnO 4 Note that FIG. 45(A) is a structure when observing the crystal of InGaZnO in a direction parallel to the b-axis. From FIG. 45(A), it can be seen that in two adjacent Ga-Zn-O layers, oxygen atoms in each layer are arranged at a short distance. 4 And since oxygen atoms have a negative charge, a repulsive force is generated between two adjacent Ga-Zn-O layers. As a result, InGaZnO In two adjacent Ga-Zn-O layers, it can be seen that oxygen atoms in each layer are arranged at a short distance. And since oxygen atoms have a negative charge, a repulsive force is generated between two adjacent Ga-Zn-O layers. As a result, InGaZnO Ga-Zn-O layers, a repulsive force is generated between them. As a result, InGaZnO 4 The crystal has a cleavage plane between two adjacent Ga-Zn-O layers.

[0420] Ions 5101 generated in the high-density plasma region are accelerated toward the target 5130 by an electric field and eventually collide with the target 5130. At this time, pellets 5100a and 5100b, which are flat plate-shaped or pellet-shaped sputter particles, are peeled off from the cleavage plane and ejected. Note that the structures of pellets 5100a and 5100b may be distorted by the impact of the collision with ions 5101.

[0421] Pellet 5100a is a flat plate-shaped or pellet-shaped sputter particle having a triangular plane, for example, an equilateral triangle plane. Also, pellet 5100b is a flat plate-shaped or pellet-shaped sputter particle having a hexagonal plane, for example, a regular hexagonal plane. Note that flat plate-shaped or pellet-shaped sputter particles such as pellets 5100a and 5100b are collectively referred to as pellet 5100. The planar shape of pellet 5100 is not limited to a triangle or a hexagon. For example, it may be a shape formed by combining a plurality of triangles. For example, it may be a quadrilateral (e.g., a rhombus) formed by combining two triangles (e.g., equilateral triangles).

[0422] The thickness of pellet 5100 is determined according to the type of film-forming gas and the like. Although the reason will be described later, it is preferable that the thickness of pellet 5100 is uniform. Also, it is more preferable that the sputter particles are in the form of pellets without thickness than in the form of thick dice. For example, pellet 5100 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 n m or less. Be set to m or less. Also, for example, the pellet 5100 has a width of 1 nm or more and 3 nm or less, preferably 1.2 nm or more and 2.5 nm or less. The pellet 5100 corresponds to the initial nucleus described in (1 ) in FIG. 43 above. For example, when ions 5101 are collided with the target 5 130 having In-Ga-Zn oxide, as shown in FIG. 45(B), the pellet 5100 having three layers of a Ga-Zn-O layer , an In-O layer, and a Ga-Zn-O layer is peeled off. FIG. 4 5(C) shows the structure of the peeled pellet 5100 observed from a direction parallel to the c-axis. The pe llet 5100 can also be called a nano-sized sandwich structure having two Ga-Zn-O layers (bread) and an In-O layer (filling).

[0423] When the pellet 5100 passes through the plasma, its side surface may be charged negatively or positively . For example, the oxygen atoms located on the side surface of the pellet 5100 may be negatively charged . By having the same polarity of charges on the side surface, repulsion between the charges occurs, and it becomes possible to maintain a flat plate-like or pellet-like shape. Note that when the CAAC-OS is In-Ga-Z n oxide, the oxygen atoms bonded to the indium atoms may be negatively charged. Or, the oxygen atoms bonded to the indium atoms, gallium atoms, or zinc atoms may be negatively charged . Also, when the pellet 5100 passes through the plasma, there are cases where it grows by bonding with indium atoms, gallium atoms, zinc atoms, oxygen atoms, etc. in the plasma . The difference in size between (2) and (1) in FIG. 43 above corresponds to the growth component in the plasma . Here, when the substrate 5120 is at about room temperature, on the substrate 5120, the pellet Since the growth of pellet 5100 is unlikely to occur, it becomes nc-OS (see Fig. 44(B)). Since film formation can be carried out at about room temperature, even when the substrate 5120 has a large area, film formation of nc-OS is possible. In addition, in order to grow the pellet 5100 in plasma, it is effective to increase the film formation power in the sputtering method. By increasing the film formation power, the structure of the pellet 5100 can be stabilized. As shown in FIGS. 44(A) and 44(B), for example, the pellet 5100 flies in the plasma like a kite and flutters up onto the substrate 5120. Since the pellet 5100 is charged, when it approaches a region where other pellets 5100 have already been deposited, a repulsive force is generated. Here, on the upper surface of the substrate 5120, a magnetic field (also referred to as a horizontal magnetic field) parallel to the upper surface of the substrate 5120 is generated. In addition, since a potential difference is applied between the substrate 5120 and the target 5130, a current flows in the direction from the substrate 5120 toward the target 5130. Therefore, the pellet 5100 receives a force (Lorentz force) on the upper surface of the substrate 5120 due to the action of the magnetic field and the current. This can be understood by Fleming's left-hand rule. The pellet 5100 has a larger mass compared to a single atom. Therefore, in order to move on the upper surface of the substrate 5120, it is important to apply some force from the outside. One of the possible forces is the force generated by the action of the magnetic field and the current. In addition, in order to apply sufficient force to the pellet 5100 to move on the upper surface of the substrate 5120, on the upper surface of the substrate 5120, a magnetic field parallel to the upper surface of the substrate 5120 is 10 G or more, preferably 20 G or more, more preferably

[0424]

[0425] ​ Alternatively, a region where it is 30 G or more, more preferably 50 G or more, may be provided. Or, on the upper surface of the substrate 5120, a magnetic field parallel to the upper surface of the substrate 5120 is 1.5 times or more, preferably 2 times or more, more preferably 3 times or more, and more preferably 5 times or more of the magnetic field perpendicular to the upper surface of the substrate 5120. A region may be provided. At this time, when the magnet and the substrate 5120 move relative to each other or rotate, the direction of the horizontal magnetic field on the upper surface of the substrate 5120 continues to change. Therefore, on the upper surface of the substrate 5120, the pellet 5100 receives forces from various directions and can move in various directions. Also, when the substrate 5120 is heated as shown in Fig. 44(A), the resistance due to friction or the like between the pellet 5100 and the substrate 5120 is in a small state. As a result, the pellet 5100 moves as if it were skimming on the upper surface of the substrate 5120. The movement of the pellet 5100 occurs with the flat plate surface facing the substrate 5120. Then, when it reaches the side surfaces of other pellets 5100 that have already been deposited, the side surfaces are joined together. At this time, oxygen atoms on the side surface of the pellet 5100 are desorbed. Since the desorbed oxygen atoms may fill the oxygen vacancies in the CAAC-OS, a CAAC-OS with a low density of defect levels is obtained. The temperature of the upper surface of the substrate 5120 may be, for example, 100°C or more and less than 500°C, 150°C or more and less than 450°C, or 170°C or more and less than 400°C. Therefore, even when the substrate 5120 has a large area, film formation of CAAC-OS is possible.

[0426]

[0427]

[0428] ​​​​​​​​​​​​​​​Further, when the pellet 5100 is heated on the substrate 5120, atoms are rearranged , and the strain in the structure caused by the collision of ions 5101 is relaxed. The pellet 5 100 with relaxed strain becomes almost a single crystal. Since the pellet 5100 becomes almost a single crystal , even if it is heated after the pellets 5100 are bonded together, almost no expansion and contraction of the pellet 5100 itself can occur. Therefore, the gap between the pellets 5100 widens, and no defects such as crystal grain boundaries are formed, and no crevassing occurs.

[0429] In addition, CAAC-OS is not a single-crystalline oxide semiconductor in the form of a single sheet, but an aggregate of pellets 5100 (nanocrystals) is arranged like bricks or blocks stacked on top of each other. Also, there are no crystal grain boundaries between the pellets 5100. Therefore, even when deformation such as shrinkage occurs in CAAC-OS due to heating during film formation, heating after film formation, or bending, etc., it is possible to relax local stress or release strain. Therefore, it is a structure suitable for use in a flexible semiconductor device. Note that nc-OS has an arrangement in which the pellets 5100 (nanocrystals) are stacked disorderly. When the target 5130 is sputtered with ions 5101, not only the pellets 5100 but also zinc oxide or the like may peel off. Since zinc oxide is lighter than the pellet 5100 , it reaches the upper surface of the substrate 5120 first. Then, a zinc oxide layer 5102 with a thickness of 0.1 nm or more and 10 nm or less, 0.

[0430] 2 nm or more and 5 nm or less, or 0.5 nm or more and 2 nm or less is formed. A cross-sectional schematic diagram is shown in FIG. 46.

[0431] ​​​​As shown in FIG. 46(A), pellets 5105a and pellets 5105b are deposited on the zinc oxide layer 5102. Here, the pellets 5105a and the pellets 5105b are arranged such that their sides are in contact with each other. Also, after the pellet 5105c is deposited on the pellet 5105b, it moves slidingly on the pellet 5105b. Also, on another side of the pellet 5105a, a plurality of particles 5103 peeled off from the target together with zinc oxide are crystallized by heating from the substrate 5120 to form a region 5105a1. Note that the plurality of particles 5103 may contain oxygen, zinc, indium, gallium, and the like. And, as shown in FIG. 46(B), the region 5105a1 is integrated with the pellet 5105a to become a pellet 5105a2. Also, the pellet 5105c is arranged such that its side is in contact with another side of the pellet 5105b. Next, as shown in FIG. 46(C), after the pellet 5105d is further deposited on the pellet 5105a2 and the pellet 5105b, it moves slidingly on the pellet 5105a2 and the pellet 5105b. Also, toward another side of the pellet 5105c, the pellet 5105e further moves slidingly on the zinc oxide layer 5102. And, as shown in FIG. 46(D), the pellet 5105d is arranged such that its side is in contact with the side of the pellet 5105a2. Also, the pellet 5105e is arranged such that its side is in contact with another side of the pellet 5105c. Also, on another side of the pellet 5105d, a plurality of particles 5103 peeled off from the target 5130 together with zinc oxide are deposited on the substrate 5120.

[0432]

[0433]

[0434] ​​​​​​​​​​​​​​It crystallizes by heating from the substrate 5120 to form the region 5105d1.

[0435] As described above, the deposited pellets are arranged so as to be in contact with each other, and on the side surface of the pellet growth occurs, and CAAC-OS is formed on the substrate 5120. Therefore, CA AC-OS has larger pellets than nc-OS. The difference in size between ( 3) and (2) in FIG. 43 described above corresponds to the growth after deposition.

[0436] In addition, when the gap between the pellets becomes extremely small, one large pellet may be formed One large pellet has a single crystal structure. For example, the size of the pellet may be 10 nm or more and 200 nm or less, 15 nm or more and 100 nm or less, or 20 nm or more and 50 nm or less when viewed from the top surface. At this time, in the oxide semiconductor used for a fine transistor, the channel formation region may be included in one large pellet. That is, a region having a single crystal structure can be used as the channel formation region. Further, as the pellet becomes larger, a region having a single crystal structure may be used as the channel formation region, source region, and drain region of the transistor.

[0437] In this way, when the channel formation region of the transistor or the like is formed in a region having a single crystal structure, the frequency characteristics of the transistor may be improved.

[0438] According to the above model, it is considered that the pellet 5100 is deposited on the substrate 5120. Even when the surface to be formed does not have a crystal structure, the film formation of CAAC-OS is possible. From this, it can be understood that the growth mechanism is different from epitaxial growth. Also, CA AC-OS does not require laser crystallization and can form a uniform film even on a large-area glass substrate or the like. For example, even if the structure of the upper surface (surface to be formed) of the substrate 5120 is an amorphous structure (for example, amorphous silicon oxide), it is possible to form CAAC-OS.

[0439] Also, even when there are irregularities on the upper surface of the substrate 5120 which is the surface to be formed, it can be seen that the pellets 5100 are arranged along the shape. For example, when the upper surface of the substrate 5120 is flat at the atomic level, the pellets 5100 are juxtaposed with the flat plate surface which is a plane parallel to the a-b plane facing downwards. When the thickness of the pellets 5100 is uniform, a layer having a uniform thickness, being flat, and having high crystallinity is formed. And by stacking n layers (n is a natural number) of such layers, CAAC-OS can be obtained.

[0440] On the other hand, even when the upper surface of the substrate 5120 has irregularities, CAAC-OS has a structure in which n layers (n is a natural number) of layers in which the pellets 51 00 are juxtaposed along the irregularities are stacked. Because the substrate 5 120 has irregularities, there may be a case where gaps are likely to occur between the pellets 5100 in CAAC-OS. However, even in this case, intermolecular forces act between the pellets 5100, and they are arranged so that the gaps between the pellets become as small as possible even in the presence of irregularities. Therefore, it is possible to obtain CAAC-OS having high crystallinity even in the presence of irregularities.

[0441] Since CAAC-OS is formed by such a model, it is preferable that the sputter particles are in the form of pellets having no thickness. Note that when the sputter particles are in the form of thick dice ​​​​​​​​​When the surface facing the substrate 5120 is not constant and the thickness and crystal orientation cannot be made uniform there is such a case.

[0442] According to the film formation model described above, even on a surface to be formed having an amorphous structure, CAAC-OS having high crystallinity can be obtained.

[0443] A semiconductor device according to an aspect of the present invention can be configured using an oxide semiconductor film having any of the above configurations. can be configured.

[0444] As described above, the configurations and methods shown in the present embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments. can be used in combination.

[0445] (Embodiment 5) In the present embodiment, an example of a display device having a display function using the transistor exemplified in the previous embodiment will be described below with reference to FIGS. 27 to 30. will be described below with reference to FIGS. 27 to 30.

[0446] FIG. 27(A) is a top view showing an example of a display device. The display device 70 shown in FIG. 27(A) 0 includes a pixel portion 702 provided on a first substrate 701, a source driver circuit portion 704 and a gate driver circuit portion 706 provided on the first substrate 701, and a sealant 712 disposed so as to surround the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706, and a second substrate 705 provided so as to face the first substrate 701. and a second substrate 705 provided so as to face the first substrate 701. Note that the first substrate 701 and the second substrate 705 are sealed by a sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed by the first substrate 701, the sealant 712, and the second substrate 705. Note that the first substrate 701 and the second substrate 705 are sealed by a sealant 712. That is, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are sealed by the first substrate 701, the sealant 712, and the second substrate 705. are sealed by the first substrate 701, the sealant 712, and the second substrate 705. It should be noted that although not shown in FIG. 27(A), a display element is provided between the first substrate 701 and the second substrate 705. A display element is provided therebetween.

[0447] Further, the display device 700 is surrounded by a sealing material 712 on the first substrate 701. In a region different from the surrounded region, an FPC terminal portion 708 (FPC: Flexible printed circuit) that is electrically connected to the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 is provided. Also, an FPC 716 is connected to the FPC terminal portion 708, and various signals and the like are supplied to the pixel portion 702, the source driver circuit portion 704 via the FPC 716. Further, signal lines 710 are respectively connected to the pixel portion 702, the source driver circuit portion 704 , the gate driver circuit portion 706, and the FPC terminal portion 708. The various signals and the like supplied by the FPC 716 are supplied to the pixel portion 702, the source driver circuit portion 704, the gate driver circuit portion 706, and the FPC terminal portion 708 via the signal lines 710.

[0448] FIG. 27(B) is a top view showing an example of a display device. As the display device 8 00 shown in FIG. 27(B), a pixel portion 80 2 is used instead of the pixel portion 702 of the display device 700 shown in FIG. 27(A).

[0449] Also, a plurality of gate driver circuit portions 706 may be provided in the display devices 700 and 800. Further, as the display devices 700 and 800, an example is shown in which the source driver circuit portion 704 and the gate driver circuit portion 706 are formed on the same first substrate 701 as the pixel portions 702 and 802, but the configuration is not limited to this. For example, only the gate driver circuit portion 706 is formed on the first substrate 701. substrate 701, but it is not limited to this configuration. For example, only the gate driver circuit portion 706 is formed on the first It may be formed on the substrate 701, or only the source driver circuit section 704 may be formed on the first substrate 701. In this case, it may be configured to mount a separately prepared substrate on which a source driver circuit, a gate driver circuit, or the like is formed (for example, a driving circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) on the first substrate 701.

[0450] In addition, the connection method of the separately formed driving circuit substrate is not particularly limited, and methods such as COG (Chip On Glass) method and wire bonding method can be used. Note that the display device in this specification refers to an image display device or a light source (including lighting devices, etc.). Also, a module to which a connector, for example, an FPC or a TCP (Tape Carrier Package) is attached, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which a driving circuit substrate or an IC (integrated circuit) is directly mounted on a display element by the COG method is also included in the display device.

[0451] In addition, the pixel portions 702 and 802, the source driver circuit section 704, and the gate driver circuit section 706 included in the display devices 700 and 800 have a plurality of transistors, and the transistors which are semiconductor devices according to one aspect of the present invention can be applied.

[0452] In addition, the display device 700 has a configuration using a liquid crystal element as a display element, and the display device 800 has a configuration using a light emitting element as a display element.

[0453] Note that the display element, the display device which is a device having the display element, the light emitting element, and the light emitting device which is a device having the light emitting element can use various forms or have various elements. comes. The display element, display device, light-emitting element, or light-emitting device is, for example, an EL (electroluminescence) element (including organic and inorganic EL elements, organic EL elements, inorganic EL elements), an L ED (white LED, red LED, green LED, blue LED, etc.), a transistor (a transistor that emits light in response to current), an electron-emitting element, a liquid crystal element, an electronic ink, an electrophoretic element, a grating light valve (GLV), a plasma display (PDP), a display element using MEMS ( micro-electro-mechanical system), a digital micromirror device (DMD), a DMS (digital micro shutter), a MIRASOL (registered trademark), an IMOD (interference modulation) element, a shutter type MEMS display element, an optical interference type MEMS display element, an electro-wetting element, a piezoelectric ceramic display, a display element using carbon nanotubes, etc., having at least one. In addition to these, a display medium in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action may be provided. As an example of a display device using an EL element, there is an EL display, etc. As an example of a display device using an electron-emitting element, there is a field emission display (FED) or an SED type flat display (SED: Surface-conduction Electron-e mitter Display), etc. As an example of a display device using a liquid crystal element, there are a liquid crystal display (transmissive liquid crystal display, transflective liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display), etc. As an example of an electronic ink, there is an electrophoretic display, etc. As an example of a display device using an electrophoretic element, there is an electrophoretic display, etc. As an example of a display device using a GLV, there is a GLV display, etc. As an example of a display device using a PDP, there is a PDP display, etc. As an example of a display device using a DMD, there is a DMD display, etc. As an example of a display device using a DMS, there is a DMS display, etc. As an example of a display device using a MIRASOL (registered trademark), there is a MIRASOL display, etc. As an example of a display device using an IMOD element, there is an IMOD display, etc. As an example of a display device using a shutter type MEMS display element, there is a shutter type MEMS display, etc. As an example of a display device using an optical interference type MEMS display element, there is an optical interference type MEMS display, etc. As an example of a display device using an electro-wetting element, there is an electro-wetting display, etc. As an example of a display device using a piezoelectric ceramic display, there is a piezoelectric ceramic display, etc. As an example of a display device using a display element using carbon nanotubes, there is a display using carbon nanotubes, etc. In addition to these, a display medium in which contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action may be provided. An example of a display device using an EL element is an EL display, etc. An example of a display device using an electron-emitting element is a field emission display (FED) or an SED type flat display (SED: Surface-conduction Electron-e mitter Display), etc. An example of a display device using a liquid crystal element is a liquid crystal display (transmissive liquid crystal display, transflective liquid crystal display, reflective liquid crystal display, direct-view liquid crystal display, projection liquid crystal display), etc. An example of an electronic ink is an electrophoretic display, etc. An example of a display device using an electrophoretic element is an electrophoretic display, etc. An example of a display device using a GLV is a GLV display, etc. An example of a display device using a PDP is a PDP display, etc. An example of a display device using a DMD is a DMD display, etc. An example of a display device using a DMS is a DMS display, etc. An example of a display device using a MIRASOL (registered trademark) is a MIRASOL display, etc. An example of a display device using an IMOD element is an IMOD display, etc. An example of a display device using a shutter type MEMS display element is a shutter type MEMS display, etc. An example of a display device using an optical interference type MEMS display element is an optical interference type MEMS display, etc. An example of a display device using an electro-wetting element is an electro-wetting display, etc. An example of a display device using a piezoelectric ceramic display is a piezoelectric ceramic display, etc. An example of a display device using a display element using carbon nanotubes is a display using carbon nanotubes, etc. As an example of a display device using ink or an electrophoretic element, there is an electronic paper or the like. Note that , when realizing a transflective liquid crystal display or a reflective liquid crystal display, a part or all of the pixel electrodes may have the function as a reflective electrode. For example, a part or all of the pixel electrodes may have aluminum, silver, or the like. Further , in that case, it is also possible to provide a memory circuit such as an SRAM under the reflective electrode. This can further reduce power consumption.

[0454] First, the common part of the display devices 700 and 800 will be described first, and then the different parts will be described in detail for the display devices 700 and 800 with reference to FIGS. 28 to 29.

[0455] <Explanation of the common part of the display device> FIG. 28 is a cross-sectional view corresponding to the cross-section along the dashed-dotted line Q-R shown in FIG. 27(A). FIG. 29 is a cross-sectional view corresponding to the cross-section along the dashed-dotted line V-W shown in FIG. 27(B).

[0456] The display devices 700 and 800 shown in FIGS. 28 and 29 include a routing wiring part 711, pixel parts 702 and 802, a source driver circuit part 704, and an FPC terminal part 708. Note that the routing wiring part 711 has signal lines 710.

[0457] Also, the signal lines 710 included in the routing wiring part 711 are formed in the same process as the conductive film that functions as the gate electrode, source electrode, and drain electrode of the transistors 750 and 752. Note that the signal lines 710 are the gate electrode, source electrode, and drain of the transistors 750 and 752. A conductive film formed in a process different from the rain electrode, for example, a conductive film used as a routing wire, may be used. It may be used.

[0458] Also, the FPC terminal portion 708 has a connection electrode 760, an anisotropic conductive film 780, and an FPC 71 6. The connection electrode 760 is formed in the same process as the conductive film that functions as the source electrode layer and the drain electrode layer of the transistor 750. The connection electrode 760 is electrically connected to the terminal of the FPC 716 via the anisotropic conductive film 780.

[0459] Also, in the display devices 700 and 800 shown in FIGS. 28 and 29, the pixel portions 702 and 8 02 are each provided with a transistor 750, and the source driver circuit portion 704 is provided with a transistor 752. Regarding the configuration in which the transistors 750 and 752 are provided, an example is shown. The transistors 750 and 752 have the same configuration as the transistor 150 shown in FIG. 1. Note that the configurations of the transistors 750 and 752 are not limited to the configuration of the transistor 150. For example, , transistors having the configurations shown in transistors 151 to 154, transistors 190 to 194, transistor 150 A, transistor 190A, and transistor 190B may be used. It may be used.

[0460] The transistor used in this embodiment has a highly purified oxide semiconductor film in which the formation of oxygen vacancies is suppressed, and can reduce the current value (off-current value) in the off state. Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and the writing interval can also be set long in the power-on state. Therefore, since the frequency of the refresh operation can be reduced, an effect of suppressing power consumption is achieved. Therefore, the frequency of the refresh operation can be reduced, and an effect of suppressing power consumption is achieved.

[0461] In addition, the transistor used in this embodiment is highly purified to suppress the formation of oxygen vacancies. Since the device has an oxide semiconductor film and has a relatively high field-effect mobility, it can be driven at high speed. For example, by using such a transistor capable of high speed operation in a liquid crystal display device, The switching transistor in the pixel section and the driver transistor used in the drive circuit section are the same. In other words, it is possible to form the driver circuit on a single substrate, such as a silicon wafer. Since it is not necessary to use a semiconductor device formed by a method for manufacturing a semiconductor device, the number of components of the semiconductor device can be reduced. In addition, by using a transistor capable of high speed operation in the pixel portion, It is possible to provide high quality images.

[0462] In addition, a signal connected to a transistor in a pixel portion and a transistor used in a driver circuit portion A wiring containing copper can be used as the wire. This device has little signal delay caused by wiring resistance, making it possible to display on a large screen.

[0463] In this embodiment, the transistor 750 included in the pixel portion 702 and 802 The transistor 752 included in the source driver circuit section 704 has the same size. However, the present invention is not limited to this. The size (L / W) or the number of transistors used can be changed as appropriate. 28 and 29, the gate driver circuit section 706 can Although not shown, it can have the same configuration as the source driver circuit portion 704 .

[0464] In addition, in FIG. 28 and FIG. 29, the transistors 750 and 752 have A planarization insulating film 770 is provided on the insulating films 764 and 766.

[0465] As the insulating films 764 and 766, the insulating films 116 and 118 shown in the previous embodiment and they can be formed by the same materials and manufacturing methods respectively.

[0466] Also, as the planarization insulating film 770, heat-resistant organic materials such as polyimide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin, polyamide resin, and epoxy resin can be used. Note that the insulating films formed of these materials can be laminated in multiple layers to form the planarization insulating film 770. Also, the configuration may be such that the planarization insulating film 770 is not provided.

[0467] Also, a conductive film that functions as the source electrode and the drain electrode of the transistor 750 is connected to one of the conductive film 772 or the conductive film 844. The conductive films 772 and 844 are formed on the planarization insulating film 770 and function as a pixel electrode, that is, one of the electrodes of the display element. As the conductive film 772, it is preferable to use a conductive film that is transparent to visible light. As the conductive film, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used. Also, as the conductive film 844, it is preferable to use a reflective conductive film.

[0468] <Configuration Example 1 of a Display Device Using a Liquid Crystal Element as a Display Element> The display device 700 shown in FIG. 28 has a liquid crystal element 775. The liquid crystal element 775 has a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is on the second substrate 705 It is provided on the side and has the function as a counter electrode. The display device 700 shown in Fig. 28 is a conductive film The alignment state of the liquid crystal layer 776 changes according to the voltage applied to the conductive film 772 and the conductive film 774 By this, the transmission and non - transmission of light can be controlled to display an image.

[0469] Although not shown in Fig. 28, on the side of the conductive films 772 and 774 in contact with the liquid crystal layer 776 It may be configured to provide alignment films respectively. Also, although not shown in Fig. 28, a ca Optical members (optical substrates) such as a lar filter (colored film), a black matrix (light - shielding film), a polarizing member, a retardation member, a reflection Preventing member, etc. may be provided as appropriate. For example, circular polarization by a polarizing substrate and a retardation substrate may be used. Also, as the light source, a backlight, a side - light, etc. May be used.

[0470] As the first substrate 701 and the second substrate 705, for example, a glass substrate can be used. Also, as the first substrate 701 and the second substrate 705, a flexible substrate may be used. Examples of the flexible substrate include a plastic substrate, etc.

[0471] Also, a spacer 778 is provided between the first substrate 701 and the second substrate 705. The spacer 778 is a columnar spacer obtained by selectively etching an insulating film and is provided to control the film thickness (cell gap) of the liquid crystal layer 776. Note that as the spacer 778, a spherical spacer may be used.

[0472] When using a liquid crystal element as a display element, thermotropic liquid crystal, low - molecular liquid crystal, high - molecular liquid Crystal, polymer - dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These The liquid crystal material may exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on conditions.

[0473] Also, when adopting the horizontal electric field method, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, it is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with a chiral agent of several weight % or more is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a short response time and is optically isotropic, so alignment treatment is not required. Also, when using a liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent, the viewing angle dependence can be reduced. In addition, when using a liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent, since an alignment film does not need to be provided, rubbing treatment is not required, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced.

[0474] Also, when using a liquid crystal element as a display element, TN (Twisted Nematic ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB (Optical Compensated Birefringence) mode, FLC (Ferroe lectric Liquid Crystal) mode, AFLC (AntiFerr It is possible to use, for example, the (electric Liquid Crystal) mode, etc. .

[0475] Also, a normally black type liquid crystal display device, for example, one adopting a vertical alignment (VA) mode may be used as a transmissive liquid crystal display device. Examples of the vertical alignment mode include, but are not limited to, for example, the MVA (Multi-Domain Vertical Alignment) mode, the PVA (Patterned Vertical Alignment) mode , the ASV mode, etc.

[0476] Also, as the display method in the pixel portion 702, a progressive method, an interlace method, etc. can be used. Also, when performing color display, the color elements controlled by the pixels are not limited to the three colors of RGB (where R represents red, G represents green, and B represents blue). For example, it may be composed of four pixels: an R pixel, a G pixel, a B pixel, and a W (white) pixel. Or, like the pentile arrangement , one color element is composed of two of RGB, and different two colors are selected and configured according to the color elements. Or, one or more colors such as yellow, cyan, and magenta may be added to RGB . Also, the size of the display area may be different for each dot of the color elements. However, the disclosed invention is not limited to a color display device, and can also be applied to a monochrome display device.

[0477] <Display device using a light-emitting element as a display element> The display device 800 shown in FIG. 29 has a light-emitting element 880. The light-emitting element 880 has a conductive film 844, an EL layer 846, and a conductive film 848. The display device 800 has the light-emitting element 880 By the light emission of the EL layer 846 that [the device] has, an image can be displayed.

[0478] In addition, in the display device 800 shown in FIG. 29, on the planarization insulating film 770 and the conductive film 844 an insulating film 830 is provided. The insulating film 830 covers a part of the conductive film 844. Note that the light-emitting element 880 has a top emission structure. Therefore, the conductive film 848 has translucency and transmits the light emitted by the EL layer 846. Note that in this embodiment, the top emission structure is illustrated, but is not limited thereto. For example, it can also be applied to a bottom emission structure that emits light to the conductive film 844 side, or a dual emission structure that emits light to both the conductive film 844 and the conductive film 848.

[0479] In addition, a colored film 836 is provided at a position overlapping the light-emitting element 880, and a light-shielding film 838 is provided at a position overlapping the insulating film 830, the routing wiring portion 711, and the source driver circuit portion 704 . The colored film 836 and the light-shielding film 838 are covered with an insulating film 834. Between the light-emitting element 880 and the insulating film 834 is filled with a sealing film 832. Note that in the display device 800, the configuration in which the colored film 836 is provided is illustrated, but is not limited thereto. For example, in the case where the EL layer 846 is formed by painting separately, a configuration without the colored film 836 may also be used.

[0480] Next, a display device 700A, which is a modification of the display device 700 shown in FIG. 28, will be described with reference to FIG. 30 .

[0481] <Configuration Example 2 of a Display Device Using a Liquid Crystal Element as a Display Element> The display device 700A shown in FIG. 30 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive​ It has a film 773, a conductive film 777, and a liquid crystal layer 776. The conductive film 773 is provided on a planarization insulating film 770 on a first substrate 70 1 and has a function as a reflective electrode. As shown in FIG. 30 The display device 700A is a so-called reflective color liquid crystal display device that utilizes external light, reflects the light with the conductive film 773, and displays it through a coloring film 836 as shown.

[0482] In the display device 700A shown in FIG. 30, unevenness is provided on a part of the planarization insulating film 770 of the pixel portion 702 The unevenness can be formed, for example, by forming the planarization insulating film 770 with an organic resin film or the like and providing unevenness on the surface of the organic resin film. Further, the conductive film 773 that functions as a reflective electrode is formed along the above unevenness. Therefore, when external light is incident on the conductive film 773, it is possible to diffusely reflect the light on the surface of the conductive film 773 and the visibility can be improved. In addition, the display device 700A has a light shielding film 838, an insulating film 834, and a coloring film 836 on the second substrate 705 side. The light shielding film 838, the insulating film 834, and the coloring film 836 can be formed by referring to the materials and methods described in the display device 8 00. Further, the conductive film 773 included in the display device 70 0A is electrically connected to a conductive film that functions as a source electrode or a drain electrode of the transistor 750. The conductive film 773 can be formed by referring to the materials and methods described in the conductive film 844

[0483] In addition, the display device 700A has a capacitive element 790. The capacitive element 790 has an insulating film between a pair of electrodes More specifically, the capacitive element 790 is a gate of the transistor 750 0. 0A. The conductive film 773 is electrically connected to a conductive film that functions as a source electrode or a drain electrode of the transistor 750. As the conductive film 773, it can be formed by referring to the materials and methods described in the conductive film 844 and methods.

[0484] In addition, the display device 700A has a capacitive element 790. The capacitive element 790 has an insulating film between a pair of electrodes More specifically, the capacitive element 790 has an insulating film between a pair of electrodes. More specifically, the capacitive element 790 is a gate of the transistor 750 A conductive film formed in the same process as the conductive film that functions as an electrode, a source electrode, and a drain electrode is used as one electrode, and a conductive film 792 formed in the same process as the conductive film that functions as the routing wiring of the transistor 750 is used as the other electrode. An insulating film 764 is provided between the above conductive films.

[0485] Further, different from the display device 700 shown in FIG. 28, the display device 700A has a signal line 710a instead of the signal line 710 in the routing wiring portion 7 11. Also, different from the display device 700 shown in FIG. 28, the display device 700A has a connection electrode 760a instead of the connection electrode 760 in the FPC terminal portion 708. The signal line 710a, the connection electrode 760a, and the conductive film 79 2 are formed in the same process. For example, the signal line 710a, the connection electrode 760a, and the conductive film 792 can be formed in the same process by processing a single conductive film.

[0486] A transistor, which is a semiconductor device according to one aspect of the present invention, forms a conductive film that functions as a gate electrode and a conductive film that functions as a source electrode and a drain electrode in the same process. That is to say, the conductive film that functions as a gate electrode and the conductive film that functions as a source electrode and a drain electrode are formed on the same plane. Therefore, either one or both of the conductive film that functions as a gate electrode or the conductive film that functions as a source electrode and a drain electrode may be routed through a different conductive film.

[0487] Here, an example of a connection portion that connects the conductive film that functions as a gate electrode and the conductive film that functions as a source electrode and a drain electrode will be described with reference to FIG. 37.

[0488] FIG. 37(A) is a top view of the connection portion 900, and FIG. 37(B) is a cross-sectional view taken along the line Z1-Z2 in FIG. 37(A). In FIG. 37(B), for clarity, some of the components such as the insulating film are omitted. It is a cross-sectional view between the dashed lines Z1-Z2. In FIG. 37(B), for clarity, some of the components such as the insulating film are omitted. are omitted.

[0489] The connection portion 900 includes an insulating film 904 on a substrate 902, an insulating film 908 on the insulating film 904, conductive films 910, 912, 914 on the insulating film 908, an insulating film 916 on the insulating film 908 and the conductive films 910, 9 12, 914, openings 930a, 930b provided in the insulating film 916, a conductive film 945 connected to the conductive film 910 and the conductive film 912 through the openings 930a, 930b, and an insulating film 918 on the insulating film 916 and the conductive film 945. have.

[0490] As the substrate 902, the same material as the substrate 102 shown in Embodiment 1 can be used. As the insulating films 904, 908, 916, the same materials as the insulating films 104, 108, 116 shown in Embodiment 1 can be used, respectively. Also, as the conductive films 910, 912, 9 14, 945, the same materials as the conductive films 110, 112, 114 shown in Embodiment 1 can be used. can be used.

[0491] Also, the conductive film 910 is connected to the source electrode or the drain electrode of the transistor. Also, the conductive film 912 is connected to the source electrode or the drain electrode of the transistor. Subsequently, the conductive film 945 is electrically connected to the conductive film 910 and the conductive film 912 through the openings 930a, 930b. are electrically connected.

[0492] Next, another example of a connection portion that connects a conductive film functioning as a gate electrode and conductive films functioning as source and drain electrodes will be described with reference to FIG. 40. will be described with reference to FIG. 40.

[0493] Figure 40(A) is a top view of the connection part 900, and Figure 40(B) is a cross-sectional view taken along the dashed line Z1-Z2 in Figure 40(A). In Figure 40(B), for clarity, some of the components such as the insulating film are omitted. Figure 40(B) is a cross-sectional view taken along the dashed line Z1-Z2 in Figure 40(A). In Figure 40(B), for clarity, some of the components such as the insulating film are omitted. are omitted.

[0494] The conductive film 910 and the conductive film 912 are connected via the conductive film 120a. Here, the conductive film 120a is a conductive film that is formed simultaneously with and etched simultaneously with the conductive film 120. Therefore, they have the same material.

[0495] As described above, the transistor, which is a semiconductor device according to one aspect of the present invention, can be applied to various display devices. is applicable.

[0496] The configuration shown in the present embodiment can be used in appropriate combination with the configuration shown in other embodiments. can be.

[0497] (Embodiment 6) In the present embodiment, a display device using a semiconductor device according to one aspect of the present invention will be described with reference to FIG. 31. will be described with reference to FIG. 31.

[0498] The display device shown in FIG. 31(A) includes a region having pixels of display elements (hereinafter referred to as a pixel portion 502), a circuit portion (hereinafter referred to as a driving circuit portion 504) disposed outside the pixel portion 502 and having a circuit for driving the pixels, a circuit having an element protection function (hereinafter referred to as a protection circuit 50 6), and a terminal portion 507. Note that the protection circuit 506 may not be provided. may be.

[0499] A part or all of the driving circuit portion 504 is formed on the same substrate as the pixel portion 502. This is desirable. This can reduce the number of components and terminals. The drive circuit section 504 If part or all of the drive circuit section 504 is not formed on the same substrate as the pixel section 502, then part or all of the drive circuit section 504 can be mounted by COG or TAB (Tape Automated Bonding). onding).

[0500] The pixel section 502 has a circuit (hereinafter referred to as the pixel circuit 501) for driving a plurality of display elements arranged in X rows (where X is a natural number of 2 or more) and Y columns (where Y is a natural number of 2 or more). The drive circuit section 504 has drive circuits such as a circuit (hereinafter referred to as the gate driver 504a) that outputs a signal (scanning signal) for selecting a pixel and a circuit (hereinafter referred to as the source driver 504b) that supplies a signal (data signal) for driving the display element of the pixel.

[0501] The gate driver 504a has a shift register or the like. The gate driver 504a receives a signal for driving the shift register via the terminal section 507 and outputs a signal. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc., and outputs a pulse signal. The gate driver 504a has a function of controlling the potential of a wiring (hereinafter referred to as scanning lines GL_1 to GL_X) to which a scanning signal is applied. Note that a plurality of gate drivers 504a may be provided, and the scanning lines GL_1 to GL_X may be divided and controlled by the plurality of gate drivers 504a. Alternatively, the gate driver 504a has a function of being able to supply an initialization signal. However, it is not limited to this, and the gate driver 504a can also supply another signal.

[0502] ​​​​​​​​​​​​​The source driver 504b has a shift register and the like. The source driver 504b receives, via the terminal portion 507, not only a signal for driving the shift register but also a signal (image signal) that serves as the source of the data signal. The source driver 504b has a function of generating a data signal to be written into the pixel circuit 501 based on the image signal. Also, the source driver 504b has a function of controlling the output of the data signal in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. Also, the source driver 504b has a function of controlling the potential of a wiring (hereinafter referred to as signal lines DL_1 to DL_Y) to which the data signal is supplied. Alternatively, the source driver 504b has a function of being able to supply an initialization signal. However, it is not limited to this, and the source driver 504b can also supply other signals.

[0503] The source driver 504b is configured using, for example, a plurality of analog switches and the like. The source driver 504b can output, as a data signal, a signal obtained by time-division multiplexing the image signal by sequentially turning on a plurality of analog switches. Also, the source driver 504b may be configured using a shift register or the like.

[0504] Each of the plurality of pixel circuits 501 receives a pulse signal via one of the plurality of scanning lines GL to which a scanning signal is supplied, and receives a data signal via one of the plurality of signal lines DL to which the data signal is supplied. Each of the plurality of pixel circuits 501 has its writing and holding of data in the data signal controlled by the gate driver 504a. For example, the pixel circuit 501 at the m-th row and n-th column receives the gate driver 504a via the scanning line GL_m (m is a natural number less than or equal to X). ​​​​ A pulse signal is input from , and a data signal is input from the source driver 504b via the signal line DL_n (n is a natural number less than or equal to Y) according to the potential of the scanning line GL_m.

[0505] The protection circuit 506 shown in FIG. 31(A) is connected to, for example, the scanning line GL, which is a wiring between the gate driver 504a and the pixel circuit 501. Alternatively, the protection circuit 506 can be connected to the signal line DL, which is a wiring between the source driver 504b and the pixel circuit 501. Alternatively, the protection circuit 506 can be connected to the wiring between the gate driver 504a and the terminal portion 507. Alternatively, the protection circuit 506 can be connected to the wiring between the source driver 504b and the terminal portion 507. Note that the terminal portion 507 refers to a portion provided with terminals for inputting a power supply, a control signal, and an image signal from an external circuit to the display device.

[0506] The protection circuit 506 is a circuit that makes the wiring to which it is connected and another wiring in a conductive state when a potential outside a certain range is applied to the wiring to which it is connected.

[0507] As shown in FIG. 31(A), by providing the protection circuits 506 in the pixel portion 502 and the driving circuit portion 504, respectively, the resistance of the display device to an overcurrent generated by ESD (Electro Static Discharge) or the like can be increased. However, the configuration of the protection circuit 506 is not limited to this. For example, a configuration in which the protection circuit 506 is connected to the gate driver 504a, or a configuration in which the protection circuit 506 is connected to the source driver 504b can also be employed. Alternatively, a configuration in which the protection circuit 506 is connected to the terminal portion 507 can also be employed.

[0508] Also, in FIG. 31(A), an example is shown in which a gate driver 504a and a source driver 504b form the driving circuit section 504, but the configuration is not limited to this. For example, only the gate driver 504a may be formed, and a separately prepared source driver circuit may be mounted on a substrate (for example, a driving circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film).

[0509] Also, the plurality of pixel circuits 501 shown in FIG. 31(A) may have, for example, the configuration shown in FIG. 31(B).

[0510] The pixel circuit 501 shown in FIG. 31(B) includes a liquid crystal element 570, a transistor 550, and a capacitor element 560.

[0511] Also, a semiconductor device according to an aspect of the present invention can be applied to, for example, the transistor 550. As the transistor 550, the transistors 150 to 154, transistors 190 to 194, transistor 150A, transistor 190A, and transistor 190B shown in the previous embodiments can be applied.

[0512] One potential of a pair of electrodes of the liquid crystal element 570 is appropriately set according to the specifications of the pixel circuit 501. The liquid crystal element 570 has its alignment state set according to the data to be written. Note that a common potential (common potential) may be applied to one of a pair of electrodes of the liquid crystal elements 570 included in each of the plurality of

[0513] For example, as a driving method of a display device including a liquid crystal element 570, a TN mode, an STN mode, a VA mode, an ASM (Axially Symmetric Aligned Micro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (AntiFerroelectric Liquid Crystal) mode, an MVA mode, a PVA (Patterned Vertical Alignment) mode, an IPS mode, an FFS mode, or a TBA (Transverse Bend Alignment) mode may be used. - mode, an ASM (Axially Symmetric Aligned M icro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an FLC (Ferroelectric Liqu id Crystal) mode, an AFLC (AntiFerroelectric Li quid Crystal) mode, an MVA mode, a PVA (Patterned Ve rtical Alignment) mode, an IPS mode, an FFS mode, or a TBA (Transverse Bend Alignment) mode, etc. may be used. In addition, as a driving method of the display device, in addition to the driving methods described above, an ECB (Electrically Controlled Birefringence) mode, a PDLC (Polymer Dispersed Liquid Crystal) mode, a PNLC (Polymer Network Liquid Crystal) mode, a guest-host mode, etc. are available. However, it is not limited to this, and various liquid crystal elements and their driving methods can be used. (Polymer Dispersed Liquid Crystal) mode, a PNLC (Polymer Network Liquid Crystal) mode, a guest-host mode, etc. are available. However, it is not limited to this, and various liquid crystal elements and their driving methods can be used. (Polymer Network Liquid Crystal) mode, a guest-host mode, etc. are available. However, it is not limited to this, and various liquid crystal elements and their driving methods can be used. (Polymer Network Liquid Crystal) mode, a guest-host mode, etc. are available. However, it is not limited to this, and various liquid crystal elements and their driving methods can be used.

[0514] In the pixel circuit 501 at the m-th row and n-th column, one of the source electrode or the drain electrode of the transistor 550 is electrically connected to the signal line DL_n, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. Also, the gate electrode of the transistor 550 is electrically connected to the scanning line GL _m. The transistor 550 has a function of controlling the writing of data of the data signal by being turned on or off. In the pixel circuit 501 at the m-th row and n-th column, one of the source electrode or the drain electrode of the transistor 550 is electrically connected to the signal line DL_n, and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. Also, the gate electrode of the transistor 550 is electrically connected to the scanning line GL _m. The transistor 550 has a function of controlling the writing of data of the data signal by being turned on or off. In the pixel circuit 501 at the m-th row and n-th column, one of the source electrode or the d...

Claims

1. A display device having a plurality of pixels each having a transistor, a first conductive film having a region in contact with an upper surface of the substrate and functioning as a first gate electrode of the transistor; a first insulating film having a region located above the first conductive film; an oxide semiconductor film having a region in contact with a top surface of the first insulating film and including a channel formation region of the transistor; a second conductive film having a region in contact with a top surface of the oxide semiconductor film and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive film having a region in contact with a top surface of the oxide semiconductor film and functioning as the other of the source electrode and the drain electrode of the transistor; a second insulating film having a region in contact with an upper surface of the oxide semiconductor film; a fourth conductive film having a region overlapping with the oxide semiconductor film with the second insulating film interposed therebetween and functioning as a second gate electrode of the transistor; and a third insulating film having a region in contact with an upper surface of the second conductive film, a region in contact with an upper surface of the third conductive film, a region in contact with an upper surface of the fourth conductive film, and a region in contact with an upper surface of the oxide semiconductor film; a fifth conductive film having a region in contact with the upper surface of the substrate and made of the same material as the first conductive film; a sixth conductive film having a region in contact with an upper surface of the fifth conductive film and a region in contact with a lower surface of the third insulating film; a seventh conductive film having a region that intersects with the fifth conductive film and a region that contacts a lower surface of the third insulating film in a plan view; the third conductive film is electrically connected to the sixth conductive film via the fifth conductive film; The second conductive film, the third conductive film, the fourth conductive film, the sixth conductive film, and the seventh conductive film each have the same material.

2. A display device having a plurality of pixels each having a transistor, a first conductive film having a region in contact with an upper surface of the substrate and functioning as a first gate electrode of the transistor; a first insulating film having a region located above the first conductive film; an oxide semiconductor film having a region in contact with a top surface of the first insulating film and including a channel formation region of the transistor; a second conductive film having a region in contact with a top surface of the oxide semiconductor film and functioning as one of a source electrode and a drain electrode of the transistor; a third conductive film having a region in contact with a top surface of the oxide semiconductor film and functioning as the other of the source electrode and the drain electrode of the transistor; a second insulating film having a region in contact with an upper surface of the oxide semiconductor film; a fourth conductive film having a region overlapping with the oxide semiconductor film with the second insulating film interposed therebetween and functioning as a second gate electrode of the transistor; and a third insulating film having a region in contact with an upper surface of the second conductive film, a region in contact with an upper surface of the third conductive film, a region in contact with an upper surface of the fourth conductive film, and a region in contact with an upper surface of the oxide semiconductor film; a fifth conductive film having a region in contact with the upper surface of the substrate and made of the same material as the first conductive film; a sixth conductive film having a region in contact with an upper surface of the fifth conductive film and a region in contact with a lower surface of the third insulating film; a seventh conductive film having a region that intersects with the fifth conductive film and a region that contacts a lower surface of the third insulating film in a plan view; the third conductive film is electrically connected to the sixth conductive film via the fifth conductive film; the second conductive film, the third conductive film, the fourth conductive film, the sixth conductive film, and the seventh conductive film have the same material; the first insulating film has a laminated structure of a first film having nitrogen and silicon and a second film located on the first film and having oxygen and silicon; the second insulating film includes oxygen and silicon; The display device, wherein the third insulating film contains oxygen and silicon.

3. In claim 1 or 2, each of the second insulating film and the third insulating film has a single layer structure or a multilayer structure; The display device, wherein the second conductive film and the third conductive film have a single layer structure or a stacked layer structure.

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